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DIVISION

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TN{S320C6713 DSK BOARD IIEATURtrS


gc Contents

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C6713 DS( Soarr

Pavier S,uluply

C6713DSKCode
Conrposer Sludio CD

Tt45320C6713 DSK
.......Technical Beference

TSe-C6713rI'{ DSK builds on T['s industry-leading line of low cost, easy-to-use


DSp Starter Kit
(DSK) development boards- The'high-performante board features the TMS3
20C6713 floatlng.
poiht DSP- Capable of performing 13501million floating-qoilj operations
inuoilopsl+
the C6713 DSP makes the C6713 DSK thc nrost pou,erful bSf developrr6nt
boara.

p;;;;

Jne

pSf

is USB port interfaced platform that allows to efficiently develop

and test applications

for the c6713. The DSK consists of a C6713-based printed circuit bpard that
serve as a
hardware reference design for T['s customers' products. Wit[ extensive host pC ',vil[
and target DSP

software support, including bundled TI tools, the DSK provides ease-of-use and
capabilities that
are attractive to DSP engineers.
The following checklist details items that are shipped with the C6713 DSK-

External 5VDC polyver supply

IEEE 1284 compliant male-ro-fbrnale cable


Code Composer Siudio DSK tools

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onboarci that a110u's full-speed 'erification


-I)Sp
The C(.,713 DSK provides:

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code':':i'+ii"

a TN{S 3ZOC67 13
Tlre. c67 13 DSK has

u,itl'r Code

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Co'''po'J'

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n USB Interface
.
spnaHa and Flash Ro\{
Data Converslo n (Aic)
for
circuit
ilrterface
A,, analog

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an IiO Port
suppoft
Ernbedded JTAG emulation

interface.(EMIF) a*d peripheral


memory
external
DSp
DSK provide
drird partv daughter boa.ds'
connectors on trre c6713
,"';:
";;;"dJ "itt' ""ti"*tr
sigflals rhar enableitsiunctionality
of
can assist y-ou in the developnrent to
that
design
hardware reference
interfacing the DSP
The DSK provides a c61r3
prou-ioinf;;rb;;;"eior
clock' JTAG' and
ysul ewn c6713_based productr. rr;fii;;;;;
aiso addresses power'
i"'ign
and p.ri;;;i;;'trc
.,arious types of *"*ories
parallel peripheral interfaces'
(AI( has the follorvirrg
1 -r^_c^^a^i,-'rif
circuit (AIC)
interface
anarog
This
codec.
a stereo
The c6713 DSK includes
\

uh*uor.tiati"tt
Hi gh-P e rro

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.

ghted at 4 8

it S i grna- Del ta A D c (A-u'ei


^014
at 48 kl{z)
g-*eighted
100-dB sNR Multibit
Tl C54-x DSP Core Voltag
c"*p"iii"".uit1r
Supply:
Di;;;"i
|.42V _ 3.6 V Core
Both rI c54x DsP Buffeq

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z.1v

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- 3.6 v Buffer ."?ffit#d"pptv''d^p"J;;

Voltages

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Support
8-kl{z -96-klTzSarnpling Frequency
Mutltgrltocol serial Port
Via TI McBSP-Compatible

rvare Control

.llC-Compatibleandi'pi-i"*patib.leSerial-PortProtocols
M'cBSPs
Glueless Lriterface to TI

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Programmibl"-t*i:

Interface

)SP-Cornpatible
\'ria.rr
.ssP for Iboth ADc
Audio-Data lnput/output
Y"""!tY"]13'::5;ffiir"
glly One McBSP
n"q"i'i"g
tnterfl""
' llS-Compatit'te
tt f-Sg Justified-DataTransfers
' ' Standa tdl2S' MSB' Lengtl'rs
' toizotz4l3}-Bitword
generation in
the floating-point DSP
compose
The TMS3 z0e6tr3rMQSP
DSp pratrorm rhe

lfJl:3ffi
dji3,Hti; ;'-bJ J;'p H1,X;*Hf[ii,,;t*gtn#

.!i*..3;,::il:f

[lm;i*m:.;;iffl:ifJ,,:Hilii"*lt*6?ii;3ci'u']r
tJ;lur.,ate and develop applica'{
custom"r''
enables
thar
desigrr
pratform

reference
-i"*irv.
arso ser'e, ur"u" riurTtuare
rne
psp
[otes are available
.psK
the TI C6?xx
Jj":
'lpri*tion
TMS320c67l3 DsP' Schematics,
:iy,,,,,,,,,,,,,,,1il;J
time to nrarket'
iffi1il-""TJ.,",i"i'i,""t "'J '"au""

standalone developrne.t

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TI.DIViSION

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Operating at225 N4Hz, the C6713 delir,ers up to i350 milliou floatir"rg-point operations per second
(|\.{FLOPS), I800 miliion instructions per second (l\4IPS), aird u'ith dual fixed-/floating-point
rirultipiiers up to 450 miilion rrultipll,-accurnuiate operations per second (l\4i\4ACS).Tlie DSI( uses
the 32-bit EMIF lor the SDRAI\4 (CEO) and daughter card expansion interface (CE2 and CE3).
The Flash is attached to CEI of the EI\4IF in 8-bit urode.

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An on-board AIC23 codec allorvs the DSP to transmit and receive analog signals. IvIcBSPO is used
for the codec control interface and Ir,tcBSPl is used for data. Analog audio I/O is done through
four 3.5mrn audio jacks that correspond to microphone iuput, line input, line output and headphone
output- The codec can select the microphone or the line input as the active input. The analog
output is driven to both the line out (fixed gain) and headphone (adjustable gain) connectors.
McBSP I can be re-routed to the expansion connectors in softrvare
used to implement glue logic that ties the board
user interface that lets the user configure the
based
togetherThe
CPLD
has
a
register
components
board byreading and writing to the CPLD registers- The registers reside at the midpoint of CEi.

A programmable logic device called a CPLD is

The DSK includes 4 LEDs and 4 DIP switches as a simple way to provide the user u,ith interactive
feedback. Both are accessed by reading and rwiting to the CPLD registers.

An included 5V extemal power supply is used to porver tlre board. On-board voltage regulators
provide thg i.,?_q.Il..P--$.P_..,".gfg..ygLtAge, 3.3V digital and 3.3V analog voltages. A voltage supervisor
monitors the internally generated voltage, and u,ill hold the boards in reset until the supplies are
within operating specifications and the reset button is released. If desired, JPI and JP2 can be used
as power test points fifflhe core and I/O power supplies.
\^.ith the DSK through an embedded JTAG emulator with a USB
Code Composer
"orr,rnl*i"ates
host interface. The DSK can also be'used with an external ernulator tfuough the extirnal JTAG
connector.

TMS320C6713 DSP Features


I{ighest-Perfo rmance Fio ating-Point D igitai

ignai Pro cesso r (D S P) :

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Advanced Very Long Instruction Word (VLIW) Ttv{S320c67xrt\{ DSP Core

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Trvo ALUs (Fixed-Point)


Four ALUs (Floating- and Fixed-Point)
Trvo N4ultipliers (Fioating- arld Fixed-Point)

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.;.,[,oaci.StoreArcl.ritectureWitir323Z.BllGeneral.PurpoSeRegisters

Instruction Set Featttres

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Single- and Double-Precision

Llfi-Zlr4emorY

Architecture

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Additional L2 MaPPed RAM


Device Configuration
; Boot lvlode: HPI, 8-, l6-, 32-tsit ROII'I Boot

(EMII)
32-Bit Extemal Mernory Interface
nirnor"r, Frash, sBsRAM, and sDRAM
i"ar Addressabre extela,l -co

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i;;n
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(HPI)
Interface

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6 Independent crran,er
".,"""i,r

Y"i"Y, t"' (

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"t'oi
16-Bit Host-Port
Ports (McBQfq)
Two Multichannel Buffered Serial
- --Each (1 TX and I Rx)
Zones
cto"rt
i;i;depend"'it

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the Clock Zones


Individualty Assignable to any of

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Programtnable Clock Generator


Generator
Programmable Frarne S)'nc
Slots
TDI'.{ Streams Fronn 2-32 Time
SuPPor-t for Slot Size:

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16,20,24,28,32 BitS
. Data Formatter for Bit Manipulation
Bit Strearn.U"Xff
Wide Variety of I2S pd Sirnilar
8,- 12,

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Up to 16 trdnsmit Pins
Data
Enhanced Ghannel Status/User

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Tv,o Inter-rntegrated Circuit
Tirners
Trvo 32-Bit General-Purpose

Ir{ulti-Mastet and Slave Interfac'es

*DedicatedGPloModuleWithl.6pins(ExternallnterruptCapable)
Module
.l Frexible pt us"-r-o"t"a-loor, (pLL) Based clock Generator
-i tEEE-l149.1 (iTA6 t I Boundary-Scan-Compatible

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Package Options:

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0.13-gm/6-Level Copper Ir4etal Process

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3.3-V I/Os, I .ZI -v Internal (GDP & PYP)


3-3-V I/Os, 1.4-V Internal (GDP)(300 MHz only)

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TI\{S320C6713 DSK Oven,ierv Bloclc Diagram

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