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Inrush Current Control

Application Note
Powering Communications and Technology
Table Of Contents
1. INPUT FILTER
2. INRUSH CURRENT
3. INRUSH CURRENT CONTROL
3.1 INRUSH CURRENT CONTROL
BY A RESISTOR
3.2 INRUSH CURRENT CONTROL
BY A THERMISTOR
3.3 ACTIVE INRUSH CURRENT
CONTROL
3.4 USING LT1640L FOR INRUSH
CURRENT AND HOT SWAP CONTROL

2. Inrush Current
When a DC/DC converter is connected to the input
voltage source, it causes a large peak inrush current
as a result of the application of the high dv/dt to the
filter capacitance. These filter capacitors (both
internal and external) act like a short circuit,
producing an immediate inrush surge current with a
fast rise time.

1
1
2
2
2

A similar phenomenon occurs during hot swapping inserting and removing boards in systems already
connected to the voltage source.

2
4

The peak inrush current can be significantly greater


than the steady state current. If the inrush current is
not limited, it may burn out fuses, damage connector
pins, cause glitches in the input voltage, and
generate high di/dt and dv/dt. Therefore, the peak
current and current ramp must be controlled.
The picture in Figure 2 shows the inrush current of a
Power-One's DC/DC converter model HLS30ZE,
connected to the 48V source via 1' cable.

1. Input Filter
Power-One DC/DC converters have an input filter to
reduce magnitude of the ripple current reflected
back to the input voltage source. The input filter
usually contains both capacitors and inductor and is
configured as a filter. See Figure 1 for the
schematic of the typical input filter.

Fig. 1 Typical configuration of the input filter

Series
HBS/HES
HAS
HBD
QBS/QES
TES
TQD
HLS
QLS
HLD
TLD

C1, F
1
0.22
0.5
0
1
1
1
1
1
1

L1, H
0.65
1
0.1
1
1
1
0.5
1
1
1

Fig. 2 Inrush current of HLS30ZE

The magnitude of the inrush current depends on


many factors, such as the input voltage, the source
and supply line impedance, the internal input
inductance and resistance, as well as capacitance
and ESR of the internal input filter of the DC/DC
converter. Some of those parameters depend on
particular system design and layout and are difficult
to calculate. The most accurate way to determine
the inrush current is to measure it in the application.

C2, F
8
6
7
3
9
9
4
2
5
8

Make sure that the current sensor used to measure


the inrush current does not limit its magnitude.
Non-invasive sensors such as Hall sensors are
recommended
for
the
inrush
current
measurements.

Note that the parameters in the table are nominal and will vary
depending on the line and load conditions.

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The table below contains parameters of the input


filters for several series of Power-One DC/DC
converters.

Inrush Current Control


Application Note
Powering Communications and Technology

charged before the resistor is shorted out. There is


also no inrush current limit when power is applied to
a system which has boards already inserted.

An addition of a 100F aluminum electrolytic


capacitor significantly increases the inrush current
as can be seen in Figure 3.

3.2 Inrush current control by a thermistor


The resistor can be replaced with a NTC thermistor
which does not need to be shorted out by the short
pins when the board is fully inserted. A thermistor is
a thermally sensitive resistor with a resistance that
changes significantly and predictably as a result of
temperature changes. The resistance of the current
limiting NTC thermistor decreases as its
temperature increases due to the current flowing
through the device. As the thermistor self-heats, its
resistance begins to drop and a relatively small
current charges filter capacitors.
After the
capacitors become charged, the self heated
thermistor introduces very low resistance in the
circuit.

Fig. 3 Inrush current of HLS30ZE with an external 100F


electrolytic capacitor

The pictures demonstrate that the inrush current


and, especially, the I2t are determined mostly by the
external capacitor connected across the input of the
DC/DC converter.

Because current limiting thermistors heat after they


suppress inrush currents, these devices require a
cool-down time after power is removed. This cooldown or "recovery" time allows the resistance of the
thermistor to increase sufficiently to provide the
required inrush current suppression the next time it
is needed. A cool-down time varies according to the
particular device, its mounting method and the
ambient temperature. The typical cool-down time is
roughly one minute. It may be unacceptable in
systems requiring high availability.

3. Inrush Current Control


There are several possible ways to achieve this.

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3.1 Inrush current control by a resistor


The schematic in Figure 4 shows the resistor R1
which limits the inrush current during plugging
boards in the live system. The resistor is shorted
out by the short pins when the board is fully inserted.
C1 represents total capacitance of the external
capacitor and the DC/DC converter's input filter.

NTC thermistors are available from a variety of


manufacturers, namely Ametherm, RTI Electronics,
Thermometrics, and others.
3.3 Active inrush current control
3.3.1 Using MOSFETs for inrush current control
The limitations of passive methods can be
overcome by utilizing MOSFET devices for inrush
current control. MOSFETs are useful due to the
simple gate drive requirements and low Rds_on. The
active inrush current control can be accomplished
with a single MOSFET and a few external passive
components.
MOSFETs are charge controlled devices and can be
represented with the simplified equivalent circuit
shown in Figure 5.

Fig. 4 Inrush current limiting by a resistor

The problem with this method is that the insertion


time is not controlled. A very fast insertion may not
have the capacitor C1 fully
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Application Note
Powering Communications and Technology

If the external capacitance is much larger than the


internal Cgd, it will diminish the effect of the highly
nonlinear capacitance Cgd on the transition process.
C2 acts as an integrator and is used to accurately
determine the switching characteristics of the
MOSFET. The ability to control the constant linear
slope of the drain voltage transition allows accurate
control of the inrush current.
3.3.2 Active inrush control circuit description
The schematic in Figure 6 shows a self starting
MOSFET based circuit that provides the active
inrush current control.
The MOSFET Q1 is placed in the return path of the
DC/DC converter. Upon application of the input
voltage or insertion of the board into the powered
backplane, pin 1 of the DC/DC converter rises to
the input voltage level. The control circuit then
brings it down to the ground potential at a fixed
rate. The drain voltage decreases at a linear slope
which is determined by C2R2 time constant. This
slope determines the maximum magnitude of the
inrush current.

Fig. 5 Equivalent circuit of a N-channel MOSFET with


external capacitance C2

Capacitance Cgd, Cgs, and Cds can be determined


from the following equations:

C gd = C rss , (1)

C2 is selected from the following condition:

C gs = Ciss C rss , ( 2)
C ds = Coss C rss , (3)

C 2 >> (C gs + C gd ), ( 4)

where, Crss, Ciss, and Coss are parameters that are


available from the MOSFET datasheets.

R2 is determined by the desired inrush current:

R2 =

Cload Vmax
, (5)
C 2 I inrush

where Vmax is the maximum input voltage, Cload is a


sum of C3 and the DC/DC converter's input filter
capacitance, and Iinrush is the magnitude of the inrush
current.

Fig. 6 Active inrush current control circuit

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How fast the capacitance are charged and


discharged determines how fast the MOSFET will
turn on or off. In order to ensure that the transition
from state to state is linear and predictable, an
external capacitor C2 is added in parallel with Cgd.

Inrush Current Control


Application Note
Powering Communications and Technology

3.3.3 MOSFET selection


The following parameters are important for the
selection of a proper MOSFET for the active inrush
control circuit.

R3 is a damping resistor and can be arbitrarily


chosen, if the following condition is met:

R3 << R 2, (6)
D1 is required to limit the gate-to-source voltage of
the Q1.

3.3.3.1 DRAIN-TO-SOURCE BREAKDOWN


VOLTAGE
Vds should exceed both the maximum input voltage
Vmax and the maximum input voltage transient. For
standard telecommunication systems with an
adequate transient protection, select a MOSFET
with Vds100V.

An artifact of the internal parasitics of a MOSFET is


that the structure capacitors form a simple voltage
divider from drain to gate to source (Figure 5). At
the instant the input voltage is applied from drain to
source of the Q1, the gate voltage will be internally
pulled up past its threshold voltage. This will result
in an unwanted pulse of the current that may cause
a minor power bus transient. This transient quickly
subsides as the structure capacitors charge.

3.3.3.2 GATE-TO-SOURCE VOLTAGE


The Zener diode D1 is used to protect gate-tosource junction of the MOSFET Q1. Obviously, Vgs
should exceed the maximum reverse breakdown
voltage of D1. In reality, the MOSFET is selected
first and then D1 with the appropriate rating is
selected. For a typical MOSFET with Vgs= 20V, a
12V Zener diode is recommended.

Components R1, C1, and D2 are added in order to


keep the Q1 off during initial input voltage
application.
When the input voltage is applied, the gate voltage
will try to ramp up, but as soon as the gate-tosource voltage Vgs is high enough to turn the diode
D2 on, it will cause all of the charge to be
transferred to the capacitance C1. When C1 is
charged at a rate dependent on C1R1, the Vgs
increases at the same rate (at a diode drop greater)
until it reaches a voltage to support the inrush
current.

3.3.3.3 DRAIN-TO-SOURCE ON-RESISTANCE


The MOSFET should be able to handle power
dissipated in Rds_on. The power is determined by the
equation:

Below are equations for calculations of C1 and R1:

I DC =

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C1
R1

2
Pon = Rds _ on I DC
, (9)

where Idc is the maximum input current of the


DC/DC converter. IDC is determined by the
equation:

C 2 (Vmax Vth + VD 2 )
, (7 )
Vth VD 2
5 R3 C 2
V plt Vth
C1 abs ln1
Vmax

Pout
, (10)
Vmin

where Pout is the maximum required output power of


the DC/DC converter, Vmin is the minimum input
voltage, and is the efficiency of the DC/DC
converter at Pout and Vmin. The efficiency curves for
Power-One DC/DC converters can be found in
datasheets and application notes. In addition, Rds_on
of the MOSFET should be low enough so the
voltage drop caused by it will be negligible
compared to the input voltage.

, (8)

where Vth is the minimum threshold voltage of the


Q1, VD2 is the forward voltage drop of the D2, and
Vplt is the gate-to-source voltage required to support
the drain current equal to Iinrush. Vplt can be found
from a transfer curve provided by MOSFET
manufacturers.

3.3.4 Design example


Given:

Refer to Motorola Application Note AN1542 for


detailed calculations of the components values.

Vmax=75V
Iinrush=3A
Q1 is IRF540S
D2 is BAS21

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Inrush Current Control


Application Note
Powering Communications and Technology The detailed description of the LT1640 family is

given in the Linear Technology LT1640 Application


Note. While written with the help of Linear
Technology Inc., this chapter is not intended to be a
LT1640 user manual. It is rather a description of the
implementation of the LT1640 based circuit for
inrush current control of Power-One DC/DC
converters. Refer to the LT application note for
more detailed information on LT1640 operation and
features.

From (4): C2>>1700pF. Select C2=0.01F;


From (5): R2=252.5k. Select R2=240k;
Select R3=270<<R2;
From (7): C1=0.75F. Select C1=1F;
From (8): R1=499.5. Select R1=1k.
The picture in Figure 7 illustrates the operation of
the circuit shown in Figure 6. During the test, the
DC/DC converter operated at no load.

The circuit presented in Figure 8 shows a reliable


yet simple way of controlling the inrush current and
managing the hot swap process without causing
transients or disruptions.
Once again, it is
accomplished by placing an N-channel MOSFET
Q1 in series with the negative input lead of the
DC/DC converter. Just like in the previous chapter,
the idea is for the Q1 to be solidly held in the off
state during the turn-on or insertion event. When it
is off, the Q1 isolates the non-charged capacitor C3
and the input filter capacitance of the DC/DC
converter from the input voltage source at the
moment of initial input voltage application or board
insertion. Subsequently, the Q1 is slowly turned on
and the capacitance is charged up in a controlled
manner. Once the Q1 is fully on, the PWRGD
output is applied to the ON/OFF pin of the converter
to permit it to begin operation. At this point, power
is being supplied by the input voltage source and
the secondary side circuit begins operation.

Fig. 7 Operation of the active inrush control circuit at 75V and


no load

The DC/DC converter starts operating as soon as


the voltage on its input reaches the undervoltage
lockout threshold. When the converter turns on, it
draws a pulse of current to charge its output
capacitors. The current pulse causes the glitch in
the input current waveform.
3.4 Using LT1640L for inrush current and hot
swap control
Complex systems may require more sophisticated
control methods to achieve additional functionality
such as:

ON/OFF control of converters during board


insertion and removal

Reset of inrush control circuit when the input


voltage drops below the minimal operational
voltage, so the circuit will be functional again
when the input voltage returns to its nominal
value

C2 =

45 A Cload
C gd , (11)
I inrush

C1 = (C 2 + C gd )

The Linear Technology LT1640 provides a simple


but effective method of achieving the inrush current
control. The device operates over a wide range of
input voltages, provides both under and overvoltage
protection, and also permits active control of DC/DC
converters.

Vmax Vth
C gs , (12)
Vth

The value of C2 sets the peak inrush current


magnitude, Iinrush, during the controlled Q1 turn-on
interval. Setting the inrush current equal to the
maximum steady state input current of the
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3.4.1 Circuit description


3.4.1.1 MOSFET'S RC
The placement of the additional external capacitor
to the gate-source junction of Q1 overrides the
internal parasitic divider described in the paragraph
3.3.2 and eliminates the current pulse upon initial
application of the input voltage or insertion of the
board into a powered backplane. The proper value
of the external gate-source capacitor C1 can be
determined by the equations below:

Inrush Current Control


Application Note
Powering Communications and Technology

Fig. 8 Inrush control circuit based on LT1640L

insertion/extraction input signal be applied to the


LT1640L. The most convenient method of applying
this signal is via undervoltage lockout input (pin 3).
Early warning of extraction assures that the Q1 is
switched off by the time the power pins break
connection. This guarantees a "dry" or "cold"
disconnect and alleviates the input voltage glitches
and disturbance during the extraction.

DC/DC converter is a good starting point. Changes


in the target inrush level, MOSFET type, and,
possibly, changes in the MOSFET manufacturer will
influence the values of C1 and C2. The users are
strongly advised to calculate these values rather
than copy example values from the datasheets and
applications.

High Density - Board Mounted Power Division

The function of R18 is to decrease turn off time of


Q1, while R3 negates the presence of C2 at the
initial application of the input voltage. Values from
10K to 15K are suitable for R3.

Two possible circuit approaches are shown in


Figure 9.

3.4.1.2 POWER GOOD OUTPUT SIGNAL


While there are both high and low PWRGD output
versions of the controller (LT1640H and LT1640L),
the L version is recommended for its better current
sinking capability. For the applications where optical
isolation is employed, the LED of the optocoupler
can be driven directly by a LT1640L. Those
applications include mostly systems where an EMI
filter is connected between the inrush control circuit
and the input of a DC/DC converter. Furthermore,
the optocoupler can be used to interface with
DC/DC converters requiring either active high or
active low ON/OFF control. Active low ON/OFF
control is usually indicated by suffix "N" in a PowerOne converter part number.

Fig. 9 LT1640 control options

Approach a) illustrates the simplest way to generate


the insertion/extraction signal and approach b)
shows the scheme with isolated source to permit
host control.

Applications with active low ON/OFF control inputs


and without intermediate EMI filters can use the
direct connections illustrated in Figure 8.

While short contact pins are shown in the


schematics, there are alternative methods where
board ejector mechanical switches are employed.
This could eliminate the need for the short pins at
the expense of more complicated mechanics.

3.4.1.3 INSERTION/EXTRACTION SIGNAL


It is strongly recommended that a board
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Application Note
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3.4.1.4 UV AND OV DIVIDER STRINGS
The schematic in Figure 8 shows separate divider
strings for the UV and OV functions. Separate
strings simplify the resistors value calculations at the
added expense of one resistor when compared to
the approach shown in the LT application note. The
UV and OV input threshold voltage is 1.223V so the
nearest 1% resistor value of 12.4KOhm is selected
for a string current of 100A. The top resistors are
determined based upon the required UV and OV
thresholds. The values shown in Figure 8 set the
UV threshold at 30V and OV threshold at 74V Note
that the two upper resistors have nearly the full input
voltage across them.

It is recommended that some bulk capacitance be


placed on the backplane. As a rule of thumb, the
suggested amount of capacitance is two to four
times the value of capacitance that is located on the
board (C3 in Figure 8).

The capacitors C5 and C6 are for noise protection.


It is strongly recommended that they are used and
placed as close to the respective pins of the
LT1604L as possible.

Figure 10 illustrates the operation of the circuit


shown in Figure 8 at the input voltage of 48V and
no load on the output of the DC/DC converter.

3.4.2 Design example


Given:
Vmax=75V
Iinrush=3A
Q1 is IRF540S
Select R18=270 and R3=12k
From (11): C2=1380pF. Select C2=1500pF;
From (12): C1=0.058F. Select C1=0.1F.

3.4.1.5 VIN FILTER


R4 and C7 form a low pass filter on the input voltage
rail of the LT1640L. For effective decoupling, C7
needs to be placed as close to the IC as possible.
3.4.1.6 CIRCUIT BREAKER
The schematic in Figure 8 does not include the
electronic circuit breaker described in the LT
application note. There are two reasons for this:
First, safety standards require the use of fuses for
protection from a catastrophic failure of the capacitor
C3 or the input filter capacitor of the DC/DC
converter. The fuses make the electronic circuit
breaker redundant.

Fig. 10 Operation of the LT1640 inrush control circuit at 48V


and no load.

When the voltage is applied to the input of the


DC/DC converter, the ON/OFF line is pulled up by
the converter's internal voltage source. As soon as
the capacitor C3 and the filter capacitance are
charged, the PWRGD signal pulls the ON/OFF line
low, enabling the DC/DC converter.

Because the function is redundant and difficult to


implement, users are advised to omit it.
3.4.1.7 OPTIONAL PROTECTION
According to Linear Technology, some systems
have demonstrated problems that have been solved
through the addition of a RC snubber and/or a
transient clamp across the input voltage bus. The
inclusion of those components as "do not stuff"
items is a cheap insurance against an unnecessary
board spin in the event they end up being required.

The picture in the Figure 11 illustrates the operation


of the circuit at the input voltage of 48V and full load
on the output of the DC/DC converter.

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Second, the implementation of the electronic circuit


breaker requires very careful attention to the PCB
layout, noise protection and deglitching. Extra
components need to be added to make the circuit
work properly under different conditions.

Inrush Current Control


Application Note
Powering Communications and Technology

Fig. 11 Operation of the LT1640 inrush control circuit at 48V


and full load

Fig. 13 Operation of the LT1640 inrush control circuit at 75V


and full load

The bottom trace represents the output voltage of


the DC/DC converter. The voltage starts rising as
soon as the PWRGD signal is applied to the
ON/OFF pin of the converter (see Figure 10). Since
the converter is now loaded, the input current
increases too, but only to its steady state level
determined by the input voltage and the output load.

The inrush current reaches its maximum at


Vin=75V and is 2.4A, 20% less than the design
goal. The difference can be due to capacitors
tolerances and variation of MOSFET parameters.

High Density - Board Mounted Power Division

The pictures in Figure 12 and Figure 13 illustrate the


operation of the circuit at the input voltage extremes
and full load on the output of the DC/DC converter.

Fig. 12 Operation of the LT1640 inrush control circuit at 36V


and full load

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