Report

Design of Motor Speed Sampling, Amplification, Filtering and Display Circuit

Project Introduction:
There are two outputs of industrial sensor one is analog voltage and other is analog current. In
this project we have been given speed of motor in term of Dc current, ranges from -2.5mA to
2.5mA and we have to amplify this current to voltage ranges from 2 to 3v. Then by using low
filter we have to filter signal above 100 Hz. The resulted signal is then pass to analog to digital
converter and resulted digital signal is then applied to 4 to 7 segment display units. Meanwhile
we have to design a counter which should be displayed into 4 to 7 segment display. The clock of
ADC is the 8th bit of counter.
So this project has two parts listed below,

Analog part
Digital part

Analog Part:
In this part we will do following steps.

Conversion of current signal into voltage signal and amplification

Level shifter to 2 to 3v
Low pass filter

Digital part:
In this part of circuit designing we will do following steps.

Pass filtered signal into ADC

Designing 4 to 7 segment display (BDC to seven segment )
Display
Designing counter
Display counter value

Conversion of current signal into voltage signal:

Output of device is of current signal, first I have converted current signal of -2.5mA to 2.5mA
into voltage signal of 0 to 5v using op amp as shown in following diagram. Where
R 5=

5v
2.5 mA

R 5=2 Kohm

Voltage signal of desire output voltage of 2 to 3v:

In the following circuit diagram the input 0 to 5v signal is converted in to the required 2 to 3v
signal using op amp and reference voltage -2.5v.

For the 2 to 3v output we have to make R1 = R2 and output voltage swing must be between +0.5
to -0.5v. Using these constraints we can get other values.
Vout=

R4
Vin
R 3+ R 4

0.5=

R4
5
R 3+ R 4

R 3=

4.25
R 4
0.25

R 3=19 R 4

Suppose R4=10k then

R 3=190 k

gain= 1+

R2
R3

gain=2
This gives us the required swing in the input signal which would be 0.5*2 and for this Vb =0 and
R1=R2

Low pass filter of 100 Hz cutoff voltage:

Now the next requirement is to pass input signal to a low pass filter of having cut off frequency
100Hz. below is the low pass filter design for cut off frequency equal to 100Hz using op amp.

zf =Rf

A=

1
;
jwCf

Zf
Zs

wo=1/( Rf Cf )

fo=

1
2 piRfCf

100=

1
2 piRf 100uf

Rf =16 ohm
Where Rf=R6

For Rs = 1k, Rf= 10k and Cf =100u

This filter consists of passive RC filter stage providing a low frequency part to the input of noninverting amplifier. The amplifier is acting as voltage follower; it means this design not only acts
as filter but as buffer too. The gain of the filter is 1.

The advantage of this design is that op amp high input impedance prevents excessive loading on
the filters output while its low output prevents the filter cutoff frequency point from being
effective by changing the output load resistance.

Output waveform:

The output waveform as instructed by design must be between 2 to 3v and here we can verify the
output voltage is ranging between 2 to 3v. This wave form can also be seen in proteus file also.
Basically its a level shifter output which has shifted signal to 2.5v level from 0v. More over the
signal time period is 100s which means
f=

1
100

f =0.01 Hz
This is the frequency of input current signal of -2.5mA to 2.5 mA.

8 bit counter:

We can simply design counter by using D flip flop and by writing the Table of current stage and
next stage. This method is good for the design of counter up to 4 bit counter but up to that we
cannot make the design of counter by ordinary approach. So we have discovered a pattern
described below.
We can design 8 bit counter directly using an analogy by designing 2 bit counter and 3 bit
counter using D flip flops.
For 2 bit counter
DA= A

'

DB= A XOR B
For 3 bit counter
DA= A '
DB= A XOR B

DC=C XOR ( AB )
So on we design 8 bit counter as above in proteus.
DA= A '
DB= A XOR B
DC=C XOR ( AB )
Dd=D XOR ( ABC )
DE=E XOR ( ABCD )
DF=F XOR ( ABCDE )
DG=G XOR ( ABCDEF )
DH =H XOR ( ABCDEFG )

4 to 7 segment conversion:
Now we have to display this 8 bit output into 7 segment display. 7 segment displays are basically
seven LED in such configuration that it forms a number as shown in the following image.

This 7 segment display has two types common cathode and common anode which highly
depends on application requirement.
Below table is the 7 segment design of LEDs utilizing POS equation so as we can use only
NAND gates for our application.
INPUT

0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

1
0
1
1
0
1
1
1
1
1
1
0
1
0
1
1

1
1
1
1
1
0
0
1
1
1
1
0
0
1
0
0

1
1
0
1
1
1
1
1
1
1
1
1
0
1
0
0

1
0
1
1
0
1
1
0
1
0
0
1
1
1
1
0

1
0
1
0
0
0
1
0
1
1
1
1
1
1
1
1

1
0
0
0
1
1
1
1
1
1
1
1
1
0
1
1

0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
1

The left four bits are the LSB bits of ADC and rest are MSB shown below.

a=( A ' +B ' +C ' + D )( A ' + B+C ' + D ' ) ( A+ B' +C+ D )( A + B+C' + D )
b=( A ' +B+ C' + D ) ( A+ B+C ' + D' ) ( B+C+ D' ) ( A +C+ D )
c=( A ' + B' +C+ D ' ) ( A+ B+ D' ) ( A + B+C+ D )
d=( A ' + B+C ' + D ' ) ( B' +C' + D ) ( A+ B' +C+ D ' ) ( B +C+ D )
'

'

'

'

'

e=( A + B+C )( A +C + D)( B +C + D)

f =( A' + B' +C + D ' ) ( A ' +B ' + D ) ( A+ B+C ' + D )

g=( A ' +B ' +C ' )( A ' + B+C+ D)( A+ B+C ' + D')
This seven segment function is in POS form and is implemented using NAND gate only.
The same design procedure is followed for the display of counter values on 7 segment display.

DISPLAY OF MOTOR SPEED AND COUNTER VALUE:

The right side of 8 bit display is of counter value and on left side is motor speed in digital
display.

CHALLENGING TASK:

The first challenging task was to convert current signal into voltage signal and I have
done this using op amp with negative feedback and unity gain. This can be done by using
simple resister but it will disturb input signal.
Second major problem was to convert voltage into desire level and I have solved this
problem using op amp with reference voltage 2.5v.
8 bit counter designing using conventional method is not possible so I developed a
analogy by consulting Internet and books and have designed 8 bit counter.