Unit-1

1 a.
b.
2 a,
b,

What is meant by PLD ? Draw & explain the basic architecture of CPLD & FPGA. Give
silent features & applications of the same.
Design a 2421 to BCD code converter using ROM circuit.
Distinguish between ROMs , PLAs & PALs.
A combinational circuit whose input is a 4-bit num & whose output is a 2s complement
of the input num is to be implemented using a PLD. Show the appropriate coded logic
diagram of the selected device.

Unit-2
1 a,
b,
2.

Explain about AMD CPLDs [ mach 1 to 5]. Descript about AMD March 4 PAL like
block.
Explain about ALTERA FLEX 10k series CPLD.
Explain about cypress FLASH 370 device technology.

Unit-3
1 a,
b,
2 a.
b,

Explain about ALTERA FLEX 8000/10000 FPGAs.

Explain about AT & T ORCA FPGAs.
Give the routing architectures & logic blocks of FPGA.
Explain about Xilinx Xc 4000 FPGAs.

Unit-4
1 a,
b,
2 a,
b,

Explain about state transition table & state assignments for FPGAs.
Explain about linked state machines.
Describe how SM charts are realized with PAL.
Explain about Alternate realization for SM charts using programming.