Professional Documents
Culture Documents
Handling
Alarm Description
This alarm is reported when a BTS fails to perform clock synchronization because
external reference clock signals are lost, when the reference clock is unavailable,
or when there is a large frequency offset between the reference clock and the
local oscillator.
Alarm
ALM-26262 External Clock Reference Problem, Specific Problem= Excessive
Frequency Difference between Clock Reference and Local Crystal Oscillator
Possible Cause
1. Transmission quality unstable. Transmission instability is the major cause
of this alarm.
2. Clock Source Lost.
3. WMPT/GTMU board is faulty; the frequency output of the crystal oscillator
cant trace and lock the upper level reference clock which leads to clock
reference alarm.
4. Configuration issue.
Handling Procedure
3G SITE
Step 1. Check clock status. The PLL status should be equal to LOCKED to clear
the alarm which means that the local oscillator is getting its clock from the source.
From the result below, the clock is in Free running instead of Locked.
%%DSP CLKSTAT: SN=7;%%
Display System Clock Status
--------------------------Cabinet No. = 0
Subrack No. = 0
Slot No. = 7
Current Clock Source = Line Clock
Current Clock Source State = Frequency Deviation
Clock Working Mode = Manual
PLL Status = Free running
(Number of results = 1)
---
END
Step 2. Check the clock resource. Check other sites of the RNC if also
experiencing clock problem. If majority of sites are normal, clock resource is
working without any problem, if not check the RNC interface board and clock
source.
Initial DA = 32316
Center DA = 32029
Current DA = 32029
(Number of results = 1)
---
END
4. Use the formula below to calculate for the value of the new current DA to
adjust the Frequency difference to 0.
END
END
END
PLL Status
Current DA Center DA
37595
32029
32029
32029
32029
32029
32029
32029
32029
END
7. We can forced the clock to Fast track the source by setting the clock
working mode to Free Running then setting back to Manual.
%%LST CLKMODE:;%%
END
END
END
PLL Status
Current DA Center DA
37595
32029
32029
32029
32029
32029
32029
32029
32029
32029
32029
32029
END
8. We can see that the alarm will clear in few minutes but the clock working
state will stay to Fast Tracking until it is locked to the source. If after
sometime and the clock cannot locked to the external source the clock
state will come back to the Free running state and the alarm will reappear.
PLL Status
Current DA Center DA
37616
37595
37615
37595
37595
37595
37595
32029
32029
32029
32029
32029
32029
32029
32029
32029
32029
32029
END
2G SITE
Same principle works with 2G but the alarm handling is slightly different.
Step 1. Modify the value of the Current DA to locked the BTS clock to the
external source.
1. Open the BSC LMT. On the BTS Device Panel, right click on the GTMU and
select QUERY BOARD INFORMATION. We can see that the Clock is free
oscillating (same with Free running in 3G). Clock Source is TRACE BSC
CLOCK which means that the BTS gets its clocking from the BSC through
Abis Link.
2. Right click again on the GTMU then select MAINTAIN CLOCK. Take note of
the Clock Factory Value and the Current DA value.
3. Modify the Current DA value by running the command below. Set the
Calibration Value to the Clock Factory Value.
END
END
5. Wait until the alarm clears and check on the clock working state to change
to Locked. It will be changed from Free Oscillation Capture Locked.
6. If the clock working state changed to Locked then we can enable back the
Clock Source to the BSC clock and setting the calibration value to the
current DA value.
%%SET BTSCLKPARA: IDTYPE=BYID, BTSID=187, CN=0, SRN=0, SN=6, CLKMOD=BSCCLK,
TRCRNGLMT=ENABLE, CALVAL=2285;%%
---
END
END
If theres an available reference clock source, the BSC judges the reference
clock source for 260 seconds. If the source remains stable for more than
260 seconds, the PLL shifts to quick capture state. Otherwise, the PLL still
works in free running state.
2. Quick Capture
If the reference clock source is available and remains stable for a period
(longer than 400 seconds for a GPS source or 200 seconds for any source
other than the GPS source), the PLL shifts to tracking state.
If the reference clock is lost, the PLL shifts back to free running state.
3. Fast Tracking
4. Locked