Professional Documents
Culture Documents
4873
Letters
An Inner Current Suppressing Method for Modular Multilevel Converters
Zixin Li, Member, IEEE, Ping Wang, Zunfang Chu, Haibin Zhu, Yongjie Luo, and Yaohua Li
Fig. 1.
I. INTRODUCTION
N recent years, a modular multilevel converter (MMC),
which is highly suitable for medium- to high-voltage applications, has attracted many researchers interest. Compared with
the conventional multilevel converters, such as the cascaded,
the diode-clamped, or the capacitor-clamped topologies [1][5],
one of the advantages of an MMC may be its ability of direct connection to high-voltage networks without bulky transformers. Many academic papers have been published on the
MMC [5][20]. These papers mainly focus on modeling, pulse
width modulation (PWM), voltage balancing, digital control,
loss analysis, and so forth.
As to the PWM of the MMC, there exist generally two types
of methods, i.e., the carrier-phase-shifted PWM (CPSPWM)
method in [10] and [11] and the submodule (SM)-unified pulsewidth-modulated (SUPWM) method in [12][15] (some others
call it as direct modulation in [18] and [19]). The SUPWM
method can balance the SM capacitor voltages by sorting and selecting the different SMs without closed-loop voltage balancing
controllers. On the other hand, the CPSPWM method modulates each SM separately and dedicated controllers for capacitor
voltage balancing are mandatory. This will not be an easy task
for the processors when the number of the SM is great. Hence,
the SUPWM method is more preferable in practice because it
has lower requirements on hardware.
Ideally, the voltages of the SM capacitors are assumed to
be constant. In fact, the current flowing through the upper and
lower arms of the MMC is the sum of dc and ac components [6].
Therefore, ac currents flow through the SM capacitors and their
voltages will fluctuate with time. As shown in Fig. 1, the upper arm voltage uU , the lower arm voltages uL , and the output
voltage uan will all have low-order harmonics. The harmonic
voltages will be imposed on the buffer inductors LU and LL and
induce harmonics in the arm currents. On the other hand, the distorted arm currents will also influence the SM capacitor voltages
and introduce extra harmonic voltages. Consequently, a series of
harmonics will appear in the inner currents flowing through the
upper and lower arms and the RMS value of these currents will
be increased compared with the ideal case. The increased currents will do harm to the design and safe operation of the power
devices in the converter. Besides, the power losses will be in
creased as well. To solve this problem, Angquist
et al. [19], [20]
proposed an open-loop method based on estimation of the stored
4874
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013
(1)
iU = icir + iac /2
(2)
iL = icir iac /2
(3)
where icir is the current circulating between the arms and the dc
voltage source. Obviously, the circulating current icir will deliver active power from or to the dc link. Generally, the reference
voltage for this phase can be expressed as
ref
(4)
where m(0 m 1) is the modulation index and 0 is the fundamental angular frequency. With the SUPWM for the MMC,
the SM capacitor voltages are all supposed to be constant and
the voltage on the buffer inductors is zero, i.e.,
L(diU /dt + diL /dt) = Ld(iU + iL )/dt = 0.
(5)
Udc
Udc
uU = uL
.
2
2
where x
denotes the dc component and x
denotes the ripple
component of x. According to (1)(3), the voltage across the
buffer inductors can be expressed as
L(diU /dt + diL /dt) = 2Ldicir /dt
= Udc (
uU + u
U + u
L + u
L ).
(6)
According to (4) and (6), the reference voltage for the upper
and lower arms can be expressed as [6], [12], [13]
Udc
Udc
uan ref =
[1 m cos(t)]
uU ref =
2
2
(7)
Udc
Udc
u
+ uan ref =
[1 + m cos(t)].
L ref =
2
2
(9)
uan
(10)
(11)
= 1.50 A.
(13)
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013
Fig. 2.
4875
Fig. 5.
Fig. 6.
Fig. 4.
s2
kh s
+ (h0 )2
(h = 2, 4, 6, ...)
(17)
4876
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013
400s
200s
+ 2
. (20)
s2 + (200)2
s + (400)2
Fig. 7.
Fig. 8.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013
Fig. 9.
4877
Fig. 13. Experimental results of u a c (the upper yellow line), ia c (the upper
green line), 2 ic ir (the middle pink line), iU (the lower purple line), and iL
(the lower red line) with the conventional SUPWM method.
Fig. 10.
Fig. 11. Simulated iU and iL with the proposed method under load change
and modulation index change.
Fig. 12. Simulated u a c and 20 ia c with the proposed method under load
change and modulation index change.
4878
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013
Fig. 14. Experimental results of all the eight SM capacitor voltages with the
conventional SUPWM method.
Fig. 17. Experimental results of u a c (the upper yellow line), ia c (the upper
green line), iU (the lower purple line), and iL (the lower red line) with the
proposed suppression method when the inverter operates from no load to the
RL load listed in Table I.
Fig. 15. Experimental results of u a c (the upper yellow line), ia c (the upper
green line), 2 ic ir (the middle pink line), iU (the lower purple line), and iL
(the lower red line) with the proposed suppression method.
Fig. 18. Experimental results of u a c (the upper yellow line), ia c (the upper
green line), iU (the lower purple line), and iL (the lower red line) with the
proposed suppression method when the modulation index changes from 0.7 to
0.3 under the RL load listed in Table I.
Fig. 16. Experimental results of all the eight SM capacitor voltages with the
proposed suppression method.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013
4879
[7] A. Lesnicar and R. Marquardt, An innovative modular multilevel converter topology suitable for a wide power range, presented at the IEEE
Bologna PowerTech Conf., Bologna, Italy, Jun. 2326, 2003.
[8] M. Glinka, Prototype of multiphase modular-multilevel-converter with
2 MW power rating and 17-level-output-voltage, in Proc. IEEE Power
Electron. Spec. Conf., 2004, pp. 25722576.
[9] M. Glinka and R. Marquardt, A new AC/AC multilevel converter family,
IEEE Trans. Ind. Electron., vol. 52, no. 3, pp. 662669, Jun. 2005.
[10] M. Hagiwara and H. Akagi, Control and experiment of pulsewidthmodulated modular multilevel converters, IEEE Trans. Power Electron.,
vol. 24, no. 7, pp. 17371746, Jul. 2009.
[11] M. Hagiwara and H. Akagi, Control and analysis of the modular multilevel cascade converter based on double-star chopper-cells (MMCCDSCC), IEEE Trans. Power Electron., vol. 26, no. 6, pp. 16491658,
Jun. 2011.
[12] S. Rohner, S. Bernet, M. Hiller, and R. Sommer, Pulsewidth modulation
scheme for the modular multilevel converter, presented at the Eur. Conf.
Power Electron., Barcelona, Spain, 2009.
[13] S. Rohner, S. Bernet, M. Hiller, and R. Sommer, Modulation, losses,
and semiconductor requirements of modular multilevel converters, IEEE
Trans. Ind. Electron., vol. 57, no. 8, pp. 26332642, Aug. 2010.
[14] S. Rohner, S. Bernet, M. Hiller, and R. Sommer, Modelling, simulation and analysis of a modular multilevel converter for medium voltage
applications, in Proc. IEEE Int. Conf. Ind. Technol., 2010, pp. 775782.
[15] M. Saeedifard and R. Iravani, Dynamic performance of a modular multilevel back-to-back HVDC system, IEEE Trans. Power Del., vol. 25,
no. 4, pp. 29032912, Oct. 2010.
[16] U. N. Gnanarathna, A. M. Gole, and R. P. Jayasinghe, Efficient modeling of modular multilevel HVDC converters (MMC) on electromagnetic
transient simulation programs, IEEE Trans. Power Del., vol. 26, no. 1,
pp. 316324, Jan. 2011.
[17] Q. Tu and Z. Xu, Impact of sampling frequency on harmonic distortion
for modular multilevel converter, IEEE Trans. Power Del., vol. 26, no. 1,
pp. 298306, Jan. 2011.
[18] A. Antonopoulos, L. Angquist, and H. P. Nee, On dynamics and voltage
control of the modular multilevel converter, presented at the Eur. Conf.
Power Electron., Barcelona, Spain, 2009.
[19] L. Angquist,
A. Antonopoulos, D. Siemaszko, K. Ilves, M. Vasiladiotis,
and H.-P. Nee, Inner control of modular multilevel convertersan approach using open-loop estimation of stored energy, in Proc. IEEE Int.
Power Electron. Conf., 2010, pp. 15791585.
[20] L. Angquist,
A. Antonopoulos, D. Siemaszko, K. Ilves, M. Vasiladiotis,
and H.-P. Nee, Open-loop control of modular multilevel converters using estimation of stored energy, IEEE Trans. Ind. Appl., vol. 47, no. 6,
pp. 25162524, Nov./Dec. 2011.
[21] Q. Tu, Z. Xu, and L. Xu, Reduced switching-frequency modulation and
circulating current suppression for modular multilevel converters, IEEE
Trans. Power Del., vol. 26, no. 3, pp. 20092017, Mar. 2011.
[22] K. Ilves, A. Antonopoulos, S. Norrga, and H.-P. Nee, Steady-state analysis of interaction between harmonic components of arm and line quantities
of modular multilevel converters, IEEE Trans. Power Electron., vol. 27,
no. 1, pp. 5768, Jan. 2012.
[23] Z. Li, Y. Li, P. Wang, H. Zhu, C. Liu, and F. Gao, Single-loop digital
control of high-power 400 Hz ground power unit for airplanes, IEEE
Trans. Ind. Electron., vol. 57, no. 2, pp. 532543, Feb. 2010.