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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO.

11, NOVEMBER 2013

4873

Letters
An Inner Current Suppressing Method for Modular Multilevel Converters
Zixin Li, Member, IEEE, Ping Wang, Zunfang Chu, Haibin Zhu, Yongjie Luo, and Yaohua Li

AbstractIdeally, the inner (the upper or lower arm) current of


a modular multilevel converter (MMC) is ideally assumed to be the
sum of a dc component and an ac component of the fundamental
frequency. However, as ac current flows through the submodule
(SM) capacitors, the capacitor voltages fluctuate with time. Consequently, the inner current is usually distorted and the peak/RMS
value of it is increased compared with the theoretical value. The
increased currents will increase power losses and may threaten
the safe operation of the power devices and capacitors. This paper
proposes a closed-loop method for suppression of the inner current
in an MMC. This method is very simple and is implemented in a
stationary frame, and no harmonic extraction algorithm is needed.
Hence, it can be applied to single-phase or three-phase MMCs.
Besides, this method does not influence the balancing of the SM
capacitor voltages. Simulation and experimental results show that
the proposed method can suppress the peak and RMS values of the
inner currents dramatically.
Index TermsHarmonics, inner current, modular multilevel
converter (MMC).

Fig. 1.

I. INTRODUCTION
N recent years, a modular multilevel converter (MMC),
which is highly suitable for medium- to high-voltage applications, has attracted many researchers interest. Compared with
the conventional multilevel converters, such as the cascaded,
the diode-clamped, or the capacitor-clamped topologies [1][5],
one of the advantages of an MMC may be its ability of direct connection to high-voltage networks without bulky transformers. Many academic papers have been published on the
MMC [5][20]. These papers mainly focus on modeling, pulse
width modulation (PWM), voltage balancing, digital control,
loss analysis, and so forth.
As to the PWM of the MMC, there exist generally two types
of methods, i.e., the carrier-phase-shifted PWM (CPSPWM)
method in [10] and [11] and the submodule (SM)-unified pulsewidth-modulated (SUPWM) method in [12][15] (some others
call it as direct modulation in [18] and [19]). The SUPWM

Manuscript received September 27, 2012; revised December 10, 2012;


accepted January 15, 2013. Date of current version May 3, 2013. This work
was supported by the National Natural Science Foundation of China (Project
No. 51207151). Recommended for publication by Associate Editor C. C. Mi.
The authors are with the Key Laboratory of Power Electronics and Electric
Drive, Institute of Electrical Engineering, Chinese Academy of Sciences, Beijing 100190, China (e-mail: lzx@mail.iee.ac.cn).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2013.2242204

One arm of an MMC-based inverter.

method can balance the SM capacitor voltages by sorting and selecting the different SMs without closed-loop voltage balancing
controllers. On the other hand, the CPSPWM method modulates each SM separately and dedicated controllers for capacitor
voltage balancing are mandatory. This will not be an easy task
for the processors when the number of the SM is great. Hence,
the SUPWM method is more preferable in practice because it
has lower requirements on hardware.
Ideally, the voltages of the SM capacitors are assumed to
be constant. In fact, the current flowing through the upper and
lower arms of the MMC is the sum of dc and ac components [6].
Therefore, ac currents flow through the SM capacitors and their
voltages will fluctuate with time. As shown in Fig. 1, the upper arm voltage uU , the lower arm voltages uL , and the output
voltage uan will all have low-order harmonics. The harmonic
voltages will be imposed on the buffer inductors LU and LL and
induce harmonics in the arm currents. On the other hand, the distorted arm currents will also influence the SM capacitor voltages
and introduce extra harmonic voltages. Consequently, a series of
harmonics will appear in the inner currents flowing through the
upper and lower arms and the RMS value of these currents will
be increased compared with the ideal case. The increased currents will do harm to the design and safe operation of the power
devices in the converter. Besides, the power losses will be in
creased as well. To solve this problem, Angquist
et al. [19], [20]
proposed an open-loop method based on estimation of the stored

0885-8993/$31.00 2013 IEEE

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013

energy in the arms. Angquist


et al. [19], [20] showed that this
method can suppress the inner currents in the MMC greatly.
Anyway, the disadvantage of it may be its requirements on accurate parameters of the converter. Tu et al. [21] presented a
closed-loop method by suppressing the second-order harmonic
currents in a negative rotating frame. This method is suitable
for the three-phase MMC under balanced conditions. But the
analytical expressions of the arm currents show that they contain not only second-order harmonics, but also all even-order
harmonics [22].
This paper presents a closed-loop method for suppression of
the inner currents in an MMC. This method does not require
accurate parameters of the MMC and is implemented in the
stationary frame, and thus, it is applicable to both single-phase
and three-phase topologies. Verification results show that this
method can suppress the inner currents substantially compared
with the conventional SUPWM method, while the balancing of
the SM capacitor voltages is not affected.

Fig. 1 shows one phase of an MMC-based inverter, in which


Udc is the dc-link voltage; SMU1 SMUN and SML1 SMLN are
the N SMs in the upper and lower arms, respectively; LU and
LL are the two buffer inductors; uU and iU are the voltage
and current of the upper arm; uL and iL are the voltage and
current of the lower arm; iac is the output current; and uac is the
output voltage. Supposing that LU = LL = L and neglecting
their inner resistance, the following equations exist [6]:
uU + uL + L(diU /dt + diL /dt) = Udc

(1)

iU = icir + iac /2

(2)

iL = icir iac /2

(3)

where icir is the current circulating between the arms and the dc
voltage source. Obviously, the circulating current icir will deliver active power from or to the dc link. Generally, the reference
voltage for this phase can be expressed as
ref

= (Udc /2)m cos(0 t)

(4)

where m(0 m 1) is the modulation index and 0 is the fundamental angular frequency. With the SUPWM for the MMC,
the SM capacitor voltages are all supposed to be constant and
the voltage on the buffer inductors is zero, i.e.,
L(diU /dt + diL /dt) = Ld(iU + iL )/dt = 0.

(5)

From (1)(5) and according to Kirchhoffs law, one can obtain


uan =

Udc
Udc
uU = uL
.
2
2

where x
denotes the dc component and x
denotes the ripple
component of x. According to (1)(3), the voltage across the
buffer inductors can be expressed as
L(diU /dt + diL /dt) = 2Ldicir /dt
= Udc (
uU + u
U + u
L + u
L ).

(6)

According to (4) and (6), the reference voltage for the upper
and lower arms can be expressed as [6], [12], [13]

Udc
Udc

uan ref =
[1 m cos(t)]
uU ref =
2
2
(7)

Udc
Udc
u
+ uan ref =
[1 + m cos(t)].
L ref =
2
2

(9)

With the SUPWM, there will always be half (N ) of the SM


capacitors connected in between the dc link and the average
U + u
L L is approximately Udc [12][15].
value of uU + uL or u
Therefore, (9) can be rewritten as
U u
L =
uU u
L .
2Ldicir /dt = Udc Udc u

II. MECHANISM OF HARMONICS IN THE INNER CURRENT

uan

However, the SM capacitor voltages are not constant and


even-order harmonic appears even in the ideal case because ac
current flow through them. So, the sum of uU and uL is in fact
comprised of a dc component and a ripple component, i.e.,

U + u
U
uU = u
(8)
uL = u
L + u
L

(10)

The ideal waveform of the circulating current icir contains


only dc component [12][14], i.e.,
icir = Idc

(11)

where Idc is a constant and is determined by the phase number


of the MMC and the active power delivering from or to the dc
link [12][14]. However, from (10), one can see that the ripple
voltages in uU and uL will introduce harmonic currents to the
circulating current icir through the buffer inductors. Conversely,
the harmonics in icir will also flow through the SM capacitors.
As a result of the interaction between the buffer inductor and
the SM capacitors, icir will be distorted and all even-order harmonics come in to being, even when the output ac current iac is
sinusoidal. In the steady state, icir can be expressed as [22]

icir = Idc +
Ik cos(k0 t + k )
(12)
k =2,4,6...

where Ik is the peak value of the kth harmonic current and k is


an positive even integer.
To prove the aforementioned analyses, computer simulation is
carried out first using MATLAB/Simulink software. The inverter
for simulation is a single-phase half-bridge topology as shown
by the solid line in Fig. 1. The simulation results are shown in
Figs. 24 using the parameters listed in Table I.
The output voltage reference is set as uac ref = 210 sin(100t)
V in this simulation. According to Table I, the dc-link active
power current or the circulating current icir can be calculated as
2
/[Rl2o a d + (Lload )2 ]/Udc
icir = Pactive /Udc = [Rload Uac

= 1.50 A.

(13)

Thereby, from (2) and (3), the theoretical expressions for iU


and iL are
iU = icir + iac /2 = 1.50 + 4.33 sin(100t 8.19 ) A (14)
iL = icir iac /2 = 1.50 4.33 sin(100t 8.19 ) A. (15)

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013

Fig. 2.

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Fig. 5.

Mathematical model of the circulating current ic ir .

Fig. 6.

Proposed method for suppressing harmonic currents in ic ir .

Simulated iU , iL , and ic ir with the conventional SUPWM method.

Obviously, the positive and negative peak values of iU /iL are


+5.83 and 2.83 A. Meanwhile, as the value of icir is ideally a
dc constant, the RMS values of iU and iL can be calculated as


iU RM S = iL RM S = i2cir + (iac / 2/2)2 = 3.41 A. (16)


Fig. 3.

Simulated SM capacitor voltages with the conventional method.

However, it is seen from Fig. 2 that the actual waveform of


iU /iL is clearly distorted and differs from (14) or (15) a lot. The
positive and negative peak values of iU /iL are around +9.1 and
4.2 A, which are much greater than those in the ideal case.
Meantime, the calculated RMS value of iU /iL is about 4.0 A,
which is also greater than the ideal case. The increased and distorted inner currents appear because the SM capacitor voltages
are actually not constant as analyzed previously, which is also
shown in Fig. 3. From Fig. 2, it is clear that icir contains harmonics. And it is just the harmonic components in the circulating
currents that make the peak/RMS value of iU /iL greater than its
ideal value.
III. PROPOSED INNER CURRENT SUPPRESSION METHOD

Fig. 4.

Simulated u a c and 20 ia c with the conventional SUPWM method.


TABLE I
PARAMETERS OF THE MMC-BASED INVERTER FOR SIMULATION
AND EXPERIMENT

To suppress the increased and distorted arm currents in the


MMC with SUPWM mentioned previously, a novel closed-loop
control method is presented in this section. One can see from
(10) that icir is determined by the ripple component of uU and
uL . The mathematical model of the circulating current icir can
just be illustrated by Fig. 5.
Based on Fig. 5, a novel closed-loop method for suppressing
the harmonic currents in icir is proposed as displayed in Fig. 6
where uU ref and uL ref are calculated by (7).
In Fig. 6, paralleled resonant controllers with the resonant
frequency at 20 , 40 , 60 , . . . are selected as the closed-loop
controllers. This is because all even-order harmonic components
exist in the circulating current as shown in (12). The transfer
functions of the resonant controllers are expressed as
Resh(s) =

s2

kh s
+ (h0 )2

(h = 2, 4, 6, ...)

where kh is the coefficient of the resonant controller.

(17)

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013

From (6)(17) and Fig. 6, the transfer function from icir to


its reference icir ref can be expressed as (the transfer function
from uU real /uL real to uU /uL is considered as 1 because the
time delay in these parts is usually negligible for applications
with fundamental frequency of 50 Hz/60 Hz)

kh s
2Ls[ h=2,4,6,... s 2 +(h
2 ]
icir (s)
0)
.
=
Hc (s) =

s
k
h
icir ref (s)
1 + 2Ls[ h=2,4,6,... s 2 +(h
2 ]
0)
(18)
In fact, icir can track its reference signal at the frequency of
h 0 with zero error because the gain of Resh(j 0 ) in (18) is
infinite at the frequency of h 0 . In the proposed method, icir ref
is set as zero. So, there will be no even-order harmonics in icir
in the steady state as with the conventional SUPWM shown in
(12). Of course, this conclusion is true only when the system is
stable.
One should also note that the dc component exists in icir ,
but the reference value for icir is set as zero with the proposed
method as shown in Fig. 8. However, this inner current suppression controller will not influence the dc component in icir as long
as the controller parameters are properly designed. Actually, at
zero frequency, the Fourier form of (18) can be expressed as

kh
2Lj[ h=2,4,6,... j
2 +(h ) 2 ]
0
= 0.
Hc (j0) = lim

j k h
0 1 + 2Lj[
h=2,4,6,... 2 +(h 0 ) 2 ]
(19)
Equation (19) means that the inner current suppression controller has no influence on the dc component in icir . Of course,
this conclusion is only true for steady-state analysis. Anyway,
this controller will introduce little impact on the dc component
dynamically, if the bandwidth of the paralleled resonant controllers is not wide enough. This will not be a difficult task
because the resonant controller can be seen as a bandpass filter
with a very narrow bandwidth.
It should be pointed out that not all even-order harmonic resonant controllers are needed because the harmonic current decreases as the order of it increases. The second- and fourth-order
harmonic resonant controllers are usually necessary. Meantime,
the parameter design of the parallel operated resonant controllers
in this paper is based on the frequency-domain method presented
in [23]. For the MMC-based inverter in this paper, the secondand fourth-order harmonic resonant controllers are adopted. The
coefficients for the resonant controllers are selected as k2 = 400
and k4 = 200, i.e., the transfer function of this controller is
expressed as
Res2(s) + Res4(s) =

400s
200s
+ 2
. (20)
s2 + (200)2
s + (400)2

The frequency characteristic of (20) is displayed in Fig. 7.


Obviously, this controller has a very narrow bandwidth. Outside
the region of 100/200 Hz, the gain of it decreases quickly. So,
this controller only affects the harmonic currents of icir around
100/200 Hz. At the frequency of 0.01 Hz, the gain of it is much
below 60 dB, i.e., very trivial influence on the dc component
in icir . As the dc component in icir is responsible for delivering

Fig. 7.

Frequency characteristic of the designed controller.

Fig. 8.

Simulated iU , iL , and ic ir with the proposed method.

active power from the dc to the ac side, the proposed controller


will introduce little effect on the ac-side current/power.
In many applications, closed-loop control of the output current is often needed. From (2) and (3), it is clear that the output
current iac and the inner circulating current icir can be controlled
independently. However, from Fig. 6, one can see that the inner
current suppression controller actually adds ripple components
to the upper and lower arm reference voltages [ideally comprised of a dc and a sinusoidal component as expressed in (7)].
So, this inner current suppression controller may need higher
dc voltage, compared with the case without this controller. Besides, the parameters of the inner current suppression controller
and the output current controller should be designed with care
so that both the two controllers are stable.
IV. SIMULATION RESULTS
In order to test the proposed method for suppressing the inner
current of the MMC, computer simulation is carried out first.
The circuit topology of the MMC-based inverter and the parameters for simulation are the same as the conventional method, as
listed in Table I. Figs. 812 show the simulation results. In the
simulation, the modulation index of this inverter is 0.7 (uac ref
= 210sin(100t) V) when t < 0.25 s and the inverter is with no

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013

Fig. 9.

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Simulated SM capacitor voltages with the proposed method.

Fig. 13. Experimental results of u a c (the upper yellow line), ia c (the upper
green line), 2 ic ir (the middle pink line), iU (the lower purple line), and iL
(the lower red line) with the conventional SUPWM method.

Fig. 10.

Simulated u a c and 20 ia c with the proposed method.

Fig. 11. Simulated iU and iL with the proposed method under load change
and modulation index change.

load when t < 0.15 s. At the instant of t = 0.15 s, the RL load,


as listed in Table I, is connected to the inverter, while at the
instant of t = 0.25 s, the modulation index suddenly changes
from 0.7(uac ref = 210sin(100t) V) to 0.3(uac ref = 120sin
(100t) V).
Figs. 810 show the steady-state results. Comparing Fig. 8
with Fig. 2, it is clear that the proposed method in this paper can improve the quality of iU and iL . With the proposed
method, the positive and negative peak values of iU /iL are about
+5.9 and 2.9 A (ignoring the ripple component caused by the
2-kHz switching), which are almost the same as their theoretical
values +5.83 and 2.83 A. The RMS value of iU /iL is about
3.4 A, which is also almost the same as the theoretical value
3.41 A and greatly decreased compared with the conventional
SUPWM method. What is more, the proposed method almost
has no visible influence on the balance of the SM capacitor
voltages, which is clear from Figs. 3 and 9.
Figs. 11 and 12 display the dynamic state results with load and
modulation index step change. When t = 0.15 s, the load change
occurs, while the modulation index step change happens at t =
0.25 s. One can see that this inner current controller is stable
under step change of load and modulation index. When the load
or modulation index change occurs, distortion and overshoot
appear in the waveforms of iU and iL . But these waveforms
settle within about two fundamental cycles.
V. EXPERIMENTAL RESULTS

Fig. 12. Simulated u a c and 20 ia c with the proposed method under load
change and modulation index change.

After computer simulation, experiments on an MMC-based


single-phase inverter are also carried out to further prove the
proposed approach. The topology and the parameters of the
inverter for experiments are the same as those for simulation.
The experimental results are shown in Figs. 1318. In the
experiments, the currents are measured by current clamps and
the ac voltages are measured by differential probes. The eight
SM capacitor voltages are measured through optical fiber-based

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013

Fig. 14. Experimental results of all the eight SM capacitor voltages with the
conventional SUPWM method.

Fig. 17. Experimental results of u a c (the upper yellow line), ia c (the upper
green line), iU (the lower purple line), and iL (the lower red line) with the
proposed suppression method when the inverter operates from no load to the
RL load listed in Table I.

Fig. 15. Experimental results of u a c (the upper yellow line), ia c (the upper
green line), 2 ic ir (the middle pink line), iU (the lower purple line), and iL
(the lower red line) with the proposed suppression method.

Fig. 18. Experimental results of u a c (the upper yellow line), ia c (the upper
green line), iU (the lower purple line), and iL (the lower red line) with the
proposed suppression method when the modulation index changes from 0.7 to
0.3 under the RL load listed in Table I.

Fig. 16. Experimental results of all the eight SM capacitor voltages with the
proposed suppression method.

series communication interface and the sampling frequency is


2 kHz. The circulating current multiplied by 2, i.e., 2 icir
is obtained by the math function of addition (iU + iL ) on the
oscilloscope.
Figs. 13 and 14 show the experimental results with the conventional SUPWM method. As shown in Fig. 13, it is clear that

iU and iL are clearly distorted, while the circulating current icir


contains obviously second-order harmonics (note that the time
scale is 5 ms/div). Meantime, the RMS values of iU , iL , and
2 icir are 4.08, 4.00, and 5.448 A, respectively, which match
the simulation results well.
Figs. 15 and 16 show the experimental results with the proposed suppression method. Comparing Fig. 15 with Fig. 13, it
is seen that the peak values and distortions of iU and iL are
both reduced. Meanwhile, the circulating current icir contains
no obvious second-order harmonics any more (note that the time
scale is 5 ms/div). What is more, the RMS values of iU , iL , and
2 icir are decreased to 3.378, 3.329, and 2.913 A respectively,
showing great improvement with the proposed method and very

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 11, NOVEMBER 2013

similar to the simulation. Besides, the voltages of the SMs are


well balanced in both cases as shown in Figs. 14 and 16.
Besides, the stability of this inner current suppression controller is also tested by experiments. Fig. 17 shows the results
with load change from no load, while Fig. 18 shows the results
with the modulation index change from 0.7 to 0.3, which are also
the same as the simulation. It is clear that the inner current suppression controller is stable under these step changes. It should
also be pointed out that the experimental waveforms are not as
good as those in the simulation because the implementation issues, such as the dead time effect, current measurement errors,
etc., will influence the performance of this inverter, especially
when the current is low.
VI. CONCLUSION
This paper proposed a closed-loop control method for suppressing inner currents of the MMC. This method is simple and
can substantially reduce the peak and the RMS value of the inner current compared with the existing SUPWM method, while
the voltages of the SM capacitors are kept well balanced. This
method is very helpful for reducing power losses of the MMC in
real applications. Both simulation and experimental results have
shown the validity and effectiveness of the proposed method.
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