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Draw a schematic diagram to show how the circuit given below can be fabricated in
monolithic Integrated Circuit form and explain the processes involved.
p
n
Resistor
Transistor
p
n
Resistor
p
n
p substrate
2. Using the ac equivalent circuit of a transistor differential amplifier with single ended
output determine the differential and common mode gains.
+ VCC
+ VCC
Q1
vout
Q2
v2
v1
RC
Q1
v1
Q2
Non inverting Input
vout
RE
RE
- VEE
- VEE
v1
ic
re
v1
ic
re
RC
vout
RE
re
re
RC
vout
ic
Inverting Input
+ VCC
RC
vout
RC
ic
vout
Q2
vout
ic
v2
v2
v2
Q1
re
RE
RC
re
RE
re
re
- VEE
Differential Gain
+ VCC
+ VCC
Common Mode Gain
RC
Q1
RC
vout
Q2
vin(CM)
vin(CM)
Q1
vin(CM)
vin(CM)
2RE
RE
vout
Q2
2RE
- VEE
RC
ic
vin(CM)
re
2RE
ic
- VEE
vout
vin(CM)
re
2RE
vo
R
2R
+12V
LTP
UTP
2.3 V
4.7 V
vin
vin
vout
+12V
3R
R
Vout
LTP
UTP
Vin
+5V
+9V
+9V
10 k
4.7 k 5.6 k
+12V
2R
Vin
6V
+12V
10 k
3R
+3V
Vout
+
339
-
R
Yellow
Vout
+5 V
4.7 k 5.6 k
-9V
< 3 V Yellow On
3-6V Green On
> 6V Red On
1 k
+12V
Green
10 k
3V
+4V +
339
-
Red
Vi
+12V
LTP
3V
UTP
4V
Vin
4. Using the functional diagram of a 555 Timer operated in monostable mode explain its
action. Derive the expression for the time period of the monoshot pulse.
Vcc
7
6
Discharge
Threshold
5 K
Control 2/3 Vcc
5 K
0.1 F
Vcc
1/3 Vcc
Trigger
S
+
Reset 4
5 K
2
Ground 1
1/3 Vcc
Q
3
Q
Output
Q1
Trigger
1/3 Vcc
2/3 Vcc
Capacitor
Voltage
Output
Vcc
0V
5. The circuit given below measures current with an Oscilloscope having y scale
sensitivity 5mV/cm. If it is desired to have 2 cm vertical scale deflection for an input
current of 1A, what should be the value of R1? Determine the closed loop input
impedance of the circuit and the maximum frequency which gives undistorted output of
10 V peak. The OPAMPs used in the circuit are identical have open loop gain 105, input
impedance 1 M, and slew rate 0.5 V/s.
R1
iin
v0
18 k
R2 2 k
R3
1
1