www.ietdl.

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Published in IET Power Electronics
Received on 15th January 2014
Revised on 14th March 2014
Accepted on 29th April 2014
doi: 10.1049/iet-pel.2014.0015

ISSN 1755-4535

Small-capacity grid-connected solar power generation

system
Jinn-Chang Wu1, Kuen-Der Wu2, Hurng-Liahng Jou2, Sheng-Kai Chang2
1

Department of Microelectronic Engineering, National Kaohsiung Marine University, Kaohsiung, Taiwan

Department of Electrical Engineering, National Kaohsiung University of Applied Sciences, Kaohsiung, Taiwan
E-mail: jinnwu@mail.nkmu.edu.tw

Abstract: A small-capacity grid-connected solar power generation system, congured by a dual-output DCDC power converter
and a seven-level inverter, is proposed in this study. Voltage doubler based topology is used to congure the dual-output DCDC
power converter to convert the output voltage of a solar cell array into two dependent voltage sources with multiple relationships.
The grid-connected seven-level inverter is congured by a dual-buck power converter and a full-bridge power converter. The
dual-buck power converter is switched at high-frequency pulse-width modulation to generate a four-level DC voltage. The
full-bridge power converter is switched synchronous with the utility voltage, to convert the four-level DC voltage into a
seven-level AC voltage. The proposed solar power generation system generates a sinusoidal output current in phase with the
utility voltage. The novelty of this proposed seven-level inverter is that two asymmetric DC voltage sources are used to
increase the voltage levels and only two of the six power electronic switches in the seven-level inverter are switched at high
frequency. A prototype is developed and tested to verify the performance of the proposed solar power generation system. The
experimental results show that the proposed solar power generation system has the expected performance.

Introduction

Nowadays, solar power generation systems are used in

distribution power systems to alleviate the problem of
greenhouse emissions worldwide. The decreased cost of
solar cell arrays will accelerate the growth of solar power
generation systems. Therefore small-capacity distributed
power generation systems that use solar energy will have
widespread residential applications in the near future. Since
the output of a solar cell array is an intermittent DC power,
the power conversion interface plays an important role in a
grid-connected solar power generation system [1, 2]. The
power conversion interface converts the DC power
generated by the solar cell array into AC power and injects
it into the utility grid. A power conversion interface can be
either single-stage or double-stage. A single-stage power
conversion interface contains only a DCAC inverter [3, 4].
However, the output voltage of a solar cell array must be
matched to the DC bus voltage of the DCAC inverter. The
DCAC inverter performs the functions of maximum
power point tracking (MPPT) for the solar cell array and
power conversion from DC to AC. A single-stage power
conversion interface is suited to large-capacity solar power
generation systems. An extra DCDC power converter is
inserted between the solar cell array and the DCAC
inverter to give a double-stage power conversion interface
[57]. The DCDC power converter performs the function
of MPPT and adjusts the voltage of the solar cell array to
match the DC bus voltage of the DCAC inverter. The
DCAC inverter converts the DC power into AC power and
IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 27172725
doi: 10.1049/iet-pel.2014.0015

injects it into the utility grid. A double-stage power

conversion interface is suited to small-capacity solar power
generation systems.
The efciency of a power conversion interface is important
in reducing the waste of the valuable energy from a solar cell
array. The power loss of a DCAC inverter includes
conduction loss and switching loss for the active devices
[8]. The switching loss is proportional to the voltage and
current change for each switch and switching frequency of
the active devices. The power conversion efciency is
improved by using a multi-level inverter, which reduces the
change in the voltage for each switching operation [918].
As a result, the harmonic content and electromagnetic
interference are simultaneously reduced, which reduces the
capacity of output lter.
Conventional multi-level inverter topologies include the
diode-clamped [912], the ying-capacitor [13, 14] and the
cascade H-bridge [1518] types. The diode-clamped and
the ying-capacitor multi-level inverter use capacitors to
build up several voltage levels. However, the voltage
regulation of these capacitors is an issue. Since asymmetric
voltage technology is hard to implement in the
diode-clamped and the ying-capacitor multi-level inverter,
their power circuit will be more complex as increasing
levels of output voltage. For a single-phase seven-level
inverter, twelve power electronic switches are required in
the diode-clamped and the ying-capacitor topologies. The
asymmetric voltage technology can be implemented in the
cascade H-bridge multi-level inverter to achieve more levels
of output voltage [18], so a cascade H-bridge multi-level
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inverter is suitable for the applications with increased voltage
levels. Two H-bridge inverters with a DC bus voltage with
multiple relationships can be connected in cascade to give a
single-phase seven-level inverter and eight power electronic
switches are used. In recent years, several topologies for
seven-level inverters have been developed [19, 20].
A dual-buck power converter and a full-bridge power
converter can be connected in cascade to perform a
ve-level inverter [21]. The asymmetric voltage technology
can be further used in this topology to increase voltage
levels. A novel small-capacity grid-connected solar power
generation system is proposed in this paper. The proposed
solar power generation system is composed of a dual-output
DCDC power converter and a seven-level inverter. The
seven-level inverter is congured using a dual-buck power
converter and a full-bridge power converter and the input
DC voltages are asymmetric. A modied voltage doubler
based topology is used to congure the dual-output DCDC
power converter, and it automatically generates two
dependent voltages with multiple relationships by using
only one controller. The proposed solar power generation
system generates a sinusoidal output current in phase with
the utility voltage and is injected into the utility. The salient
features of the proposed solar power generation system are
that two asymmetric DC voltage sources are used in the
input of the dual-buck power converter and only two of six
power electronic switches in the seven-level inverter are
switched at high frequency. A prototype is developed and
tested to verify the performance of the proposed
grid-connected solar power generation system that uses a
seven-level inverter.

Harmonic content of the DCAC inverter

Fig. 1 shows the simulation results for the output voltage and
the spectrum of a DCAC inverter with two levels, three
levels, ve levels and seven levels. The modulation signal
is a sinusoidal signal of 60 Hz and the carrier signal is a
triangular signal of 2160 Hz. The modulation index is 0.8
and the DC bus voltage is 200 V. As seen in Fig. 1a, the
output voltage is switched between 200 and 200 V for a
two-level inverter and its dominant harmonic components
are around the carrier frequency. The total harmonic
distortion (THD%) for the output voltage of a two-level
inverter is 146%. The output voltage, shown in Fig. 1b, is
switched between 200 and 0 V in the positive cycle and
between 200 and 0 V in the negative cycle, for a
three-level inverter. The THD% for the output voltage of a
three-level inverter is 76.7%. As seen in Fig. 1c, the output
voltage for a ve-level inverter is switched between 200,
100, 0, 100 and 200 V. The THD% for the output
voltage of a ve-level inverter is 38.3%. It is seen in
Fig. 1d that the output voltage of a seven-level inverter is
switched between 200, 133, 66, 0, 66, 133 and 200 V.
The THD% for the output voltage of a seven-level inverter
is only 24.1%. This shows that the harmonic components
and THD% are reduced as the levels of output voltage are
increased.
As seen in Fig. 1, the output voltage of DCAC inverter
contains the fundamental component and the harmonic
components around the carrier frequency. The superposition
theory can be used to analyse the circuit system for
different frequencies. The equivalent of the solar power
generation system can be divided into the fundamental
frequency and the harmonic equivalent circuits. The
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fundamental component of the output voltage for the DC

AC inverter is controllable, which allows control of the
fundamental current in the solar power generation system.
The harmonic components of the output voltage for the
DCAC inverter result in harmonic components in the
output current, which can be regarded as a switching ripple.
If the utility is undistorted, the utility voltage can be
regarded as a short circuit at the harmonic equivalent
circuit. Therefore the switching ripple can be determined by
dividing the harmonic components of the output voltage by
the impedance of the lter inductor. If a switching ripple is
specied, the inductance of the lter inductor can be
reduced as the harmonic components of the output voltage
are reduced. Fig. 1 shows that the lter inductor can be
reduced as levels of the output voltage of DCAC inverter
are increased. However, increasing levels of output voltage
of the DCAC inverter may complicate both the power
circuit and the control circuit.

Circuit configuration

Fig. 2 shows the conguration of the proposed small-capacity

solar power generation system. The proposed small-capacity
solar power generation system consists of a solar cell array,
a dual-output DCDC power converter and a seven-level
inverter. The output of the solar cell array is connected to
the input of the dual-output DCDC power converter.
Voltage doubler based topology was used to implement a
DCDC power converter with high step-up gain [22, 23].
Accordingly, the voltage doubler based topology is
modied and used to congure the dual-output DCDC
power converter, to convert the output voltage of the solar
cell array to supply two asymmetric voltages for the
seven-level inverter. The modied voltage doubler based
topology can automatically generate two dependent voltages
with multiple relationships, using only one controller.
Hence, the control circuit of dual-output DCDC power
converter is simplied. The seven-level inverter is
congured using a dual-buck power converter and a
full-bridge power converter. The dual-buck power converter
converts the two dependent DC voltages with multiple
relationships into a DC voltage with four levels, depending
on the switching of the power electronic switches of the
dual-buck converter. The full-bridge power converter is
switched synchronously with the utility voltage to invert the
four-level DC voltage, when the utility voltage is in the
negative cycle, and the output voltage of the full-bridge
power converter is an AC voltage with seven levels.
Therefore only the power electronic switches of dual-buck
power converter are switched by using high-frequency
pulse-width modulation (PWM). In this way, the proposed
solar power generation system generates a sinusoidal output
current that is in phase with the utility voltage injected into
the utility, to give a unity power factor. As can be seen,
only six power electronic switches are used in the
seven-level inverter, so the power circuit is simplied.

Operating principle

As seen in Fig. 2, the proposed small-capacity solar power

generation system contains a dual-output DCDC power
converter and a seven-level inverter. The operation of the
dual-output DCDC power converter and the seven-level
inverter are explained as follows.
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Fig. 1 Simulation results of DCAC inverter

a Two-level
b Three-level
c Five-level
d Seven-level

4.1

Dual-output DCDC power converter

As seen in Fig. 2, the dual-output DCDC power converter is

congured by using two boost converters and a voltage doubler
circuit. Since the power electronic switches of the boost
converters are controlled using the interleaved PWM, they are
switched with a phase difference of 180o. When S7 is in the on
state, the current in inductor L1 is increased. When S7 is in the
off state and S8 is in the on state, the energy stored in L1 is
released and the current of L2 is increased. The current path for
energy release of L1 is shown in Fig. 3a. Similarly, the energy
stored in L2 is released and the current of L1 is increased when
S7 is in the on state and S8 is in the off state. The current path
for energy release of L2 is shown in Fig. 3b. In Fig. 3, the
symbol + denotes the polarity of the capacitor voltage.
IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 27172725
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To simplify the analysis, the voltage drops in the diodes

and power electronic switches are ignored. As seen in
Fig. 3, the charge paths of C3 and C4are similar to the
conventional boost converter, and the voltages across C3
and C4 can be written as

VC3 = VC4 =

1
V
1 D sol

(1)

where D is the duty ratios of S7 and S8 and Vsol is the output

voltage of the solar cell array. Since the voltages across C3
and C4 are equal, the voltages across C5 and C6 are also
equal to those across C3 and C4. Then, Fig. 3, the voltage
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Fig. 2 Circuit conguration of the proposed solar power generation system

of C2 can be written as
VC2 = VC4 + VC6 = VC3 + VC5
=

2
V
1 D sol

(2)

And then, the voltage of C1 can be written as

VC1 = VC4 + VC6 + VC5 VC2 = VC3 + VC5 + VC6 VC2
=

1
V
1 D sol

much smaller than that in L1 and L2. In Fig. 2, it should be

noted that S7 and S8 cannot be simultaneously in the off
state, when charging C3 or C4, so the duty ratios of S7 and
S8 must be > 0.5. According to (2), the voltage of C2 is
more than four times the output voltage of the solar cell
array. The voltage of C1, shown as (3), is more than twice
the output voltage of the solar cell array. Accordingly, the
DC bus voltage of the seven-level inverter is more than six
times the output voltage of the solar cell array. Therefore
the dual-output DCDC power converter provides two
dependent voltages with multiple relationships, achieves
high step-up gain without using a transformer and simplies
the controller.

(3)
4.2
As seen in (2) and (3), the dual-output DCDC power
converter automatically converts the output voltage of a
solar cell array into two dependent voltages with multiple
relationships. Therefore the regulations of VC1 and VC2 can
be integrated, which simplies the controller for the
dual-output DCDC power converter. Since interleaved
PWM is used in the boost converters, the ripple frequency
of the input current for the solar cell array is twice that of
the switching frequencies of S7 and S8. The high-frequency
ripple in the input current of the solar cell array is also

Seven-level inverter

As seen in Fig. 2, the proposed seven-level inverter is

congured using a dual-buck converter, a full-bridge power
converter and a lter inductor. The operation of the
dual-buck converter has four modes. The input voltages of
the dual-buck power converter are the voltages, VC1 and
VC2 . The operational modes of the dual-buck converter are
as follows:
Mode 1: S1 is turned on and S2 is turned off, so the output
voltage of the dual-buck converter is VC1 .

Fig. 3 Operation of dual-output DCDC power converter

a Current path for energy release of L1 (S7 in the off state and S8 in the on state)
b Current path for energy release of L2 (S7 in the on state and S8 in the off state)
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Mode 2: S2 is turned on and S1 is turned off, so the output
voltage of the dual-buck converter is VC2 (= 2VC1 ).
Mode 3: Both S1 and S2 are turned on, so the output
voltage of the dual-buck converter is VC1 + VC2 (= 3VC1 ).
Mode 4: Both S1 and S2 are turned off, so the output
voltage of the dual-buck converter is 0.
Since VC1 and VC2 have multiple relationships, the output
voltage of the dual-buck converter has four levels: 0, VC1 ,
2VC1 and 3VC1 . The power electronic switches of the
full-bridge power converter are switched at low frequency
and are synchronised with the utility. The full-bridge power
converter further converts the output voltage of the
dual-buck converter to an AC output voltage with seven
levels: 3VC1 , 2VC1 , VC1 , 0, VC1 , 2VC1 and 3VC1 .
The output voltage of the dual-buck converter can be
divided into three operating ranges: (0, VC1 ), (VC1 , 2VC1 )
and (2VC1 , 3VC1 ). From the viewpoint of the dual-buck
converter, the full-bridge power converter is an absolute
circuit that converts the utility voltage and the output
current of the seven-level inverter to their absolute value.
The dual-buck power converter should adjust its output
voltage according to the absolute value of the utility
voltage. Accordingly, the operation of the power electronic
switches in the bidirectional dual-buck power converter
must follow the amplitude of the utility voltage. Since the
output voltage of the dual-buck power converter contains
four levels, the operation of dual-buck power converter can
be divided into three operating voltage ranges: (0, VC1 ),
(VC1 , 2VC1 ) and (2VC1 , 3VC1 ), according to the absolute
value of the utility voltage. Fig. 4 shows the equivalent
circuit for the seven-level inverter, from the viewpoint of
the dual-buck power converter.
When the absolute value of the utility voltage is less than
VC1 , the dual-buck power converter is operated in the
operating voltage range (0, VC1 ). In this operating voltage
range, the dual-buck power converter switches between
mode 1 and mode 4. Fig. 4a shows the equivalent circuit of
the seven-level inverter in the operating voltage range
(0, VC1 ). This is the rst type of buck converter, which is
similar to a conventional buck converter. In this type of
buck converter, the voltage source is VC1 . It should be
noted that the output voltage of the buck converter is the
absolute value of the utility voltage, which cannot be
controlled, and the control object is the inductor current. If
switch S1 is turned on, the slope of the inductor current can
be represented as






d
iL
VC1
vu

=
Lf
dt

(4)

where Lf is the inductance of the lter inductor. The slope of

the output current is positive, so the output current |iL|
increases when switch S1 is turned on. If switch S1 is turned
off, the slope of the inductor current is represented as






d
iL

vu

=
(5)
dt
Lf
The slope of the inductor current is negative, which means
that the inductor current |iL| decreases when switch S1 is
turned off. As seen in (4) and (5), the inductor current |iL| is
controlled by controlling the on/off operation of the switch
S1 to track a reference current signal. Within this operating
voltage range, switch S1 is switched in PWM. The duty
ratio, d, of S1 can be represented as
d = vm /Vtri

(6)

where vm and Vtri are the modulation signal and the amplitude
of the carrier signal in the PWM circuit, respectively. The
output voltage of the dual-buck power converter can be
written as
vo = d VC1 = kdual vm

(7)

where kdual is the gain of the dual-buck power converter,

which can be written as
kdual = VC1 /Vtri

(8)

The closed-loop transfer function is derived as

I
=
L

kdual Gc /Lf




1/Lf

V

IL
s + ki kdual Gc /Lf
s + ki kdual Gc /Lf u

(9)

where Gc is the current controller and ki is the gain of the

current detector.
When the absolute value of the utility voltage is greater
than VC1 and less than 2VC1 , the dual-buck power converter
is operated in the operating voltage range (VC1 , 2VC1 ). In
this operating voltage range, the dual-buck power converter
is switched between mode 1 and mode 2. Fig. 4b shows the
equivalent circuit of the seven-level inverter in the
operating voltage range (VC1 , 2VC1 ). The DC voltage
source is 2VC1 . This is the second type of buck converter.
As seen in Fig. 4b, it is also similar to a conventional buck
converter. However, the diode of the buck converter is
replaced by switch S1 and the additional voltage source,
VC1 , is inserted. The switching of switches S1 and S2 is
complementary. If switch S2 is turned on and S1 is turned

Fig. 4 Equivalent circuit of the seven-level inverter from the view of the dual-buck power converter
a Operating range (0, VC1 )
b Operating range (VC1 , 2VC1 )
c Operating range (2VC1 , 3VC1 )
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off, the slope of the inductor current can be represented as






d
iL
2VC1
vu

=
(10)
Lf
dt
The slope of the inductor current |iL| is positive, which means
that the inductor current |iL| increases when switch S2 is
turned on and S1 is turned off. If switch S2 is turned off and
S1 is turned on, the slope of the inductor current can be
represented as






d
iL
VC1
vu

=
(11)
dt
Lf
The slope of the inductor current |iL| is negative and the
inductor current |iL| is decreased, when switch S2 is turned
off and S1 is turned on. As seen in (10) and (11), the
inductor current |iL| can also be controlled to track a
reference current signal by controlling the on/off operation
of switches S1 and S2, in the operating voltage range
(VC1 , 2VC1 ).
Within this operating voltage range, switch S2 is switched
in PWM. The output voltage of the dual-buck power
converter can be written as
vo = d VC1 + VC1 = kdual vm + VC1

Table 1 States of power electronic switches for seven-level

inverter
S1

S2

S3

S4

S5

S6

half cycle

Positive



v
, V
u

C1





2VC
1 . vu . VC1

v
. 2V
u
C1

PWM
PWM
PWM

off
PWM
on

on
on
on

off
off
off

off
off
off

on
on
on

half cycle

Negative



v
, V
u

C1





2VC
1 . vu . VC1

v
. 2V
u
C1

PWM
PWM
PWM

off
PWM
on

off
off
off

on
on
on

on
on
on

off
off
off

controlling the on/off operation of the switch S1, in the

operating voltage range (2VC1 , 3VC1 ).
Within this operating voltage range, switch S1 is switched
in PWM. The output voltage of the dual-buck power
converter can be written as
vo = d VC1 + 2VC1 = kdual vm + 2VC1

where d is the duty ratio of S1. The closed-loop transfer

function is derived as




I
=
L

(12)

where d is the duty ratio of S2. The closed-loop transfer

function can be derived as




I
=
L

kdual Gc /Lf




I
s + ki kdual Gc /Lf L




1/Lf

V
V

u
C1
s + ki kdual Gc /Lf

(13)

When the absolute value of the utility voltage is greater than

2VC1 , the dual-buck power converter is operated in the
operating voltage range (2VC1 , 3VC1 ). In this operating
voltage range, the dual-buck power converter is switched
between mode 2 and mode 3. Fig. 4c shows the equivalent
circuit of the seven-level inverter in the operating voltage
range (2VC1 , 3VC1 ). The DC voltage source is 3VC1 . This is
the third type of buck converter. As seen in Fig. 4c, it is
also similar to a conventional buck converter. The voltage
source is 3VC1 and an additional voltage source, 2VC1 , is
connected in series with the diode. If switch S1 is turned
on, the slope of the inductor current can be represented as






d
iL
3VC1
vu

=
(14)
Lf
dt
The slope of the inductor current |iL| is positive, which means
that the inductor current |iL| increases when switch S1 is
turned on. If switch S1 is turned off, the slope of the
inductor current can be represented as






d
iL
2VC1
vu

=
(15)
dt
Lf
The slope of the inductor current |iL| is negative and the
inductor current |iL| is decreased, when switch S1 is turned
off. As seen in (14) and (15), the inductor current |iL| can
also be controlled to track a reference current signal by
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(16)

kdual Gc /Lf




I
s + ki kdual Gc /Lf L




1/Lf

V
2V

u
C1
s + ki kdual Gc /Lf

(17)

In summary, the dual-buck power converter can be operated

in three types of buck converters, and the states of switches
S1S6 are shown in Table 1. PWM means that the power
electronic switch is switched in high frequency and PWM
is complementary to PWM. In comparison with the
conventional seven-level inverter, only six power electronic
switches are used in the proposed seven-level inverter and
only two of them are switched at high frequency, so the
power circuit is signicantly simplied.

5
5.1

Control block
Seven-level inverter

Fig. 5a shows the control block diagram of the seven-level

inverter. The control object of the seven-level inverter is its
output current, which must be sinusoidal and in phase with
the utility voltage. The utility voltage is detected using a
voltage detector and then sent to a phase-lock loop (PLL)
circuit to generate a sinusoidal signal with unity amplitude.
Since the voltages of C1 and C2 have multiple relationships,
because of the dual-output DCDC power converter used,
only the voltage of C1 is detected and then subtracted from
a setting voltage. The difference is sent to a proportional
integral (PI) controller. The outputs of the PLL circuit and
the PI controller are sent to a multiplier, to obtain a
reference signal. The output current of the seven-level
inverter is detected using a current detector. Both the
reference signal and the detected output current are sent to
absolute circuits and then sent to a subtractor, and the
output of subtractor is sent to a current controller. The
detected utility voltage is also sent to an absolute circuit
and then sent to a comparator circuit, where the absolute
utility voltage is compared with VC1 and 2VC1 , to determine
the operating voltage range. The comparator circuit has
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Fig. 5 Control block

a Seven-level inverter
b Dual-output DCDC power converter

three output signals, which indicate the operating voltage

ranges, (0, VC1 ), (VC1 , 2VC1 ) and (2VC1 , 3VC1 ). The
feed-forward control is used to eliminate the disturbance of
the utility voltage, VC1 and 2VC1 . The absolute value of the
utility voltage and the outputs of the compared circuit are
sent to a feed-forward controller to generate a feed-forward
signal. The output of the current controller and the
feed-forward signal are summed and sent to a PWM circuit,
to obtain the PWM signal. The detected utility voltage is
also compared with zero, to obtain a square signal that is
synchronous with the utility voltage. The PWM signal, the
square signal and the outputs of the compared circuit are
sent to the switching-signal processing circuit. The
switching-signal processing circuit generates the control
signals for the power electronic switches of the seven-level
inverter, according to Table 1.
The control object of the current controller is the output
current of the seven-level inverter, which is a sinusoidal
signal of 60 Hz. Since feed-forward control is used in the
control circuit, the current controller can be a simple
amplier, which allows good tracking performance. As can
be seen in (9), (13) and (17), the gain of the current
controller determines the bandwidth and the steady-state
error. To obtain a fast response and a low steady-state error,
the gain of the current controller must be as large as
possible. However, the gain of the current controller is
limited, because the bandwidth of the power converter is
limited by the switching frequency.
5.2

Dual-output DCDC power converter

Fig. 5b shows the control block for the dual-output DCDC

power converter. The input of the dual-output DCDC
power converter is the output of the solar cell array. A ripple
voltage with a frequency that is double that of the utility
appears in the voltages of C1 and C2 when the seven-level
inverter injects real power into the utility. The function of
IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 27172725
doi: 10.1049/iet-pel.2014.0015

MPPT is degraded if the output voltage of solar cell array

contains a ripple voltage. Therefore the ripple voltages
across C1 and C2 must be blocked by the dual-output DC
DC power converter to improve the performance of MPPT.
Accordingly, dual control loops, an outer voltage control
loop and an inner current control loop, are used to control
the dual-output DCDC power converter. Since the output
voltages of the dual-output DCDC power converter are the
voltages of C1 and C2, which is maintained at a constant
voltage by the seven-level inverter, the outer voltage control
loop is used to regulate the output voltage of the solar cell
array. The inner current control loop is used to control the
inductor current to approach a constant current, to block the
ripple voltages in C1 and C2. The perturbation and
observation method is used to perform the function of
MPPT [24]. The output voltage and the output current of the
solar cell array are detected and sent to a MPPT controller,
to determine the desired output voltage of the solar cell
array. The detected output voltage and the desired output
voltage of the solar cell array are sent to a subtractor and the
subtracted result is sent to a PI controller. The output of the
PI controller is the reference signal for the inner current
control loop. The reference signal and the detected inductor
current are sent to a subtractor and the subtracted result is
sent to an amplier, to complete the inner current control
loop. The output of the amplier is sent to the PWM circuit,
for comparison with two opposite triangular signals. The
PWM circuit generates a set of interleaved PWM signals that
control the power electronic switches of the dual-output
DCDC power converter.

Experimental results

To verify
generation
processor
developed

the performance of the proposed solar power

system, a prototype, using the digital signal
(DSP) TMS320F28035 as controller, was
and tested. The power rating of the prototype is
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www.ietdl.org
Table 2 Parameters of the prototype
DCDC power converter
capacitor C3C6
inductors L1, L2
PWM frequency
Seven-level inverter
capacitor voltage VC1
capacitor voltage VC2
capacitors C1, C2
filter inductor
PWM frequency

20 F
0.3 mH
20 kHz
60 V
120 V
1100 F
1 mH
20 kHz

600 W. The prototype was applied to a single-phase utility

with 110 V and 60 Hz. Table 2 shows the main parameters
of the prototype.
To avoid the interference from weather in the experimental
process, the solar cell array was replaced by a DC power
supply. Fig. 6 shows the experimental results for the
seven-level inverter. As seen in Fig. 6d, the output voltage
of the dual-output DCDC power converter is a four-level
DC voltage, which is further converted into a seven-level
AC voltage, as shown in Fig. 6c, by the full-bridge power
converter. As seen in Fig. 6b, the output current of the
seven-level inverter is a sinusoidal current that is in phase
with the utility voltage. This veries that the seven-level
inverter outputs a seven-level AC voltage and converts the
output power of the solar cell array into a high-quality AC
power that is injected into the utility. The THD of the
output current of the seven-level inverter is 4.8%. Fig. 7
shows the experimental results for the dual-output DCDC
power converter. As seen in Figs. 7b and c, the voltages of
capacitors C1 and C2 have multiple relationships and are
regulated at 60 and 120 V, respectively. However, the
voltages of capacitors C1 and C2 contain a voltage ripple of
120 Hz. As seen in Fig. 7a, the output current of the solar
cell array is more stable. This veries that the ripple
voltages in capacitors C1 and C2 are effectively blocked by
the dual-output DCDC power converter. The maximum
power efciency of overall solar power generation system is
94.12% when the input voltage of the dual-output DCDC
power converter is 25 V. The switching loss of power
semiconductor devices is determined by the switching
frequency of seven-level inverter and dual-output DCDC
power converter. Accordingly, the power efciency of
overall solar power generation system is affected by the
switching frequency of seven-level inverter and dual-output
DCDC power converter. However, the effect of switching

Fig. 7 Experimental results for the DC side of the seven-level

inverter
a Output current of solar cell array
b Voltage of capacitor C1
c Voltage of capacitor C2

loss to the power efciency of the proposed solar power

generation system is decreased because the change in the
voltage for each switching operation of seven-level inverter
is reduced. Two boost converters using the interleaved
PWM are used in the dual-output DCDC power converter
for improving the power efciency. However, the power
efciency of the dual-output DCDC power converter is
degraded because the duty ratio of the boost power

Fig. 6 Experimental results for the seven-level inverter

a Utility voltage
b Output current of seven-level inverter
c Output voltage of seven-level inverter
d Output voltage of dual-buck power converter
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Fig. 8 Experimental results for the MPPT performance

a Output power scan of the solar cell array
b MPPT of the proposed solar power generation system
IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 27172725
doi: 10.1049/iet-pel.2014.0015

www.ietdl.org
converters should be larger than 0.5 for applying to the
dual-output DCDC power converter. Besides, the voltage
doubler circuit will obviously degrade the power efciency
when the output power is increased. Hence, the proposed
dual-output DCDC power converter, with high voltage
gain and two dependent voltages with multiple
relationships, is suitable for small-capacity solar power
generation system to avoid using a transformer. To verify
the MPPT function of the proposed solar power generation
system, the DC power supply was replaced by a solar cell
array. Fig. 8 shows the experimental results for the MPPT
performance. Fig. 8a shows the output power scan for the
solar cell array, when the duty ratio of the dual-output
DCDC power converter is regularly increased. Fig. 8b
shows the experimental results for the beginning of MPPT
for the dual-output DCDC power converter. As seen in
Fig. 8b, the output power of the solar cell array is almost
constant when maximum power tracking is achieved, and
its value is very close to the maximum power shown in
Fig. 8a.

Conclusion

This paper proposes a small-capacity grid-connected solar

power generation system which acts as a power conversion
interface between the generated power of a solar cell array
and the utility. The proposed solar power generation system
is composed of a dual-output DCDC power converter and
a seven-level inverter. A modied voltage doubler based
topology is used to congure the DCDC power converter,
and it automatically generates two dependent voltages with
multiple relationships by using only one controller. The
seven-level inverter is congured using a dual-buck power
converter and a full-bridge power converter. The
seven-level inverter is congured using only six power
electronic switches and only the power electronic switches
of the dual-buck power converter are switched at
high-frequency PWM, so the power circuit is simplied.
The experimental results verify that the proposed
small-capacity grid-connected solar power generation
system generates a sinusoidal output current that is in phase
with the utility voltage and which is injected into the utility
to perform unity power factor. The seven-level inverter
outputs an AC voltage with seven levels and the
dual-output DCDC power converter outputs two dependent
voltage sources with multiple relationships and traces the
maximum power of the solar cell array.

Acknowledgment

The authors would like to express their acknowledgement to

the National Science Council Taiwan under the contract NSC
102-2221-E-022-012 for the nancial support of this paper.

References

1 Papanikolaou, N.P.: Low-voltage ride-through concept in yback

inverter-based alternating currentphotovoltaic modules, IET Power
Electron., 2013, 6, (7), pp. 14361448
2 Koutroulis, E., Blaabjerg, F.: Methodology for the optimal design of
transformerless grid-connected PV inverters, IET Power Electron.,
2012, 5, (8), pp. 14911499

IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 27172725

doi: 10.1049/iet-pel.2014.0015

3 Alajmi, B.N., Ahmed, K.H., Adam, G.P., Williams, B.W.: Single-phase

single-stage transformer less grid-connected PV system, IEEE Trans.
Power Electron., 2013, 28, (6), pp. 26642676
4 Kim, H., Parkhideh, B., Bongers, T.D., Gao, H.: Recongurable solar
converter: a single-stage power conversion PV-battery system, IEEE
Trans. Power Electron., 2013, 28, (8), pp. 37883797
5 Prasanna, P.R., Rathore, A.K.: Analysis, design, and experimental
results of a novel soft-switching snubberless current-fed half-bridge
front-end converter-based PV inverter, IEEE Trans. Power Electron.,
2013, 28, (7), pp. 32193230
6 El Khateb, A., Rahim, N.A., Selvaraj, J., Uddin, M.N.: Maximum
power point tracking of single-ended primary-inductor converter
employing
a
novel
optimisation
technique
for
proportional-integral-derivative controller, IET Power Electron.,
2013, 6, (6), pp. 11111121
7 Jiang, S., Cao, D., Li, Y., Peng, F.Z.: Grid-connected boost-half-bridge
photovoltaic microinverter system using repetitive current control and
maximum power point tracking, IEEE Trans. Power Electron., 2012,
27, (11), pp. 47114722
8 Mohan, N., Undeland, T.M., Robbins, W.P.: Power electronics
converters, applications and design (Media Enhanced, John Wiley &
Sons, 2003, 3rd edn.)
9 Hasegawa, K., Akagi, H.: Multilevel inverters for low-power
application, IET Power Electron., 2011, 4, (4), pp. 384392
10 Pouresmaeil, E., Montesinos-Miracle, D., Gomis-Bellmunt, O.: Control
scheme of three-level NPC inverter for integration of renewable energy
resources into AC grid, IEEE Syst. J., 2012, 6, (2), pp. 242253
11 Chaves, M., Margato, E., Silva, J.F., Pinto, S.F.: New approach in
back-to-back m-level diode clamped multilevel converter modelling
and direct current bus voltages balancing, IET Power Electron., 2010,
3, (4), pp. 578589
12 Barros, J.D., Silva, J.F.A., Jesus, E.G.A.: Fast-predictive optimal
control of NPC multilevel converters, IEEE Trans. Ind. Electron.,
2013, 60, (2), pp. 619627
13 McGrath, B.P., Holmes, D.G.: Analytical determination of the capacitor
voltage balancing dynamics for three-phase ying-capacitor converters,
IEEE Trans. Ind. Appl., 2009, 45, (4), pp. 14251433
14 Zhang, L., Waite, M.L., Chong, B.: Three-phase four-leg
ying-capacitor multi-level inverter-based active power lter for
unbalanced current operation, IET Power Electron., 2013, 6, (1),
pp. 153163
15 Jana, K.C., Biswas, S.K., Chowdhury, S.K.: Performance evaluation of
a simple and general space vector pulse-width modulation-based
M-level inverter including over-modulation operation, IET Power
Electron., 2013, 6, (4), pp. 809817
16 Suresh, Y., Panda, A.K.: Research on a cascaded multilevel inverter by
employing three-phase transformers, IET Power Electron., 2012, 5, (5),
pp. 561570
17 Vazquez, S., Leon, J.I., Carrasco, J.M., Franquelo, L.G., Galvan, E.,
Reyes, M., Sanchez, J.A., Dominguez, E.: Analysis of the power
balance in the cells of a multi-level cascaded H-bridge converter,
IEEE Trans. Ind. Electron., 2010, 57, (7), pp. 22872296
18 Pereda, J., Dixon, J.: High-frequency link: a solution for using only one
DC source in asymmetric cascaded multilevel inverters, IEEE Trans.
Ind. Electron., 2011, 58, (9), pp. 38843892
19 Rahim, N.A., Chaniago, K., Selvaraj, J.: Single-phase seven-level
grid-connected inverter for photovoltaic system, IEEE Trans. Ind.
Electron., 2011, 58, (6), pp. 24352443
20 Ounejjar, Y., Al-Hadded, K., Dessaint, L.A.: A novel six-band
hysteresis control for the packed U cells seven-level converter:
experimental validation, IEEE Trans. Ind. Electron., 2012, 59, (10),
pp. 38083816
21 Shen, J.M., Jou, H.L., Wu, J.C., Wu, K.D.: Five-level inverter for
renewable power generation system, IEEE Trans. Energy Convers.,
2013, 28, (2), pp. 257266
22 Prudente, M., Ptscher, L.L., Emmendoerfer, G., Romaneli, E.F., Gules,
R.: Voltage multiplier cells applied to non-isolated DCDC converters,
IEEE Trans. Power Electron., 2008, 23, (2), pp. 871887
23 Fardoun, A.A., Ismail, E.H.: Ultra step-up DCDC converter with
reduced switch stress, IEEE Trans. Ind. Appl., 2010, 46, (5),
pp. 20252034
24 Femia, N., Petrone, G., Spagnuolo, G., Vitelli, M.: Optimization of
perturb and observe maximum power point tracking method, IEEE
Trans. Power Electron., 2005, 20, (4), pp. 963973

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