DO254

AVP254 - Automatic Verification Platform for FPGA

Benefits

The Cleverest Solution

for FPGA Physical Testing !

Accelerate your Time-to-Market and save money

Barco Silex AVP254 is an automatic

physical verification platform for
FPGA, especially developed to
satisfy
the
DO-254/ED-80
verification
objectives,
while
drastically saving testing costs and
delays.

Reuse your RTL simulation patterns for FPGA physical

verification without redeveloping test vectors
Reuse your generic test bench for the verification of next
FPGAs

Provide comprehensive test coverage rate on

target board

Key Features
Physical verification environment base, with associated virtual simulation model

FPGA on board and FPGA virtual verification for all FPGA vendors
One single set of procedures for both environments

Fully automatic and self-checking test bench

Requirements based log files and associated status

Detailed measurements values and code coverage metrics reports

Includes basic set of qualified functions

Basic signal acquisition and generation operations

Loop management for recurring sequences

Easy integration of user defined functions

Specific digital and analog interfaces

management
Algorithms modelling

Device Under Test power supply

management

Customisable power supplies

Automatic power management to prevent hardware
damages during tests

Reusable and based on industry standard

Solution based on NI PXI architecture

Easy migration to production tests

DO254 flow compliance

Many successful certifications for our customers up to DAL A by both FAA and EASA authorities
Support up to SOI#4

www.barco-silex.com

FactSheet

Comparison between traditional verification and the Barco Silex solution

Workload For a FPGA

Verification (DO-254)
120%
100%
100%

Real Facts
This illustration shows the verification workload
for an FPGA that uses a traditional verification
methodology (test vectors are written for the
simulation, and then re-written for the physical
verification) compared to the workload using
our automatic test bench.

43%

Results examples are related to a real project

developed by Barco Silex with following
characteristics :
FPGA : Microsemi A3PE3000, 83% full
Nb of I/Os : 123
DO-254 Level-A

Barco Silex Solution

Using a workload basis of 100% with the

traditional methodology, we obtain 43% by
using our automatic test bench (including all
extra-work necessary for the test bench setup).
The gain in terms of work weeks is more than
50%.
More complex the FPGA is, better are savings.

80%
60%
40%
20%
0%
Traditional Verification
flow

Barco Silex Product Package and Services

Our offering includes:

The full PXI test bench with associated documentation and software including : test
sequencer, autoverification engine, report generation engine and GUI

Test bench simulation model

A DO-254 qualification report for all native functions

A testing PC

The design of the specific hardware interface board

A training for methodology understanding and platform handling

Additional services for the development of your verification functions : custom interfaces
development and integration, DO-254 qualification report for all custom functions with
associated reviews

More Information
Web site :

www.barco-silex.com

E-mail :

david.penez@barco.com

Tel :

+33 (0)1 72 92 05 89

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FactSheet

Verification Environment

User Defined Function Set

Principle

SET_COM
Gives the configuration and the data to be sent
using user defined interfaces

Single set of test procedures

For simulation and board tests

GET_COM
Checks the configuration and the data received
using user defined interfaces
COM
interfaces

COM
interfaces

COM

FPGA under
test model
Events
generator
@200 MHz

Discretes

COM

FPGA under
test

Acquisition
modules
@200MHz

Discretes

Events
generator
@200 MHz

Simulator

Discretes

Acquisition
modules
@200MHz

CALCULATE
Calls the user defined algorithm models

Discretes

PXI case

Custom test board

PXI case

Virtual test bench

Physical test bench

Simulation results

Board test results

FPGA under test model

- RTL Code
- Gate level post route back-annotated netlist

Power and IOs Management

Device Under Test power supply:
- Configurable number of sources
- Configurable voltage range for each source
- Soft controlled to prevent hardware damages

HDL Code coverage metrics

- Expression
- Branch
- Statement
- FSM Transition

Device Under Test signals interface:

- Digital IOs management
- Sampling frequency up to 200 MHz
- Configurable voltages
- Analog IOs management
- Customisable features:
- Sampling frequencies, voltage range and
accuracy

Qualified Basic Function Set

Test Reports Generation

ASSIGN
Assign a value to a single signal or to a bus

Specification of the
module to be
tested
(requirements)

SET_IO_DIR
Define the direction of the IO lines

Test report OK/KO

status for each
requirement

Requirements traceability

Test procedures
(documents, scripts)
for each
requirement

CHECKOUT
Check the value of a signal
CHECKSIG
Check the period and the duty cycle of a signal
CHECKTIME
Check the time between two events

Autoverification
engine

Comparison

Test bench
(Virtual or physical)
Expected results
and related
accuracy

WAIT_EVENT
Wait for an event on a signal
WAIT_TIME
Wait for a defined time
LOOP / LOOPx
Repeat a sequence of instructions
DISPLAY
Display a message in the log file

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Measured
results

Expected
results

DO-254 Expertise for Airborne Electronic Hardware

Barco Silex Experience

10+ Years of Success

Since 2003 Barco Silex has
established a solid reputation in
the development of DO-254
certifiable hardware designs.
Starting from your upper level
requirements, we provide all
services needed to create the
necessary hardware design life
cycle data according to a DO254 requirements process.
We designed multiple FPGAs and
ASICs
for
different
Design
Assurance Levels (from DAL-A
to DAL-D). These FPGAs and
ASICs are used in equipment
certified by FAA and EASA
certification authorities.
100% of our designs presented
by our clients to the certification
authorities succeeded, thanks to
our strong expertise.
We are member of the DO-254
User Group.

Barco Silex Inside!

Want to know more?

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