DesigningwithASICs(QuestionBank)

UNIT1
1. WritethedifferenttechnologiesusedinIC?
2. WritesomeadvantagesofCMOSTechnology?
3. DefineSemicustomASIC?
4. GivetheclassificationofASIC?
5. WritethedifferencebetweenstandardICandCustomIC?
6. WhatismeantbyEmbeddedIC?
7. Writethestepsusedfordesignflow?
8. GivethedraincurrentequationofNMOSandPMOStransistors?
9. DefineTimeofflight?
10. Whatismeantbyvelocitysaturation?
11. Writethedifferenttypesofadders?
12. Writethetypesofmultipliers.
13. DefineElectricaleffort?
14. Writesomepointsaboutlibrarycelldesign.
15. Whatismeantbypropagationdelay.
16. WhatarethecharacteristicsoftheFPGA?
17. Whatismeantbydesignentry?
18. WhatismeantbyLogicsynthesis?
19. ExplainaboutDADDAmultiplier?
20. Derivethedraincurrentequation?
21. Explainaboutlogicaleffort?
22. WithneatdiagramexplainaboutcustomAsics?
23. Explainaboutthedifferenttypesofadders?

UNITII
1. WritethetypesofprogrammableASICs.
2. DefineAntifuse?
3. DefinePREPBenchmarks.
4. Writethedifferenttypesofbasiclogiccell.
5. WhyActelarchitectureiscalledasanondeterministicarchitecture?
6. Definespeedgrading.
7. Defineworstcasetiming.
8. Definepropagationdelay.
9. DefineDeratingfactors.
10. DefineDCoutput.
11. WritedownShannonsExpansiontheorem

12. DefineACoutput.
13. DefineACinputandDCinput.
14. DefinePowerinput.
15. defineclockinput.
16. Writethedifferenttypesofterminationsusedintransmissionline.
17. Explainthefollowing:EEPROMTechnology&AntifuseTechnology
18. ExplaintheActelActarchitecture
19. ExplaintheXilinx3000CLBarchitecture
20. ExplaintheXilinx4000CLBarchitecture
21. ExplainaboutdifferentI/Orequirements.

UNITIII
1. Writesomepointsaboutwiringchannels.
2. WriteaboutroutingresourcesusedinActelACT.
3. GivetheformulaeforElmoresdelay.
4. GivethedetailsofantifusesforActelACTfamily.
5. DefineChannelDensity.
6. GiveshortnotesonAlteraMAX5000and7000.
7. DrawthediagramforAlteraMAX9000Architecture.
8. GivesomepointsaboutAlteraMAX9000.
9. WritethecomponentsofProgrammableASICs.
10. DefineOEM.
11. Writesomehardwaredescriptionlanguages.
12. WritesomeimportantfiletypesusedinActelact.
13. GiveshortnotesonAltera.
14. Howthelogicminimizationcanbemade.
15. DefineHalfgateASICs.
16. DefineSchematicentry.
17. DrawtheIEEEdimensionforANDgate.
18. Giveshortnotesabouthierarchicaldesign.
19. DefineCADFrameInitiative(CFI).
20. ExplaintheinterconnectarchitectureusedinActelAct.
21. ExplaintheinterconnectarchitectureusedinXilinxLCA
22. ExplaintheinterconnectarchitectureusedinAlteraMAX5000,9000,XilinxEPLD.
23. ExplaintheXilinxdesignflow
24. ExplaintheCFIandEDIFconnectivitymodel.

UNITIV
1. Write the two high level hardware description language
2. Give the important packages used in VHDL

3. write the different types of modeling used in VHDL & Verilog

4. Write short notes on concurrent assertation statement
5. Write the structure for generate statement
6. Write the verilog code for multiplexer(2:1)?
7. Write the various faults?
8. Write short notes on serial fault simulation?
9. Write short notes on a concurrent fault simulation?
10. Write the different types of tests conducted in ASICS
11. Write the program for JK flip-flop using Verilog.
12. Write the different types of simulations.
13. Write short notes on logic simulation.
14. Write short notes on Switch level simulation.
15. Write VHDL code for the following.
4:1 multiplexer
ripple Carry Adder
2:4 Decoder
4:2 encoder
16.Write the Verilog code for the following
3 bit counter
Shift register
1:4 Demultiplexer
Full Adder
17.Briefly explain PODEM Algorithm
UNIT V
1. What is meant by system partitioning?
2. Write the objectives and goals of system partitioning?
3. Write the constraints used in system partitioning?
4. Give some points about Simulated annealing
5. Write the different algorithms used in system partitioning.
6. How do you find out the gain in system partitioning?
7. Define "fioor planning".
8. Write the goals and objectives of floorplanning.
9. Write the different types of algorithm used in placement.
10. what is meant by iterative system portioning?
11. what is meant by Placement?
12. write the steps used in Min- cut algorithm .
13. Define sliceable floor plan
14. Give some points about cyclic constraints.
15. Define back annotation.
16. What is meant by circuit extraction and DRC?
17. Write the steps used in design flow.
18. What is meant by routing .
19. Write some points about detailed routing .
20. Write the goals of global routing

21. Explain KL algorithm for system partitioning?

22. Explain detailed routing with neat diagram?
23. Briefly explain global routing with neat diagram?
24. Explain about eigen value algorithm for placement?
25. Explain about circuit extraction and DRC?