CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

page 1

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Agenda
1.Concepts of Functional Noise
2.Concepts of Delay Noise
3.Functional and Delay Noise
4.Delay Noise in PTSI
/
/
/
/
/
/

Why Need PTSI

PTSI vs SPICE
The Ideal Flow
Switches in PTSI
Recommendations
Pros and Cons

5.Delay Noise Prevention

6.Delay Noise Repair
7.Simultaneous Functional and Delay Noise Fixes
page 2

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Background on Functional Noise

Functional Failure Occurs when Noise Changes the Latch State

Noise Glitch
Aggressor Driver

Cga

clk
Victim stable, aggressor switching

Cc

Victim Driver

flop

Cgv
Transient Glitch

clk

page 3

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Background on Delay Noise

Injected Charge on Switching Victim Net causes delta (+/-) delay

Cga
Delay
Aggressor Driver

Cc

Victim Driver

Both Victim and Aggressor are Switching

Simultaneously

Cgv

page 4

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Functional and Delay noise

TABLE 1. Functional vs Delay Noise
Definition
Effect
Timing
Windows
Factors

Functional Noise
Switching Aggressor(s) and Stable
Victim
May Cause Circuit Functional Failure
Affect Aggressor Alignment only Magnitude of Effect
Driver Strengths, Input Transitions,
Fanout Gates and Interconnect RCs

Delay Noise
Simultaneously Switching
Aggressor(s) and Victim
May Cause Setup/Hold Timing
Violations
No Problem if Aggressor and
Victim Timing Windows do not
Overlap
Driver Strengths, Input Transitions, Fanout Gates and Interconnect RCs, and Timing
Windows

page 5

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Delay Noise in PTSI

Why Need PTSI?
Table 1: Comparison with Conventional Coupling Multiplier Strategies at WCS corner
Violations in PTSI
Violations with K=1.5 Violations with K=2
Max Delay
141
141
192
Min Delay
165
25
121
Table 2: Comparison with Conventional Coupling Multiplier Strategies at BCS corner
Violations in PTSI
Violations with K=1.0 Violations with K=0
Min Delay
285
15
208

Comparison Results for a Mixed Signal Multi-Million Gate Wireless

Platform
Number of Nets Analyzed for Delay Noise: ~ 100k
page 6

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Why Need PTSI? (contd.)

PTSI 1

180

Number of Violations

K=2.0

150
Number of Violations

K=1.5
120
90
60
30

PTSI 1

150

K=0

120

K=1.0

90
60
30

0.1

0.3

0.5

1.0

10

Negative Slack in ns (WCS Max Delay)

0.1

0.3
0.5
1.0
10
Negative Slack in ns (BCS Min Delay)

page 7

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

PTSI vs SPICE
PT-SI

Victim Stage Delay

Dump Spice Deck

Maximize Spice Delays

Compare

Compare PTSI with SPICE on Small Testcase Consisting of Buffers

Comparison of Delay in SPICE with Delay in PTSI for STAGE
Test PTSI Accuracy and Process Sensitivity to Coupling Caps
Maximize Delay in SPICE- Iterations for Worst-case Alignment

page 8

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

PTSI vs SPICE (contd.)

Cc in fF

Vp (PT) in V

Delta_delay in ns

60
75

0.259133/0.277011
0.299031/0.300524

0.034(2.11%)r
0.099(6.04%)f

100

0.352610/0.353855

0.190(10.66%)f

150
200
300

0.415305/0.419025
0.469351/0.511150
0.541808/0.584510

0.211(10.02%)f
0.172(7.16%)f
0.931(31.81%)f

Keep in Mind, Pessimism will Increase with Noise Peak (Vp)

page 9

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

The Manual Flow

Physical Synthesis
Automatic
Noise Prevention
Techniques and/or
External Directives

Routing and Extraction

Functional Noise

Clean???

No

Yes
PrimeTime SI
Yes

No
Clean???

DONE!!!

page 10

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Ideal Flow
Physical Synthesis
Automatic
Noise Prevention
Techniques and/or
External Directives

Routing and Extraction

Simultaneous
Functional Noise
Delay Noise Closure

No
Clean ?
Yes
Done !

page 11

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

PTSI-Switches
Filtering Criteria Based on Cc, Cc/Cg, Vp etc
Reselection Criteria for Subsequent Iterations
Exit Criteria for Number of Iterations
All in all, Options for User to Trade-off Accuracy vs Runtime
Choose Trade-off Based on Project Stage, Analysis Objective,
Margins etc

page 12

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Recommendations
Following Steps Recommended to Extract Maximum out of PTSI
1.Validate Libraries - Can Use the SPICE Correlation Kit
2.Default Values for SI in PTSI May not be Good Enough
3.Choose Filtering Criteria that Best Fits Process Tech
4.Choose Filtering Criteria that Best Fits Design
5.Control RunTime vs Accuracy Based on Design Stage

page 13

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Pros
Belongs to the PrimeTime Delay Calculation Platform: STA and Delay
Noise Go Hand-in-Hand
Delay Noise not Causing Timing Failures can be Ignored
Considers Effect of Transition Times, Arrival Windows
Provides User Options to Control Accuracy and Speed
Can Ignore Nets/Net Pairs Depending on Functionality

page 14

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Cons
Pessimistic by Construction: Mapping Dynamic Phenomenon into
Static Domain
Pessimism Increases with Noise Glitch Size
Runtimes Increase Substantially Depending on Filters and
Reselection Criteria: Runtimes Described for Mixed Signal SoC with
Default Filters

Runtimes in hours

PTSI runtime in hours

PT (w/0 SI) runtime in hours

1:55

0:35

Filtering can Mask Violations: Comprehensive Analysis Required

before Settling on Filter Values: Following Slides Provide some Data
on Single Design with ~ 30k nets and in 0.13u technology

page 15

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Filter Set 1
set si_analysis_logical_correlation_mode true
set si_filter_total_aggr_xcap 0
set si_filter_per_aggr_xcap 0
set si_filter_single_xcap 0
set si_filter_per_aggr_noise_peak_ratio 0
set si_xtalk_reselect_critical_path false
set si_xtalk_reselect_delta_delay 0.01
set si_xtalk_reselect_delta_delay_ratio 0.01

Filter Set 2
set si_analysis_logical_correlation_mode true
set si_filter_total_aggr_xcap 0.03
set si_filter_total_aggr_xcap_to_gcap_ratio 0.03
set si_filter_per_aggr_xcap 0.02
set si_filter_per_aggr_xcap_to_gcap_ratio 0.02
page 16

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

set si_filter_per_aggr_to_average_aggr_xcap_ratio 0.25

set si_filter_single_xcap 0.01
set si_filter_single_xcap_to_gcap_ratio 0.01
set si_filter_single_to_average_all_xcap_ratio 0.25
set si_filter_per_aggr_noise_peak_ratio 0.01
set si_filter_total_aggr_noise_peak_ratio 2.0
set si_xtalk_reselect_critical_path false
set si_xtalk_reselect_delta_delay 0.01
set si_xtalk_reselect_delta_delay_ratio 0.01

Max Violations for Set 1

Max Violations for Set 2

Max Hit

46

35

270ps

page 17

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

No Comprehensive Noise Repair Techniques or Guides Available

Hence Analysis-Repair Loop not Guaranteed to Converge
Hard to Verify in SPICE

page 18

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Delay Noise Prevention

Constrain Transition Times during Physical Synthesis to Strengthen
Potential Victim Drivers and Shrink Timing Windows: Analyze Area
Impact and Find Sweet Spot
Constrain Distances Traversed by Parallel Interconnects to Reduce
Potential Coupling: Good for Functional Noise as well
Constrain Layer Assignments to Parallel Routes to Reduce Potential
Coupling: Good for Functional Noise as well

page 19

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Delay Noise Repair

Techniques
Technique

Why?

Be Careful!!!

Upsize Victim Driver

Reduce Driver Resistance

May Convert Victim to Aggressor

for Another Net

Downsize Aggressor
Driver

Increase Driver Resistance

May Convert Aggressor to Victim

Space Aggressor and

Victim Nets

Reduce Coupling Caps

Noise Problem Might Shift to

another Region

Increase Victim
Width

Increase Cg on Victim, thus Reducing Effect of Coupling

Might Increase Driver Delay Significantly

Reduce Aggressor
Width

Attenuates Noise Signal

Aggressor Net Might Become Resistive Increasing Transmission Delay

Shielding

Reduces Coupling Significantly

Increases Cg Significantly

Best Possible Choice(s) Depend(s) on the Topology in the neighbourhood

page 20

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Simultaneous Functional and Delay Noise Fixes

Background
Functional Noise Violations in Critical Paths will Almost Certainly
Cause Timing Violations
The Converse is not Necessarily TRUE
Basic Causes of Functional and Delay Noise are Similar
Hence Methodology to Solve Functional and Delay Noise Issues
Simultaneously: Need of the Hour

page 21

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Avoidance
Avoidance Directives: Union of Directives for Functional and Delay
Noise
Transition Control Works Well for Both
Routing Length Constraint Works well for Both
Analysis

Accurate Analysis Needs to be Non-overlapping but Parallel

Some Overlap May be Created Through some Approximations

page 22

CrossTalk Analysis (using PTSI) and Repair Issues in SoC Designs

Arijit Dutta
Dr. B.K. Agrawal
Motorola Inc.

Repair

Functional Noise Violations Need to be Fixed Irrespective of Whether

they Cause Timing Violations
Generate Directives for Function Noise Fixes; Make Sure they will not
Cause Timing Violations in Critical Paths Subsequently
Identify Timing Violations Caused by Delay Noise which does not
Belong to the Functional Violation List
Generate Directives for Delay Noise Fixes; Make Sure they will not
cause Other Timing Violations or New Functional Noise Violations

page 23