Introduction

Motivation

Contribution

Conclusions

References

Auxiliary Subsystems of a General Purpose

IGBT Stack for High Performance Laboratory
Power Converters
Anil K Adapa
Venkatramanan D and Vinod John
Department of Electrical Engineering
Indian Institute of Science
National Power Electronics Conference (NPEC)-2015

December 22, 2015

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Introduction

Motivation

Contribution

Conclusions

References

Outline
Introduction
Auxiliary Subsystems
Motivation
Contribution
Precharge
Gate Drive
Protection
Conclusions
References

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Introduction

Motivation

Contribution

Conclusions

References

Auxiliary Subsystems ?

Power semiconductor devices mounted on heat sink(s)

3/19

Introduction

Motivation

Contribution

Conclusions

References

Auxiliary Subsystems ?

Power semiconductor devices mounted on heat sink(s)

Subsystems...
I
I
I
I

Digital controller Master mind to control

Gate drive card Drives the power semiconductor switches
Sensing card Monitors different quantities like voltage, current etc.
Protection card Protects the converter under abnormal conditions
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Introduction

Motivation

Contribution

Conclusions

References

Motivation
Objective
I

Developing the required Auxiliary Subsystems for a General Purpose

IGBT Stack

Contribution

Figure : Block schematic of the general purpose IGBT stack.

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Introduction

Motivation

Contribution

Conclusions

References

Precharge Circuit

Figure : Functional block schematic of the precharge circuit.

I

Precharge circuit charges dc-link smoothly for the start-up.

Small resistance is added to limit the peak charging currents.

Positive Temperature Coefficient (PTC) precharge resistors limits

the energy drawn during the precharge under fault(s).
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Introduction

Motivation

Contribution

Conclusions

References

Gate Drive Cards

Figure : Block schematic of isolated power supply configuration to the gate drive
card(s).
I

High frequency half bridge power supply for multiple gate drive cards reduces
the size of transformer also avoids saturation problem.

Adjustable linear regulator (Adj. LDO) for positive gate voltage to fine control
of turn-on VGE . and easy reconfiguration of negative gate supply voltage.

Additional features from the commercial gate drive IC complements the designed gate drive card.
6/19

Introduction

Motivation

Contribution

Conclusions

References

Gate Drive Cards

Figure : Photograph of the developed PCB cards (left to right): gate drive power
supply, MOSFET buffered gate drive card and BJT buffered gate drive card.

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Introduction

Motivation

Contribution

Conclusions

References

Gate Drive Cards

Figure : Photograph of the gate drive cards and the coverter.

8/19

Introduction

Motivation

Contribution

Conclusions

References

Gate Drive Cards

Double pulse test

(a) Turn-on

(b) Turn-off

Figure : Switching characteristics of the IKW40N1200H3 IGBT at 800V dc

link and 40 A current with the designed mosfet buffered gate drive card.

IGBT turn-on peak current

51 A

IGBT turn-off peak voltage

952 V

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Introduction

Motivation

Contribution

Conclusions

References

Gate Drive Cards

Short-circuit test

Figure : Short-circuit test of the IKW40N1200H3 IGBT with designed mosfet

buffered gate drive card.

IGBT short-circuit peak current

175 A

10/19

Introduction

Motivation

Contribution

Conclusions

References

Generalized Protection Card

Key features
Features of the protection card
1. Programmable dead-time lockout and minimum pulse width suppression.
2. De-saturation fault detection.
3. Over-temperature detection of the heat-sink.
4. Over-current, over-voltage and under-voltage
sense.
5. Push-button or toggle switch feature for manual power on/off.
6. DSC based enable-signal to allow or inhibit all
PWM signals as required.
7. Fault indication to user and DSC.
8. Manual or software based reset signal to resume
operation.

Figure : Photograph of the

developed protection card.

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Introduction

Motivation

Contribution

Conclusions

References

Testing of Dead-Time FSM

Figure : Functional test of dead-time FSM using test input signals, SA(in)
and S A(in) . All channels are 5 V/div and time 5 s/div.

(a)
(b)
(c)
(d)
(e)

Sufficient dead-time
No dead-time
Pulse filtering
Independent control of complementary devices
Blocking of inappropriate PWM signals
12/19

Introduction

Motivation

Contribution

Conclusions

References

Generalized Protection Card

Dead-time lockout
td tDT

&
T

tD
=

&
10

td

t DT

OFF
00

Bot ON
01

td

01/11

DT Lock
00

td = tDT & 00/11

01

reset

Top ON
10

10/11

00/11

Figure : FSM of the dead-time (DT) lockout block in FPGA.

13/19

Introduction

Motivation

Contribution

Conclusions

References

Generalized Protection Card

Dead-time lockout
td tDT

10

&
T

tD
=
td

&

OFF
00

t DT

01

Bot ON
01

td

01/11

DT Lock
00

td = tDT & 00/11

01

reset

10

Top ON
10

10/11

00/11

Figure : FSM of the dead-time (DT) lockout block in FPGA.

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Introduction

Motivation

Contribution

Conclusions

References

Generalized Protection Card

Dead-time lockout
td tDT

DT Lock
00

01

=
td

&

0,
(

/1

tD
=

0)

&
10

td

00

td

t DT

OFF
00

01

td

Bot ON
01

td = tDT & 00/11

01/11

(
1,
/0
00

0)

reset

10

Top ON
10

10/11

00/11

Figure : FSM of the dead-time (DT) lockout block in FPGA.

15/19

Introduction

Motivation

Contribution

Conclusions

References

Conclusions

1. Essential auxiliary subsystems of a General Purpose IGBT Stack

for high performance laboratory power converters are presented.
2. PTC resistors based precharge circuit reduces the chance of catastrophic failures of the converter by limiting the associated energy.
3. A simple and versatile power supply configuration for modular
IGBT gate drive is presented.
4. Effectiveness of the dead-time logic to pass only reliable PWM
signal to the gate drive card is presented.
5. Experimental verification of the functionality of designed gate drive
and dead-time logic circuits are presented.

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Introduction

Motivation

Contribution

Conclusions

References

References-1
[1] Zhe Chen, J.M. Guerrero and F. Blaabjerg, A Review of the State of the Art of
Power Electronics for Wind Turbines, in IEEE Transactions on Power Electronics,
vol.24, no.8, pp.1859-1875, Aug. 2009.
[2] B Arun Karuppaswamy, Gulur Srinivas and Vinod John, A grid simulator
to evaluate control performance of grid-connected inverters,IEEE International
Conference on Power Electronics, Drives and Energy Systems (PEDES), vol., no.,
pp.1-6, 16-19 Dec. 2014.
[3] Yeh Chia-Chou and M.D. Manjrekar, A Reconfigurable Uninterruptible Power
Supply System for Multiple Power Quality Applications, IEEE Transactions on
Power Electronics, vol.22, no.4, pp.1361-1372, July 2007.
[4] Yeh Chia-Chou and M.D. Manjrekar, A Reconfigurable Uninterruptible Power
Supply System for Multiple Power Quality Applications, IEEE Transactions on
Power Electronics, vol.22, no.4, pp.1361-1372, July 2007.
[5] S. Anand, R. Singh and F.B.G. Fernandes, Unique Power Electronics and Drives
Experimental Bench (PEDEB) to Facilitate Learning and Research, IEEE Transactions on Education, vol.55, no.4, pp.573-579, Nov. 2012.

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Introduction

Motivation

Contribution

Conclusions

References

References-2
[6] A.K. Jain, and V. T. Ranganathan, VCE Sensing for IGBT Protection in NPC
Three Level Converters-Causes For Spurious Trippings and Their Elimination,
IEEE Transactions on Power Electronics, vol.26, no.1, pp.298-307, Jan. 2011.
[7] IGBT Applications handbook, ON Semiconductor, HBD871/D, Rev.2, 2012.
[8] Datasheet of 6PS03012E33G34160, IGBT Stack, Available at: www.infineon.com,
last accessed on July 2015.

[9] Datasheet of SPS022B3DA120E, SmartPower Stack, Available at: [10] Semikron

IGBT stack, Available at: http://www.semikron.com/products/productclasses/stacks.h
last accessed on July 2015.
[10] Datasheet of IKW40N120H3, IGBT Stack, Available at: www.infineon.com,
last accessed on July 2015.
[11] N. Agrawal, Control and start-up diagnostics of three phase inverters, Master
of Engineering (ME) thesis, Department of Electrical Engineering, Indian Instite of
Science (IISc), Bangalore, 2011.

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Introduction

Motivation

Contribution

Conclusions

References

Thank you!...

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