FET Lesson:

BJT is a current-controlled device

FET is a voltage-controlled device
BJT: bipolar device
FET: unipolar device
FET: high input impedance
BJT: higher sensitivity to changes in the applied signal
FET: more temperature stable than BJT
FET: usually smaller in construction than BJT
ID = IS
IG = 0 (gate current)
VDS > VP, JFET is a current-source device
IDSS means Drain-to-Source current with a Short-circuit connection from Gate to Source.
- maximum drain current for JFET @ VGS = 0 V & VDS > |VP|
VGS(off) = -VP
Ohmic region: voltage-controlled resistance region
- resistance is controlled by the applied gate-to-source voltage.

rD

rO
VGS
1
VP

ro = resistance with VGS = 0V

rd = resistance at a particular level of VGS
N-channel JFET: gate is p-type material, drain-to-source is n-type
P-channel JFET: gate is n-type material; drain-to-source is p-type
ID = IDSS(1 VGS/VP)2
2 types of FET
1. JFET (Junction FET)
2. MOSFET (Metal Oxide Semiconductor FET)
- Depletion type
- Enhancement type
(source & drain are totally separated by a diff channel)

The greater the applied reverse bias, the wider the depletion region.
IG (gate current) is zero..
ID

Ohmic region
Saturation region

IDSS

VGS = 0 V

Increasing resistance due to narrowing channel

VGS = 2 V
n-channel resistance
VGS = VP
VP

VDS

Seen in datasheet: VGS(off) = VP

As voltage VDS is increased from 0 to few volts, the current will increase.
The relative straightness of the plot reveals that for the region of low values of V DS, the
resistance is essentially constant.
As VDS increases & approaches a level referred to as VP (pinch-off voltage), a depletion region
will widen causing a reduction in the channel width.

VDD

VDS = VP

VGS
+

As VDS is increased beyond VP, the region of close encounter between the two depletion regions
will increase in length along the channel, but the level of I D remains essentially the same.
Therefore, once VDS > VP, JFET has the characteristics of a current source.

+
VDS

ID = IDSS

LOAD

IDSS
drain-to-source current with a short circuit connection from gate to source
maximum drain current for a JFET & is defined by the condition,
VGS = 0 V & VDS > VP

Voltage-controlled Resistor
Ohmic region:
- variable resistor as controlled by applied gate-to-source voltage
rd

rO

V
1 GS
VP

rO resistance with VGS = 0 V

rd resistance of a particular level of VGS
For an n-channel JFET with rO equal to 10k (VGS=0 V, VP= 6 V), then
rd = 40k @ VGS = 3 V

JFET Symbol
D
G

D
G

S
N-channel

S
P-channel

Transfer Characteristics
For BJT,
IC = f(IB)
IC = IB

is the constant while IB is the controlled variable

For FET,

V
ID IDSS 1 GS
VP

IDSS & VP are the constants

Raise to 2nd power means non-linear relation between ID & VGS.

ID

ID
IDSS

VGS = 0 V
VGS = 1 V
VGS = 2 V

VGS

Fixed Bias

Since IG 0 A
VRG = IGRG
= (0 A)(RG)
= 0 Volt

VDS

The circuit becomes

Using KVL,
VGG VGS = 0

VGS = VGG
VDS = VDD IDRD
VS = 0
VDS = VD VS
VD = VDS + VS

VD = VDS
VGS = VG VS
VG = VGS + VS

VG = VGS
Power Dissipation

PD VDSID
Derating factor:
The dissipation rating decreases by constant value for every increase in temperature of
certain value above 25C. See datasheet for each FET.

SMALL SIGNAL ANALYSIS

For BJT, amplification factor is beta ()
For FET, transconductance factor is gm

ID = gm VGS
gm

ID
VGS

gm

2IDSS
VP

V
1 GS
VP

When VGS = 0 (max transconductance curve)

gmo

2IDSS
VP

V
gm gmo 1 GS
VP

Example:
For JFET having IDSS of 10 mA and VP of 5V,
a. Find gmo
b. Find gm @ VGS = 0.5V

Solution:
a. gmo

2IDSS 210mA

4mS
VP
5

b. @VGS = 0.5V

V
gm gmo 1 GS
VP

= ___________

0.5V

4mS1

5V


V
ID IDSS 1 GS
VP

ID

IDSS

VGS
VP

V
gm gmo 1 GS
VP

ID

gm gmo

IDSS

FET Input Impedance

Zi =
Typical values:
JFET:
1000 M
MOSFET:
1015
FET Output Impedance
ZO = rD
rd

rd

1
y OS

VDS
ID

VGS is constant

ID
IDSS

VGS = 0 V
ID
VDS

VGS = 1 V
VGS = 2 V
VDS

FET Equivalent Circuit

Note:

Vgs code used @AC level

VGS code used @DC level

JFET FIXED BIASED

Equivalent circuit:
G

Vin
RG
Zi

Input Impedance

Zi RG

Z O R D rd

D
Vgs

gmVgs

rd

Vout
RD
ZO

VO gm Vgs R D rd
Vgs Vi

VO gm Vi R D rd
AV

VO gm Vi R D rd

Vi
Vi

A V gm R D rd
Example:

Find gm, rd, Zi, ZO, AV.

210mA 2 V

1
1.875mmhos
8V 8V

a. gm

2IDSS
VP

VGS
1
VP

b. rd

1
25k
40 mhos

y OS

c. Z i R G 1M
d. Z O R D rd 2k 25k 1851.852

e. A V gm R D rd gm Z O 1.875m1851.851852 3.472

JFET SELF-BIAS
A. Bypassed
+VDD
RD

C2

Vout

C1

Vin

RG

RS

C3

Equivalent circuit:

Vin
RG
Zi

D
Vgs

gmVgs

rd

Note: same with Fixed Bias equivalent circuit.

Input Impedance

Zi RG

Z O R D rd
VO gm Vgs R D rd
Vgs Vi

VO gm Vi R D rd
AV

VO gm Vi R D rd

Vi
Vi

A V gm R D rd

Vout
RD
ZO

IDq

V
IDSS 1 GS
VP

VGS IDR S
IDq

-I R
IDSS 1 D S
VP

IDq

IDSS

RS 2

V 2
P

2IDqR S
VP

IDq R S
VP

2 2R S
1
IDq

VP IDSS

IDq 1 0

In quadratic equation,

RS

VP

2R S
1

VP IDSS

c 1

roots

IDq x

b b 2 4ac
2a

Possible root values:

Notes: q-pt must be within the transfer curve.

Example:

Answers:
Idq = 12.783mA, 2.816mA
Since IDSS is only 10 mA, IDq = 2.816 mA.
VGSq = -2.816 V
gm = 0.00176887 mhos
rd = 50 k
Zi = 1 M
ZO = 1155.91766
AV = 2.04467342

B. Unbypassed

Input Impedance

Zi RG

ZO

AV

RD
1 gmR S

RD R S
rd

gmR D
R RS
1 gmR S D
rd

Example:

Answers:
Idq = 11.4187mA, 3.1527mA
IDq = 3.1527mA
VGSq = -3.1527 V
gm = 0.00221455 mhos
rd = 50 k
Zi = 1 M
ZO = 999.833284
AV = 2.2141811

JFET Voltage Divider Bias

+VDD

R1

RD

R2

RS

C2

Vout

C1

Vin

Zi

C3

AC equivalent circuit:

Zi = R1 || R2
ZO = rd || RD

VO gm Vgs R D rd
Vgs Vi

VO gm Vi R D rd
AV

VO gm Vi R D rd

Vi
Vi

A V gm R D rd

ZO

JFET Source Follower (Common-Drain) Configuration

AC Equivalent Circuit:

Zi RG
Z O rd R S 1/g m
Vi Vgs VO
Vgs Vi VO

VO gm Vi VO rd R S

VO gm Vi rd R S gm VO rd R S

VO 1 gm rd RS gm Vi rd RS
AV

gm rd R S
VO

Vi 1 gm rd R S

MOSFET

Channel formation in the N-Channel enhancement-type MOSFET

VDG = VDS - VGS
As VGS is increased beyond the threshold level, the density of free carriers in the induced
channel will increase, resulting in an increased level of drain current.
However, if we hold VGS to a constant value while increasing the VDS, the drain current will reach
a saturation level.
VDS sat = VGS VT

For values of VGS less than the threshold level the drain current of an enhancement-type
MOSFET is 0 mA.
For levels of VGS > VT,
ID = k(VGS VT)2

ID on

GS on

VT

P-Channel Enhancement-type MOSFET

Symbols:

Sample Data Sheet

Using the datasheet, determine k.

ID on

GS on

VT

k = 0.061 x 10-3 A/V2

3mA

10V 3V 2

MOSFET also used in analog circuits.

MOSFET can be used as precision resistors w/c can have higher controlled resistance than BJT.
Main advantage of BJT over MOSFET is the ability to handle larger current in a smaller space.
In logic circuits, BJT has an advantage over MOSFET. BJTs are able to drive more gates (larger
fanout) because they can output more current than MOSFET. Many chips use MOSFET as
input while BiCMOS (BJT-FET mixed) as outputs.
In high speed switching, BJT doesnt have larger capacitance from the gate which when
multiplied by the resistance of the channel gives the intrinsic time constant of the process. At
higher frequency, MOSFET operates slower.