Roll No.

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GALGOTIAS COLLEGE OF ENGINEERING AND TECHNOLOGY

1, Knowledge Park-II, Greater Noida, U.P.

II-Sessional Examination
Answer Sheet
Session
Branch
Semester
Subject
Paper Code

: Even Semester (2015-16)

: ECE
: VI
: Microcontroller and its application
: NEC 022

Max. Marks: 30
Time: 90 minutes

Answer any FIVE questions from Part-A and any FOUR from Part-B
Assume suitable data if required. Do not write anything on the Question Paper.
(5 2 = 10 Marks)

PART- A
1. What is the difference between LCALL and ACALL instructions?

LCALL is a 3-byte instruction. This first byte is the opcode and the second and third
bytes are used for the address for the target subroutine. ACALL is a 2 byte instruction
as compared to LCALL. LCALL is a 3 byte instruction.In ACALL target address of the
subroutine must be within 2K bytes address because only 11 bits of the 2 bytes are
used for the address. There is no difference between ACALL and LCALL in terms of
saving a program counter on the stack or the function of the RET instruction. The only
difference is that the target address for LCALL can be anywhere within the 64K byte
address space of the 8051. The target address of the ACALL must be within 2K byte
range.

2. Find the time delay generated by the following routine if the XTAL=22 MHz.
HERE: MOV R0, #64H
AGAIN: DJNZ R0, AGAIN
RET
MC
HERE: MOV R0, #64H
AGAIN: DJNZ R0, AGAIN
RET

1
2
2

Time Delay = ( 3+ 2 100) 0.546 us = 110.838 us = 0.1 ms

3. Name all interrupts of the 8051.

There are five interrupts for 8051.

A. Timer 0 overflow interrupt- TF0
B. Timer 1 overflow interrupt- TF1
C. External hardware interrupt- INT0
D. External hardware interrupt- INT1
E. Serial communication interrupt- RI/TI

4. What are the steps to program timers in mode 2?

Following are the steps for programming timers in mode 2.
1. Load the TMOD value register indicating which timer (timer 0 or timer 1) is to be used,
and the timer mode (mode 2) is selected.
2. Load the TH registers with the initial count value.
3. Start timer.
4. Keep monitoring the timer flag (TF) with the JNB TFx, target instruction to see whether it
is raised. Get out of the loop when TF goes high.
5. Clear the TF flag and
6. Go back to Step 4, since mode 2 is auto reload.
5. What do you mean by Checksum byte in ROM? Explain with an example.
To ensure integrity of contents of ROM, every system must perform checksum calculation. The
process of checksum is carried out to detect any corruption in contents of ROM. ROM can get
corrupted in many ways major one is the current surge during on and off procedure. The checksum
process uses a byte known as checksum byte. The checksum byte is an extra byte that is tagged at the
end of a series of bytes of data.
The process of checksum is as follows:
1) Add the bytes together and drop the carries.
2) Take the 2s complement of the sum. This 2s compliment is our checksum byte, which becomes
last byte of the series.
Let us take an example.

Consider size of ROM being 6 bytes. Having hex values as follows.

32h, 45h , 67h , 12h , 11h , 32h
Now we wish to find first the checksum byte.
For that purpose lets add them up.
32h + 45h + 67h + 12h + 11h + 32h = 133h
So dropping the carries we get 33h
Now 2s compliment of 33h = CD H
So CD H is our checksum byte.

6. Explain TMOD register.

TMOD register
As we know there are 2 timer registers in 8051. Timer 0 and timer 1. Both of these registers use the same
register called TMOD to set various timer operation modes.
TMOD is an 8 bit register, in which lower 4 bits are for Timer 0 and upper 4 bits are for Timer 1.
GATE
GATE
C/T
M1
M0

C/T

M1
TIMER 1

M0

GATE

C/T

M1
TIMER 0

M0

Gating control when set. The timer/counter is enabled only while the INTx pin
is high and TRx control pin is set. When cleared, the timer is enabled whenever
TRx control pin is set.
Timer or counter; 0 or clear for timer operation.(connected to input from
internal system clock). 1 or set for counter operation(connected to input from
Tx input pin).
Mode bit 1
Mode bit 0

M0 and M1 select the timer mode in TMOD.

PART-B

(4 5 = 20 Marks)

7. Ten hex numbers are stored in RAM locations 50H onwards. Write a program to find the smallest
number in the set. The smallest number should finally be saved in 60H.
MOV R0, #50H
MOV R1, #60H
MOV R2, #09
REPT: MOV A, @R0
REPT: INC R0
CJNE A, @R0, HERE
HERE: JNC SKIP
MOV A, @R0
SKIP: DJNZ R2, REPT
MOV @R1, A
SJMP $
8. With a frequency of 22 MHz, generate a frequency of 100 KHz on pin P2.3. Use Timer 1 in Mode1.
a. T = 1 / f = 1 / 100 kHz = 0.01 ms the period of the square wave.

b. 1/2 of it for the high and low portions of the pulse is 5 us.
c. 5 us / 0.546 us = 9 cycles
d. 65536 9 = 65527 =FFF7H
MOV TMOD, #10H
REPT: MOV TL1, #0F7H
MOV TH1, #0FFH
SETB TR1
BACK: JNB TF1, BACK
CLR TR1
CPL P2.3
CLR TF1
SJMP REPT

9. Write a program to generate two square waves, one of 5 KHz frequency at the pin P1.3, and another
of the frequency 25 KHz at pin P2.3. Assume XTAL= 22 MHz.
ORG 0000H
LJMP MAIN
ORG 000BH
CPL P1.3
RETI
ORG 001BH
CPL P2.3
RETI
ORG 0030H
MOV TMOD, #22H
MOV IE, #84H
MOV TH0, #48H
MOV TH1, #0B6H
SETB TR0
SETB TR1
WAIT: SJMP WAIT
END
10. Explain all the steps Carried out while microcontroller getting an interrupt?
1) It finish the instruction it is executing and saves the address of the next instruction (PC) on the stack.
2) It also saves the current status of all the interrupt internally.

3) It Jumps to a fixed location in memory called the interrupt vector table that holds the address of the interrupt
service routine.
4) The microcontroller gets the address of the ISR from the interrupt vector and jumps to it. It starts to
execute the interrupt service subroutine until it reaches the last instruction of the subroutine.
5) Upon executing the RETI instruction ,the microcontroller returns to the Place where it was interrupt.

11. Define Interrupt Vector Table and Interrupt Service Routine of 8051.
For every interrupt, there is a fixed location in memory that holds the address of its ISR.
The group of memory locations set aside to hold the addresses of ISRs is called the
interrupt vector table

For every interrupt, there must be an interrupt service routine (ISR), or interrupt
handler. When an interrupt is invoked, the microcontroller runs the interrupt service
routine. For every interrupt, there is a fixed location in memory that holds the address
of its ISR. The group of memory locations set aside to hold the addresses of ISRs is
called the interrupt vector table