EDC Manual 2016

Electronic Devices and Circuits
Laboratory
Manual and Workbook
Academic Year:__________ Semester:________

Name:__________________ Reg. No.:________
Department:_____________ Class:___________
Electronic Devices &Circuits Lab

______________________________________________________
GRIET-ECE
Page 1 of 138

______________________________________________________
Gokaraju Rangaraju
Institute of Engineering and Technology
Certificate
This is to certify that this is a bonafide record of practical work done by

____________________, Reg. No.________________in the laboratory during
the academic year ____________.
Signature of Faculty
GRIET-ECE
Page 2 of 138

______________________________________________________
GRIET-ECE
Page 3 of 138

______________________________________________________
Contents
FAMILIARIZATION WITH CRO ...........................................................................6
PN JUNCTION DIODE CHARACTERISTICS.......................................................8
HALF WAVE RECTIFIER.....................................................................................16
FULL WAVE RECTIFIER .....................................................................................24
BRIDGE RECTIFIER .............................................................................................34
ZENER DIODE CHARACTERISTICS..................................................................40
ZENER VOLTAGE REGULATOR........................................................................48
COMMON EMITTER TRANSISTOR CHARACTERISTICS .............................54
MEASUREMENT OF h-PARAMETERS OF A TRANSISTOR ..........................64
COMMON BASE TRANSISTOR CHARACTERISTCS......................................78
COMMON EMITTER AMPLIFIER.......................................................................88
EMITTER FOLLOWER .........................................................................................92
JFET CHARACTERISTICS ...................................................................................96
JFET COMMON SOURCE AMPLIFIER ............................................................102
UJT CHARACTERISTICS ...................................................................................108
SCR CHARACTERISTICS.............................................................................. 10816
DESIGN OF SELF BIAS CIRCUIT .....................................................................108
APPENDICES
COMPONENT SYMBOLS.................................................................................1244
RESISTORS, CAPACITORS, INDUCTORS &BREAD BOARD....................1266
CATHODE-RAY OSCILLOSCOPE ....................................................................129
DATA SHEETS .....................................................................................................132
GRIET-ECE
Page 4 of 138

______________________________________________________
GRIET-ECE
Page 5 of 138

______________________________________________________
Experiment 1
FAMILIARIZATION WITH CRO

Aim: To measure unknown values of ac and dc quantities.
Pre-work:
1. Knowledge about multi-meter.
2. AC and DC quantities.
3. CRO front panel.
(The various controls of CRO are enclosed in the appendix.)
Equipment required:
CRO, GRIET trainer module, CRO probes and Multimeter.
Theory:
The CRO (Cathode Ray Oscilloscope) is an electronic measuring instrument for visually
displaying instantaneous values of rapidly varying electrical quantities such as amplitude,
frequency, phase angle and shape of applied signal on fluorescent screen.
Procedure: Measuring D.C Quantities
1. Apply dc voltage to input terminals (Channel1 or 2) on the CRO.
2. Put the switch for [AC-GND-DC] in DC position.
3. Adjust the horizontal and vertical knobs to a readable display.
4. Note the readings on the CRO and tabulate the results for different inputs in Table1.
Measuring A.C Quantities:
1. Apply ac voltage to input terminals (Channel1 or 2) on the CRO.
2. Put the switch for [AC-GND-DC] in AC position.
3. Adjust the horizontal and vertical knobs to a readable display.
4. Note the readings on the CRO and tabulate the results for different inputs in Table2&3.
Tabular Forms: Table 1
Applied DC
S.No
Voltage
Multimeter
Reading (V1)
CRO Reading
(V2)
Error(V1-V2)
1.
2.
3.
4.
5.
GRIET-ECE
Page 6 of 138

______________________________________________________
1. With constant frequency = ________Hz.
Table 2:
S.No
Applied ac
signal
1.
3V
2.
5V
3.
7V
4.
10V
5.
Max voltage
Multimer
CRO
Reading (V1) Reading (Vm)
VRMS=V2=
[Vm/2]
Error(V1V2)
2. With constant Voltage (VRMS) =________V.

S.No
Applied ac
signal (f1)
1.
100Hz
2.
1KHz
3.
10KHz
4.
50KHz
5.
Max
frequency
Time period
Frequency
Error
From CRO(T)
(f2=1/T)
(f1-f2)
Result:
GRIET-ECE
Page 7 of 138

______________________________________________________
Experiment - 2
PN JUNCTION DIODE CHARACTERISTICS

Aim:
1. To plot the volt-ampere characteristics curve of PN junction diode.
2. To find the cut-in voltage and dynamic forward-bias resistance.
Equipment required: GRIET Semiconductor trainer module containing:Bread board
0-15V power supplies 2 Nos.
AC power supply 12 0 12 V
Digital voltmeter 0 20 V DC
Digital ammeter 0 200 A/ mA DC
Components required:
Diodes IN4007
Resistor 1 K, 100
Specifications of the Diode:
Silicon junction diode = IN4007
Reverse voltage = 1000V
Forward current = 30 A
Forward voltage = 0.8V
Temperature range = 65C to 200C
Theory:The two most widely used semiconductor materials are silicon and germanium. The P-N
junction will permit current to flow through it in only one direction. It will not allow the current
to flow through it in reverse direction. The basic property of the diode is thus unidirectional
current flow. The diode has two terminals i.e. Anode and Cathode
If the positive terminal of a power supply is connected to the P side and negative terminal
of the supply to the N side, the diode is said to be FORWARD BIASED, when polarity is
changed the diode is said to be REVERSE BIASED.
The reverse biased current of a diode is very small compared to the forward biased
current. The reverse biased current is also known as leakage current or reverse saturation current.
Only minority charge carriers flow in the reverse bias. The reverse-bias current is a function of
temperature. It will be usually of the order of microamperes for Ge diode and milli Amperes for
diode.
GRIET-ECE
Page 8 of 138

______________________________________________________
There must be at least 0.7V forward bias voltage for silicon diodes before it will conduct
appreciably. This voltage is known as cut-in-voltage. This cut-in-voltage for germanium diode is
0.3V. The current in the forward biased diode increases with an increase in the voltage across it.
The current in the reverse biased diode is almost constant with an increase in voltage. However
there is a limit to the maximum forward current and maximum reverse voltage. The operation of
the diode beyond these limits will destroy the diode by overheating due to excessive current
flow.
Ideally a diode acts like a closed switch when forward biased and like open-switch when
reverse biased. The forward resistance of a diode may be found by drawing a tangent to voltampere characteristic at the operating point.
Circuit Diagram:-
Fig. 1.1: Diode Forward Bias Circuit
Fig. 1.2: Diode Reverse Bias Circuit
GRIET-ECE
Page 9 of 138

______________________________________________________
Model Graphs: Plot with voltage on X axis and current on Y axis for both bias.
Forward bias:
IF, mA
Ge
Si
VF, Volts
Reverse bias:
VR, Volts
VBR
I0, Si
I0, Ge
IR,nA
From graphs calculate:
Dynamic forward resistance, Rac=
GRIET-ECE
Page 10 of 138

______________________________________________________
Tabular form:
#
S.No
Forward Bias
VF
Volts
Reverse Bias
IF
mA
VR
Volts
IR
A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
GRIET-ECE
Page 11 of 138

______________________________________________________
Procedure:1. Construct the circuit as shown in the figure. Use IN4007 diode and forward bias it.
2. Increase the power supply voltage gradually in steps and note the ammeter and voltmeter
readings.
3. Reverse bias the diode construct the circuit as shown in the figure.
4. Increase the power supply voltage in convenient steps and note the micro ammeter and
voltmeter readings.
Result:
Cut in voltage V1 for IN4007 =___
Dynamic forward resistance rac for IN4007 =___
GRIET-ECE
Page 12 of 138

______________________________________________________
GRIET-ECE
Page 13 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 14 of 138

______________________________________________________
GRIET-ECE
Page 15 of 138

______________________________________________________
Experiment - 3
HALF WAVE RECTIFIER

Aim:
1. To examine the input and output waveforms of a half wave rectifier with and without filter.
2. To find the ripple-factor
3. To find the regulation
Equipment Required: Semiconductor trainer module containing.
Bread board
0-15V power supplies - 2Nos.
AC power supply 12- 0 -12V
Digital voltmeter 0- 20 V DC
Digital ammeter 0- 200
Components Required:
Diode 1N4007 - 1 No
Resisters 100, 470, 1k, 4.7k, 10k - 1 No each
Capacitor 470 F/25V- 1 No.
Ratings:
For 1N 4007(Silicon junction diode):Transformer:Reverse voltage = 1000V
Primary voltage = 230Vrms, 50 HZ
Forward current = 1A
Secondary voltage = 12Vrms, 50 HZ
Reverse current = 30A
Full - load secondary current = 1A

Temp. Range = 65o to 200oC
Theory:
The device which converts ac to dc is called rectifier. DC passes currents in only one
direction. Diode has the property of allowing current in one direction; hence diodes are basic
components in rectifiers. In the half wave rectifier circuit, transformer at the input is connected
to the supply to step down the voltage from 230 V to 9V. The secondary of the transformer is
connected in series to the diode and load resister RL. Output is taken across RL.
During the positive half cycle of the input, anode of the diode is positive with respect to cathode,
hence current flows through the diode. During the negative half cycle of the input, there is no
current because the anode is made negative with respect to cathode. The process of diode
conducting in positive half of the input cycle is called half wave rectification.
The output voltage is pulsating dc voltage. These pulsation's or ripple is removed by using a
filter mostly capacitors of electrolytic type. With capacitor filter, the amount of ac present in the
output is removed and we get a pure dc.
GRIET-ECE
Page 16 of 138

______________________________________________________
Circuit Diagram:
Fig.4.1: Half Wave Rectifier without Filter
Fig.4.2: Half Wave Rectifier with Filter
GRIET-ECE
Page 17 of 138

______________________________________________________
Procedure:
1. Construct the circuit as shown in the figure
2. Observe the voltage across the secondary of the transformer and across the output
terminals VDC
3. Vary the load RL in convenient steps and note the ac voltage and dc voltage across the
load.
4. Calculate ripple factor and regulation for the different loads.
5. Tabulate the readings as in the table 1.
6. Connect a capacitor C across load and repeat steps 2 , 3 , 4.
7. Tabulate the readings as in the table 2
Observations:
Table 1: Half wave rectifier without filter
VNL=_______V
S.No.
RL Ohms
VFL=VDC
Volts
VAC
Ripple factor
=VAC/VDC
%Regulation=
((VNL VFL) / VFL) * 100
VAC
Volts
Ripple Factor
= VAC/VDC
%Regulation=
((VNL VFL) / VFL) * 100
1.
2.
3.
4.
5.
Table 2: Half wave rectifier with filter

VNL =_________V
S.No.
RL ohms
VFL=VDC
1.
2.
3.
4.
5.
GRIET-ECE
Page 18 of 138

______________________________________________________
Model Graphs:
Draw ripple factor Vs load by taking load resistance R L on X-axis and ripple factor on Yaxis for both, with and without filter arrangements as shown in fig. 5.3.
Ripple factor
without filter
With filter
RL
Fig.5.3
Draw %Regulation Vs load by taking load resistance RL on X-axis and %Regulation on Y-axis
for both, with and without filter arrangements as shown in fig. 5.4.
%Regulation
With filter
Without filter
RL
Fig.5.4
Results:
Ripple factor without filter at 1K Ohm =___
Ripple factor with capacitor filter at 1k Ohm =___
% Regulation without filter at 1K Ohm =____
% Regulation with the capacitor filter at 1K Ohm =_____
GRIET-ECE
Page 19 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 20 of 138

______________________________________________________
GRIET-ECE
Page 21 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 22 of 138

______________________________________________________
GRIET-ECE
Page 23 of 138

______________________________________________________
Experiment - 4
FULL WAVE RECTIFIER

Aim:
1. To examine the input and output wave forms of a full - wave rectifier with and without
filter.
2. To find the ripple - factor.
3. To find the regulation
Equipment Required: Semiconductor trainer module containing
Bread board
0 - 15V power supplies - 2 Nos.
AC power supply 12 - 0 - 12 V
Digital voltmeter 0 - 20V DC
Digital ammeter 0 - 20 A/mA DC
Ratings:

Theory:
The disadvantage of half wave rectifier is only one half cycle of the input is rectified .so
it is possible to rectify both the half cycles of the input voltage by using two diodes using full
wave rectifier circuit. The transformer used is center tap, which produces two out of face signals
at each ends of secondary taking center tap as reference. In the positive half cycle of the input ,
Diode D1 conducts as its anode is positive with reference to center tap, diode D2 will not
conduct because its anode is negative with reference to center tap at same time.
In the negative half cycle of the input, diode D1 is not conducting, but diode D2 is conducting.
The output of full wave rectifier is thus pulsating direct current.
This pulsating DC is made pure DC by filtering the pulses by connecting a capacitor parallel to
the load resister Rl. This produces a pure DC at the output.
GRIET-ECE
Page 24 of 138

______________________________________________________
Circuit Diagram:
Fig. 5.1: Full Wave Rectifier without Filter
Fig. 5.2: Full Wave Rectifier with Filter
GRIET-ECE
Page 25 of 138

______________________________________________________
Procedure:
1. Construct the circuit as shown in the figure.
terminals VDC.
3. Vary the load in convenient steps and note the AC voltage and DC voltage across the load.
4. Connect the capacitor filter across the load as shown in the figure and repeat the procedure
steps 2, 3, 4.
Observations:
Table1. Full Wave Rectifier without Filter
VNL =______V
S.No.
RL
ohms
VFL=VDC
VAC
Volts
Ripple Factor
VAC/VDC
%Regulation
((VNL VFL) / VFL) * 100
VAC
Volts
Ripple Factor
VAC/VDC
%Regulation
((VNL VFL) / VFL) * 100
1
2
3
4
5
Table2. Full Wave Rectifier with Filter
VNL =______V
S.No.
RL
ohms
VFL=VDC
1
2
3
4
5
GRIET-ECE
Page 26 of 138

______________________________________________________
Graphs:
Draw ripple factor Vs load by taking load resistance R L on X-axis and ripple factor on Yaxis for both, with and without filter arrangements as shown in fig. 6.3.
Ripple Factor
Without filter
With filter
RL
Fig. 6.4
Draw %Regulation Vs load by taking load resistance RL on X-axis and %Regulation on Yaxis for both, with and without filter arrangements as shown in fig. 6.5.
%Regulation
With filter
Without filter
RL
Fig.6.5
GRIET-ECE
Page 27 of 138

______________________________________________________
Result:
Ripple factor without filter at 1K Ohm =____

Ripple factor with capacitor filter at 1K Ohm =____
% Regulation without filter at 1K Ohm =_____
%Regulation with capacitor filter at 1K Ohm =____
GRIET-ECE
Page 28 of 138

______________________________________________________
GRIET-ECE
Page 29 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 30 of 138

______________________________________________________
GRIET-ECE
Page 31 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 32 of 138

______________________________________________________
GRIET-ECE
Page 33 of 138

______________________________________________________
Experiment - 5
BRIDGE RECTIFIER
Aim:
To examine the input and output waveforms of a Bridge rectifier with and without filter.
To find the ripple-factor
To find the regulation
Bread board
0-15V power supplies - 2Nos.
AC power supply 12- 0 -12V
Digital voltmeter 0- 20 V DC
Digital ammeter 0- 200
Diode 1N4007 - 4 No
Resisters 100, 470, 1k, 4.7k, 10k - 1 No each
Capacitor 470 F/25V- 1 No.
Ratings:

Theory:
The bridge rectifier is also a full-wave rectifier in which four p-n diodes are connected in
the form of a bridge fashion. The Bridge rectifier has high efficiency when compared to halfwave rectifier. During every half cycle of the input, only two diodes will be conducting while
other two diodes are in reverse bias.
The output voltage is pulsating dc voltage. These pulsation's or ripple is removed by
using a filter mostly capacitors of electrolytic type. With capacitor filter, the amount of ac
present in the output is removed and we get a pure dc.
GRIET-ECE
Page 34 of 138

______________________________________________________
Circuit Diagram:
Fig.4.1: Bridge Rectifier without Filter
Fig.4.2: Bridge Rectifier with Filter
GRIET-ECE
Page 35 of 138

______________________________________________________
Procedure:
8. Construct the circuit as shown in the figure
terminals VDC
10. Vary the load RL in convenient steps and note the ac voltage and dc voltage across the
load.
11. Calculate ripple factor and regulation for the different loads.
12. Tabulate the readings as in the table 1.
13. Connect a capacitor C across load and repeat steps 2 , 3 , 4.
14. Tabulate the readings as in the table 2
Observations:
Table 1: Bridge rectifier without filter
VNL=_______V
S.No.
RL Ohms
VFL=VDC
Volts
VAC
Ripple factor
=VAC/VDC
%Regulation=
((VNL VFL) / VFL) * 100
VAC
Volts
Ripple Factor
= VAC/VDC
%Regulation=
((VNL VFL) / VFL) * 100
6.
7.
8.
9.
10.
Table 2: Bridge rectifier with filter

VNL =_________V
S.No.
RL ohms
VFL=VDC
6.
7.
8.
9.
10.
GRIET-ECE
Page 36 of 138

______________________________________________________
Output Waveforms:
Fig.5.4
Results:
GRIET-ECE
Page 37 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 38 of 138

______________________________________________________
GRIET-ECE
Page 39 of 138

______________________________________________________
Experiment - 6
ZENER DIODE CHARACTERISTICS

Aim:
1. To plot the volt-ampere characteristics curve of a zener diode.
2. To find the Zener breakdown voltage, forward-bias resistance and reverse-bias resistance
after zener break-down.
Equipment required: GRIET Semiconductor trainer module containing
Bread board
Resistor 1 K
Rating:
BZX 5.1V Zener Diode
Break-down voltage = 5.1V
Forward-bias resistance = 12
Power dissipation = 0.75 Watt.
Theory:
Special diodes known as zener diodes are manufactured to operate at a precise value of
the breakdown voltage without destroying the diode. For this diode the reverse breakdown
voltage is called the zener voltage. This voltage is determined at the time of manufacture and is
in the range of 2 to 200V.
The important characteristic of this diode is that the zener voltage is constant whatever
may be the current through the diode (within the limits of the current rating). In the forward
biased direction the zener diode functions like an ordinary diode and the volt-ampere
characteristic of the zener diode is same as ordinary diode.
Zener diodes like all other electronic devices can be destroyed by heat. The major limiting factor
is the power that can be dissipated by the device. Zener diodes are available with power rating
between W and 50W. Thus the maximum current a zener diode can pass through depends on
zener voltage and power rating of the diode.
Zener diodes are mostly used in voltage regulation and voltage-reference circuits.
Voltage regulator circuits are used when the load needs a constant voltage but varying current.
GRIET-ECE
Page 40 of 138

______________________________________________________
Circuit Diagram:
Fig. 2.1: Zener Diode Forward Bias Circuit
Fig. 2.2: Zener Diode Reverse Bias Circuit
GRIET-ECE
Page 41 of 138

______________________________________________________
Model Graphs:
A graph drawn with voltage on X axis and current on Y axis for both forward bias and
reverse bias conditions
IF, mA
VZ
VF, Volts
VR
Zener
Knee
IR, A
Fig. 2.3: Zener Diode Characteristics
From graphs calculate:

Dynamic forward resistance, Rac=
GRIET-ECE
Page 42 of 138

______________________________________________________
Tabular form
#
S.No
Forward Bias
VF
Volts
Reverse Bias
IF
mA
VR
Volts
IR
mA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
GRIET-ECE
Page 43 of 138

______________________________________________________
Procedure:
1. Construct the circuit as shown in the figure. Use BZX 5.1V Zener diode. Get the circuit
verified by your instructor.
2. Increase the power supply voltage gradually in steps and note the ammeter and voltmeter
readings.
3. Construct the circuit as shown in the figure. Use BZX 5.1V Zener diode. Get the circuit
verified by your instructor.
4. Repeat step 2.
Result:
Cut in voltage, V =___
Dynamic forward resistance, rac =___
Dynamic forward resistance rac =___
GRIET-ECE
Page 44 of 138

______________________________________________________
GRIET-ECE
Page 45 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 46 of 138

______________________________________________________
GRIET-ECE
Page 47 of 138

______________________________________________________
Experiment - 7
ZENER VOLTAGE REGULATOR

Aim: Find out voltage regulation of a zener diode where the input voltage and load resistance
changes.
Equipment required: Semiconductor trainer module containing
Bread board
BZ X 5.1 V Zener diode 1 no.
Resistor 100, 1K, 2.2 K, 3.3 K, 4.7 K, 560 - 1 no.
Rating:
BZX 5.1V Zener:
Break-down voltage 5.1V
Forward-bias resistance 12
Power dissipation 0.75 Watt.
Theory:
An ideal power supply maintains a constant voltage at its output terminals irrespective of
its load current and the supply voltage. However the output voltage of a practical power supply
changes with change in the load current and voltage.
Voltage regulation is the measure of the circuit ability to maintain a constant output voltage even
when either input voltage or load current varies.
For a zener diode, as long as the output voltage V0 is less the zener voltage VZ , the zener does
not conduct. But as input voltage VS increases, V0 becomes greater than VZ and then the zener
operates in the breakdown region i.e. IZ increases, VZ remains constant. Voltage regulation can
be achieved in two ways:(a).When input supply voltage varies:As the unregulated supply voltage VS increases, current IS increase. As IS = IZ + IL without
affecting load current IL, IZ increases which means zener is in the breakdown region, so its
voltage VZ remains constant.
GRIET-ECE
Page 48 of 138

______________________________________________________
(b).When load resistor RL is varied:As load resistor RL is increased, its current I:L decreases, as IS = IZ + IL, with IS maintained constant, IZ starts increasing which means zener is in the breakdown region, so its
voltage VZ remains constant i.e. the output voltage V0 remains constant.
Circuit Diagram:-
Fig. 3.1: Zener Voltage Regulator Circuit
Fig. 3.2: Zener Voltage Regulator Circuit
GRIET-ECE
Page 49 of 138

______________________________________________________
Procedure:
1. Assemble the circuit as shown in fig.3.1.
2. Insert RL= 1 K in the above circuit.
3. Vary the power supply voltage in various steps and note the output voltage V 0 for each
step.
4. Tabulate the readings.
5. Assemble the circuit as shown in fig.3.2.
6. Fix the power supply voltage to 10V. Do not insert RL and note down output voltage VNL
7. Vary the load resistors to different values, note the output voltage VL in each step and also
calculate % voltage regulation.
8. Tabulate the reading.
Observation:
Table 1
S.No.
For VS =
GRIET-ECE
Unregulated power supply
RL
Regulated output voltage

(V0)
VNL=
Page 50 of 138

______________________________________________________
Table 2
S.No
RL
IS mA
IZ
IL= ( IS I Z ) mA
VL
% Voltage
Regulation
1.
2.
3.
4.
5.
% Voltage Regulation = (( VNL VL)/VL)*100

Model Graph:
Draw a graph with RL on the X-axis and % regulation on the Y-axis for table2.
% Voltage Regulation
RL
Fig. 3.3
Result:
GRIET-ECE
Page 51 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 52 of 138

______________________________________________________
GRIET-ECE
Page 53 of 138

______________________________________________________
Experiment - 8
COMMON EMITTER TRANSISTOR CHARACTERISTICS

Aim: To plot the family of input and output characteristics of a transistor connected in commonemitter configuration.
Bread board
0 - 15 V power supplies - 2Nos.
AC power supply 12 - 0 - 12 V
Digital voltmeter 0 - 20 V DC
Digital ammeter 0 - 200 A / mA DC
Transistor BC 107
Resisters 1K and 10 k
Rating of the BC 107 transistors:
IC (MAX) 2mA
VCEO 45V
Ptot 300mW
Tj 175 d .c.
NPN transistor.
Theory:
A bipolar junction transistor has three reasons namely emitter, base and collector. It has
two junctions emitter base junction which is always forward biased and base collector junction
which is always reverse biased transistors are of two types NPN and PNP.
When transistor is connected with emitter as the common terminal for both input and output it is
called as common emitter configuration. The input parameters are IB and VBE. The output
parameters are IC and VCE.
To determine the input characteristic, VCE is kept constant and base current Ib is increased
from zero in equal steps by increasing VBE as Base emitter junction is always forward biased ,
so input characteristics are same as ordinary diode forward biased . as VCE is increased , width of
depletion reason at reverse biased collector base junction increases , so base width decreases ,
this causes a decrease in IB . So as VCE increases, curves shift right.
To determine the output characteristics, base current IB is kept constant and collector to emitter
voltage VCE is increased in steps and corresponding Ic is noted. The output characteristics have
three reasons active, cutoff, saturation. The central region where the curves are uniform in
spacing and slope is called as active region. The region below IB = 0 mA is called cut off region.
The region where increased in IB does not cause a corresponding change in IC is saturation.
GRIET-ECE
Page 54 of 138

______________________________________________________
Circuit Diagram:
Fig.6.1: CE Input Characteristics Circuit
Fig.6.2: CE Output Characteristics Circuit

Procedure:
For input characteristics:
Construct the circuit as shown in the figure 6.1
Set the output voltage to VCE = 0V by varying output power supply.
Now by varying input power supply, vary V Be in convenient steps. Note down the input
current IB at each step.
Repeat steps 2 and 3 for the values of VCE= 3V, VCE = 5V.
Tabulate the readings as shown in table - 1.

GRIET-ECE
Page 55 of 138

______________________________________________________
For output characteristics:
Instruct the circuit as shown in fig. 6.2
Set the input current IB to 10 A by adjusting the input power supply.
Now by varying output power supply, vary the output voltage VCE in convenient steps
and note down the output current IC at each step.
Repeat steps 6 and 7 for constant values of IB = 40 A and 50 A
Tabulate the readings as shown in Table 2

Observations: Readings for input characteristics:
VCE = 0V
VCE = 5V
VCE = 10V
S.No
VBE
IB
VBE
IB
VBE
IB
Volts
mA
Volts
mA
Volts
mA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
GRIET-ECE
Page 56 of 138

______________________________________________________
Readings for output characteristics:
IB = 20A
S.No
VCE
Volts
IB = 40A
IC
mA
VCE
Volts
IC
mA
IB = 50A
VCE
Volts
IC
mA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
GRIET-ECE
Page 57 of 138

______________________________________________________
Model Graphs:
A family of output and input characteristics has to be drawn. The output characteristics
are drawn with collector emitter voltage VCE Vs collector current IC for constant base current IB .
The input characteristics are drawn between base emitter voltages VBE and base current IB for
constant values of collector emitter voltage VCE.
IB, mA
VCE=0V VCE=5V VCE=10V
VBE, Volts
Fig.6.3. CE input characteristics
IC, mA
IB = 50A
IB = 40A
IB =20A
VCE
Fig.6.4. CE output characteristics
Result:
GRIET-ECE
Page 58 of 138

______________________________________________________
GRIET-ECE
Page 59 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 60 of 138

______________________________________________________
GRIET-ECE
Page 61 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 62 of 138

______________________________________________________
GRIET-ECE
Page 63 of 138

______________________________________________________
Experiment - 9
MEASUREMENT OF h-PARAMETERS OF A TRANSISTOR

Aim: To calculate the hybrid parameters of transistor in CE configuration.
Bread board
0-15V power supplies2 Nos.
AC power supply 12-0-12V
Digital voltmeter 0-20V DC
Digital ammeter 0-200A/mA DC
Transistor BC 107
Resistors 1k - 2 Nos.
Rating of the BC 107 transistors:
Ic (max)200mA
Vceo45V
Ptot300mW
Tj175d.c
NPN transistor
Theory:
The terminal behaviour of a two port large scale network is specified by two voltages and
two currents. We may select two of the four quantities as independent variables and express the
remaining two in terms of the chosen independent variables.
I1
Input port
V1
I2
Two port
Network
Output port
V2
Fig.7.1: Typical Two Port Network

If the currents i1 and voltage v2 are the independent parameters and if the two ports are
linear, we may write
V1 = h11i1 +h12v2
I2 = h21i1 +h22 v2
The quantities h11, h12, h21 and h22 are called h-or hybrid parameters because all are not
alike dimensionally but are hybrid in nature i.e., combinations of admittance, impedance and
dimensionless quantities.
GRIET-ECE
Page 64 of 138

______________________________________________________
The basic assumption in deriving h-mode for a transistor is that the variations about the
quiescent point are small so that the transistor parameters can be considered constant over the
signal excursion. In order to derive transistor hybrid model, we consider the CE circuit. The
voltages and currents related to input and output ports of a transistor respectively in CE
configuration are vb,ib and vc,ic. Hence the h-parameter equations related to transistor can be
written as
Vb hieib+hrevc
Ic hfeib+hoevc
Where
vb
vb
hie =
hre=
ib vc
vc ib
ic
hfe=
ic
hoe=
ib vc
vc
ib
Fig7.2: h-parameter model of CE transistor.

Calculation of h-parameters from the family of input and output parameters for CE configuration
is explained below:
GRIET-ECE
Page 65 of 138

______________________________________________________
hfe: from the definition hfe is a short circuited forward current grain and is a dimensionless
parameter. This parameter can be calculated from the graph as follows:
ic
hfe=
ic
ic2-ic1
iB
=
ib
Vc
iB2-iB1
The current increments are taken around Q point, which corresponds to base current IB=iB and
VCE=Vc.
hfe = = small signal current gain and
= hfe = large signal current gain.
hoe: It gives the output admittance with input open circuited and the units are ohms. This
parameter can be calculated from the graph using the formula given below:
ic
hoe=
ic
ic2-ic1
vc
=
vc
iB
vc2-vc1
The above two h-parameters can be calculated from the family of output characteristics
of the given configuration. we can calculate other two h-parameters from the family of input
characteristics as explained below.
hre: It is defined as open circuited reverse voltage gain and it is a dimensionless quantity. This
parameter can be calculated from the graph using the formula given below.
vB
hre=
vB
vB2-vB1
vc
=
vc
IB
vc2-vc1
hie: By definition hie represents input impedance when output terminals are short circuited and its
units are ohms. It can be calculated using the formula given below.
vB
hre=
vB2-vB1
iB
GRIET-ECE
vB
=
iB
vc
iB2-iB1
Page 66 of 138

______________________________________________________
Circuit Diagram:
Fig.7.3: CE Input Characteristics Circuit

Procedure:
1. Connect a common emitter transistor configuration circuit for ploting its input
characteristics as shown in figure7.3.
2. Take a family of readings for variation in IE with VEB at different fixed values of output
voltage VCE.
3. Tabulate the readings and plot the input characteristic curves of CE configuration.
4. From the graphs, calculate the input resistance hie and reverse voltage transfer ratio hre by
taking the slopes of the curves and using the formulae given in the theory above.
5. Tabulate the reading in Table1.
6. Take the family of readings for variation of IC with VCE at different values of IB.
7. Tabulate readings and plot the output characteristic curves.
8. From the graphs, calculate hfe and hoe by taking the slopes of the curves.
9. Tabulate the readings in Table1.
GRIET-ECE
Page 67 of 138

______________________________________________________
Observations: Readings for input characteristics:
VCE = 0V
VCE = 3V
S.No
VBE
IB
VBE
IB
Volts
mA
Volts
mA
1
VCE = 5V
VBE
Volts
IB
mA
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
GRIET-ECE
Page 68 of 138

______________________________________________________
Readings for output characteristics:
IB = 20A
S.No
VCE
Volts
IB = 40A
IC
mA
VCE
Volts
IC
mA
IB = 50A
VCE
Volts
IC
mA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
GRIET-ECE
Page 69 of 138

______________________________________________________
Model Graphs:
1. From input characteristics:
IB,mA
VCE=0V
VCE=3V VCE=5V
VBEV
Fig.7.4. CE Input Characteristics
a) Input Impedance
VBE
X2-X1
hie =
hre=
Y2-Y1
IB
VCE=1V
b) Reverse transfer voltage gain

VBE
hre=
VCE
IB constant;
X2-X1
hre =
Y2-Y1
GRIET-ECE
Page 70 of 138

______________________________________________________
II. From output characteristics:-
IC, mA
IB = 50A
IB = 40A
IB = 20A
VCE
Fig.7.5. CE output characteristics

Forward transfer current ratio:-
IC
hfe=
IB
i.e
VCE constant
Y2-Y1
hre =
X2-X1
(b) Curves
Output conductance
IC
Y2-Y1
hoe =
mho
X2-X1
hoe=
VCE IB constant
GRIET-ECE
Page 71 of 138

______________________________________________________
Table1
S.No.
h-parameters
1.
Current gain, hfe
2.
Output admittance, hoe
3.
Reverse voltage gain, hre
4.
Input impedance, hie
Value
Result:
The h-parameters for a transistor in CE configuration are calculated.
Input impedance, hie =________ohms.
Reverse transfer voltage gain, hre =_______
Forward transfer current ratio, hfe =______
Output conductance, hoe =_____mho.
GRIET-ECE
Page 72 of 138

______________________________________________________
GRIET-ECE
Page 73 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 74 of 138

______________________________________________________
GRIET-ECE
Page 75 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 76 of 138

______________________________________________________
GRIET-ECE
Page 77 of 138

______________________________________________________
Experiment - 10
COMMON BASE TRANSISTOR CHARACTERISTCS

Aim: To plot a family of output and input characteristics of a transistor connected in common
base configuration.
Bread board
0-15V Power supplies-2 No
Digital ammeter 0-200A/mA DC
Transistor BC 107
Resistor 1K -2 Nos.
Rating:
BC 107 NPN transistor:
Ic(max)200mA
Vceo45V
Ptot300mW
Tj175d.c
Theory:
A Bipolar junction transistor has three regions namely emitter, base and collector. It has
two junctions emitter base junction which is always forward biased, base collector junction
which is always reverse biased. Transistors are of two types: NPN and PNP.
When a transistor is connected with base as common terminal for both the input and output it is
called as common base configuration. The input parameters are IE and VBE, the output
parameters are IE and VCE.
To determine the input characteristics, collector base voltage VCE is kept constant and emitter
current IE is increased in steps by increasing VEB. Emitter base junction behaves as forward
biased diode so input characteristics are same as ordinary diode. When V CB is increased, width of
the base region decreases resulting in increase in IE therefore, curve shift towards left as VCB is
increased.
To determine the output characteristics, emitter current IE is kept constant by adjusting the
emitter base voltage VEB. Then VCB is increased in equal steps and the corresponding collector
current IC is noted.
As the emitter base junction is forward biased, electrons from the emitter are injected into the
base. Due to the action of internal potential barrier at the reverse biased collector base junction,
they flow to collector region giving rise to IC even when VCB is zero. For constant values of IE,IC
is independent of VCB and the curves are parallel to the axis of VCB.
GRIET-ECE
Page 78 of 138

______________________________________________________
Circuit Diagram:
Fig.8.1: CB Input Characteristics Circuit
Fig.8.2: CB output characteristics circuit

Procedure:
For plotting input characteristics:1. Construct the circuit as shown in the figure 8.1.
2. Fix VCB = open = 0V by varying the output power supply.
3. Now by varying input power supply, change VEB in convenient steps and note down the
emitter current IE at each step.
4. Repeat steps 2 and 3 for different constant values of VCB 5V & 10V.
5. Tabulate the readings as in table1.
For plotting output characteristics:6. Construct the circuit as shown in figure 8.2.
7. Set IE to 1.1mA by varying the input power supply.
8. Now by varying output power supply, change VCB in convenient steps and note down the
collector current IC at each voltage step.
9. Repeat steps 6 and 7 for different constant values of IE equal to 2.1mA, 3.1mA and 4.1mA.
10. Tabulate the readings as in Table 2.
GRIET-ECE
Page 79 of 138

______________________________________________________
Observations: (i). Input characteristics

Table -1: Readings for CB input characteristics
VCB=0 Volts
S.No
GRIET-ECE
VEB
Volts
IE
Ma
VCB=5 Volts
VEB
Volts
IE
mA
VCB=10 Volts
VEB
Volts
IE
mA
Page 80 of 138

______________________________________________________
(ii). Output characteristics:
Table - 2:- Readings for CB output characteristics
IE=1.1mA
S.No
GRIET-ECE
VCB
Volts
IE
mA
IE=2.1mA
VCB
Volts
IE
mA
IE=3.1mA
VCB
Volts
IE
mA
IE=4.1mA
VCB
Volts
IE
mA
Page 81 of 138

______________________________________________________
Model Graphs:
1. Plot the family of input characteristics by taking emitter voltage VEB on X-axis and emitter
current IE on Y-axis for constant values of output voltage VCB.The total model set of input
characteristics curves are shown below.
IB, mA
VCB=0V
VCB=5V
VCB=10V
VBE Volts
Fig 8.3: CB input characteristics

2. Plot the family of output characteristics by taking collector voltage VCB on X-axis and
collector current IC on Y-axis for constant values of input current IE.The total model set
of output characteristics curves are shown below.
IC, mA
IE = 4.1mA
IE = 3.1mA
IE = 2.1mA
IE = 1.1mA
VCB Volts
Fig 8.4: CB output characteristics
GRIET-ECE
Page 82 of 138

______________________________________________________
GRIET-ECE
Page 83 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 84 of 138

______________________________________________________
GRIET-ECE
Page 85 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 86 of 138

______________________________________________________
GRIET-ECE
Page 87 of 138

______________________________________________________
Experiment - 11
COMMON EMITTER AMPLIFIER

Aim:
1. To obtain the voltage gain and current gain of CE amplifier.
2. To obtain input impedance and output impedance of CE amplifier
Equipment Required: Trainer module containing
Signal generator
Bread board
DC power supply 12V
Frequency counter 220KHz
C.R.O
Rating:
BC 107 n-p-n Transistor
Mostly used as Driver Amplifier
hfe 500 at IC2mA and Vce 5V
ICBO 15uA; ICM 200mA, VCEO 45 V
Ptot 300 mW; Tj 175d.c
Theory:
An amplifier is an electronic circuit that is capable of increasing the level of the signal
applied at its input. The semiconductor devices used for the purpose of amplification are
Transistor (BJT), Field effect transistor (FET) etc. When a transistor is biased in active, it acts
like an amplifier. We apply an ac voltage between the base and emitter terminals to produce
corresponding collector current. An amplified output signal is obtained when this fluctuating
collector current flows through a collector resistor RC
When the input signal amplitude is too small as in the amplifier circuit shown below, the
resistors R1, R2 and RE fix a certain Q point. The resistor RE stabilizes Q point against
temperature variations. The capacitor C by passes the resistor R for the ac signal as it offers very
low impedance path for ac, the emitter terminal is almost at ground potential. When the ac signal
applied to the base, the base-emitter voltage changes, due to base-current changes.
Since collector current depends upon the base current, the collector also changes. When this
changing collector current passes through the load resistance R C, an ac voltage is produced at the
output. As the output is much more than the input voltage, the circuit works as the amplifier
circuit.
GRIET-ECE
Page 88 of 138

______________________________________________________
Circuit Diagram:
Fig. 11.1: Common Emitter Amplifier

Procedure:
1. Construct the circuit as shown in the figure 14.1
2. Connect the signal generator to the input terminals.
3. Connect the output terminals to the oscilloscope.
4. Select 1K Hz sine-wave signal on the oscillator and set the amplitude 40 mV P-P.
5. Measure the input voltage across 10K i.e. Vi and output voltage of the amplifier with the
help of CRO. Note the voltages.
6. Calculate voltage gain, Current gain and input resistance
Observations:
1. Input Voltage,Vs =___
Output Voltage, V0=___
Voltage gain = Vo/Vs=___
2. Vi = Voltage across 10K resistor =___
Output Current Output Voltage/Output Resistance = V 0/2.2K =___
Input Current Ii = Input Voltage/Input Resistance = (Vs-Vi)/2.2K =___
Currant gain = Output Current/Input Current =___
3. Input Resistance = Input Voltage/Input Current = Vi/Ii=___
4. To obtain the output resistance, measure the voltage across the output terminals without
connecting any load. The voltage is the open circuit voltage. Keep the input voltage
constant. Connect different valued resistors across the output terminals until you get half
the open circuit voltage. This resistance setting gives the output resistance.
GRIET-ECE
Page 89 of 138

______________________________________________________
Frequency Response Characteristics:

VS = 200mA
Frequency, Hz
Output Voltage,
V0 volts
Gain in dB
20log10(V0/VS)
Graph:
Plot the frequency response characteristic on the semi-log sheet by taking frequency on the Xaxis and gain in dB on the Y-axis. Calculate Bandwidth from the graph also note the
maximum voltage gain.
GRIET-ECE
Page 90 of 138

______________________________________________________
Result:
1.
2.
3.
4.
GRIET-ECE
Voltage gain =_____

Current gain =_____
Input resistance =____
Output resistance =____
Page 91 of 138

______________________________________________________
Experiment - 12
EMITTER FOLLOWER (Common Collector Amplifier)

Aim: To obtain the voltage gain, current gain, input impedance and output impedance for an
emitter follower.
Equipment Required: Trainer module containing.
Signal generator
Bread board
DC power supply 12V
Frequency counter 220 KHz
C.R.O
Rating:
BC 107 n-p-n transistor
Mostly used as driver amplifier
hfe 500 at IC 2mA and Vce5V
ICBO 15uA; VCEO 45 V
Ptot 300 mW; Ti 175d.c
Theory:
The common collector transistor amplifier is also termed as emitter follower. The voltage
again of this configuration is equal to unity, so any change in bias voltage results in equal change
of load voltage, since the load is in the emitter circuit, it looks like emitter follows the input
voltage, hence name emitter follower.
The input signal is given to base collector circuit and the output signal is taken from
emitter collector circuit. C1 and C2 capacitors act as coupling capacitors.
The output voltage is V0 = IERE = b IBRE
When sinusoidal ac signal is applied, during positive half cycle, base potential V B
increases, hence the output voltage V0 increases as per above equation. Similarly during the
negative half cycle, base potential VB decreases so IB decreases thereby decreasing output
voltage V0.Thus in cc amplifier, input and output signals are in phase to each other.
The other characteristics are it has high current gain, high power gain, large input impedance and
small output impedance.
GRIET-ECE
Page 92 of 138

______________________________________________________
Circuit Diagram:
Fig.12.1: Emitter Follower Circuit

Procedure:
1. Construct the circuit as shown in the figure 15.1
2. Connect the signal generator to the input terminals.
3. Connect the output terminals to the oscilloscope.
4. Select 1K Hz sine-wave signal on the generator and set the amplitude to 40mVp-p
5. Measure the input voltage across 10K ohm resistor which is Vi and output voltage across
the output terminals of the amplifier V0
6. Calculate voltage gain, Current gain, and input resistance.
OBSERVATIONS:
Input Voltage, Vs =___
Output Voltage V0 =___
Voltage gain = V0/Vs =___
Vi = Voltage across 10K resistor =____
Output current = Output Voltage/Output resistance=___
Ii = Input Current Input Voltage/Input Resistance =___
Current gain Output Current/Input Current =___
Input Resistance Ri =Output Voltage/Input Current = Vi/Ii =___
To obtain the output resistance, measure the voltage across the output terminals without
connecting any load. The voltage is the open circuit voltage. Keep the input voltage
constant. Connect different valued resistors across the output terminals until you get half
the open circuit voltage. This resistance setting gives the output resistance.
GRIET-ECE
Page 93 of 138

______________________________________________________
Frequency Response Characteristics:
VS = 200mA
Frequency, Hz
Output Voltage,
V0 volts
Gain in dB
20log10(V0/VS)
Graph:
Results:
GRIET-ECE
Page 94 of 138

______________________________________________________
Voltage gain =____
Current gain =____
Input resistance =____
Output resistance =_____
GRIET-ECE
Page 95 of 138

______________________________________________________
Experiment - 13
JFET CHARACTERISTICS
Aim: To plot the family of drain characteristics and transfer characteristics of the given FET.
Bread board
0-15V power supplies-2 Nos
Digital ammeter 0-200iA/mA DC
FET BFW 11 -1No
Resistors 100 and 560.
Rating of the BFW 11 JFET:
ID2mA
VDC 30V
Ptot 300mW
Tj 200d.c.
N channel JFET
Theory:
Field-effect transistors (or FETs) can be divided into two general types: JFET (junction
field effect transistor) and MOSFET (metal oxide semiconductor field effect transistor) or
IGFET (insulated gate field effect transistor).The three terminals of a FET are called Gate,
Source and Drain. The fabrication of FET starts with a semiconductor bar of either n-type or ptype. if an n-type semiconductor bar is used then it is called N-channel FET and if P-type
semiconductor bar is used then it is called P-channel FET. Two terminals are attached to
opposite ends of a region and are named Source and Drain. On the wider faces of the
semiconductor bar P+ material is diffused and forms the Gate region. FETs are voltage controlled
devices FETs are unipolar.
The operation of a JFET can be explained as follows. If a battery Vdd is connected with
its positive terminal to the drain and negative terminal to the source of the n-channel FET,
current flows just as it flows in a semiconductor bar. If the drain voltage is varied the current
magnitude changes.
Now, we connect a voltage VGG to the Gate terminal to reverse bias it. As the drain
voltage is increased the drain side of the PN junction between gate and channel will be more
reversed biased at the source end. As the channel is lightly doped compared to the gate material
under this reverse bias the depletion layer is penetrated more into the channel region and is more
pronounced on drain side and so the channel width is not uniform. Because of this nonuniformity in the channel the current starts reducing and reaches saturation when the drain
voltage is sufficient to produce enough reverse voltage to keep the saturation current.
If the voltage is increased further to higher values from this, then avalanche breakdown takes
place and current increases drastically for little variation in the drain voltage.
GRIET-ECE
Page 96 of 138

______________________________________________________
The shape of this characteristic is shown in the graph. As the drain voltage is increased
from 0V,keeping the gate voltage constant the drain current Id increases until the pinch-off
voltage, VP is reached then the drain current Id levels of and further increases in the drain supply
voltage causes very small increase in drain current.
In amplifier applications the FET is used in the region beyond pinch-off. This region is also
called current-saturation region. Let the saturation drain current be IDS and its value IDSS when
VGS=0V.The relation between IDS and IDSS is given by:
1-VGS
IDS=IDSS
VP
A graph representation between input voltage, VGS and output current Id is called transfer
characteristic. To use JFET as an amplifier, it is necessary to design bias circuit such that gatesource junction is always reverse biased. This condition requires negative V GS for an n-channel
JFET and a positive VGS for a p-channel JFET. This can be achieved using the self-bias
arrangement.
Circuit Diagram:
Fig 9.1:- JFET Characteristics

Procedure:
To obtain drain characteristics:1. Construct the circuit as shown in the figure 9.1.
2. Set VGS to zero by varying input power supply,VGG.
3. Now by varying output power supply VDD vary the drain power supply VDS in convenient
steps and note the value of current ID at each value of VDS.
4. Repeat step 3 for different values of gate voltage VGS =1V and 3V
To obtain transfer characteristics:6. Set the value of the drain power supply VDS to 1V by varying output supply.
7. By varying input supply vary the input source voltage V GS in convenient steps and note the
corresponding values of ID at each step.
GRIET-ECE
Page 97 of 138

______________________________________________________
Observations: Table 1: Readings for drain characteristics of FET
VGS=0V
VDS
Volts
VGS=0.5V
ID
mA
VDS
Volts
VGS=1V
ID
mA
VDS
Volts
ID
mA
Table 2:- Readings for Transfer characteristics

VDS=1V
VGS
Volts
ID
mA
GRIET-ECE
Page 98 of 138

______________________________________________________
Model Graphs:
Drain characteristics:
Plot the family of drain characteristics by taking VDS on X-axis and ID on Y-axis for constant
values of VGS i.e. fig.9.2
ID, mA
VGS = 0V
VGS = 0.5V
VGS = 1V
VDS
Fig .9.2 Drain characteristics
Transfer characteristics:
Plot the transfer characteristics by taking VGS on X-axis and ID on Y-axis for constant values
of VDS. This plot will lie in second quadrant as VGS is negative for n-channel FET i.e.,
figure.9.3
ID, mA
VGS
Fig. 9.3 Transfer characteristics
GRIET-ECE
Page 99 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 100 of 138

______________________________________________________
GRIET-ECE
Page 101 of 138

______________________________________________________
Experiment-14
JFET COMMON SOURCE AMPLIFIER

Aim:
1. To obtain experimentally the voltage gain of the amplifier.
2. To obtain frequency response curve of the FET amplifier and to calculate its bandwidth.
Equipment Required:
GRIET Trainer module containing
C.R.O
Signal generator
Bread board
DC power supply 12V
Frequency Counter 220 KHz
Component Required:
N channel FET BFW 11.
Capacitor 10F/25V.
Resistors 1M, 6.8 K, 2.2K,8.2K.
Ratings:
BFW 10 n-channel JFET
Mostly used as broad-band amplifier
IDS = 20mA at VDS = 15 and VGS = 0V
ID = 20mA; Ptot = 300mW
Tj = 200d.c.
Theory:
FET amplifier provides an excellent voltage gain with the added feature of high input
impedance. They are also considered as low-power consumption configurations with good
frequency range and minimal size and weight. Both JFET and depletion MOSFET devices can
be used to design amplifiers having similar voltage gain. The depletion MOSFET circuit
however has much higher input impedance than a similar JFET configuration.
While a BJT device controls a large output (collector) current by means of relatively
small input (base) current, the FET device controls an output (drain) current by means of small
input (gate) voltage. In general, therefore the BJT is a current controlled device and FET is a
voltage-controlled device. In both cases, however note that the output current is the controlled
variable.
GRIET-ECE
Page 102 of 138

______________________________________________________
Because of the high input impedance of FETs, the ac equivalent model is somewhat
simpler than that employed for BJTs. While the BJT had an amplifier factor , the FET has a
transconductance factor, gm.
The FET can use as a linear amplifier or as a digital device in logic circuits. In fact, the
enhancement MOSFET is quite popular in digital circuitry, especially in CMOS circuits that
require very low power consumption. FET devices are also widely used in high-frequency
applications and in buffering applications. While common source configuration is the most
popular providing an inverted amplified signal, one also finds common drain (source-follower)
circuits providing unity gain with no inversion and common-gate circuits input current is
generally assumed to be 0A and the current gain is an undefined quantity. While the voltage
gain of a FET amplifier is generally less than that obtained using a BJT amplifier, the FET
amplifier provides much higher input impedance than that of a BJT configuration. Output
impedance values are comparable for both BJT and FET circuits.
CIRCUIT DIAGRAM:
Fig. 13.1: FET Common Source Amplifier

Procedure:
1.
2.
3.
4.
5.
Construct the circuit as shown in the figure.

Construct the signal generator to the input terminals.
Connect the output terminals to the oscilloscope.
Select 1KHz sine wave signal on the generator and set the amplitude to 200mVp-p
Change the frequency of the input signal from 100Hz to 200 KHz in convenient steps.
Keep the input signal amplitude constant over the entire frequency range. Observe the
output voltage at each frequency.
GRIET-ECE
Page 103 of 138

______________________________________________________
Observations:
VS = 200mA
Frequency, Hz
Output Voltage,
V0 volts
Gain in dB
20log10(V0/VS)
Graph:
GRIET-ECE
Page 104 of 138

______________________________________________________
GRIET-ECE
Page 105 of 138

______________________________________________________
INSERT
SEMI LOG
GRAPH SHEET
GRIET-ECE
Page 106 of 138

______________________________________________________
GRIET-ECE
Page 107 of 138

______________________________________________________
Experiment - 15
UJT CHARACTERISTICS
Aim: To plot the V-I characteristics of the UJT
Bread board
0-15V power supplies-2 No.
Digital ammeter 0-200iA/mA DC
UJT 2N2646 - 1 No.
Resistors 1K - 2 Nos.
UJT Ratings:
UJT 2N2646
PD 300mW
rBB 4.7K-9.1K
0.56-0.75
Iv 4mA
IP 5A
IEB2012A
Theory:
Uni Junction Transistor (UJT) consists of a bar of lightly doped (high-resistivity) N
material to which a heavily doped p-type material is attached on one side. Ohmic contacts are
made at opposing ends of the N-type bar, which are called base 1(B1) and base 2(B2) of the
transistor.
The terminal taken out from the P-side is called the emitter and forms a conventional PN
junction with the N-type semiconductor bar. Since this device has only one junction, it is named
Uni Junction Transistor. It is also called as double-base diode.
In the equivalent circuit of UJT if VE is less than the positive voltage V1 across RB1, then the
diode is reverse biased and RB1 has essentially the same resistance as when IE=0.However, if VE
is increased to the onset of forward biased, a small amount of forward current IE begins to flow
through the emitter and into the base 1 region causing the resistance of that region to reduce.
GRIET-ECE
Page 108 of 138

______________________________________________________
The decrease in RB1 is attributed to the presence of additional charge carriers resulting
from the forward current flow. If the forward bias is increased slightly, there is a sudden and
dramatic reduction in RB1.This phenomenon occurs because the increase in current reduces RB1 ,
which further increases the current, which further reduce RB1, and so forth. In other words, a
regenerative action occurs. The value of emitter voltage at which regeneration is initiated is
called the peak voltage, Vp. It is clear from the fig. that the value of emitter voltage must reach is
V1 plus the forward drop VD across the diode. Since V1vBB, we have
V = VBB+VD
The V-I characteristics of UJT are shown in fig.13.1.Once the emitter voltage has reached
VP emitter current increases even as VE is made smaller. This fact is shown by the negative slope
of the characteristic in the region to the right of the peak point. The region is therefore
appropriately referred to as the negative-resistance portion of the characteristic. Beyond the
valley point the resistance RB1 has reached its minimum possible value, called the saturation
resistance. In this saturation region, emitter current can only be increased further by again
increasing VE the characteristic in this region is similar to that of a conventional forward-biased
diode. The region to the left of the peak point is called the cut-off region.
VE
Cut-off Region
Negative resistance
Saturation Region
Region
Peak point, VP
Valley point
VV
IE
IP
IV
Fig.10.1
GRIET-ECE
Page 109 of 138

______________________________________________________
Circuit Diagram:
Fig.10.2
Procedure:
1. Connect the circuit diagram as shown in fig.10.2.
2. Set the base voltage VBB to 3V by varying the output power supply.
3. Vary the input supply and set the input emitter voltage VE in convenient steps and
correspondingly note the emitter current IE at each step.
4. Repeat steps 2 and 3 for VBB=5V and VBB=10V.
GRIET-ECE
Page 110 of 138

______________________________________________________
Observations:
Table1: UJT characteristics
VBB=3V
VBB=5V
VBB=10V
S.No
VE
Volts
GRIET-ECE
IE
mA
VE
Volts
IE
mA
VE
Volts
IE
mA
Page 111 of 138

______________________________________________________
Model Graph:
Plot a graph between VE Vs IE by taking IE on X- axis and VE on Y-axis. The typical shape of
the graph for family of characteristics is shown below .Indicate various regions on the graph.
VE
VBB = 3V
VBB = 5V
VBB = 10V
IE
Fig 11.3
Result:
GRIET-ECE
Page 112 of 138

______________________________________________________
GRIET-ECE
Page 113 of 138

______________________________________________________
Insert
1
Normal Graph sheet
GRIET-ECE
Page 114 of 138

______________________________________________________
GRIET-ECE
Page 115 of 138

______________________________________________________
Experiment 16
SCR CHARACTERISTICS
Aim: To find the latching current and holding current of a given SCR and plot the V- I
characteristics of the Silicon Controlled Rectifier.
Equipment Required:
SCR TYN 410 - 1No.

Analog Ammeter 0 20 mA, 0 100 mA- 1No.
Analog Volt meter 0 30 V - 1No.
0 30V Dual Channel Power Supply - 1No.
Bread Board - 1No.
Resistor 1K, ( Watt), 10K - 1No.
Circuit diagram:
Theory:
It is a four layer semiconductor device being alternate of P-type and N-type silicon. It
consists of 3 junctions J1, J2, J3 the J1 and J3 operate in forward direction and J2 operates in
reverse direction and three terminals called anode A, cathode K, and a gate G. The operation
of SCR can be studied when the gate is open and when the gate is positive
with respect to cathode.
GRIET-ECE
Page 116 of 138

______________________________________________________
When gate is open, no voltage is applied at the gate due to reverse bias of the
junction J2 no current flows through R2 and hence SCR is at cut off. When anode voltage
is increased J2 tends to breakdown.
When the gate positive, with respect to cathode J3 junction is forward biased and
J2 is reverse biased .Electrons from N-type material move across junction J3 towards
gate while holes from P-type material moves across junction J3 towards cathode. So
gate current starts flowing, anode current increase is in extremely small current junction J2
break down and SCR conducts heavily.
When gate is open thee break over voltage is determined on the minimum
forward voltage at which SCR conducts heavily. Now most of the supply voltage
appears across the load resistance. The holding current is the m a x i m u m anode current
gate being open, when break over occurs.
Procedure:
1. M a k e t h e c o n nections as per the circuit diagram.
2. Set gate current IG equal to firing current in CH -1, vary anode to cathode voltage in CH 2 and carefully observe the voltmeter reading.
3. Check the point where SCR voltage (VAK) suddenly drops and sudden increase anode
current
4. Note down the current at that point is called latching current.
5. Increase the anode to cathode supply till it is maximum i.e 30V in Ch 2 power
supply and note the maximum value of current read in the Ammeter.
6. Now open the gate terminal and decrease the anode to cathode voltage V AK ( Ch-2)
power supply.
7. By decreasing VAK slowly at one point the deflection of the ammeter suddenly reduces to
Zero. Note down that point and that point is called holding current.
8. Plot the graph between VAK and IA and IG.
GRIET-ECE
Page 117 of 138

______________________________________________________
Tabular form :
Firing Current
IG =
S. No
V AK ( Volts)
I A ( mA)
1
2
3
4
5
6
7
8
9
10
Model Graph :
Result:
V-I characteristics of SCR is plotted and Values are obtained as
Break over voltage (V B 0 ) = ______
Latching Current ( I L ) = ______
Holding Current ( I H ) = ______
Maximum Current = _______
GRIET-ECE
Page 118 of 138

______________________________________________________
GRIET-ECE
Page 119 of 138

______________________________________________________
Experiment 17
DESIGN OF SELF BIAS CIRCUIT

Aim: To design a Self Bias Circuit For the following Specifications
hfe = , Icq = 5mA, Vceq = 6.0 V, Vcc = 12.0 V, Rc = 1K, S = 25.
To find the quiescent point (Operating Point) values of ICq and VCEq from the experiment and to
find the maximum signal handling capability of the Amplifier.
Equipment Required:
Dual Regulated D.C Power supply 030 Volts 1No
Multimeter 1No
Signal Generator ( 0 1MHz) 1No
Bread Board
Dual Trace CRO 20MHz 1
Transistor BC107 1No
Capacitors 50f - 2No
Capacitors 10f 1No
Circuit Diagrams:
Theory:
A self bias circuit stabilizes the bias point more appropriately than a fixed bias circuit. In this
experiment CE configuration is used and a self bias circuit is designed and verified.
GRIET-ECE
Page 120 of 138

______________________________________________________
Procedure:
1. Connect the circuit as per the circuit diagram. Apply Vcc of 12 Volts DC.
2. Find the resulting DC Values of Icq and Vceq.
3. Apply a 1KHz signal from the Signal Generator and observe the O/P on CRO.
4. Increase the I/P voltage slowly until the output waveform starts distortion
5. Note down the input voltage Vi at the point where the output starts distortion
6. This input value is known as maximum signal handling capability.
7. Calculate the gain of the amplifier.
Design Procedure:
Icq = 5mA, Vceq = 6.0 V, Vcc = 12.0 V, Rc = 1K, S = 25,Vbe=0.6 V.
Find hfe of the transistor
S= (1+) / (1+Re / (Re + Rb))
VB = VCCR2 / (R1 +R2)
RB = R1R2 / (R1+R2)
VB = IBRB+ VBE + (1+)IBRE
VCC = ICRC +VCE+(1+)IBRE
Using the above formula find Re, R1, R2.
Tabular Form:
Parameter
IC
VCE
R1
R2
RE
RB
Theoritical Values
Practical Values Name
Result:
The maximum signal Handling capability of the amplifier = _______Volts
Gain of the amplifier = _______
GRIET-ECE
Page 121 of 138

______________________________________________________
APPENDICES
GRIET-ECE
Page 122 of 138

______________________________________________________
GRIET-ECE
Page 123 of 138

______________________________________________________
Appendix A
COMPONENT SYMBOLS
Cell, electrochemical
Battery
Circuit breaker
Fuse
Ammeter
Voltmeter
Resistor, fixed
Wattmeter
Potentiometer
Inductor, air core
Inductor, iron core
Inductor iron core,

variable
Transformer, iron core,
Transformer, air core
Transformer, iron
step-down
core
Transformer, iron
core, step-up

tapped primary

tapped secondary
Crystal, piezoelectric
Switch, momentary-contact
Switch, single-pole,
single-throw
Speaker
GRIET-ECE
Switch, double-pole, single-
Switch, double-pole, double

throw
throw
Microphone
Antenna, general
Page 124 of 138

______________________________________________________
Diode, general
Diode, Schottky
Diode, photosensitive
Transistor, bipolar, NPN
Transistor, Field-Effect,
P-channel
Diode, zener
Diode, tunnel
Diode, PIN
Transistor, bipolar, PNP
Diode, varactor
Diode, Gunn
Transistor, field-effect,
N-channel
Transistor, Uni junction
Diac
Triac
Amplifier general
Operational Amplifier
AND gate
OR gate
NOT gate
NAND gate
NOR gate
Exclusive-OR gate
GRIET-ECE
Diode, light-emitting
Integrated circuit, general
Page 125 of 138

______________________________________________________
Appendix B
RESISTORS, CAPACITORS, INDUCTORS &BREAD BOARD
The Resistor Colour Code Table:
Colour
Black
Brown
Red
Orange
Yellow
Green
Blue
Violet
Grey
White
Gold
Silver
No
colour
Digit
0
1
2
3
4
5
6
7
8
9
-
Multiplier
100
101
102
103
104
105
106
107
108
109
10-1
10-2
-
Tolerance
+ 1%
+ 2%
+0.5%
+0.25%
+0.1%
+5%
+10%
+20%
Calculating Resistor Values:

The Resistor Colour Code system is all well and good but we need to understand how to
apply it in order to get the correct value of the resistor. The "left-hand" or the most significant
coloured band is the band which is nearest to a connecting lead with the colour coded bands
being read from left-to-right as follows;
Digit, Digit, Multiplier = Colour, Colour x 10 colour in Ohm's ('s)
For example, a Resistor has the following coloured markings;
Yellow Violet Red = 4 7 2 = 4 7 x 10 2 = 4700 or 4k7.
The fourth band if used determines the percentage tolerance of the resistor and is given as;
Brown = 1%, Red = 2%, Gold = 5%, Silver = 10 %
If resistor has no fourth tolerance band then the default tolerance would be at 20%.
Variable Resistors:
There are two general ways in which variable resistors are used. One is the variable
resistor which value is easily changed, like the volume adjustment of Radio. The other is semifixed resistor that is not meant to be adjusted by anyone but a technician. It is used to adjust the
operating condition of the circuit by the technician. Semi-fixed resistors are used to compensate
for the inaccuracies of the resistors, and to fine-tune a circuit. The rotation angle of the variable
resistor is usually about 300 degrees. Some variable resistors must be turned many times to use
the whole range of resistance they offer. This allows for very precise adjustments of their value.
These are called "Potentiometers" or "Trimmer Potentiometers."
GRIET-ECE
Page 126 of 138

______________________________________________________
Capacitor:
Ceramic capacitors are used for low capacitance values and are recognized as the flat disks.
Polyester capacitors, used for intermediate values, have a rounded rectangular look, and are often
green (also known as green caps). The capacitance is often written without the scaling factor.
Assume Pico-farads for large numbers (say greater than one), and microfarads for smaller
numbers. For example 104 on a polyester capacitor is 10 104 pF, which is 100 nF or 0.1 F, but
0.033 is 0.033 F. Electrolytic capacitors are used for large capacitance values. These have a
cylindrical body which is sufficiently large that the capacitance value is unambiguously written
on it. Note that electrolytic capacitors are polarized, which means that they have a positive and
negative lead, and the positive lead must be connected to the side with greater average (or DC)
voltage.
Ceramic
Capacitors
Polyester Film
Capacitors
Electrolytic Capacitors
(Electrochemical type
capacitors)
The Inductor:
In its most basic form, an Inductor is simply a coil of wire. For most coils the current, (i)
flowing through the coil produces a magnetic flux, (N) that is proportional to it. The Inductor
is another passive type electrical component. Inductors are formed with wire tightly wrapped
around a solid central core which can be either a straight cylindrical rod or a continuous loop or
ring to concentrate their magnetic flux. Inductors are categorised according to the type of inner
core with the different core types being distinguished by adding continuous or dotted parallel
lines next to the wire coil as shown below.
GRIET-ECE
Page 127 of 138

______________________________________________________
Breadboard:
A breadboard is used to set up prototype of a circuit before putting it into a PCB. It will
be used for the term project. Back in the olden days before bread was supplied sliced and in a
plastic wrapper a loaf was cut on a wooden board. Mockups of circuits were made by hammering
plated nails into similar boards and twisting or soldering the wires and legs of components to
make quick connections. The diagram of a simple breadboard is displayed in the Fig.
Internal Connections:
Fig: half part of the bread board.

There were some supply connections made in the GRIET trainer kits for the bread board.
Know those connections from your instructor before performing the experiment.
GRIET-ECE
Page 128 of 138

______________________________________________________
Appendix C
CATHODE-RAY OSCILLOSCOPE
The instrument consists of mainly a vacuum tube which contains a cathode, anode, grid,
X&Y-plates and a fluorescent
screen (see Figure below). When
the cathode is heated (by applying
a small potential difference across
its terminals), it emits electrons.
Having a Potential difference
between the cathode and the
anode (electrodes), accelerate the
emitted electrons towards the
anode, forming an electron beam,
which passes to fall on the screen. When the fast electron beam strikes the fluorescent screen, a
bright visible spot is produced. The grid, which is situated between the electrodes, controls the
amount of electrons passing through it thereby controlling the intensity of the electron beam. The
X&Y-plates are responsible for deflecting the electron beam horizontally and vertically. A sweep
generator is connected to the X-plates, which moves the bright spot horizontally across the
screen and repeats that at a certain frequency as the source of the signal. The voltage to be
studied is applied to the
Y-plates. The combined
sweep and Y voltages
produce
a
graph
showing the variation of
voltage with time, as
shown in Fig. 2.
GRIET-ECE
Page 129 of 138

______________________________________________________
CRO Front Panel Description:
Part
No.
1
2
Name
Description
FOCUS Control
INTEN control
To obtain Maximum Trace Sharpness

Adjusts the brightness of the CRT display.
Clockwise rotation increases brightness
The sensibility of vertical axis will become 5 times if the switch selected at X5 MAG.
Thats to say, the measuring voltage will be 1/5 of indicator value of VOLTS/DIV.
(in this instance the maximum sensitivity will be 1Mv/div.)
For vertically positioning the CH1 trace on the CRT screen, clockwise rotation moves the
trace upward, counterclockwise rotation moves the trace down.
To select the vertical amplifier display mode.
CH1 position displays only the CH1 input signal on the CRT screen.
CH2 position displays only the CH2 input signal on the CRT screen.
DUAL position displays the CH1 and CH2 input signal on the CRT screen simultaneously.
If Trigger source is selected CH1,
CHOP mode: TIME/DIV 0.2ms~1ms
ALT mode: TIME/DIV 0.5ms~0.2us
If Trigger source is selected VERT,
ALT mode: TIME/DIV 0.2s~0.2us
ADD position displays the algebraic sum of CH1 and CH2 signal.
Select switch at INV the signal added to CH2 will be turned over.
For vertically positioning the CH2 trace on the CRT screen, clockwise rotation moves the
trace upward, counterclockwise rotation moves the trace downward.
To select the positive or negative slope of the trigger signal(on LEVEL control) for initiating
sweep. Pulled in, the switch selects the positive(+)slope, when pushed, this switch selects
the negative (-)slope.
To select the trigger signal amplitude at which triggering occurs. When rotated clockwise,
the trigger point moves toward the positive peak of the trigger signal. When this control is
rotated counterclockwise, the trigger point moves toward the negative peak of the trigger
signal.
To adjust the horizontal position of the traces displayed on the control the CRT. Clockwise
rotation moves the traces to the right, counterclockwise rotation moves the traces to the left.
X5 MAG switch
CH1 POSITION
control
V MODE switch
6
7
CH2 INV switch

CH2 POSITION
control
Trigger Slope
switch(on LEVEL
control)
Trigger LEVEL
control
10
11
Horizontal
POSITION
control
X10MAG switch
12
&1
3
14
VARIABLE
control
15
TIME/DIV switch
Trigger MODE
switch
GRIET-ECE
Placing the switch on X10MAG sweep time will be expanded to 10times and in this instance
sweep time becomes 1/10 of TIME/DIV indicator value.
Provides continuously variable adjustment of sweep rate between steps of the TIME/DIV
switch. TIME/DIV calibrations are accurate only when the VARIABLE control is clickstopped fully clockwise.
To select the sweep triggering mode.
AUTO position selects free-running sweep where a baseline is displayed in the absence of a
signal.
This condition automatically reverts to triggered sweep when a trigger signal of 25HZ or
higher is received and other trigger controls are properly set.
NORM position produces sweep only when a trigger signal is received and other controls
are properly set. No trace is visible when the signal frequency is 25 HZ or lower.
TV-V position is used for observing a composite video signal at the frame rate.
TV-H position is used for observing a composite video signal at the scanning line rate.
To select either the calibrated sweep rate of the main time base, the delay time range for
delayed sweep operation or X-Y operation.
Page 130 of 138

______________________________________________________
16
POWER switch
16-1 POWER lamp
17
Probe adjust
18
Trigger source
switch
19
EXT TRIG IN
connector
VARIABLE
controls
20
21
22
23
24
25
26
27
28
29
35
36
37
CH2 AC/GND/DC
switch
CH1 or Y IN
connector
CH2 VOLTS/DIV
switch
CH1 or X IN
connector
CH1 AC/GND/DC
switch
CH2 VOLTS/DIV
switch
Same as 20
Ground Connector
ROTATION control
Component Test
switch
Component Test
input(Red)
Component Test
GND(black)
GRIET-ECE
Push into turn instrument power on and off.

Sights when power is on.
Provides a fast rise square wave of precise amplitude for adjustment and vertical amplifier
calibration.
To conveniently select the trigger source.
VERT: signal which is put into CH1 or CH2 is source of operation. In case of vertical mode
switch is CH1 which automatically becomes registry source.
In case of vertical mode switch is CH2 which automatically becomes registry source.
When VERT Mode Switch is duel, the signals are displayed with ALT Mode in all TIME/DIV
range.
CH1: When there is the signal in the CH1, you may select trigger source CH1.
LINE: Position selects a trigger derived from the AC poser line, This permits the scope to
stabilize display line, related components of a signal even if they are very small compared to other
components of the signal.
EXT: Position selects the signal applied to the EXT TRIG IN connector.
For applying external trigger signal to the trigger circuits.
Provide continuously variable adjustment of deflection factor
Between steps of the VOLTS/DIV switches. VOLTS/DIV
Calibrations are accurate only when the VARIABLE controls are click-stopped in their fully
clockwise position.
To select the method of coupling the input signal to the CH2 vertical amplifier.
For applying an input signal to vertical amplifier CH2, or the Y axis (Vertical amplifier) during
X-Y operation.
To select the calibrated deflection factor of the input signal fed to CH2 vertical amplifier.
For applying an input signal to vertical amplifier CH1, or the X-axis (horizontal) amplifier during
X-Y operation.
To select the method of coupling the input signal to the CH1 vertical amplifier.
AC position inserts a capacitor between the input connector and amplifier to block any DC
component in the input signal.
GND position connects the amplifier to ground instead of the input connector, so a ground
reference can be established.
DC position connects the amplifier directly to its input connector, thus passing all signal
components on to the amplifier.
To select the calibrated deflection factor of the input signal fed to CH2 vertical amplifier.
Provides an attachment point for a separate ground lead.

Allows screwdriver adjustment of the trace alignment with
regard to the horizontal graticule lines of the CRT
Push to test the component .Then the horizontal bar graph of 8div is displayed on the screen.
Be used for connecting component to component test circuit with DMM probe (Red).
Be used for grounding component to component test circuit with DMM probe (Black).
Page 131 of 138

______________________________________________________
Appendix D
DATA SHEETS
GRIET-ECE
Page 132 of 138

______________________________________________________
GRIET-ECE
Page 133 of 138

______________________________________________________
GRIET-ECE
Page 134 of 138

______________________________________________________
GRIET-ECE
Page 135 of 138

______________________________________________________
GRIET-ECE
Page 136 of 138

______________________________________________________
GRIET-ECE
Page 137 of 138

EDC Manual 2016

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

EDC Manual 2016

Uploaded by

Copyright:

Available Formats

Electronic Devices and Circuits

Academic Year:__________ Semester:________

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

This is to certify that this is a bonafide record of practical work done by

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

FAMILIARIZATION WITH CRO

Electronic Devices &Circuits Lab

2. With constant Voltage (VRMS) =________V.

Electronic Devices &Circuits Lab

PN JUNCTION DIODE CHARACTERISTICS

Silicon junction diode = IN4007

Reverse voltage = 1000V

Forward voltage = 0.8V

Temperature range = 65C to 200C

Electronic Devices &Circuits Lab

Fig. 1.1: Diode Forward Bias Circuit

Fig. 1.2: Diode Reverse Bias Circuit

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

HALF WAVE RECTIFIER

Primary voltage = 230Vrms, 50 HZ

Secondary voltage = 12Vrms, 50 HZ

Reverse current = 30A

Full - load secondary current = 1A

Forward voltage = 0.8V

Electronic Devices &Circuits Lab

Fig.4.1: Half Wave Rectifier without Filter

Fig.4.2: Half Wave Rectifier with Filter

Electronic Devices &Circuits Lab

Table 2: Half wave rectifier with filter

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

FULL WAVE RECTIFIER

Primary voltage = 230Vrms, 50 HZ

Secondary voltage = 12Vrms, 50 HZ

Reverse current = 30A

Full - load secondary current = 1A

Forward voltage = 0.8V

Electronic Devices &Circuits Lab

Fig. 5.1: Full Wave Rectifier without Filter

Fig. 5.2: Full Wave Rectifier with Filter

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Ripple factor without filter at 1K Ohm =____

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Electronic Devices &Circuits Lab

Academic Year:__ Semester: