WINSEM2015 16 - CP1221 - 25 Jan 2016 - RM01 - P5 8051 Assembly Language Programming 1 PDF

EEE3410 Microcontroller Applications
Department of Electrical Engineering
Lecture 5
8051 Assembly Language Programming (1)
Vocational Training Council, Hong Kong.
Week 5
In this Lecture
8051 programming model
Assembly language syntax
Operation codes and operands
Machine instructions
How 8051 interprets binary data
Example of Assembly language program
8051 Instruction Set
Instruction time calculation
Data movement instructions
Week 5
Introduction
You are now learning to be a programmer
(a person who writes programs)
You should know the internal structure of
the 8051 to do good programming
Programming model how programmers
see the 8051
In the model, programmers can access the
registers and accumulators with programs
Week 5
8051 Programming Model
7F
Week 5
Assembly Language Syntax

Syntax = format/rule
[label:] mnemonic [operands][;comment]
Items in square brackets are optional
Week 5
Mnemonic/ Operation Code (Opcode) ()

Program () = a set of instructions
()
All computers work according to the program
All instructions contain a verb (),
which tells the computer what to do
This verb is called mnemonic/operation
code
e.g. MOV R0, #12h MOV is the opcode
Week 5
Operand ()
Apart from Opcode, an instruction also includes
object) to act on.
The object is called an operand.
Operand is optional. Instructions can have one,
two or no operands.
e.g. MOV R0, #12h --- R0 and #12h are two
operands
INC R1 --- R1 is the only one operand
NOP --- no operand follows
Week 5
Mnemonic / Machine Instructions

Primitive () operations of the 8051
e.g. ADD A, #34
Each microprocessor has its unique

instruction set
Machine instructions = opcode + operand(s)
Unary operand: 1 operand, e.g. CLR A
Binary operand: 2 operands, e.g. ADD A, #10
Week 5
Binary nature of machine instruction

Unlike human, computers do not know verbal instructions;
they only know 0s and 1s
Binary data: program should be in a stream of 0s and 1s
It is also called Machine Language
For convenient purpose, machine instructions are usually
expressed in hexadecimal (i.e. base-16) format, called
machine codes.
e.g. Mnemonic :
ADD A, #10h
Equivalent Machine codes: 24h 10h (hexadecimal)
Week 5
How 8051 Interprets Binary Data

Machine instructions can be 3 bytes (24 bits), 2
bytes (16 bits) or 1 byte (8 bits) long
The 1st byte (8 bits) is the operation code (opcode)
The remaining byte(s) is/are the supplement data
for the operation code
1-byte instruction: Contain the opcode only.
Actions do not need supplement data.
e.g. Mnemonic
NOP
ADD A, R0
INC A
Equivalent Machine codes

00h
(hexadecimal)
28h
04h
Week 5
10
How 8051 Interprets Binary Data

2-byte instruction: The 1st byte is the opcode. The
2nd byte may be either an immediate data (a
number) or the low-order byte of an address
e.g. Mnemonic
ADD A, #30h
ADD A, 30h

24h 30h
(hexadecimal)
25h 30h
3-byte instruction: The 1st byte is the opcode. The

2nd and the 3rd byte are the high-order byte and
the low-order byte of an 16-bit memory address
e.g. Mnemonic
LJMP 0130h

02h 01h 30h (hexadecimal)
Week 5
11
Content of the List file of an assembly language program

LOC OBJ
LINE
0025
1
0000
2
0000 AD25
3
0002 7F34
4
0004 7400
5
0006 2D
6
0007 2F
7
0008 2412
8
000A 00
9
000B 80FE
10
0020
11
0020 39
12
0021 416D6572 13
0025 696361
14
SOURCE
COUNT EQU 25H
ORG
0H
MOV
R5, COUNT
MOV
R7, #34H
MOV
A, #0
ADD
A, R5
ADD
A, R7
ADD
A, #12H
NOP
HERE:
SJMP HERE
ORG
20H
DATA1:
DB 39H
DATA2:
DB "America
SYMBOL TABLE LISTING

------ ----- ------NAME
TYPE
VALUE
COUNT
N NUMB
0025H
DATA1
C ADDR
DATA2
C ADDR
HERE
C ADDR
END
ATTRIBUTES
A
0020H
A
0021H
A
000BH
A
;COUNT = 25H
;start (origin) at location 0
;load 25H into R5
;load 34H into R7
;load 0 into A
;add contents of R5 to A, now A = A + R5
;add contents of R7 to A, now A = A + R7
;add to A value 12H, now A = A + 12H
;no operation
;stay in this loop
;
;
;end of assembly source file
Source program in Assembly

Language (Mnemonics)
Machine codes stored in memory

REGISTER BANK(S) USED: 0
ASSEMBLY COMPLETE. 0 WARNING(S), 0 ERROR(S)
Week 5
12
Pseudo-instructions/Directives
Beside mnemonics, directives are used to define variables and
memory locations where the machine codes are stored. These
directives are interpreted by assembler during the conversion of
the assembly language program into machine codes.
- ORG (origin)
indicates the beginning of the address of the instructions.
The number that comes after ORG can be either hex or
decimal.
- END
indicates to the assembler the end of the source assembly
instructions.
Week 5
13
Pseudo-instructions/Directives
- EQU (equate)
used to define a constant without occupying a memory
location. It does not set aside storage for a data item but
associates a constant value with a data label so that when
the label appears in the program. Its constant value will be
substituted for the label.
- DB (define byte)
used to define 8-bit data and store them in assigned
memory locations. Define data can be in decimal, binary,
hex, or ASCII formats.
Week 5
14
8051 Instruction Set

There are roughly 241 instructions in 8051 instruction set.
They can be grouped into 6 groups.
- Data movement instructions
- Arithmetic operation instructions
- Logic and byte operation instructions
- Bit operation instructions
- Program branching instructions
- Special instruction
Refer to the 8051 instruction set summary for details
Week 5
15
Instruction Time Calculation

Depends on the clock frequency of oscillator
1 machine cycle = 12 oscillator cycle
For a 11.0592MHz oscillator, the time for 1
machine cycle is:
Tmachine cycle
1
=
.(12 ) = 1 .085 s
6
11 .0592 10
Week 5
16
Example 5-1
For an 8051 system of 11.0592MHz, find how long it takes
to execute each of the following instructions.
(a) MOV R3, #55
(b) DEC R3
(c) DJNZ R2, target
(d) LJMP
(e) SJMP
(f) NOP
(g) MUL AB
Week 5
17
Solution to Example 5-1

Instruction
Machine
Time to execute
cycles
(a) MOV R3, #55
1 x 1.085s = 1.085 s
(b) DEC R3
1 x 1.085s = 1.085 s
(c) DJNZ R2, target
2 x 1.085s = 2.17 s
(d) LJMP
2 x 1.085s = 2.17 s
(e) SJMP
2 x 1.085s = 2.17 s
(f) NOP
1 x 1.085s = 1.085 s
(g) MUL AB
4 x 1.085s = 4.34 s
Week 5
18
Example 5-2
Find the execution time for the following program segment,
assuming a crystal frequency of 11.0592MHz.
Machine Cycle
ORG
00h
--
MOV
A, #100
MOV
MUL
PUSH
B, #2
AB
01
2
4
1
MOV
PUSH
ADD
MOV
SWAP
A, B
02
A, R1
30h, A
A
2
1
1
2
1
END
-Week 5
19
Solution to Example 5-2

Total machine cycles required,
[2 + 2 + 4 + 1 + 2 + 1 + 1 + 2 + 1 ] = 16 machine cycles
The execution time of the program segment is :
Execution time = 16 x 1.085s = 17.36s #
Week 5
20
Data Movement Instructions

Moving data from a source to a destination
MOV
MOVX
MOVC
PUSH
POP
XCH
XCHD
Week 5
21
The MOV Instruction

MOV
destination, source
Used for data movement inside the 8051
No change in original (source) data: a copy of it is

made and the copy is then moved to the
destination
Source can be data/register/memory locations
Destination can be register/memory locations
Note that the destination cannot be an immediate

data
Week 5
22
Examples of MOV Instruction

MOV A, 80h
- Copy data from 80h (port 0) to register A
MOV 80h, A
- Copy data from register A to RAM address 80h (port 0)
MOV 3Ah, #3Ah
- Copy immediate data 3Ah to RAM location 3Ah
MOV R0, 12h
- Copy data from RAM location 12h to R0
MOV 5Ch, A
- Copy data from register A to RAM location 5Ch
MOV 08Ah, 77h
- Copy data from RAM address 77h to 08Ah (IE register)

Week 5
23
The MOVX Instruction

MOVX
destination, source
X means the data movement is external to the

8051 data movement is between the external RAM
and the (internal) register A
All MOVX instructions must involve register A
All MOVX instructions must use indirect addressing
mode
Operation is similar to the MOV instruction
Week 5
24
Examples of MOVX Instruction

MOVX @DPTR, A
- Copy data from A to the 16-bit address in DPTR
MOVX @R0, A
- Copy data from A to the 8-bit address in R0
MOVX A, @R1
- Copy data from the 8-bit address in R1 to A
MOVX A, @DPTR
- Copy data from the 16-bit address in DPTR to A
Week 5
25
The MOVC Instruction

MOVC destination, source
C means the data movement is from the
source address in code ROM to register A
Used with data transfer between
internal/external ROM and register A, e.g.
reading a table from the program memory
Week 5
26
Examples of MOVC Instruction

MOVC A, @A+DPTR (Copy the code byte to A)
-
This code byte is found at the ROM address formed

by adding A and the DPTR
MOVC A, @A+PC (Copy the code byte to A)

-
This code byte is found at the ROM address formed

by adding A and the PC
Note that the PC is incremented by 1 before added to A

to form the final address of the code byte
Week 5
27
Examples of MOVX and MOVC Instructions

8051
Read
Write
Read
A register
Write
Read
Data
Data
External
RAM
Internal
and
External
ROM
MOVX @Ri
R0 or R1
MOVX @DPTR
DPTR
MOVC A,@A + DPTR
DPTR + A
MOVC A,@A + PC
PC + A
Week 5
28
The Stack
Stack: an area of internal RAM for fast data storage and
retrieval
Stack operation follows the first-in-last-out (FILO), or
equivalently, last-in-first-out (LIFO) logic
(i.e. the stack grows up as data is stored)
Stack pointer (SP): a register that stores the address of
the stacks top item
Adding data to the stack:
SP increments (+1) and then data is stored on the stack
Getting data from the stack:
Data is read from the stack and then SP decrements (1)
Week 5
29
The PUSH Instruction

PUSH
source
Copy data from the source address to the stack

SP is incremented by 1 before source data is
copied to the stack
Too many PUSH operations may overflow the
stack, (i.e. stack runs out of memory)
Week 5
30
The POP Instruction

POP
destination
Copy data from the stack to the destination

address
SP is decremented by 1 (1) after data is copied
from the stack
Week 5
31
Other Remarks
SP register is set to 07h when the 8051 is reset
To prevent the stack from running out of memory,
programmer needs to initialize the SP to a value above
the highest address likely to be used by the program
This value is usually above the register banks
The first PUSH operation writes data to R0 in bank
1(08h)
SP rolls over to 00h after it reaches FFh
PUSH > 7Fh will result in error as the RAM ends at
address 7Fh
Week 5
32
Summary of PUSH and POP
SP + 2
Push Y
Pop Y
SP
SP + 1
Push X
Pop X
SP - 1
SP
Increment Before
PUSHing
SP - 2
Internal
RAM
Decrement After
POPing
Week 5
33
Examples
MOV
81h, #30h
; Copy the immediate data 30h to SP
MOV
R0, #0ACh
; Copy the immediate data ACh to R0

; (i.e. 00h)
PUSH
00h
; SP=31h, address 31h contains the

; number ACh
PUSH
00h
; SP=32h, address 32h contains the

; number ACh
POP
01h
; SP=31h, address R1 (i.e. 01h)

; contains the number ACh
POP
80h
; SP=30h, port 0 latch (i.e. 80h)

; contains the number ACh
Week 5
34
Data Exchanging
XCH and XCHD are data exchange instructions
data movement is bi-directional
(i.e. source destination)
Data exchanging operations are internal to the
8051
All data exchanging operations must use
register A
Week 5
35
The XCH and XCHD Instructions

XCH
destination, source
XCHD
destination, source
XCH: Data exchange between register A and

the addressed byte
XCHD: Data exchange between the lowernibble of A and the addressed byte
(Upper-nibble of A remains unchanged)
Week 5
36
Examples
XCH
A, R7
Exchange bytes between registers A and R7
XCH
A, 0F0h
Exchange bytes between registers A and B
XCH
A, @R1
Exchange bytes between register A and address in R1
XCHD A, @R1
Exchange lower-nibble in register A and the address
in R1
Week 5
37
Read reference
The 8051 Microcontroller and Embedded Systems Using Assembly and C, Mazidi
Chapter 2
P.37 P.63
Week 5
38

Department of Electrical Engineering
END of Lecture 5
8051 Assembly Language Programming (1)
Week 5

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EEE3410 Microcontroller Applications

Department of Electrical Engineering

EEE3410 Microcontroller Applications

EEE3410 Microcontroller Applications

Vocational Training Council, Hong Kong.

EEE3410 Microcontroller Applications

8051 Programming Model

Vocational Training Council, Hong Kong.

EEE3410 Microcontroller Applications

Assembly Language Syntax

Vocational Training Council, Hong Kong.

EEE3410 Microcontroller Applications

Mnemonic/ Operation Code (Opcode) ()

EEE3410 Microcontroller Applications

EEE3410 Microcontroller Applications

Mnemonic / Machine Instructions

Each microprocessor has its unique

EEE3410 Microcontroller Applications

Binary nature of machine instruction

Vocational Training Council, Hong Kong.

EEE3410 Microcontroller Applications

How 8051 Interprets Binary Data

Equivalent Machine codes

EEE3410 Microcontroller Applications

How 8051 Interprets Binary Data

Equivalent Machine codes

3-byte instruction: The 1st byte is the opcode. The

Vocational Training Council, Hong Kong.

Equivalent Machine codes

EEE3410 Microcontroller Applications

Content of the List file of an assembly language program

SYMBOL TABLE LISTING

Source program in Assembly

Machine codes stored in memory

EEE3410 Microcontroller Applications

EEE3410 Microcontroller Applications

EEE3410 Microcontroller Applications

8051 Instruction Set

EEE3410 Microcontroller Applications

Instruction Time Calculation

Vocational Training Council, Hong Kong.

EEE3410 Microcontroller Applications

EEE3410 Microcontroller Applications

Solution to Example 5-1

(a) MOV R3, #55

(c) DJNZ R2, target

Vocational Training Council, Hong Kong.

EEE3410 Microcontroller Applications

EEE3410 Microcontroller Applications

Solution to Example 5-2

Vocational Training Council, Hong Kong.

EEE3410 Microcontroller Applications

Data Movement Instructions

EEE3410 Microcontroller Applications

The MOV Instruction

Used for data movement inside the 8051

No change in original (source) data: a copy of it is

Source can be data/register/memory locations

Destination can be register/memory locations

Note that the destination cannot be an immediate

Vocational Training Council, Hong Kong.

EEE3410 Microcontroller Applications

Examples of MOV Instruction