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EC 1402: MICROPROCESSORS
Module I
Introduction to microprocessors: Microcomputers and microprocessors, 8/ 16/ 32/ 64bit microprocessor families.
EC 1402: MICROPROCESSORS
pipelined stages.
performance.
Branch prediction has added.
aim:- i)
to execute legacy IA-32 applications based on singleinstruction, multiple-data (SIMD) technology at high throughput
ii)
to operate at high clock rates and to scale to higher
performance and clock rates in the future
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Key Features:
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The architecture was defined by Stephen P. Morse with some help and assistance
by Bruce Ravenel (the architect of the 8087) in refining the final revisions. Logic
designer Jim McKevitt and John Bayliss were the lead engineers of the hardwarelevel development team and William Pohlman the manager for the project.
The legacy of the 8086 is enduring in the basic instruction set of today's personal
computers and servers; the 8086 also lent its last two digits to later extended
versions of the design, such as the Intel 286 and the Intel 386, all of which
eventually became known as the x86 family.
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How it works, what is its architecture, what is its instruction set architecture,
how it is programmed, how it is interfaced with other devices etc. etc.
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The PC market which uses Intel based devices takes up some 60% of the total
microprocessor market! The other main processor used by industry is the
Motorola 68000 family of microprocessors.
The 8086 is/was probably the most commonly used 16-bit microprocessor of
all time, with the upwardly compatible families of microprocessors developed
from it now at the heart of the virtually all personal computers. This makes the
8086 the number one choice as a platform for teaching microprocessor
principles.
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Microprocessor
8086
16 bit- microprocessor ?
16-bits data bus?
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Data
Bus
Control
signals
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A19A0
0.0
00000H
1.1
FFFFFH
00000H
Memory
Address
Space
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FFFFFH
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2 units are:
1. BIU
2. EU
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8086 Architecture
Instruction QUEUE
The BIU stores these prefetched bytes in a FIFO register set called
a queue.
When EU is ready for its next instruction, it simply reads the queue
in the BIU.
This is much faster than sending out the address to the memory
and waiting for the memory to send back the next instruction byte.
Machine Cycle
Fetching: Before the CPU can execute an instruction, the control unit must
Machine Cycle
the CPU carries out the instructions in order by converting them into
microcode.
Storing: The CPU maybe required to store the results of an instruction in
memory.
Pipelining
Stack Addressing
Stack Addressing
The physical address for a stack read or
a stack write is produced by adding the
contents of the stack pointer register to
the stack segment register.
Example:
SS = 5000H * 10H = 50000H
SP = FFE0H
SS + SP = 50000H + FFE0H
= 5FFE0H