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A Universal Selective Harmonics Elimination

Method for High Power Inverters


Dissertation

Presented in Partial Fulfillment of the Requirements for the Degree Doctor


of Philosophy in the Graduate School of The Ohio State University

By
Damoun Ahmadi Khatir

Graduate Program in Electrical and Computer Engineering


The Ohio State University

2012

Dissertation Committee:
Prof. Jin Wang
Prof. Longya Xu
Prof. Vadim I. Utkin
Prof. Donald G. Kasten

Abstract
The developments of Flexible AC Transmission System (FACTS) devices, medium
voltage drives, and different types of distributed generations, have provided great
opportunities for the implementations of medium and high power inverters. In these
applications, the frequency of the Pulse Width Modulation (PWM) is often limited by
switching losses and electromagnetic interferences caused by high dv/dt. Thus, to
overcome these problems, Selective Harmonic Elimination (SHE) is often utilized in both
two-level inverters and multilevel inverters to reduce the switching frequency and the
Total Harmonic Distortion. For both two level and multilevel inverters, most SHE studies
are based on solving multiple variable high order nonlinear equations. Furthermore, for
multilevel inverters, SHE has been often studied based on the assumption of balanced dc
levels and single switching per level. This dissertation addresses the further developed
harmonics injection and equal area criteria based four-equation method to realize SHE for
two-level inverters and multilevel inverters with unbalanced dc sources. Compared with
existing methods, the proposed method does not involve complex equation groups and is
much easier to be utilized in the case of large number of switching angles or multiple
switching angles per voltage level in multilevel inverters.
Then, the proposed method is applied for optimal PWM when the number of dc level ins
limited for the inverters. For harmonics compensation for active power filters, the
ii

proposed method is modified for selective harmonics generation based on distributed


energy resources. Different real-time simulation and experimental results verify the
simplicity and accuracy of the proposed method for these approaches. By using advanced
instantaneous power theory, the four-equation based method can be used as a
comprehensive and universal solution for reliable and efficient power delivery in smart
grids.

iii

To Dear People of IRAN

iv

Acknowledgments
I want to express my thanks to Professor Jin Wang who gave me the opportunity to
study, challenge, and improve my knowledge in power electronics during my study in the
Ohio State University. He has patiently supervised me for four years, and encouraged me
to think outside the box and enjoy my research in the Ohio State University.

Vita
Damoun Ahmadi Khatir was born in IRAN in 1981. He received his B.S. degree from
Khaje Nasir Toosi University of Technology and M.S. degree from Sharif University of
Technology, IRAN in 2003 and 2005, both in electrical engineering. During that time, he
worked on different control algorithms for AC motor drives and applying Flexible
Alternating Current Transmission System (FACTS) devices for reactive power
compensation. He received his Ph.D degree in Power Electronics at the Ohio State
University in June 2012. His research is focused on multilevel inverters, renewable
energies for smart grid, intelligent and optimized power tracking for automotive battery
charging, power electronic circuits, HIL and DSP control applications for high power
systems and distributed generations.

vi

Table of Contents
Abstract..ii
Acknowledgement..v
Vita.....vi
List of Figures.x
List of Tables...xiv
CHAPTER.1: MULTILEVEL INVERTERS FOR RENEWABLE ENERGY
SOURCES
1.1. Introduction.1
1.2. Integration of Renewable Sources into the Power Systems4
1.3. Multilevel Inverters5
1.3.1. Circuit Topologies in Multilevel Inverters..6
1.3.2. Selective Harmonics Elimination in Multilevel Inverters22
1.3.3. Fast and Practical method for SHE...25
1.4. Summary and Conclusion....32

CHAPTER 2: MODIFICATIONS AND IMPROVEMENT IN FOUR-EQUATION


BASED METHOD
2.1.The Characteristics of a Basic Four Equations Method....34
2.1.1.

Main Problem in the Basic Four Equations Method36


vii

2.2. PI Controller based Fundamental Voltage Correction.37


2.3. Final Solutions for the Problems in the Four-equation Method..39
2.4. SHE for Multilevel Inverters with Unbalanced DC Inputs..47
2.5. Real Time Verification.....54
2.6. Summary and Conclusion....61

CHAPTER. 3: OPTIMAL PWM FOR SHE IN HIGH POWER INVERTERS


3.1. Introduction...63
3.2. OPWM Methods for Selected Harmonics Elimination.64
3.3. Proposed Methods for Selected Harmonics Elimination..67
3.4. Case Studies...78
3.5. Simulation and Experimental Verification.81
3.6. Real Time Verification.91
3.7. Summary and Conclusion94

CHAPTER. 4: POWER GENERATION AND ACTIVE POWER FILTER WITH


DISTRIBUTED ENERGY SOURCES
4.1. Introduction...96
4.2. The Proposed Four Equation Method for Harmonics Compensation...101
4.3. The Limitation of the Proposed Method...103
4.4. The Online Harmonics Detection Method...105
4.5. Real Time Verification for the Proposed Method...107
4.6. Summary and Conclusion..118
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CHAPTER. 5.: CONTRIBUTION AND FUTURE WORK


5.1. Introduction.....120
5.2. The Contributions...120
5.3. Comprehensive Power Electronic Solutions for Smart Grid Applications...121
5.4. Summary and Conclusion......126
REFERENCES...127

ix

List of Figures
Figure 1.1, Global Renewable energy investments......3
Figure 1.2, Global renewable power excluding hydro.....3
Figure1.3. Three level diode clamped multilevel inverters.....7
Figure. 1. 4. Five level diode clamped multilevel inverters.....8
Figure 1. 5. Three level flying capacitor multilevel inverters...10
Figure 1.6. Five level single phase flying capacitor multilevel inverters..12
Figure 1.7. Cascaded multilevel inverters......15
Figure 1.8. Three-pulse multilevel inverters...17
Figure 1.9 Circuit configuration for zig-zag transformer....17
Figure 1.10. Phase diagram for three phase cascaded multilevel inverters18
Figure 1. 11. Circuit topology for hexagram multilevel inverters....19
Figure 1. 12. Generalized multilevel inverter topology.....20
Figure 1. 13. Three level soft-switched inverter.....22
Figure 1. 14. Staircase waveform in multilevel inverters......23
Figure 1. 15. The diagram showing the idea for equal area criteria....27
Figure 1. 16. The four-equation based Method.....31
Figure 2.1. Different switching angles in multilevel inverters..35
Figure 2. 2. Modified method with PI controller to adjust the fundamental value...38
Figure 2. 3. Additional dc level for low modulation index....40
Figure 2. 4. Modified method with additional switching angle.....41
x

Figure. 2. 5. Additional switching angle in low modulation indices.....41


Figure 2. 6. Available dc level for high modulation indices..43
Figure 2. 7. The adjustment switching angle in high modulation indices....43
Figure. 2. 8. Modified method with adjustment switching angle.....44
Figure. 2. 9. Optimized switching angles of the proposed method......46
Figure. 2. 10. Explanation of the top switching angle...47
Figure. 2.11. A row of plug-in hybrid electric vehicle (PHEV) battery cells..48
Figure 2. 12 Equal area criteria in multilevel inverters with unbalanced dc levels....50
Figure 2. 13 Real time simulation platform....55
Figure 2. 14. The circuit topology of cascaded multilevel for real time simulation56
Figure 2. 15. The output simulated voltage for multilevel inverters57
Figure 2.16. The voltage spectrum for the selected harmonics.....57
Figure 2. 17. Hardware in the loop diagram for multilevel inverter58
Figure 2. 18. Real time simulation results for multilevel inverters..59
Figure 2. 19. Real time simulation results for multilevel inverters..60
Figure 3. 1. Multiple switching angles in OPWM......64
Figure 3. 2. Different approaches for harmonics elimination...67
Figure 3. 3. The illustration of equal area criteria.68
Figure 3. 4. The diagram showing four-equation method.69
Figures 3. 5, The resulting fundamental and the desired fundamental component...71
Figure 3.6. The switching angle adjustment in OPWM....72
Figure 3. 7. Modified method with adjustment for the switching angle.73
Figure 3. 8. Optimal PWM with four-equation based method on multilevel inverters....74
Figure 3. 9. Symmetric method in medium and high modulation index.75
Figure 3. 10. Weight oriented method in low modulation index..76
xi

Figure 3. 11. Block diagram for weight oriented solution in low modulation indices....77
Figure 3. 12. The overall switching angles for different modulation indices...79
Figure 3. 13, OPWM result for MI=0.8286....82
Figure 3. 14, OPWM result for MI=0.6748....82
Figure 3. 15, OPWM result for MI=0.2672....83
Figure 3. 16. Different parts of the experimental setup for OPWM....84
Figure 3. 17. No-load test voltage with ten switching angles.....84
Figure 3. 18. Harmonics analysis for output voltage in load testing....85
Figure 3. 19. Experimental results load test voltage and current waveforms.86
Figure 3. 20. Harmonics analysis for output current in load testing...86
Figure 3. 21. Three-level phase voltage waveform with MI=0.1414.....88
Figure 3. 22. OPWM for 5 level phase voltage waveform with MI=0.2545.....88
Figure 3. 23. Experimental setup for multilevel inverter with unbalanced dc sources..89
Figure 3. 24 Three level phase voltage waveform with MI=0.1414..90
Figure 3. 25. 5 level phase voltage waveform with MI=0.2545.....90
Figure 3. 26. Power hardware in the loop diagram for multilevel inverter.....92
Figure 3. 27, The results for weight-oriented method with MI=0.2545...93
Figure 3. 28. Detailed results for weight oriented method....93
Figure. 4.1. Harmonic and power compensation by multilevel inverters....99
Figure. 4. 2. Four-equation based method in multilevel inverters for APF......101
Figure. 4.3. 5th harmonics injection for APF........104
Figure. 4. 4. Multiple junction point for the same dc level......105
Figure. 4. 5. Different frequencies transformation s from a-b-c to d-q.....106
Figure. 4. 6. Power hardware in the loop diagram for active power filter...108
Figure. 4. 7. Real time simulator and multilevel inverters setup for PHIL.......108
xii

Figure. 4. 8. The flowchart for the four equations method.109


Figure. 4. 9. Transient response for DC bus changing....109
Figure 4. 10. Circuit topology for CHIL in more details........111
Figure 4. 11. Load current including the fifth and seventh harmonic components......112
Figure 4. 12. The fifth instantaneous harmonics magnitude in the load current..112
Figure 4. 13, The seventh instantaneous harmonics magnitude in the load current....112
Figure. 4.14 Three phase voltage waveform from multilevel inverters.113
Figure 4.15 The grid current after injecting the voltage by multilevel inverter...114
Figure 4.16 The fifth instantaneous harmonics magnitude in the grid current....114
Figure 4.17. The seventh instantaneous harmonics magnitude in the grid current.114
Figure 4. 18. Circuit topology for CHIL in more details.....115
Figure. 4. 19. SHE without power compensation.....116
Figure. 4.20. SHE with power compensation for low power...117
Figure. 4. 21. SHE for high power generation from the renewable sources..118
Figure 5. 1. Smart grid construction (Reference: CPRI)123
Figure 5. 2. The general system topology for islanding...125

xiii

List of Tables
Table 2.1: Switching angles examples.35
Table 2.2 Sample points based on the basic method......37
Table 2.3. The selected harmonics magnitudes with the basic method....37
Table. 2.4. Sample points for modified method with PI controller..38
Table. 2.5. Harmonics magnitudes for modified method with PI controller...39
Table 2. 6. The switching angles for different modulation indices...42
Table 2. 7. Harmonics magnitude for different modulation indices42
Table 2.8 Sample points for six (maximum) level waveform45
Table 2. 9. The harmonics magnitude results for the modified four-equation method..45
Table. 2. 10: Five different dc levels for staircase waveform....50
Table 2.11 Sample points from the direct implementation of the four-equation method..51
Table 2. 12. The selected harmonics magnitude for unbalanced DC sources.....51
Table 2. 13. Sample points based on the modified four-equation method...53
Table 2. 14. Harmonics components for unbalanced multilevel inverters......53
Table 3. 1. Number of first-order equations should be solved for harmonics elimination71
Table 3. 2. Sample points with proposed method for ten switching angles.79
Table 3. 3. Harmonics results for OPWM using ten switching angles.79
Table 3. 4. Sample points based on the four-equation and OPWM.....80
Table 3. 5. Harmonics magnitude based on the proposed method.......81
Table 3. 6. Harmonic components for the simulated modulation indices....83
xiv

Table 3. 7. Experimental results for harmonics magnitude in OPWM...85


Table 3. 8. Harmonics content in the experimental voltage and current for MI=0.6748...87
Table 3. 9. Simulation results for output voltage and selected harmonic88
Table 3. 10. Harmonics results for OPWM based on weight-oriented solution..88
Table 3. 11. Harmonics analysis for the experimental results......91
Table 4. 1. Real time simulation parameters for HIL.110
Table. 4. 2. Real time simulation parameters for PHIL..115

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CHAPTER.1

MULTILEVEL INVERTERS FOR RENEWABLE ENERGY


SOURCES
1.1. Introduction
The energy demands of the world are increasing significantly every year regarding the
population, industrialization and customer requirements. According to major fossil
energy companies, significant new sources are being developed; however, it is very
difficult to determine the ultimate availability of traditional energy sources. A safe
estimation based on current oil production shows that there are enough resources to
provide the present demands for 30 years. For gas resources, the global reserves are
approximately 50% higher than oil, which is estimated for 60 years based on current
demands. Furthermore, other natural resources are less explored than oil and there is
more opportunity for them. For example, unconventional hydrocarbon resources such as
heavy oil and bitumen, oil shale, shale gas and coal bed methane should be considered.
These sources are approximately three times greater in volume than conventional sources
of oil and gas. Further, coal, reserves are much such that they that could last for 100 years
[1].
1

All fossil fuels create carbon dioxide when burnt and they influence the Earths carbon
cycle. Plant growth and its subsequent conversion to coal, oil, peat and gas, dramatically
reduces the CO2 level in the environment, which is very important in cooling the planet
to temperatures that are necessary for the health of advanced life forms. By unlocking
these stored carbon sources, the direction of cycling in nature is changed, with global
warming as the direct result of excessive greenhouse effects.
The consequences of using these energy sources, after generation are not normally
considered in economical analyses. For example, the cost of ill health to society or
damage to the environmental is rising from pollution caused by fossil fuels. There are
also issues concerned with associated environmental damage in products such as residue
from coal mining or radioactive wastes for nuclear power. If nuclear power is to mitigate
global emissions, it is of utmost importance to assess accurately how much CO2 will be
displaced by nuclear power.
Nowadays, industry is very dependent on fossil fuel consumption; therefore, possible
solutions should be implemented in the years ahead. Changing the form of this
dependence and consumption for both people and industries in a short time is not very
realistic. In the last two decades, both electrical industry and heating generations are
moved forward to switch to gas instead of oil or coal for their sources. This helped to
limit the growth in CO2 emissions and using the newly developed gas sources [2], [3].
To overcome the drawbacks of the fossil fuels effects, renewable energies can be
considered as promising sources to meet the continuously increasing demand of energy,
solve increasing carbon emissions, and to improve the reliability of electric power
systems. In Fig 1.1, the total world investments on renewable power are shown in the last
2

couple of the years, which describe societies and industries interests for renewable
energies. These interests can be different for each renewable source, based on the
location and the type of power, which is shown in Figure.1.2 [4].

US Dollars (Billions)

160
140
120
100
80
60
40
20
0
2004

2005

2006

2007

2008

2009

Years

Figure 1.1, Global Renewable energy investments [Source: REN21 Renewable Status Report
2010]

Rnewable Power Capacity (GWatt)

300

250

200

Total Renewable
Power

150
Wind
100
Biomass
50
PV
Geothermal
0
2004

2005

2006

2007
Years

2008

2009

2010

Figure 1.2, Global renewable power excluding hydro [Source: REN21 Renewable Status Report
2010]
3

1.2. Integration of Renewable Sources into the Power Systems


Renewable energy sources are often variable and geographically dispersed. Therefore,
regarding their sustainability concern, low efficiency and power rating, the integration to
the main power systems has been widely studied. These situations have provided great
opportunities for the implementations of power inverters in power electronics [5-20].
The inverters for renewable sources may be described as standalone or grid-tie inverters.
In a standalone system, the main parts of power demands are provided by the renewable
energy inverter with other backups and storage systems. On the other hand, for the gridtie inverters, the renewable source inverters supply the power to a large interconnected
grid, also fed by a variety of other sources. The fundamental knowledge of integration for
the renewable sources is similar to that of fossil fuelled powered inverters. However,
based on the characteristics of the renewable sources, the inverters topology and control
algorithm should be modified.
Regarding the approaches of the renewable sources, the inverters are designed in
medium/high power rating. In these applications, the implementation of high frequency
Pulse Width Modulation (PWM), based two-level inverters is limited due to voltage
levels, and current ratings of switching devices, switching losses, and electromagnetic
interferences caused by high dv/dt [21-23]. Thus, to overcome these limitations,
multilevel inverters have been proposed as a promising solution. In the next steps,
different circuit topologies, control algorithms, and the applications for multilevel
inverters are described.

1.3. Multilevel Inverters


In 1975, multilevel converters have been introduced by three-level converters for a
higher voltage and power level [24]. In multilevel converters, a different source of
energy, such as battery, renewable energy sources, and dc voltage by capacitor banks can
be utilized together for desired ac voltage at a higher power rating. In this case, the
voltage and power rating of power electronic switches will be determined by the input dc
sources. Considering that m is the number of steps of the phase voltage, then, with respect
to the negative terminal of the inverter, the number of steps in the voltage between two
phases of the load k is:

k 2 m 1

(1-1)

and the number of steps p in the phase voltage of a three-phase load in wye connection is:

p 2 k 1

(1-2)

For high power applications, the advantages and disadvantages of multilevel inverters
compared with two level inverters using high frequency Pulse Width Modulation (PWM)
methods can be summarized by the following comparison [25-32]:
Advantages:

By using staircase waveform, the output voltage can be generated with low
distortion; and also dv/dt voltage stress on each power switches is decreased
significantly. Then, electromagnetic compatibility (EMC) problems can be
controlled and reduced;

The switching frequency and the switching loss is decreased, and for a high power
approach, efficiency is increased significantly;

Input current for multilevel inverters has low distortion;


5

By using multilevel inverters, Common-mode (CM) voltage is decreased; thus, the


stress in the motor bearings is reduced. Through advanced techniques in a modulation
index, this voltage can be eliminated.

Disadvantage:

In this topology, to achieve more voltage and power, a greater number of power
semiconductor switches is needed. Then, with the gate driver circuit for each switch,
the overall circuit will be more expensive, and more complicated, with a larger size.

1.3.1. Circuit Topologies in Multilevel Inverters


There are several structures have been proposed for multilevel converters based on
industrial applications. For inverters approaches, where dc sources are utilized for ac
output voltage, the major circuit topologies are summarized in the following sections [3340]:

A) Diode clamped inverters


First the three level diode clamped inverter is considered, with the neutral point that was
proposed by Nabae, Takahashi, and Akagi in 1981. After that study, several projects have
been reported in 90s, for a higher-level number of diode clamped inverters for reactive
power compensation, large motor drive and grid-tie applications.
As shown in Figure 1.3, for the three level inverter, dc bus voltage is divided by two
series capacitors, C1 and C2 , with the neutral point in the middle. In this circuit, two
*
diode, D1 and D1 are utilized to clamp the switch voltage to half the level of the dc-bus

voltage. In this circuit the ac output voltage ( Vout ) can be

Vdc
, when two upper switches (
2

S1 , S 2 ) are turned on. For this condition, D1* balanced the voltage sharing between S3
and S 4 . Then, S3 and S 4 block the voltage on C1 and C2 respectively. For zero output
two, S 2 and S3 are turned on and for output voltage equals

Vdc
, S3 and S 4 are turned
2

on. Therefore, D1 balances the C1 and C2 voltage between S1 and S 2 .

Vdc
2
S1

C1
D1

S2

Vdc

D1*

C2

S3

S4

V
dc
2

Figure1.3. Three level diode clamped multilevel inverters.

The circuit construction for a five-level diode clamped single phase inverter is shown in
Figure 1.4. In this circuit, four capacitors divide the input voltage. In normal situations,
the voltage on each capacitor is

Vdc
that equals the switches voltage stress through the
4
7

clamping diodes. For this circuit, each phase has four complementary switch pairs such that
turning on one of the switches will require that the other complementary switch be turned
off.

In general, based on the m level inverter, each active switching device is required only to
block a voltage level of

Vdc
. However, for reverse voltage blocking on the clamping
(m 1)

diodes, the voltage ratings are different. In this case, if each blocking diode voltage rating
is the same as the active device voltage rating, the number of diodes required for each
phase will be (m 1) (m 2) . Then, the number of blocking diodes is related to the
number of levels in a diode clamped inverter.

Vdc
2
S1

C1
Vdc
4

C2

Vdc

S2

D3

S3

D3* D
2

*
2

D
C3

S4

S5
D1 S
6

Vdc
4

D1* S7

C4

S8

Vdc
2

Figure. 1. 4. Five level diode clamped multilevel inverters.


8

One application of the multilevel diode-clamped inverter is a grid-tie inverter to connect a


high-voltage dc line and an ac grid voltage. Furthermore, this circuit can be utilized for
medium or high power variable speed motor drives (2.4 kV to 13.8 kV). Also, Static Var
compensation based distributed energy resources have been studied for this circuit topology
in the several projects. In another comparison, the main advantages and disadvantages of
multilevel diode-clamped converters are as follows:
Advantages:

All of the phases share a same dc bus, which decrease the capacitance requirements
of the inverter. Based on that, a back-to-back topology can be implemented for
different approaches such as a high voltage back-to-back topology or variable speed
drives.

Based on the fundamental switching frequency, the efficiency is high.

For this circuit, the capacitors can be pre-charged as a group.

Disadvantages:

Difficult active power flow for a single inverter because the intermediate dc levels
will overcharge or discharge without precise control and monitoring.

The number of clamping diodes required is quadratically related to the number of


levels. When the number of level is sufficiently high, the number of diodes
required will make the system impractical to implement.

If the inverter runs under PWM method, the diode reverse recovery of these
clamping diodes becomes the major design challenge in high voltage/power
applications.
9

B) Flying capacitors inverters


Flying-capacitor multilevel inverter has been by Meynard and Foch in 1992. The
structure of this inverter is similar to that of the diode-clamped inverter, except that
capacitors are used in the inverter in the place of clamping diodes. This topology utilizes
multiple dc capacitors topology, where the voltage on each capacitor differs from that of
the next capacitor. In this case, the voltage increment between two adjacent capacitor legs
determines the size of the voltage steps in the output voltage. A three level flying
capacitor multilevel inverter is shown in Figure 1.5.

Vdc
2
S1

C2

Vdc

n C
1

S2

a
S3

C2

S4

V
dc
2

Figure 1. 5. Three level flying capacitor multilevel inverters.

Similar to diode clamping, the capacitor clamping requires a large number of bulk
capacitors to clamp the voltage. The voltage rating for each of the capacitor equals the
main power switch. Then, for an m-level inverter, a total number of clamping capacitors
per phase leg will be (m 1) (m 2) / 2 in addition to (m 1) main dc-bus capacitors. In
10

this circuit topology, the capacitors with negative signs are in a charging mode, while
those with positive sign are in a discharging mode. Thus, by the proper selection of
capacitor combinations, the capacitor charge will be balanced.
For the three level phase flying capacitor inverter is shown in Fig 1.5, three level voltage
equals Van Vdc , 0, or Van Vdc is provided for the output. For the voltage level equals
2

Vdc
, two upper switches, S1 and S 2 need to be turned on. On the other hand, for
2
negative output voltage equals

Vdc
, two lower switches S 3 and S 4 need to be turned
2

on. For 0 level output voltage, either pair ( S1 , S 3 ) or ( S 2 , S 4 ) can be turned on. In this
situation, capacitor C1 is charged, when S1 and S3 are turned on; and is discharged when

S 2 and S 4 are turned on. Therefore, the voltage magnitude of C1 can be balanced by
proper selection of the 0 level switch combination.
The circuit topology of the single phase five level flying capacitor inverter is shown in
Figure 1.6. In this condition, the switching method has more flexibility than a diodeclamped converter for same voltage magnitude.

11

Vdc
2
S1

C4
Vdc
4

S2

C3

C4

Vdc

n
C4

S3

C2
C3
C3

S4

C1

C2

a
S5
S6

V
dc
4

S7

C4

S8

V
dc
2

Figure 1.6. Five level single phase flying capacitor multilevel inverters

There are more redundancies for inner voltage levels in the flying-capacitor multilevel
inverter. Therefore, more switch combinations can be utilized to generate same waveform
in output voltage. However, compared with the diode-clamped multilevel inverter, the
flying-capacitor inverter does not require all of the conducting switches to be in a
consecutive series. Furthermore, compared with the diode-clamped inverter that has only
line-line voltage redundancies, the flying-capacitor multilevel inverter has both phase and
line-line

voltage

redundancies.

These

redundancies

allow

choice

of

charging/discharging specific capacitors, and can be utilized in the control system for
balancing the voltages across the various levels.

12

If the voltage rating of the capacitors is identical to that of the main switches, the mlevel flying-capacitor multilevel inverter will require (m 1) (m 2) / 2 auxiliary
capacitors per phase, in addition to the (m-1) dc link capacitors. A flying-capacitor
multilevel inverter has been proposed in the projects for the medium and high power
motor drives, and also static VAR generation. The main advantages and disadvantages of
multilevel flying capacitor converters are shown as follows:
Advantages:

Phase redundancies can be applied to balance the voltage levels of the capacitors.

Active and reactive power flow can be controlled.

The large number of capacitors enables the inverter to ride through deep voltage
sags and short duration outages.

Disadvantages:

Complex control method to track the voltage levels for all of the capacitors. Also,
pre-charging all of the capacitors to the same voltage level and startup are
complicated.

Poor switching utilization and low efficiency in short duration outages.

Compared to the clamping diodes in diode-clamped multilevel inverters, the large


numbers of capacitors are more expensive, and also more bulky. Then, for a
higher number of levels, compared to diode-clamped multilevel inverters,
packaging is more difficult.

13

C) Cascaded H-bridges inverters


For a cascade multilevel inverter, separate dc sources are utilized by multiple full Hbridge to generate a staircase waveform for output voltage. Each inverter level can
generate three different voltage outputs, +Vdc, 0, and Vdc by different combinations of
the four switches, S1, S2, S3, and S4. To obtain +Vdc, switches S1 and S4 are turned on,
whereas Vdc can be obtained by turning on switches S2 and S3. By turning on S1 and S2 or
S3 and S4, the output voltage is 0.
Then, the ac outputs of each of the different full-bridge inverter levels are connected in a
series to synthesize the staircase waveform for the output voltage of the multilevel
inverter. For m number of a full bridge inverter, the number of levels for output phase
voltage in a cascade inverter equals k = 2m+1. The staircase waveform phase voltage for
nine level inverters is shown in Figure 1.7.
Cascaded multilevel cascaded inverters have been studied in different applications, such
as reactive power compensation, power generation based on renewable energy sources,
and for dc sources approaches like battery. Three single phase cascaded inverters can be
connected in wye, or in delta connection for the three phase approaches.
Another application for cascaded multilevel can be the main traction drive in electric
vehicles, where ultra-capacitors or several batteries are utilized as separate dc sources.
For electric vehicles, this circuit can be utilized as a rectifier/charger for the batteries
while the vehicle was connected to an AC supply. Furthermore, the cascade multilevel
inverters can be implemented as a rectifier for regenerative braking in vehicles.

14

Vdc 4

Vo4

Vdc3

Vo3

Vdc2

Vo2

Vo1
Vdc1

Figure 1.7. Cascaded multilevel inverters.

The main advantages and disadvantages of cascaded multilevel inverters are


summarized as follows:
Advantages:

The high number of phase output voltage levels based on the dc sources (k =
2m + 1).

A convenient and economical manufacturing process for the multilevel


inverters by using the series of H-bridges.
15

Disadvantages:

Separate dc sources are required for each of the H-bridges that limit the
applications of the circuit based on the available sources.

For three phase application, each phase can be provided with single phase cascaded
multilevel inverter. The other circuit topology for three phase applications is three-pulse
multilevel inverter. Three-pulse multilevel inverters can be implemented by using
transformers and standard three-phase inverter [41], [42]. This topology is shown in
Figure 1.8. In this circuit the transformers are utilized to add a different voltage. To
provide different phase shifts for the three phase rectifiers, 18-pulse poly-phase
transformers which use zig-zag topology can be utilized. The circuit constructions for
zig-zag transformers are shown in Figure 1.9 for more details. It should be notified that,
in zig-zag transformer, the phase shift in the secondary side, , can be adjusted based
on the ratio between the two coils in the secondary [43].

16

3-phase medium
voltage utility

18-pulse 3-phase rectifier/inverter


polyphase
ASD modules
transformer
A1

20

Vdc

C1

B
C

A2

b2

A3
B3

20

c2

a3

b3

Vdc

C3

a2

Vdc

C2

c1

B2

c3

Figure 1.8. Three-pulse multilevel inverters.

C2

A1

B2

B1
C1

A2
C2

a
Vca

A1

Vab

Vbc

Medium voltage
ASD

a1
b1

B1

Output
transformers

B2

C1

B1
A2

Figure 1.9 Circuit configuration for zig-zag transformer.


17

As shown in Figure 1.10, to synchronize and add the voltages for each inverter, the
input voltages should have 120 phase shift. In this case, for three phase a, b, and c, the
staircase waveform for output voltage can be achieved by: Vab = Va1-b1+Vb1-a2+Va2-b2.
Therefore, if these voltages are in the same phase, the total output voltage can be
increased up to three times of each line voltage.

aa
c1

b1

a3

c3

a2

c2

b3

b2

Figure 1.10. Phase diagram for three phase cascaded multilevel inverters.

In hexagram multilevel inverters, the same idea is utilized with a 60 phase shift for six
phase applications [44], [45]. The circuit is shown in Figure 1. 11.

By using the

transformer for the cascaded multilevel inverters, the number of components and for the
circuits will be decrease significantly, and identical inverters can be utilized. Therefore,
the circuit will be much cheaper with a smaller size and easier control.

18

a1

C1

'

b6

o6

o1

b1

C C5

'

b5
b4

o4

a4

C B

o2

b2

C6

a6 a
5
o5

a1
C2

'

C1

o6

b6

a2 a
3

a6 a
5

o3

o5

C3
C4

b3 B

C C5

o1

b1

o2

b2

C6

C'

C2

a2 a
3
b5
b4

o4

C3
C4

o3

b3 B

a4

'

A'

Figure 1. 11. Circuit topology for hexagram multilevel inverters.

D) Other Multilevel Inverter Structures


There are other kinds of multilevel inverters that have been proposed in different
projects; however, most of these circuits are hybrid topologies that are combinations of
the basic multilevel inverters, or slight variations to them. These topologies are
summarized as discussed in the following sections:

D. 1. Generalized Multilevel Inverter Topology


Both diode-clamped and flying capacitor multilevel inverters can be described by
generalized multilevel topology.

Based on this circuit construction, the generalized

multilevel inverter can balance each voltage level by itself regardless of load
characteristics, and active or reactive power conversion can be had without any additional
circuits at any number of levels automatically. Therefore, the topology provides a
19

6V

complete multilevel topology that embraces the existing multilevel converters in


principle.
Figure 1. 12 shows the P2 multilevel inverter structure per phase leg. By using this
generalized circuit topology, any inverter with any number of levels can be provided,
including the conventional two-level inverter. Several new multilevel inverter structures
can be derived from this generalized multilevel inverter topology [46-58].

Vdc

Vdc

Vdc

Vdc

Vo

Vdc

Vdc
Vdc

Vdc

Vdc

Vdc

Vdc

Basic P2 Cell
Figure 1. 12. Generalized multilevel inverter topology.
20

D. 2. Mixed-Level Hybrid Multilevel Inverter


To reduce the number of separated dc sources for high power applications, in cascaded
multilevel inverters, the full bridge inverters can be replaced by multilevel diode-clamped
or flying capacitor inverters [59], [60].
The nine-level cascaded inverter requires four separate dc sources for a one-phase leg
and twelve for a three-phase inverter. If a three-level inverter replaces the full-bridge cell,
the voltage level is effectively doubled for each cell. Therefore, to achieve the same ninevoltage levels for each phase, only two separate dc sources are required for a one-phase
leg and six for a three-phase inverter. This circuit topology can be considered as having
mixed-level hybrid multilevel cells because it includes multilevel cells as the building
block of the cascaded inverter. The drawback for the topology is its complicated control,
due to its hybrid structure.

D. 3. Soft-Switched Multilevel Inverter


Several soft switching methods have been proposed to reduce the switching loss and to
increase efficiency in multilevel inverters. For the cascaded topology, since each inverter
cell is an H-bridge circuit, the conventional soft switching methods for two-level circuit
can be utilized here. For diode clamped or flying capacitor inverters, different circuits
and combinations have been proposed for soft switching. Although a zero current
switching method can be applied, most methods proposed zero voltage switching
solutions including a coupled inductor with zero voltage transition (ZVT), an auxiliary
resonant commutated pole (ARCP), and their combinations. An example of combining

21

the ARCP and coupled-inductor ZVT techniques for a flying capacitor three level
inverter is shown in Figure 1. 13.
For soft switching, the auxiliary switches S3 , S4 , D3 , and D4 , are used to assist the inner
main switches S1 and S 2 . With using Lr 2 as the coupled inductor, the bridge-type circuit
formed by S3 , S4 , Sa 2 and S a 3 provides a two-level coupled-inductor ZVT. For the outer
main switches, the soft switching is provided with split-capacitor C2 , coupled inductor

Lr1 , Sa1 , Sa 4 , S1 , S2 , D1 , and D2 to form an ARCP type soft-switching inverter [61].

C1

Lr 1

S1

S3

D1

Vdc

D3

Sa1

Cr

Lr 2 Sa2

Cr

Sa3

Cr

Sa4

Cr

C2
S2

D2

S4

C1

D4

0
Figure 1. 13. Three level soft-switched inverter.

1.3.2. Selective Harmonics Elimination in Multilevel Inverters


Two major approaches have been proposed to eliminate low frequency harmonics [6275]:

22

1- Increasing the switching frequency in sinusoidal-triangular Pulse Width Modulation


(PWM) and space vector PWM for two level inverters or adopting phase shift in
multicarrier based PWM for multilevel inverters;
2- Optimizing switching angles for selected harmonics elimination (SHE).
For medium and high voltage/power applications, the first approach and the number of
switching angles are limited by switching loss, and usually are used when the available
voltage steps are limited.
Selected harmonics elimination based methods have been proposed for both two-level
and multilevel inverters.

This section is focusing on the SHE based methods for

multilevel inverters. Ideally, in the multilevel inverters, for every voltage level, there
could be multiple switching angles. The number of eliminated harmonics is decided by
the number of voltage steps and number of switching angles in each voltage step.
However, because of the complexity of the problem, most studies proposed so far are for
one switching angle per one voltage level, as shown in Figure 1. 14. This also means that
the switching frequency in these methods can be as low as the fundamental frequency.

NVdc

2
13...N

3Vdc
2Vdc 1V
dc

Figure 1. 14. Staircase waveform in multilevel inverters.


23

In this case, the Fourier series expansion of the staircase waveform can be expressed as:

V (t )

4Vdc
(cos(m1 ) ... cos(m N )) sin(mt )
m1, 3, 5,... m

(1-3)

where N is the number of switching angels and m is the harmonic order. Based on (1-3),
traditionally, the following polynomial equation group can be formed to calculate the
switching angles in order to realize the selected harmonics elimination for the multilevel
inverter:

4Vdc
(cos(1 ) cos( 2 ) cos( 3 ) cos( 4 ) cos( 5 ) ... cos( N )) VF

cos(51 ) cos(5 2 ) cos(5 3 ) cos(5 4 ) cos(5 5 ) ... cos(5 N ) 0


cos(7 ) cos(7 ) cos(7 ) cos(7 ) cos(7 ) ... cos(7 ) 0
1
2
3
4
5
N

cos(111 ) cos(11 2 ) cos(11 3 ) cos(11 4 ) cos(11 5 ) ... cos(11 N ) 0

...
cos(m ) cos(m ) cos(m ) cos(m ) cos(m ) ... cos(m ) 0
1
2
3
4
5
N

(1-4)

In this equation group, the first equation guarantees the desired fundamental component,

VF . The other equations are utilized to ensure the elimination of 5th, 7th, 11th, and mth
harmonics. It is clear that with N switching angles, N-1 selected harmonics can be
eliminated. The SHE methods proposed in essentially are methods try to solve the
equation group (1-4) with different approaches. However, due to the nature of high order
polynomial equation groups, there are also several disadvantages of these kinds of
methods: The characteristics of these methods for harmonics elimination are summarized
as follows [76-92]:

24

Advantages:
Ideally, by solving these polynomial equations, the selected harmonic components
can be eliminated very precisely.
Disadvantage:
One of the main difficulties of applying most of these methods in real engineering
practice is that when the number of dc levels increase, the number of polynomial
equations, the number of variables, and the order of the equations will all increase
accordingly.

Thus, finding solutions to these equations would become extremely

difficult, time consuming, and often involve advanced mathematical algorithms, which
make the calculation easy to reach the capability limits of existing computer algebraic
software tools.
Though advanced methods such as symmetric polynomials, resultant theory combined
method and generic algorithm-based methods can greatly reduce the calculation time,
these methods are difficult to be adopted by field engineers, because of the need for preunderstanding of advanced control and mathematic theories. Although several methods
have been proposed to solve the SHE problem in multilevel inverters, a simple and
practical method is still needed.

1.3.3. Fast and Practical method for SHE Based on Equal Area
Criteria
This method tries to solve the harmonics elimination problems from a totally different
angle of approach.

No high-order multi-variable polynomial equations would be


25

involved in this method. To better illustrate the method, two well-known examples of
switching angle calculation and harmonics compensation are first introduced as following
[93]:
1) The equal area criteria for switching angle calculation:
For a simple equation group based on Fouriers series, a Newton-Raphson iteration can
be used to achieve numerical solutions. For the Newton-Raphson based iteration, the
initial values are very crucial to the final results. One natural way to find good initial
switching angles is through an equal area criterion. The basic idea of equal area criteria
is shown in the circled area of Figure 1. 15. The initial switching angle,

k , can be

found by solving:

S1 S2

(1-5)

Where S1 and S 2 are the areas of the shadowed parts. By the nature of the equal area
criteria, the fundamental voltage component of the stair case waveform, resulted from the
switching angles, would resemble the sinusoidal modulation waveform. However, with
equal area criteria alone, no harmonics elimination can be realized. How to utilize the
initial values from equal area criteria to find the optimized angles without solving the
high order multi-variable polynomials is the question that this method tries to answer.
But before reaching the final answer, a harmonics elimination method used in utility
application is first introduced as following.

26

NVdc

S1

k 1

k
S2

k 1 k

3Vdc
2Vdc 1V
dc

1 3...N

Figure 1. 15. The diagram showing the idea for equal area criteria.

2) Harmonics Injection in Active Power Filters:


In the power distribution system, Active Power Filters (APFs) are used to eliminate
voltage/current harmonics in utility power lines. To eliminate harmonics that already
existing in the utility power lines, APF will inject new harmonic voltages or currents to
the lines. The injected harmonics would have the same amplitudes but opposite phase
angles of the aimed harmonics. Thus, the harmonics in the utility line could be cancelled.
The key idea of APF is count-harmonics injection. By combining equal area criteria and
the idea of harmonics injection together, a new method to find optimum switching angles
can be found.

A. Selective Harmonics Elimination Based on Equal Area Criteria


This method indeed is a combination of equal area criteria and harmonics injection in the
modulation waveform. The basic idea behind this method is described as the following:

27

1) by using equal area criteria, a pure sinusoidal modulation waveform, h1 v sin t ,


will result in a set of switching angles 1 N ;
2) the staircase waveform formed by 1 N will have the fundamental component,

h1' , and harmonics content h3,h5 , h7 hm , the fundamental component, h1' ,


will resemble the sinusoidal modulation waveform, h1 ;
3) thus, if take ( h1 h5 h7 hm ) as the modulation waveform, by using equal area
criteria, the selected harmonics content in the resulted staircase waveform would be
around h5 h7 hm h5' h7' hm' , where h5 h7 hm is resulted from h1 ,
'
'
'
and h5 h7 hm is resulted from h5 h7 hm ; again, because of the nature of
'
'
'
the equal area criteria, h5 h7 hm would follow h5 h7 hm very closely, the

harmonics elimination is partially realized;


4) if the same process in 2)-3) is repeated, the harmonics elimination can finally be
realized.
To implement this idea, the following five steps need to be followed.
1) first, based on equal area criteria, find the initial switching angles ( 1 N ) for a
given modulation waveform, h1 , at a certain modulation index;
2) then find the non-third harmonics content (

h5 , h7 hm ) of the staircase

waveform formed with switching angles, 1 N ;

28

3) subtract the harmonics content, h5 , h7 hm , from the original modulation


waveform

h to form a new modulation waveform, h h5 h7 hm ; for the first

iteration, h h1 ;
4) based on the equal area criteria, use the new non-sinusoidal modulation waveform to
calculate a new set of ( 1 N );
5) repeat steps 2-4 until the best switching angles are achieved, which would result in
full elimination of selected harmonics content.
In step 1, the modulation waveform is pure sinusoidal; after step 3, the harmonics are
already injected; the modulation waveform would never be sinusoidal again. More
iterations cause more harmonics in the modulation waveform.

Though the final

modulation waveform has large injected harmonics content, the stair case waveform
formed by the final switching angles would have almost no selected harmonics.

B. The Four Equations


To perform the five steps previously listed, only four equations need to be calculated:
Equation 1: to use the equal area criteria, k , the junction point of the modulation
waveform and voltage level k must first be found. For a modulation waveform with
harmonics contents, it is difficult to find a symbolic solution for k , but a numeric value
can easily be found by doing simple Newton-Raphson based iterations of the following
equation:
29

k arctg (

k Vdc h5 sin(5 k ) hm sin(m k )


)
VF cos( k )

(1-6)

Equation 2: after k s are found, the switching angle, k , can easily be calculated from:

k k k (k 1) k 1 V F (cos( k ) cos( k 1 )

(1-7)

h5
(cos(5 k ) cos(5 k 1 )))
5
h
m (cos(m k ) cos(m k 1 ))
m

where m is the order of the harmonic.


Equation 3: with a new set of k , the new harmonics contents can be found as:
N

hm

2
(cos( m k ) cos( m( k )))
(
2
k

1
)

k 1, 2, N

(1-8)

Equation 4: to perform iterations of step 2)-4) mentioned in this section, the modulation
waveform would have a general expression as:

VF sin(t ) h5 _ s sin(5t ) hm _ s sin(mt )

(1-9)

Where hm _ s is the sum of the hm found after each iteration:


iter

hm _ s

m
i 1, 2,3iter

The modulation index for staircase waveform in a multilevel inverter is defined as:

30

(1-10)

VF

MI

(1-11)

N Vdc

Where N is the maximum number of DC level which is used to generate the staircase
waveform and can be changed based on the magnitude of DC levels and the reference
waveform. It should be noted that for different numbers of switching angles, the four
equations will remain the same. Since no multi-variable polynomial equation is involved
in this method, the calculation time has a near linear relationship with the number of the
switching angles. No sudden increase in calculation time is expected when there is a
small change in the number of the switching angles. The general diagram of the fourequation-based method is shown in Figure 1. 16.

Switching angle calculations


with Equation 1 and 2
Desired
Fundamental
Component

New modulation
waveform synthesizing
with Equation 4

Harmonics calculation
with Equation 3

Figure 1. 16. The four-equation based method.

The advantages of four equations based method compared with a polynomial equations
solution can be summarized as follows:

The complexity of the four equations for different number of switching angles

will be the same. Therefore, the switching angles can be calculated easily without using

31

advanced mathematical methods or numerical solution such as used in polynomial


methods.

For a higher number of switching angles in multilevel inverters, the number of

first ordered equations that should be solved in polynomial methods, will be increased
nonlinearly. However, this increase is linear for the four-equation based method, resulting
in fewer numbers of first ordered equations. Therefore, the four-equation based method
can be implemented faster with an easy control algorithm. Thern, this method is a very
good candidate for an online SHE in multilevel inverter.
More specifications and the characteristics of the four-equation method are elaborated
and explained in details in the next chapter.

1.4. Summary and Conclusion


In medium and high voltage applications, the implementation of high frequency Pulse
Width Modulation (PWM) based two-level inverters is limited due to voltage and current
ratings of switching devices, switching losses, and electromagnetic interferences caused
by high dv/dt.

Thus, to overcome these limitations, multilevel inverters have been

proposed for applications such as medium voltage drives, renewable energy interfaces,
and flexible ac transmission devices (FACTs). Several circuit topologies for multilevel
inverters have been introduced in this chapter. The main circuit topologies for multilevel
inverters can be summarized as follows:

Diode clamped inverters;

Flying capacitors inverters;

Cascaded H-bridges inverters.


32

A typical multilevel inverter utilizes voltage levels from multiple dc sources. These dc
sources can be isolated as in cascaded multilevel structures or interconnected as in diode
clamped structures.

In most published multilevel inverter circuit topologies, the dc

sources in the circuits needs to be maintained to supply identical voltage levels. Based on
these identical voltage levels and proper control of the switching angles of the switches,
the output voltage can be synthesized in a staircase waveform. For low frequency
harmonics elimination in medium and high power applications, PWM methods are
limited by switching loss and are usually used when the available voltage steps are
limited. Therefore, SHE methods can be utilized.
Most of the proposed methods use the group of polynomial equations for SHE based on
Fouriers series. However, when the number of dc levels increase, the number of
polynomial equations, the number of variables, and the order of the equations will all
increase accordingly.

Thus, finding solutions to these equations would become

extremely difficult and often involve advanced mathematical algorithms, which make the
calculation easy to reach capability limits of existing computer algebraic software tools.
In a four-equation based method, equal area criteria and harmonics injection are utilized
for SHE in multilevel inverters. Then, compared with other methods that normally use
the polynomial equations, solving high order nonlinear equations is no longer needed.
In the next chapter, the problems of the direct implementation of four equations based
method are analyzed. Then, solutions are proposed accordingly to enable the good
performance of the method at a wide range of modulation indices.

33

CHAPTER. 2

MODIFICATION AND IMPROVEMENT IN THE FOUREQUATION BASED METHOD


In this chapter, the characteristics of the four-equations method are studied by direct
implementation. Then, the problems of the basic four-equations method are analyzed, and
the solutions are proposed accordingly to improve the performance of the method.
Finally, the proposed modified method is analyzed for the wide range of modulation
indices.

2.1. The Characteristics of a Basic Four Equations Method for Multilevel Inverters
Initially, to prove the concept, this method has been used to calculate the switching
angles for the case shown in Figure 2.1. In the calculations, five harmonics are chosen
for elimination. After approximately 100 times of iterations, the values of 5th, 7th, 11th,
13th, and 17th harmonics drop under 106 p.u, which means these harmonics are
effectively eliminated. The number of eliminated harmonics is five and equal to the
number of switching angles. Please note that with other methods proposed so far, to
eliminate five harmonics with a total of five switching angles, the result in a fundamental
component would be far from the desired value.
34

4
2

5Vdc
4Vdc 3V
dc
2Vdc 1V

dc

1 3 5

Figure 2.1. Different switching angles in multilevel inverters.

With the proposed method, because the equal area criteria are used all the time, the
resulted fundamental component is still close to the desired value.

For a desktop

computer with a 2.8 GHz CPU, the calculation time of one modulation index is less than
1 second. Table 2.1 shows the switching angle examples for a modulation index at 0.85
and 0.86. The modulation index is defined as:

MI

VF
4

(2-1)

5 Vdc

where VF is the peak value of the fundamental component. To identify possible problems
with the basic four-equation based method, the method was tested with five switching
angles with the modulation index sweeping from 0.16 to 0.94.

Table 2.1: Switching angles examples.

Angles
MI=0.85
(rad)
MI=0.86

3
5
4
0.11466 0.25769 0.41205 0.6465 1.0134
0.11465 0.2577 0.41202 0.64646 1.0134

35

2.1.1. Main Problem in the Basic Four Equations Method


The main problem identified from this process is the amplitude difference between the
desired and resulted fundamental component in the output voltage. With the direct
implementation of the proposed method, the fundamental voltage of the staircase
waveform often diverts from the desired value. The reason is that, for most cases, it is
difficult to find a good solution for the switching angle for the top dc level to satisfy the
equal area criteria. For the last switching angles based on the top cross section point, the
magnitude of the reference voltage is more than the summation of dc levels. Therefore,
the area of reference voltage above the last dc level cannot be compensated effectively.
Thus, the magnitude of fundamental voltage that is generated by multilevel inverters is
less than that of the reference voltage. Table 2.2 shows some sample points of the
switching angles, at different modulation indices. In Table 2.3, the selected harmonics
magnitudes for those switching angles are explained in detail.
Based on the results, the difference between the desired and resulted modulation indices
can be identified. It was observed that when the sweeping modulation index is from 0.16
to 0.94, for the five switching angle based waveform, the change of resulted modulation
index is not continuous but more as in a staircase.
When the selected harmonics are injected to the reference waveform, multiple cross
section points can be detected on a quarter for each dc level. Then, multiple solutions of

k for one dc level were originally expected to be another major problem of the fourequation based method.

However, studies show that the equal area criteria can

automatically settle on the middle cross point, which is the best selection of k . Then, by

36

decreasing the selected harmonics in the output voltage, the modification on the reference
voltage will be decreased accordingly.
Table 2.2 Sample points based on the basic method.
Reference
MI

Resulted
MI

0.92
0.88
0.84
0.80
0.76

0.8408
0.7923
0.7818
0.7715
0.7251

Switching Angles (rad.)

0.1147
0.1433
0.1434
0.1435
0.0815

0.2577
0.3398
0.3406
0.3411
0.4256

0.4121
0.5275
0.5283
0.5289
0.6818

0.6465
0.8417
0.8433
0.8443
0.8583

1.0134
1.1057
1.1062
1.1065
N/A

Table 2.3. The selected harmonics magnitudes with the basic method.
Reference
MI

Resulted
MI

0.92
0.88
0.84
0.80
0.76

0.8408
0.7923
0.7818
0.7715
0.7251

th

Harmonics (%)
7 11th
13th

0
0
0
0
0

th

0
0
0
0
0

0
0
0
0
0

17th

0
0. 584
0
0.4239
0
0.5128
0
0.7062
0.4847 N/A

5.5. PI Controller based Fundamental Voltage Correction


To solve the difference between desired and resulted modulation indices, the first
attempt is to add a simple PI controller to adjust the fundamental component. Therefore,
based on the fundamental voltage in the output, the reference voltage can be increased
and modified for the desired value. With this approach, the modulation waveform of this
modified method can be expressed as:

Vref (VF h1s ) ( K p


37

KI
) hms sin(mt )
S

(2-2)

Where, K p and K I are the coefficients for the PI controller that is applied to the
reference waveform. The overall diagram of the modified method is shown in Figure 2.2.
The added process is shown in a dotted line. Although the difference between desired
and resulted fundamental output is decreased with the PI controller in place, there is still
a slight difference between resulted and desired modulation index for most cases. Also,
since the PI controller is used only for fundamental compensation; the cross section
points for the reference waveform are changed resulting in different switching angles and
harmonics magnitude. Therefore, the performance of harmonics elimination will be
undesirable, especially at high modulation index points. These switching angles and the
resulted harmonics can be seen in Table 2. 4, and Table 2. 5 accordingly. Based on the
results, using alternative solutions for SHE is essential. In the next section, the final
solution is studied and validated.

Desired fundamental
component

Switching angle calculations


with Equation 1 and 2

Harmonics calculation
with Equation 3

PI

New modulation
waveform synthesizing
with Equation 4

Calculated fundamental from the resulted switching angles

Figure. 2. 2. Modified method with PI controller to adjust the fundamental value.


Table. 2.4. Sample points for modified method with PI controller.
Reference
MI

Resulted
MI

0.92
0.88
0.84
0.80
0.76

0.9112
0.8467
0.8308
0.7931
0.7351

1
0.1794
0.1043
0.1146
0.1399
0.0005

Switching Angles (rad.)


3
2
4
0.2567 0.315 0.4993
0.2647 0.394 0.6277
0.2577 0.4119 0.6464
0.3182 0.5149 0.802
0.2402 0.4088 0.6905
38

5
0.7304
0.9994
1.0133
1.0932
N/A

Table. 2.5. Harmonics magnitudes for modified method with PI controller.


Reference
MI

Resulted
MI

0.92
0.88
0.84
0.80
0.76

0.9112
0.8467
0.8308
0.7931
0.7351

th

5
0.3976
0.0179
0.0008
0.3026
0.0062

Harmonics (%)
7
11th
13th
0.285 0.0085 0.613
0.0554 0.25 0.4643
0.0019 0.0019 0.0038
0.1336 0.1316 0.7332
0.0723 0.5558 0.7025
th

17th
0.4304
0.1339
0.0017
0.6585
N/A

2.3. Final Solutions for the Problems in the Four-equation Method


In the final solutions, the PI controller is no longer used in the iterations. Instead,
either an additional voltage level or an additional adjustment of the switching angle at the
highest voltage level is used depending on whether an extra voltage level is available at
the defined modulation index. To solve the above-mentioned problem, modulation
indices are categorized in two groups, one for low modulation indices at which an extra
dc level is available, and the other for high modulation indices, where no extra voltage
level is available.

1) Harmonics Elimination with Extra Voltage Level:


In multilevel inverters, when the desired modulation index becomes smaller, fewer dc
levels will be used to synthesize the staircase waveform. Thus, extra dc level would be
available in a multilevel inverter. This idea is shown in Figure 2. 3.

39

(m 1)Vdc

mVdc

Low Modulation Index


Figure 2. 3. Additional dc level for low modulation index.

In this case, with the four-equation method, at the fundamental frequency, the
difference between the desired voltage and the generated voltage will become larger. But
since an extra voltage level is available, it can be utilized to realize the fundamental
voltage compensation.

Based on this idea, the same five steps in the four-equation

method would be used.

The difference is that an extra switching angle would be

calculated for an extra voltage level to achieve the desired fundamental voltage.
However, the extra voltage level will cause additional harmonics. Thus in this method,
the additional harmonics content generated by the extra voltage level would be added to
the overall reference waveform, which is used to calculate the switching angles for all the
other voltage levels. This means that the extra harmonics generated in the additional
voltage level would be compensated by the switching angles for all the other voltage
levels. This modified method is illustrated in the in Figure 2. 4. The additional process is
shown in the dotted line.

40

Calculate the
additional m +1
switching angle

Switching angle calculations


with Equation 1 and 2

Calculate the selected


harmonics in the
additional voltage level

Desired fundamental
component

New modulation
waveform synthesizing
with Equation 4

Harmonics calculation
with Equation 3

Calculated fundamental from the resulted m switching angles

Figure 2. 4. Modified method with additional switching angle.

As shown in figure 2. 5, the following is a detailed procedure on the calculation of the


additional m+1 switching angle for the fundamental compensation:
a) First, the total fundamental voltage based on switching angles from 1 to m is
calculated with the following equation:
m

V1m

i 1

4Vdc

cos( i ),

m N

(2-3)

b) Then, the switching angle of the additional voltage level is calculated based on the
difference between the desired fundamental, VF , and the resulted fundamental
voltage, V1m , with the following equation:

m1 a cos(

4Vdc

(VF V1m ))

Figure. 2. 5. Additional switching angle in low modulation indices.


41

(2-4)

In Table 2. 6, the switching angles for different modulation indices are explained in
details. In these cases, the extra dc level has been just used for the fundamental voltage
compensation. Then, the number of harmonics for elimination is one less than the
numbers of switching angles as shown in Table 2. 7. In general, m+1 switching angles
are utilized to achieve the desired fundamental voltage and eliminate m harmonics.
Table 2. 6. The switching angles for different modulation indices.
Reference
MI

0.76
0.60
0.46
0.20

Resulted

Switching Angles (rad.)

MI

0.76
0.60
0.46
0.20

0.1878
0.1971
0.2175
0.3889

0.3618 0.5922 0.9231 1.091


0.4689 0.8051 1.1216 N/A
0.5954 1.0522 N/A
N/A
1.4961 N/A
N/A
N/A

Table 2. 7. Harmonics magnitude for different modulation indices.


Reference

Resulted

MI

MI

5th

0.76
0.60
0.46
0.20

0.76
0.60
0.46
0.20

0
0
0
0

Harmonics (%)
7th
11th
13th
0
0
0
N/A

0
0
N/A
N/A

0
N/A
N/A
N/A

17th
N/A
N/A
N/A
N/A

2) Harmonics Elimination with No Extra Voltage Levels:


For larger modulation indices, where all dc levels are already used for a staircase
generation, there is no additional voltage level for fundamental voltage compensation.
This idea is shown in Figure 2. 6.

42

NVdc

High Modulation Index


Figure 2. 6. Available dc level for high modulation indices.

Therefore, in this proposed method, the switching angle of the last dc level will be
adjusted to achieve the desired fundamental voltage. The adjustment of the switching
angle is shown in Figure 2. 7. This idea can be calculated by the following equation:

N* a cos(

4Vdc

(VF V1N ))

where V1N is the total fundamental voltage generated by switching angles from

N .

(2-5)

to

This adjustment angle is used to modify the switching angle for the last voltage

level:

N (mod ified ) a cos(cos( N ) cos( N* ))

Figure 2. 7. The adjustment switching angle in high modulation indices.


43

(2-6)

Therefore, based on the switching angle adjustment for the last dc level, the desired
voltage magnitude in the fundamental frequency can be achieved. However, if not
compensated, the adjustment switching angle would also bring in the additional
harmonics in the resulted staircase waveform. So, the selected harmonics caused by the
adjustment angle would also need to be calculated and added to the final modulation
waveform for better performance. The total process of this modified method is illustrated
in Figure 2. 8.

++

Calculate the
adjustment
switching angle

Switching angle calculations


with Equation 1 and 2

Calculate the selected


harmonics caused by
the adjustment angle

Desired fundamental
component

Calculated fundamental

New modulation
waveform synthesizing
with Equation 4

Harmonics calculation
with Equation3

Figure. 2.8. Modified method with adjustment switching angle for the highest voltage level.

In Table 2. 8, the switching angles for high modulation index with no extra dc level are
listed. For this case, since the last switching angle is used to achieve the fundamental
voltage, also to eliminate the selected harmonics, the resulted harmonics is greater than
cases with the low modulation indices and extra dc level. However, as shown in Table 2.
9, these harmonics are still very small compared to the fundamental voltage.
Based on the sample points, the proposed solutions have been tested for low and high
modulation indices sweeping from 0.2 to 0.9 for the six-level staircase waveforms. For
44

the entire tested modulation index, the resulted modulation index had followed the
desired value very well. Thus, the selected harmonics elimination can be close to 100%
except at modulation indices higher than 0.9.
Table 2.8 Sample points for six level waveform with the modified four-equation method.
Reference
MI

0.90
0.76
0.60
0.46
0.20

Resulted

Switching Angles (rad.)

MI

0.90
0.76
0.60
0.46
0.20

0.0641
0.1878
0.1971
0.2175
0.3889

0.1984
0.3618
0.4689
0.5954
1.4961

0.3395 0.7714 0.5319


0.5922 0.9231 1.091
0.8051 1.1216 N/A
1.0522 N/A
N/A
N/A
N/A
N/A

Table 2. 9. The harmonics magnitude results for the modified four-equation method.
Reference
MI

Resulted
MI

0.90
0.76
0.60
0.46
0.20

0.90
0.76
0.60
0.46
0.20

th

Harmonics (%)
7
11th
13th
th

17th

0.069 0.0291 0.0375 0.0474 0.0215


0
0
0
0
N/A
0
0
0
N/A
N/A
0
0
N/A
N/A
N/A
0
N/A
N/A
N/A
N/A

The overall optimized switching angles based on the proposed method for six-level
waveform is shown in Figure 2. 9. The results show that the proposed solution in both
conditions work well in terms of achieving the desired fundamental voltage and
harmonics elimination. It is noticeable that with the modification of the switching angle
of the highest voltage level,

sometimes becomes smaller than other switching angles.

It may looks strange, but this will not cause any problem. In the real inverter, the final
voltage is the summation of the voltage from all the dc sources. Therefore, instead of
45

getting the waveform shown in Figure 2. 10 (a), the output voltage of the inverter would
always looks like the waveform in Figure 2. 10 (b).
Based on the modulation index definition, when the modulation index is less than 0.2,
the reference voltage is below the first dc voltage level and there is no cross point
between the dc level and reference voltage. Therefore, the first switching angle can be
used just to generate reference voltage, and no harmonic elimination can be realized. For
modulation indices larger than 0.9, the reference voltage is much higher than the last dc
level. Thus, the modification of the last switching angle is not efficient enough to
achieve the fundamental voltage and the harmonics elimination. It should be notified that
all the SHE methods for multilevel inverters are facing the similar limitations at very low
and very high modulation indices.

Different levels Switching Angles (radian)

/2

/3

/6

0.2

Different levels Switching Angles v.s Modulation Indexes

0.3

0.4

0.5
0.6
0.7
0.8
Modulation Indexes (MI)

0.9

Figure. 2.9. Optimized switching angles of the proposed method.

46

(a)

(b)

Figure. 2. 10. Explanation of the top switching angle.

In the next step, to improve the performance of the proposed method and also extent its
capability and applications, SHE in cascaded multilevel inverters is studied for
unbalanced dc sources. Then, a case study is used to verify the accuracy of the modified
method.

2.4. SHE for Multilevel Inverters with Unbalanced DC Inputs


In most published multilevel inverter circuit topologies, the dc sources in the circuits
need to be maintained to supply identical voltage levels. However, for a real applied
circuit, the dc inputs are supplied by different sources and probably are provided in
different magnitudes. Therefore, a more generic solution for SHE should be considered.
Multilevel inverters with an unbalanced dc source can be utilized in different
applications. In Figure 2. 11, a row of plug-in hybrid electric vehicle (PHEV) battery
cells is shown as a possible approach for the proposed method. Thus, to improve the
flexibility and redundancy on battery packing for hybrid electric vehicles, SHE methods

47

should be considered based on unbalanced dc sources. Thus, the generated voltage in


output will be controlled based on input imbalances.

Figure. 2.11. A row of plug-in hybrid electric vehicle (PHEV) battery cells (Photo courtesy of
Argonne National Laboratory).

One possible application of this study is cascade multilevel inverters for Photovoltaic
(PV).

For PV modules with different irradiations or temperatures, the dc voltage

magnitudes at maximum power point are close to each other. The typical variation is less
than 15%. Therefore, in this case study, the voltage differences between two dc sources
are chosen as 15%.
For SHE in multilevel inverters with unbalanced dc sources, as shown in Figure 2. 12,
the four equations based method should be modified. The following equations are similar
to the basic method; however for this condition, dc levels are different and independent
from each other:

48

Equation 1: Based on Newton-Raphson method, this equation is used to find numerical


solutions for the junction points of reference waveform and voltage level:
k

k arctan(

V
i 1

dc( i )

h5 sin(5 k )...hm sin(m k )


VF cos( k )

(2-7)

Equation 2: Based on the junction points, switching angles are calculated by this
equation:
k

k 1

i 1

i 1

k 1 / Vdc( k ) (Vdc(i ) k Vdc(i ) k 1 VF (cos( k ) cos( k 1 ))

(2-8)

h
h
5 (cos(5 k ) cos(5 k 1 ))... m (cos(m k ) cos(m k 1 )))
5
m

Equation 3: The equation is used to define harmonic components by switching angles for
different frequencies:

hm

k 1, 2,..,N

2Vdc( k )
m

(cos(m k ) cos(m( k )))

(2-9)

Equation 4: This equation is used to generate a new reference waveform:

Vref VF sin(t ) hms sin(mt )

(2-10)

Where, hms is the sum of hm calculated in every iteration:


iter

hms

m (i )

i 1, 2,...

49

(2-11)

To identify possible problems of this method for harmonic elimination, the group of
equations is applied to the six-level waveform with different dc magnitudes as shown in
Table. 2. 10, for the modulation index changing from 0.16 to 0.94. The modulation index

is found by:

VF

MI

Vdc ( i )

(2-12)

i1

where, V F is the reference ac voltage in the output, N is the number of dc levels, and

Vdc(i ) is the dc magnitude for each voltage level in multilevel inverter output waveform.

S1

S1=S2
S2
k1
k 1k

Vdc( K )
Vdc(1) Vdc( 2)

2
Vdc(1)

1 3k

Figure 2. 12 Equal area criteria in multilevel inverters with unbalanced dc levels.

Table. 2. 10: Five different dc levels for staircase waveform.

DC
Levels
P.U

V1
1

V2

V3

V4

V5

1.15 0.95 1.05 0.85

50

Similar to the circuit topology with identical dc sources, the main problem identified in
this process is the amplitude difference between the desired and resulted fundamental
voltages. With the direct implementation of the proposed method, the fundamental
voltage of the staircase waveform often diverts from the desired value, as shown in
Table 2. 11. The selected harmonics magnitude is described in Table 2. 12, based on the
same switching angles.

Table 2.11 Sample points from the direct implementation of the basic four-equation method.
Reference
MI

Resulted
MI

0.92
0.87
0.78
0.65
0.52

0.7878
0.7877
0.68
0.5075
0.5074

Switching Angles (rad.)

0.1238
0.1240
0.1503
0.1749
0.1750

0.3448
0.3450
0.3419
0.4731
0.4732

0.5465 0.8532 1.1308


0.5468 0.8535 1.1308
0.6173 1.0160 N/A
0.9804 N/A
N/A
0.9806 N/A
N/A

Table 2. 12. The selected harmonics magnitude for unbalanced DC sources.


Reference
MI

Resulted
MI

0.92
0.87
0.78
0.65
0.52

0.7878
0.7877
0.68
0.5075
0.5074

Harmonics (%)
st

th

7th

85.6259
90.5357
87.1772
78.0698
97.5810

0.0035
0.0035
0.0004
0.0010
0

0.0004
0.0008
0.0003
0.0030
0.0006

11th

13th

17th

0.0041 0.0119 0.0176


0.0043 0.0085 0.0086
0.0005 0.0030 N/A
0.0066 N/A
N/A
0.0007 N/A
N/A

In this case, to overcome the difference between the reference waveform and the
fundamental output voltage, the following equations can be used for low and high
modulation indices:

51

For low modulation indices with extra dc level, two equations are used to
calculate the additional switching angle:

1)

First, the fundamental voltage based on switching angles from

to m is

calculated with the following equation:


m

V1m
i 1

2)

4Vdc(i )

cos(i ),

m N

(2-13)

Then, an additional switching angle is calculated to compensate the difference

between V1m and fundamental voltage VF :

m 1 a cos(

4Vdc( m 1)

(VF V1m ))

(2-14)

For a high modulation index with no extra dc level, two equations are used to
adjust the last switching angle:

1) An adjustment switching angle is calculated to achieve fundamental voltage by the


following equation:

N* a cos(

4Vdc( N )

(VF V1N ))

where V1N is the total fundamental voltage generated by switching angles from

(2-15)

to

N .
2) This adjustment angle is used to modify the switching angle for the last voltage
level:
52

N (mod ified ) a cos(cos( N ) cos( N* ))

(2-16)

In Table 2. 13, some sample points are shown for low and high modulation indices in
the proposed modified method. As mentioned in Table 2. 14, harmonic components are
eliminated successfully and fundamental voltage is generated precisely.

Table 2. 13. Sample points based on the modified four-equation method.


Reference
MI

Resulted
MI

0.90
0.78
0.65
0.48
0.21

0.90
0.78
0.65
0.48
0.21

Switching Angles (rad.)

0.0729
0.1365
0.1683
0.1879
0.4886

0.1782
0.3538
0.4020
0.5898
1.4250

0.3897 0.7798 0.5011


0.5692 0.8767 1.1353
0.7310 1.0760 N/A
1.0630 N/A
N/A
N/A
N/A
N/A

Table 2. 14. Harmonics components for unbalanced multilevel inverters.


Reference
MI

Resulted
MI

0.90
0.78
0.65
0.48
0.21

0.90
0.78
0.65
0.48
0.21

st

1
100
100
100
100
100

Harmonics (%)
5
7th
11th
13th
17th
0.6232 0.9115 0.4412 0.2829 0.4752
0
0
0
0
N/A
0
0
0
N/A
N/A
0
0
N/A
N/A
N/A
0
N/A
N/A
N/A
N/A
th

In the next section, to verify this improvement for harmonic elimination, the multilevel
inverter with unbalanced dc levels is simulated in different case studies.

53

2.5. Real Time Verification


A real-time simulation platform has been used to analyze the proposed method with
case studies. With the help of this platform, a real-time model of cascaded multilevel
inverters with unbalanced dc sources is simulated to verify the accuracy and the
efficiency of the four-equations method for online SHE.

The real-time simulation platform that is utilized in this paper is shown in Figure 2. 13.
This platform is based on PC technology running on a Linux operating system and offers
an underlying test bed for the study of the distributed generations and smart grid. It
consists of four target machines with a total of six CPUs, 32 cores, four Fieldprogrammable Gate Array (FPGA) chips, and more than 500 analogue and digital
inputs/outputs. Dolphin PCI boards are used to provide an extremely high speed and low
latency real-time communication link among target machines.

54

Figure 2. 13 Real time simulation platform.

As shown in Figure 2. 14, the circuit topology of cascaded multilevel inverters with five
single phase H-bridges is simulated for SHE. For this analysis, different dc voltages are
used for the input of each inverter to show the advantages of the proposed modification
for unbalanced conditions.

55

DC Source 1

DC Source 2

I/O
Ports

Digital
Oscilloscope

.
.
.

DC Source 5

OPAL-RT
LAB

Figure 2. 14. The circuit topology of cascaded multilevel for real time simulation.

The output voltage for multilevel inverters is shown in Figure 2. 15. In this case, the
voltage THD for this voltage is less than 5% that verify the accuracy of the proposed
method. The harmonics distortion can also be defined by the rms value of the staircase
waveform without the fundamental component. However, in practice, the higher orders of
harmonics are not very effective on THD magnitude. The voltage spectrum for the
selected harmonics is shown in more detail in Figure 2. 16. The results are achieved from
the I/O ports of the platform in the oscilloscope.

56

5 mS/div

2 V/div

Figure 2. 15. The output simulated voltage for multilevel inverters.

Figure 2.16. The voltage spectrum for the selected harmonics.

For the case studies, Hardware In the Loop (HIL) can be utilized as a comprehensive
solution. HIL is a cost-effective and flexible technique to test complex real-time
embedded systems, when they cannot be controlled and implemented easily for their
dynamic behaviors. HIL provides an effective platform by adding the complexity of the
model under control to the test platform. The complexity of the plant under control is
57

included both in test and development by adding a mathematical representation of all


related dynamic systems. In Figure 2. 17, hardware in the loop diagram for multilevel
inverter is shown.
Matlab Simulink based Real Time
Simulation Model (OPAL-RT Lab)

Energy
Sources

Real time simulation models of


multilevel inverters and loads

Real controller boards


for the control and
protectionss

Figure 2. 17. Hardware in the loop diagram for multilevel inverter.


For unbalanced dc sources, two cases are studied for a low modulation index with an extra dc
level and a high modulation index without a dc level. For both cases, RL loads are utilized for
current analysis. As shown in figure 2. 18, the extra dc level has been used to compensate the
fundamental voltage. In this case, the THD on the current is less than 3%, which shows the
accuracy of the method.

58

10 mS/div

Single phase
voltage
5 V/div

Load
current

5 A/div

Figure 2. 18. Real time simulation results for multilevel inverters at low modulation index.

In Figure 2. 19, the output voltage and the current of multilevel inverters are illustrated for a
high modulation index without an extra dc level. Since the last dc level is used for fundamental
voltage compensation, the selected harmonics magnitude is increased. However, the magnitudes
of these harmonics are still very low. The current THD is less than 5% in this case.

59

10 mS/div
Single phase
voltage
5 V/div

Load
current

5 A/div

Figure 2. 19. Real time simulation results for multilevel inverters at high modulation index.

Based on these case studies, the proposed method can be used as precise and practical
solutions for SHE in multilevel inverters with different conditions. With more available
dc levels, additional switching can be used just for fundamental voltage compensation.
Compared with polynomial solutions, solving high order nonlinear equations is no longer
needed, thus advanced algorithms are also no longer required. As a result, this method
would be more suitable for cases with high numbers of switching angles or complex
scenarios such as multiple switching angles per voltage level in multilevel inverters. In
the next chapter the application of equal area criteria and harmonics injection is discussed
in optimal PWM methods.

60

2.6. Summary and Conclusion

Based on equal area criteria and harmonics injection, a simple four-equations based
method is proposed for selected harmonics elimination in multilevel inverters. The main
problem identified from this process is the amplitude difference between the desired and
resulted fundamental voltage. Using a PI controller for the reference voltage is not a
comprehensive solution for this problem. In the final solutions, the PI controller is no
longer used in the iterations. Instead, either an additional voltage level or an adjustment
of the switching angle at the highest voltage level is used, depending on whether an extra
voltage level is available at the defined modulation index. After this modification, the
case studies verified the accuracy and the performance of the proposed method to achieve
the fundamental voltage component.
The dc sources on multilevel inverters can be supplied by different sources and probably
are provided in different magnitudes. Thus, a more generic solution should be considered
for SHE, based on unbalanced dc sources. Then, the proposed equations are modified for
a more generic solution. The case studies with hardware in the loop verify the proposed
solutions.
In regard to different numbers of switching angles, the number of the equations
increases linearly and no huge increase of calculation time is expected for more number
of switching angles. In some cases, this method can eliminate more than N1 harmonics
with only a small difference between the desired and resulted modulation index. This
method is not only precise in harmonics elimination but also practical in terms of

61

simplicity and realization by field engineers. In the next chapter, the application of fourequation method is discussed in optimal PWM approaches.

62

CHAPTER. 3

Optimal PWM for SHE In High Power Inverters

3.1. Introduction
With the development of different types of distributed generation, such as fuel cells,
photovoltaics (PV), and wind turbines, implementations of megawatt-level inverters are
becoming more popular [76]-[87]. For these high power and possible medium and high
voltage level converters, switching loss is as important as power quality. Selective
harmonics elimination based on optimal pulse width modulation (OPWM) is the perfect
match for these megawatt level inverters in reducing the switching frequency while
keeping the THD level under numbers specified by regulations and standards [88]-[93].
In this chapter, equal area criteria and harmonics injection are used to form OPWM,
based on the four equations method to solve the following problems:
1) SHE based optimal switching angle calculations for two-level inverters;
2) Multiple switching angles per level in multilevel-inverters at low modulation
indices, which is equivalent to high modulation indices in inverters with a low
number of voltage levels.

63

In the first section, a brief review of different OPWM and SHE methods is provided.
Then, the next section presents the detailed description of the improved four-equation
based method for the following items:
1) OPWM in two-level inverters;
2) weight-oriented junction distribution for multilevel inverters with unbalanced dc
sources.
Finally, in the third section, different case studies are provided to validate the proposed
methods.

3.2. OPWM Methods for Selected Harmonics Elimination


The Pulse Width Modulation (PWM) method was proposed for inverters in the 1960s
and digitalized in the 1970s [94-95]. Soon after the birth of the basic PWM method, in
1964, Turnbull proposed the SHE idea [96]. In this method, harmonic components are
described as functions of the switching angles in trigonometric terms. If N is the total
number of switching transitions, as shown in Figure 3. 1, the Fourier series expansion of
the symmetric PWM waveform can be expressed as:

64

V
dc

Figure 3. 1. Multiple switching angles in OPWM.

V (t )

4V

dc (cos(m ) cos(m )... cos(m )) sin(mt )

1
2
N
m 1,3,5,... m

(3-1)

where m is the order of the harmonic, and k are the k th switching angle. Based on (31), the following group of polynomial equations can be utilized to calculate the N
th

switching angles and realize the selective harmonic elimination up to m order. Please
note that the value of m could be much higher than N.

4Vdc
(cos( ) cos( )... cos( )) V

1
2
N
F

cos(5 ) cos(5 )... cos(5 ) 0
1
2
N

cos(71 ) cos(7 2 )... cos(7 N ) 0

.......
cos(m ) cos(m )... cos(m ) 0
1
2
N

65

(3-2)

In this equation group, the first equation is used to guarantee the amplitude of the
fundamental component ( VF ), and the other equations are utilized to ensure the
elimination of selected harmonics. Thus, by calculating the N switching angles, N-1
number of harmonics can be eliminated [97, 114]. In earlier days, algorithms like quarter
symmetric polynomials and the Newton-Raphson method with multiple variables or
linearization had been utilized to solve this equation group [98-99].
Recently, various control theory-orientated algorithms are utilized to solve this group of
equations. For instance, in [100], a Clonal Selection Algorithm (CSA) is introduced to
find an optimal solution with a random disturbance selection operation; in [101], a
Sliding Mode Variable Structure Control (SMVSC) is proposed, based on a closed-loop
algorithm for better performance in harmonics elimination; in [102], a Homotopic fixedpoint approach is utilized to find the initial values of the roots and conduct cubic
iterations to refine the roots; and in [103], a feed forward artificial neural network is
applied for selected harmonics elimination. In [104], m dimensional space is introduced
to eliminate m harmonics. However, this method is practical for eliminating up to three
harmonic components.
For OPWM in multilevel inverters, harmonics elimination follows the similar equation
group as (3-2). Multiple methods, such as the Fuzzy Proportional Integral Controller
(FPIC) [105], a resultants theory based algorithm [106], an adaptive control algorithm
[107], a genetic algorithm [108, 113], etc, have been proposed. Online calculations of the
switching angels for both two-level inverters and multi-level inverters have also been
reported [109], [110].
66

However, all the above-mentioned methods are eventually based on solving complex
groups of equations. Therefore, for a higher number of switching transients, it is quite
difficult or time consuming to solve these nonlinear equations with current computation
methods [111], [112]. Thus, based on a harmonics injection and equal area criteria, the
four-equations method can be used as a simple and fast solution.

In this method,

regardless the number of voltage levels, only, few simple equations are needed for
switching angle calculations [115-118].
For easy referencing, different PWM strategies for high power two-level inverters and
multilevel inverters are categorized in Figure 3. 2.
PWM
Methods for Medium / High
Power Converters [94-118]
Selective Harmonic
Elimination (SHE) [96-118]
Nonlinear Polynomial
Equations [96-114]
Single Level OPWM [96],
[98] , [100 - 104] , [109] , [ 112]

PWM with
Multiple Carrier [94], [95]
Four - Equation based
Method [115-118]

Multilevel Inverters [97] , [99],


[105 -108] , [110], [111] ,[113], [114]

Figure 3. 2. Different approaches for harmonics elimination.

3.3. Proposed Methods for Selected Harmonics Elimination


In this section, the four-equations based method has been modified and utilized for
OPWM.

67

A) OPWM Method for Two Level Inverters


The basic idea is that, if a sinusoidal reference waveform is utilized to generate a series
of switching angles with equal area criteria, then the resulting PWM waveform would
have both a fundamental component and harmonics. Therefore, if selected negative
harmonics are injected into the original pure sinusoidal reference waveform, because of
the nature of the equal area criteria, then the injected harmonics may cancel out the
harmonics generated by the original pure sinusoidal reference.

The following is a

detailed illustration of the proposed method.


For a simple case shown in Figure 3. 3, the harmonics content of the PWM waveform can
be described from:

V
dc

A2
A1 A2

A1

k 1 k
k

Figure 3. 3. The illustration of equal area criteria.

hm

2Vdc
(cos(m k ) cos(m k ))

k 1, 2,..,N m

68

(3-3)

where N is the total number of the switching angles and m is the order of the
harmonics. Starting from this equation, the four-equation method includes the following
basic steps:
1) Use a pure sinusoidal waveform and equal-area criteria to decide the initial
switching angles of k with predefined initial values of k ;
2) Find the lower harmonics content in the resulting PWM waveform with (3-3);
3) Form a new reference waveform which is defined by

Vref VF sin(t ) hms sin(mt )

(3-4)

where hms is the sum of hm :


hms

iter

i 1, 2 ,...

m(i )

(3-5)

4) Use the new reference waveform and equal-area criteria to form a new set of k
and k .
5) Repeat steps 1) to 4) until the selected harmonics are eliminated. The general
equation to calculate

k k
....

based on equal area criteria is:

VF (cos( k 1 ) cos( k )) h5 s (cos(5 k 1 ) cos(5 k ))

Vdc
5Vdc

hms (cos(m k 1 ) cos(m k ))


mVdc

(3-6)

This four-equation procedure is illustrated in Figure 3. 4:


69

Switching Angle Calculations


Based on Equal Area Criteria

Desired
Fundamental
Component

+ New Reference

Harmonics Calculation

Harmonics Selection
for Elimination

Waveform

Figure 3. 4. The diagram showing four-equation method.

From this basic procedure, it is clear that the proposed method is an iteration-based
method. So, there should be some initial starting point for
is to evenly distribute initial k s in the region of 0 to

k .

A simple starting point

.
2

Equation (3-6) also shows that in this method, there is a defined relationship between

and

k . Thus when compared with methods that are based on solving high-order

nonlinear equations, theoretically, the four-equation method will have less freedom in
eliminating the switching angles. But because of the simplicity of proposed method,
when eliminating the same number of harmonics, the four-equation method shall have
faster results.
To clarify the advantages and simplicity of the proposed method, in Table 3.1, this
method is compared with other methods that normally use polynomial equations. Solving
high-order nonlinear equations is no longer needed, thus advanced algorithms are also no
longer required. In traditional methods, the number of equations grows with the number
of switching angles in a nonlinear way.

Thus, it is very difficult to calculate the


70

switching angles when the total number of the switching angles is high. Conversely, in
the four-equation method, the four basic equations are used repeatedly; the total number
of equations grows linearly with the number of switching angles. As a result, for OPWM
in high-power inverters, this method would be more suitable for cases with high numbers
of switching angles or complex scenarios such as multiple switching angles per voltage
level in multilevel inverters.

Table 3. 1. Number of first-order equations should be solved for harmonics elimination in different
methods.

Different
methods for N
switching
angles

Number
of
equations

The
highest
order of
equations

Number of first-order equations


should be solved (All equations are
changed to first-order equation)

Method based
on polynomial
equations

1+5+7++ m

Four-equation
method

4N

(m could be much higher than N)


1

4N

B) Compensation of fundamental component


With the basic procedure described above, it was found that the resulting fundamental
component is usually different from the desired fundamental component. This idea is
shown in Figures 3. 5. This difference is because of possible over modulation caused by
the harmonics injection or an overlap of switching angles at high modulation indices.
Thus, fundamental voltage compensation is needed for the proposed method.

71

Resulted Voltage

Desired Voltage

Figures 3. 5, The resulting fundamental and the desired fundamental component.

The basic solution starts with the comparison between the resulting fundamental
component and the reference. Then, based on this difference, a is calculated to
modify the last switching angle that is the nearest to
this will result in more harmonics.

as shown in figure 3.6. However,


2

So, the resulting additional harmonics are

calculated and added to the total harmonics injection to improve SHE.

N(modified) N

/2

Figure 3.6. The switching angle adjustment in OPWM.

This adjustment angle can be calculated by an inverse cosine in the following equation:
72

arccos(

2Vdc

(VF V1N ))

(3-7)

where V1N is the total fundamental voltage component, generated with the switching
angles from

to

N .

This adjustment angle is used to modify the last switching

angle:

N (mod ified ) arccos(cos ( N ) cos( ))

(3-8)

Therefore, based on the switching angle adjustment, the desired voltage magnitude in
the fundamental frequency can be achieved. The total process of this modified method is
illustrated in Figure 3. 7.
+
+

Calculate the adjustment


for the last switching angle

Switching angle calculations


with Equation 1 and 2

Calculate the selected


harmonics caused by
the adjustment angle

Desired fundamental
component

Calculated fundamental

New modulation
waveform synthesizing
with Equation 4

Harmonics calculation
with Equation 3

Last switching adjustment for fundamental voltage compensation

Figure 3. 7. Modified method with adjustment for the switching angle in optimal PWM based
on four-equation method.

C) OPWM in Multilevel Inverters at Low Modulation Index with Unbalanced DC


Sources
For multilevel inverters, the harmonics selected for elimination are limited by the
number of available dc levels. To overcome this problem, in each dc level, the number of
73

switching angles can be increased to eliminate more harmonic components.

This

improvement is very helpful, especially for the following conditions:


1) Low-modulation indices where limited dc levels are available in multilevel inverters
with a high number of total dc voltage levels;
2) High modulation index in inverters with limited voltage levels.
In theory, there is no limitation for the number of switching angles used for each level.
However generally, the number of switching angles is limited by the switching losses and
switching frequency. In this section, as an example, the four-equation method is adapted
to achieve SHE for multilevel inverters at a low-modulation index with unbalanced dc
sources, as shown in Figure 3. 8.

S1

N-1

N
S1=S2
S2

V3

V2

V1

1 k

Figure 3. 8. Optimal PWM with four-equation based method on multilevel inverters with
unbalanced dc sources.

74

Based on equal area criteria, the switching angles are determined through the following
equation:

k 1

i 1

i 1

k 1 / Vdc( k ) ( Vdc(i ) k Vdc(i ) k 1 VF (cos( k ) cos( k 1 ))


h
h
5 (cos(5 k ) cos(5 k 1 ))... m (cos(m k ) cos(m k 1 )))
5
m

(3-9)

where k 1 and k are the two sub-junction points per each sub-area as shown in
Figures 3. 9 and Figure 3. 10 . The effectiveness of OPWM relies heavily on the values
of

k 1 and k .

D) Weight Orientated Junction Point Distribution


To determine k 1 and k , one possible solution is to equally divide the total area
based on number of switching angles, as shown in Figure 3. 9. However, this strategy
does not work well for low modulation indices. This is simply because that with less
voltage levels, a larger area per level is needed in the compensation of harmonics. Thus,
the distribution of the area becomes more crucial.

75

Sk

Reference Staircase
Waveform

S k+1

Vdc(K)

A1
k-1 k

Vdc(K-1)

Two Junction points

k+1

S k= S k+1

A1 A2

A2

Figure 3. 9. Symmetric method in medium and high modulation index.

Based on a harmonics equation, it is also observed that magnitudes of harmonic contents


decrease as the order of the harmonics increases:

hm

4Vdc ( k )

k 1, 2,.., N

(cos(m k ) cos(m k )

(3-10)

This means that the corresponding area needed for the compensation of higher order
harmonics also decreases.

Based on this observation, in the adapted four-equation

method, the area division for low modulation indices can be determined by the weight of
the harmonics, which is shown in Figure 3. 10.

76

Figure 3. 10. Weight oriented method in low modulation index.


.

In this weight-orientated solution, a larger area is made available for lower-order


harmonic components. Thus, better accuracy of harmonics elimination can be achieved.
The procedure for this method is illustrated in Figure 3. 11.
Number of switching angles used for
each dc level based on selected
harmonic components

Junction points calculations


with Equation 1
Desired
Fundamental
Component

New modulation
waveform synthesizing
with Equation 4

Weight oriented method to calculate


available area for each switching angle

Harmonics calculation
with Equation 3

Switching angles calculations


with Equation 2

Figure 3. 11. Block diagram for weight oriented solution in low modulation indices.

77

If k is defined by the difference between two sub-junction points,

k 1

and k ; then,

based on weight orientated distribution:

k k k 1

(3-11)

k 1 k 1

k
k

(3-12)

In this case, for a symmetric waveform, the summation of the sub-areas shall be

k 1

k 1

/ 2 k 1 k 1

m(m 1)
2

(3-13)

thus

m(m 1)

With (3-13) and (3-14), all the sub-junction points,

(3-14)

k , can be determined easily. By

using these sub-junction points, the switching angles can be used more effectively for
SHE, especially in low modulation indices.

3.4. Case Studies


Two case studies of the proposed selective harmonics elimination are shown in this
section:
78

1) Two level inverter;


2) Multilevel inverter at low-modulation indices.

A) Two-Level Inverter
In a case study of the two-level inverter, 10 switching angles are utilized based on the
four equations method. In this condition, the modulation index is defined as:

MI

VF

(3-15)

where, V F is the fundamental ac voltage in the output. Table 3. 2 shows some sample

k s are simply fixed at points

points achieved with this method. In this case,

k
20 .

Fundamental component compensation, shown in Figure 3. 7, is adapted for these sample


points. The switching angles versus modulation indices are shown in Figure 3. 12.
Regarding the compensation in a fundamental component, nine harmonics can be
eliminated by 10 switching angles. Harmonics analysis in Table 3.3 shows that the
selected harmonics are precisely eliminated.
Table 3. 2. Sample points with proposed method for ten switching angles.

Modulation
Indices
0.8286
0.7436
0.6748
0.5175
0.3818
0.2672

n
1

10

0.1399
0.1411
0.1568
0.1659
0.2773
0.7166

0.2696
0.2746
0.2857
0.2892
0.6380
0.8265

0.4050
0.4119
0.4316
0.4443
0.8457
0.8995

0.5404
0.5540
0.5764
0.6036
0.9607
0.9884

0.6825
0.6927
0.7003
0.7123
1.0291
1.0853

0.8250
0.8354
0.8365
0.8446
1.1352
1.1685

0.9644
0.9766
0.9793
1.0054
1.2204
1.2491

1.1049
1.1201
1.1444
1.1784
1.3852
1.3913

1.2540
1.2691
1.3001
1.3258
1.4596
1.4706

1.4043
1.4259
1.4267
1.4623
1.5080
1.5226

79

Table 3. 3. Harmonics results for OPWM using ten switching angles.


Order of the
harmonics
0.8286
0.7436
Modulation 0.6748
Indices
0.5175
0.3818
0.2672

Different levels Switching Angles (radian)

/2
1.5

1.4

1.2

/13

Harmonics (% based on fundamental output)


1st
5th
7th
11th
13th
17th
19th
23rd
100.00 0.00
0.00 0.3066 0.00 0.2383 0.00 0.7344
100.00 0.0562 0.0900 0.0904 0.0888 0.4690 0.7966 0.0116
100.00 0.00
0.00 0.2642 0.00 0.4376 0.00 0.5920
100.00 0.00
0.00 0.5031 0.00 0.8887 0.00 0.6142
100.00 0.00
0.00
0.00
0.00
0.00
0.00
0.00
100.00 0.0091 0.0121 0.0158 0.0198 0.0214 0.0259 0.0249

Different levels Switching Angles v.s Modulation Indices

9
7
5
3

10
8
6

0.8

29th
31st
0.3151 0.0884
0.3514 0.1398
0.6966 0.00
0.4054 0.00
0.00
0.00
0.0204 0.0114

/
6
0.5

0.6

0.4

0
0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

Modulation Indices (MI)

Figure 3. 12. The overall switching angles for different modulation indices.

B) OPWM in Multilevel Inverters at Low Modulation Index with Unbalanced Dc


Sources
To verify the effectiveness of the four-equation method in multilevel inverters, the
proposed OPWM method has been used in multilevel inverters with unbalanced dc
sources. Then, for each dc level, the number of switching angles is more than one. The
modulation indices of the waveform are defined as:

80

VF

MI

(3-16)

Vdc (i )

i 1

where P is the number of dc levels, and Vdc (i ) is the dc magnitude for each voltage level
in multilevel inverter output waveform.
The switching angles and calculated harmonics content for low-modulation indices are
shown in Table 3. 4 and Table 3. 5 respectively. At these low modulation indices, only
one or two dc sources are utilized.

But for each voltage level, there are multiple

switching angles. In the five-level waveform, 1 and 2 are applied at voltage level one;

3 , 4 , and 5 are applied at voltage level two.


Table 3. 4. Sample points based on the four-equation and OPWM combined method for lowmodulation indices.

#
Modulation
levels/waveform
Index
3

0.1348
0.1414
0.1602
0.1901
0.2278
0.2545

Switching Angles (rad.)

0.2438
0.2450
0.2458
0.3546
0.1159
0.1763

0.5220
0.5070
0.4711
0.5497
0.4645
0.4578

0.7486
0.7461
0.7344
1.0294
0.7975
0.8411

1.0185
1.0091
0.9792
1.1829
1.2422
1.1378

1.3050
1.2887
1.2454
1.3403
1.4205
1.3779

Table 3. 5. Harmonics magnitude based on the proposed method for low-modulation indices.

#
Modulation
levels/waveform
Index
3

0.1348
0.1414
0.1602
0.1901
0.2278
0.2545

Harmonics (% based on fundamental


output)
1st
5th
7th
11th
13th
100.00 0.00 0.8949 0.00 1.6620
100.00 0.00 0.5404 0.00 1.0035
100.00 0.2957 0.9830 0.5918 1.3842
100.00 0.00
0.00
0.00
0.00
100.00 0.00
0.00
0.00
0.00
100.00 0.00
0.00
0.00
0.00
81

As shown in the results, when the weight-oriented solution is applied for OPWM,
multiple switching angles can be used effectively to eliminate more harmonics. This idea
is more useful in low-modulation indices, where the number of dc levels is limited.

3.5. Simulation and Experimental Verification


To verify the performance of the proposed method, simulations and experiments have
been carried out for the two-case studies mentioned above. These cases are implemented
with both no-load and load conditions:
1- For no-load conditions, dc voltage is increased up to 200 V.
2- For a load test, the dc link voltage is increased up to 100 V. The load impedance
is R= 3.2 ohm and L= 6 mH.
A TI TMS320F2812 DSP board is used to control the inverters. During the experiments,
an offline procedure is utilized.

The switching angles are pre-calculated and then

programmed via the TI DSP. Though there are voltage and current sensors integrated in
the inverters, they are not utilized in the tests. The voltage and current probes are used to
read the numbers.
A) OPWM with Ten Switching Angles for Two Level Inverter
To show the accuracy of the four-equation method based OPWM for two level inverter,
three different modulation indices, 0.8286, 0.6748, and 0.2672, are simulated and tested.
The simulated line-line output voltages for these modulation indices are shown in Figures
3. 133. 15 respectively.

82

Figure 3. 13, OPWM result for MI=0.8286.

Figure 3. 14, OPWM result for MI=0.6748.

Figure 3. 15, OPWM result for MI=0.2672.


83

The harmonics analysis of the above waveforms is summarized in Table 3. 6. The


results show that the magnitudes of the selected harmonics for each modulation index are
minimized successfully. However, in the proposed method, the number of iterations for
the steps can be increased, resulting in complete harmonic elimination.

Table 3. 6. Harmonic components for the simulated modulation indices.

Order of the
harmonics
Modulation 0.8286
0.6748
Indices
0.2672

1st

5th

7th

11th

100.00
100.00
100.00

0.3152
0.0910
0.1712

0.6465
0.0721
0.0871

0.1324
0.2423
0.1489

Harmonics (%)
13th 17th 19th
0.1799
0.0327
0.0607

0.3075
0.4228
0.0563

0.7742
0.0363
0.0923

23rd

29th

31st

0.4937
0.6014
0.2000

0.5002
0.6122
0.1049

0.4827
0.0708
0.0905

Experiments were carried out for the case that modulation index equals to 0.6748.
Different parts of the experimental setup are depicted in Figure 3. 16.

100 kW Inverter
Design

Inverter Under
Test

High Power AC
Source

Rectifier

Figure 3. 16. Different parts of the experimental setup for OPWM.

To analyze the capability of the proposed method, at the first, it is tested in a no-load
condition. Figure 3. 17 shows the waveform from the no-load case. For more details on
the harmonics magnitude, a spectrum analysis is shown in Figure 3. 18. As a comparison
to Table 3. 6, the harmonics analysis for the voltage is shown in Table. 3. 7.
84

50 V/div

Figure 3. 17. No-load test voltage with ten switching angles.

Frequency Spectrum of Output Voltage in Load Test


120

Output Voltage (Volt)

100
80
60
40
20
0
0

200

400

600

800 1000 1200


Frequency (Hz)

1400

1600

1800

2000

Figure 3. 18. Harmonics analysis for output voltage in load testing.

Table 3. 7. Experimental results for harmonics magnitude in OPWM.

Harmonics (%)
Harmonics
1
5
7
11
13th
17th
19th
23rd
29th
31st
Voltage
100.00 0.4127 0.4301 0.8238 0.2859 0.4729 0.1328 0.0734 0.0812 0.1059
st

th

th

th

85

For load analysis, an inductive load is utilized to show the harmonic characteristics in
the current waveform. The voltage and the inductive current waveform are shown in
Figure 3. 19. The harmonics spectrum for the current waveform is shown in Figure 3. 20.
The results show that the proposed method is very successful for harmonics elimination
with OPWM. The current harmonics magnitude is explained in Table 3. 8 in more detail.

50 V/div

25 A/div

Figure 3. 19. Experimental results load test voltage and current waveforms for MI=0.6748.

86

Frequency Spectrum of Load Current


30

Load Current (A)

25
20
15
10
5
0
0

200

400

600

800 1000 1200


Frequency (Hz)

1400

1600

1800

2000

Figure 3. 20. Harmonics analysis for output current in load testing.

Table 3. 8. Harmonics content in the experimental voltage and current for MI=0.6748.
st

th

th

th

1
5
7
11
Harmonics
100.00
0.1215
0.2196
0.3120
Current

Harmonics (%)
13th
17th
0.1237 0.2523

19th
0.0911

23rd
0.0519

29th
0.0601

31st
0.0412

It is noted that there are slight differences between Table 3. 6 and 3. 7 in terms of
voltage harmonics content. The difference is mainly due to the 1.5 us dead time and dc
voltage fluctuation caused by the oscillation between the load inductor and the dc link
capacitor.

B) Low Modulation Indices in Multilevel Inverters


For a weight-oriented solution in low modulation indices, two cases of low modulation
indices with unbalanced dc levels are simulated. Table 3. 9 shows the switching angles
87

for these two modulation indices. For a three-level inverter, just one level is available for
all calculated switching angles as shown in Figure 3. 21. In the five-level waveform, 1
and 2 are applied at voltage level one; 3 , 4 , and 5 are applied at voltage level two.
Correspondent waveforms are shown in Figure 3. 22.
As described in before, the angles in Table 3. 6 are switch turn-on points. The switch
turn-off points are the sub-junction points that are calculated with the weighted area
distributions. It is shown in Table 3. 10 that when more voltage levels are involved,
because of the complexity of the problem, the performance of the proposed method
degraded slightly, but the concerned harmonics are still minimized effectively.

Table 3. 9. Simulation results for output voltage and selected harmonic components on different
modulation indices.

Modulation
Index
0.1414
0.2545

Switching Angles (rad.)

0.2450 0.5070 0.7461 1.0091 1.2887


0.1763 0.4578 0.8411 1.1378 1.3779

Figure 3. 21. Three-level phase voltage waveform with MI=0.1414.


88

Figure 3. 22. OPWM for 5 level phase voltage waveform with MI=0.2545.
Table 3. 10. Harmonics results for OPWM based on weight-oriented solution.

Modulation Harmonics (% based on fundamental output)


1st
5th
7th
11th
13th
17th
Index
0.1414
100.00 0.1532 0.5542 0.1673 0.9094 0.9700
0.2545
100.00 1.1723 0.1256 0.8080 0.8237 0.3047
Since low modulation indices tests request only two dc sources, during the tests, two HBridge modules are cascaded to achieve 5 level waveforms. The test setup is shown in
Figure 3. 23.

Figure 3. 23. Experimental setup for multilevel inverter with unbalanced dc sources.
89

To verify the performance of the proposed method, experiments have been carried out
for the two case studies mentioned above. The experimental waveforms are shown for
three-level and five-level inverters in Figure 3. 24 and Figure 3. 25 respectively.

200 V/div

Figure 3. 24 Three level phase voltage waveform with MI=0.1414.

200 V/div

Figure 3. 25. 5 level phase voltage waveform with MI=0.2545.


90

As a comparison to Table 3. 10, the harmonics analysis for the experimental results in
two modulation indices with a weight-oriented solution are shown in Table 3. 11. From
both the simulation and experimental results, it can be seen that the selected harmonics
contents are eliminated effectively with this proposed method.

Table 3. 11. Harmonics analysis for the experimental results with low modulation indices.
Switching Angles (rad.)

Modulation
Index

Harmonics (% based on fundamental output)

1st

5th

7th

11th

13th

17th

0.1414

0.2450

0.5070

0.7461

1.0091

1.2887

100.00

2.2365

1.8975

1.2392

0.8451

0.3652

0.2545

0.1763

0.4578

0.8411

1.1378

1.3779

100.00

2.9821

1.3507

0.8533

0.7626

0.5345

3.6. Real Time Verification


A real-time simulation based Power Hardware-in-the Loop (PHIL) test is utilized for
this case. In the PHIL, the inductive load is simulated at real time; but the multilevel
inverter circuit setup is utilized. The control unit of the multilevel inverter is the same
DSP board.

The dc voltages of the multilevel inverter are provided with multiple

rectifiers power through individual isolation transformers. The system diagram of the
PHIL and different parts of the setup are shown in Figure 3. 26.
The real-time simulator simulates the load. Simulated results, including load currents,
are converted to an analog signal as the feedback and input to the DSP control board of
the multilevel inverter. At the same time, the voltage output of the multilevel inverter is
sensed and fed to the real-time simulator as the control input of a controlled voltage
source. Thus, all the algorithms can be tested as if they are tested in the field but without
very high current.
91

Matlab Simulink based Real Time


Simulation Model (OPAL-RT Lab)

Energy
Sources

Real time simulation models of


different loads.

Simulated
Energy Flow
Controlled power sources
with same characteristics
Real Information connected to the multilevel
Flow
inverters

Real controller boards


for the control and
protectionss

Local Sources
(PV Simultors)

Multilevel
Inverters

Figure 3. 26. Power hardware in the loop diagram for multilevel inverter.

For this case study, the weight-oriented method for a five-level inverter, which has been
discussed with MI=0.2545, is used. The output voltage of the multilevel inverters, the
corresponded voltage in the real time simulation and the simulated currents are shown in
Figure 3. 27. Since it is a real-time simulation, the results are monitored with a digital
Oscilloscope. In Figure 3. 28, the simulated voltage and current are depicted in more
detail. For this case, the total current THD is less than 3%, which verifies the accuracy of
the proposed method. Then, the weight-oriented method can be considered as a fast and
simple solution for OPWM in high power inverters, especially in low-modulation indices.
In the next chapter, the application of the proposed method will be studied for distributed
energy resources and the active power filtering.

92

20 mS/div
Output voltage
on the circuit
100 V/div
The real time
simulated voltage
2.5 V/div
The real time
simulated load current
2 A/div

Figure 3. 27, The results for weight-oriented method with MI=0.2545.

20 mS/div

Output voltage
on the circuit
100 V/div

The real time


simulated load current
2 A/div

Figure 3. 28. Detailed results for weight oriented method.

93

3.7. Summary and Conclusion


In this chapter, Optimal PWM methods for harmonics elimination in high power
inverters have been reviewed. Then, a modified four-equation method is proposed for
selected harmonics elimination for both two-level inverters and multilevel inverters with
unbalanced dc sources. Compared with existing methods, the four-equation method does
not involve high-ordered polynomial equations; thus, it is more compatible with cases
like a large number of switching angles or multiple switching angles per dc source.
To overcome the limitation of OPWM for SHE, in each dc level, the number of
switching angles can be increased to eliminate more harmonic components.

This

improvement is very helpful, especially for the following conditions:


1) Low-modulation indices where limited dc levels are available in multilevel inverters
with a high number of total dc voltage levels;
2) High modulation index in inverters with limited voltage levels.
However generally, the number of switching angles is limited by the switching losses
and switching frequency.
In these cases, to determine the initial sub-junction points for switching angles
calculation, one possible solution is to equally divide the total area based on number of
switching angles. However, this strategy does not work well for low modulation indices.
This is simply because that with less voltage levels, a larger area per level is needed in
the compensation of harmonics. Then, in the weigh-oriented solution, a larger area is

94

made available for lower-order harmonic components.

Thus, better accuracy of

harmonics elimination can be achieved.


Two case studies of the proposed selective harmonics elimination are shown in this
section:
1) Two level inverter, to validate the proposed method for OPWM;
2) Multilevel inverter at low-modulation indices, to validate the weight-oriented method.
For a case with a fairly low number of switching angles and unbalanced multiple voltage
levels, the weight-orientated junction point distribution is applied to enhance the
performance of the proposed method. Both the simulation and experimental results
validate the proposed methods. The power hardware in the loop has been also proposed
for more analysis. As results, the weight oriented method can be utilized as a powerful
solution for SHE in wide range of modulation indices, especially when the number of dc
levels is limited.

95

CHAPTER. 4

POWER GENERATION AND ACTIVE POWER FILTER


WITH DISTRIBUTED ENERGY SOURCES

4.1. Introduction
Nowadays, electrical power systems are evolving from centralized systems, with
generation power plants that are connected to the transmission network, to more
decentralized systems, and with smaller distributed generating units connected directly to
the networks close to demand consumption [119-123]. Technologies that can supply
these distributed energies to consumers at reasonable prices without degrading the
security and reliability of the distribution system have vast potential. Thus, renewable and
distributed energy resources are being considered as promising generation sources to
meet the continuously increasing energy demand and to improve reliability of electric
power systems.
The increasing number of renewable energy sources and distributed generators require
new strategies for the operation and control of the generated power to grid, in order to
maintain and to improve the system reliability and power quality. To achieve these goals,
96

the power electronic technology plays an important role in distributed generation and in
the integration of renewable energy sources into the electrical grid. Several power
electronic strategies have been widely studied and have been rapidly expanding as these
applications become more integrated with the grid-based systems.
During the last few years, power electronics has undergone fast improvement, which is
mainly due to two following factors:

The development of fast semiconductor switches that are capable of switching


quickly and handling high power ratings.

The introduction of real-time computer controllers that can implement advanced


and complex control algorithms.

These factors together have led to the development of cost-effective and grid-friendly
circuit topologies.
On the other hand, the progress in renewable technology has led to more powerful
systems. Wind generator prototypes and photovoltaic power systems have reached
megawatt level. The best solution to increase the power in power systems is to step up the
voltage in order to limit currents and reduce losses. Hence, the trend is to migrate from
low-voltage to medium-voltage power systems, working with increased rated voltage
wind generators and a series connection of solar panels in photovoltaic power systems.
Therefore, multilevel inverters are a good tradeoff solution between performance and cost
in high-voltage and high-power systems.
With the increase of nonlinear loads in utility lines, harmonic problems have been major
concerns. The nonlinear loads on industrial, commercial, and residential equipment, such
as diode rectifiers, power electronics inverters, and some nonlinear electronic circuits,
97

pollute the utility line due to the current harmonics that they generate. These harmonics
result in many problems in utility power, such as low energy efficiency, electromagnetic
interference (EMI), a low power factor (PF), and distortion of the line voltage, etc.
Therefore, standard regulations and recommendations, such as IEC 61000-3-2 and IEEE
519, enforce a limit on the aforementioned problems [124], [125].
For problems of harmonic pollution, passive and active power filters (APFs) are typical
approaches that are used to improve the PF and to eliminate harmonics. In the past,
passive LC filters are generally used to reduce these problems. However, they have many
drawbacks, such as being bulky, heavy, having resonance and tuning problem, fixed
compensation, noise, increased losses, and etc. On the contrary, the APF can solve the
aforementioned problems and is often used to compensate current harmonics and low PF
that are caused by a nonlinear load [126-132].
The use of APFs to mitigate harmonic problems has drawn much attention since the
1970s. The APF appears to be a viable solution for eliminating harmonic currents and
voltages. It injects equal-but-opposite distortion and absorbs or generates reactive power,
thereby controlling the harmonics and compensating reactive power of the connected
load. In [135], Akagi et al. proposed an innovative concept based on the theory of
instantaneous reactive power in the

reference frame, which inspired the

realization of three-phase three-wire APFs. According to the instantaneous reactive


power theory, unless used for harmonic cancellation, there is no need to use an energystorage device in the APF implementation for reactive power compensation. Since the
instantaneous reactive power theory was introduced, many similar approaches are
proposed for the APF control strategies.
98

To increase the system efficiency and maximize the return of the investments on
DERs, next to power generation, ancillary functions such as harmonics and reactive
power compensations have also been considered. This means that the distributed
resources can be utilized as APF while supplying active/reactive power to the load and
the grid.
In this case, DERs will be controlled to:
1) Generate desired active and reactive power, for the load and the grid
2) Compensate selected harmonic currents caused by nonlinear loads.
The system topology is shown in Figure. 4. 1. It should be notified that this grid-tied
inverter will often work with high modulation indices.

i s1

Grid

vg
xm

is ihm

xl
is2 ihm

vm
Renewable
sources

Multilevel
Inverters

Switching

vl

Nonlinear
Loads

is is1 is2

Angles

Four Equation
Method

Figure. 4.1. Harmonic and power compensation by multilevel inverters.

99

Equation (4.1) shows the relation between grid voltage vg, inverter output voltage vm,
inverter output current, and the load current:

vm vg (is 2 ihm ) xm (vg is 2 xm ) (ihm xm ) v f vhm


where v f , is the fundamental voltage component,

(4-1)

ihm and vhm , are the load harmonics,

and the related harmonics voltage in DERs respectively.


To generate this voltage, the implementation of high frequency PWM-based two-level
inverters is limited due to voltage and current ratings of switching devices, switching
losses, and electromagnetic interferences caused by high dv/dt. To overcome these
limitations, multilevel inverters with staircase waveforms or two-level inverters with
OPWM are often utilized.
By using the Fourier series expansion of the staircase waveform in multilevel inverters,
the following

equations group can be utilized to calculate the switching angles (

1 , 5 ,..., N ) and realize the selective harmonics:


4Vdc
(cos(1 ) cos( 2 ) cos( 3 ) ... cos( N )) V f

cos(51 ) cos(5 2 ) cos(5 3 ) ... cos(5 N ) V5

cos(71 ) cos(7 2 ) cos(7 3 ) ... cos(7 N ) V7


...

cos(m1 ) cos(m 2 ) cos(m 3 ) ... cos(13 N ) Vm

100

(4-2)

In (4.2), V f is the multilevel inverters output voltage in the fundamental frequency and

V5 ,V7 ,...,Vm are the voltages that are required to compensate the selected harmonics in
the load.
In this chapter, the equal area criteria and the harmonic injection based four-equation
method, are modified and utilized to realize the APF function with multilevel inverters
powered by DERs. For online switching angles calculation, a fast selective harmonics
detection method is proposed based on the Instantaneous Reactive Power (IRP) theory
[136], [137]. Finally, the limitations of harmonics compensation at the given active
power are discussed and verified in different case studies.

4.2. The Proposed Four Equation Method for Harmonics Compensation


In this chapter, the four-equations based method is modified and proposed for
harmonics compensation in APF by DERs, as shown in Figure. 4. 2. This method is an
iteration process, and using the equal area criteria.

Switching angle calculations


with Equation 1 and 2

Desired
Fundamental
Component

New modulation
waveform synthesizing
with Equation 4

Harmonics calculation
with Equation 3

Desired Harmonics
Compensation

Figure. 4. 2. Four-equation based method in multilevel inverters for APF.


101

The following equation group forms the foundation of the modified solution for APF:
The first equation is to calculate the junction point of the reference and the voltage level;
it can be solved with the Newton-Raphson method:
k

k arctan(

dc( i )

i 1

h5 s sin(5 k )... hms sin(m k )


VF cos( k )

(4-3)

The second equation is to find the switching angles:


k

k 1

i 1

i 1

k 1 / Vdc( k ) * (Vdc(i ) k Vdc(i ) k 1 VF (cos( k ) cos( k 1 ))


h
h
5 s (cos(5 k ) cos(5 k 1 ))... ms (cos(m k ) cos(m k 1 )))
5
m

(4-4)

The third equation is to find the harmonics content in the staircase waveform:

hm

k 1, 2,..,N

2Vdc( k )
m

(cos(m k ) cos(m( k )))

(4-5)

The fourth equation is to calculate the new reference waveform for switching angle
calculation:

Vref VF sin(t ) hms sin(mt )

(4-6)

where hms is the combination of the harmonics in the staircase waveform and the voltage
reference for harmonics compensation based on the load current ihm, as shown in Figure.
4. 1. Thus, hms can be calculated as:

hms

iter

i 1, 2 ,...

m(i )

hm reference(i )

102

(4-7)

With online iterations of above equations, active and reactive power generation can be
controlled by regulating VF , and at the same time, limited active power filter function
can be realized by including hms sin(mt ) in the switching angle calculation.

4.3. The Limitation of the Proposed Method


Two limitations of the proposed methods are identified and discussed as follows:
A) Trade-off Between Fundamental Component Generation and Harmonics
Compensation
To realize power generation at fundamental frequency and harmonics compensation at
the same time, maximum output voltage is limited by the dc bus input. Without injecting
a third harmonics, the first and foremost harmonic is the fifth harmonics. With zerodegree phase shift, the peak value of fifth harmonics will be added to the peak of
fundamental voltage. This is illustrated in Figure. 4. 3.
To achieve the desired power generation and harmonics compensation, the peak value of
(4-6) needs to be smaller than the summations of voltage levels of the multilevel inverter:
N

Vref VF sin(t ) (h5reference h5 ) sin(5t ) ... (hmreference hm ) sin(mt ) Vdc(i ) (4-8)


i 1

where N is the number of voltage levels in the multilevel inverter.


This tradeoff is also embodied in the available area for APF at a given power. For an
APF approach, since all the selected harmonics are odd numbers, each harmonic
increases the total area and limits the available area for the fundamental frequency. For a
half-cycle sinusoidal signal at fundamental frequency, the total area needed for the signal
103

equals the magnitude of 2VF . However, for harmonics compensation in APF, this area
will equal:

2
2
2
2
Total area 2VF V5 V7 V11 ... Vm
5
7
11
m

(4-9)

Therefore, by adding these harmonics, the power generation capability of the system can
be decreased when APF function is emphasized. Conversely, if loads THD are increased
significantly, APF function will be limited at a given active and reactive power request.
Total
Voltage
Fundamental
Voltage

5th Harmonic

Figure. 4.3. 5th harmonics injection for APF.

B) Junction Points Calculation


In the proposed method, the reference voltage starts as a pure sinusoidal signal, and is
then updated in each sampling cycle with additional harmonics compensation
components. If without compensating the harmonics current generated by the load, after
few irritations, the harmonics in the voltage reference will decrease dramatically and
104

there will be no problem in calculating the junction points of the reference and the
voltage levels. However, when the harmonics compensation for load current is also
included, the selected harmonics significantly change the reference signal. Thus, as
shown in Figure. 4. 4, there could be multiple junction points between the reference and
one single voltage level, which can lead to problems in angle calculation.

Figure. 4. 4. Multiple junction point for the same dc level.

4.4. The Online Harmonics Detection Method


For active power filtering, swift and reliable harmonics detection algorithm is essential.
Thus, a simple yet accurate selected harmonics detection method is proposed, based on
the Instantaneous Reactive Power (IRP) theory. As illustrated in Figure. 4. 5, current at
any frequency, including the fundamental and selected harmonics components, can be
individually transformed from a-b-c to d-q axes with (4-10).

105

mt
...

b
ib

5t
1t

ia

m mt 0

ic

c
Figure. 4. 5. Different frequencies transformation s from a-b-c to d-q.

cos m
idm 2
i
qm 3
sin m

where

cos( m

ia
ib

2
sin( m
) ic
3

2
2
) cos( m
)
3
3

2
sin( m
)
3

(4-10)

m is the angular speed at concerned frequency.

For selected harmonics detection, if (4-10) is applied to load current at a defined

m 2f m , any components that have frequencies other than

f m will not be resulting

in any dc value in d-q axes, thus can easily be eliminated by a low-pass filter. Based on
this idea, the measured currents will be transformed from a-b-c to d-q axes at the selected
harmonics frequencies.

The dc result for each transformation equals the harmonic

magnitude for that selected frequency. Therefore, magnitude for each selected harmonics
can be detected with minimum calculation.
106

4.5. Real Time Verification for the Proposed Method


To verify the performance of the proposed method, a real-time simulation based
Hardware-in-the Loop (HIL) test is utilized. In general, in these cases, both Control
Hardware-In-the-Loop (CHIL) and Power Hardware In the Loop (PHIL) are utilized to
evaluate the proposed methods. In CHIL, all the electrical components, including the
multilevel inverter, are simulated in real-time. The simulations communicate with an
actual TI DSP controller, which controls the multilevel inverter in the simulation. Thus,
the proposed algorithm can be tested in real-time.
In the PHIL, the grid and nonlinear loads are simulated at real time; however, the
multilevel inverter is built with real 1200 V, 200 A-rated Intelligent Power Modules
(IPM). The control unit of the multilevel inverter is the same DSP board in HIL. The dc
voltages of the multilevel inverter are provided with multiple rectifiers power through
individual isolation transformers. The system diagram of the PHIL and different parts of
the setup are shown in Figures 4. 6 and 4. 7 respectively. The real-time simulator
simulates the grid and nonlinear load in real-time. Simulated results, including load
currents, grid voltage and grid current, are converted to an analog signal as the feedback
and input to the DSP control board of the multilevel inverter. At the same time, the
voltage output of the multilevel inverter is sensed and fed to the real-time simulator as the
control input of a controlled voltage source. Thus, all the algorithms can be tested as if
they are tested in the field but without actual high current.

107

Matlab Simulink based Real Time


Simulation Model (OPAL-RT Lab)

Energy
Sources

Simulated
Energy Flow
Controlled power sources
with same characteristics
Real Information connected to the multilevel
Flow
inverters

Real time simulation models of


distribution networks, nonlinear
loads, and grid

Real controller boards


for the control and
protectionss

Local Sources
(PV Simultors)

Multilevel
Inverters

Figure. 4. 6. Power hardware in the loop diagram for active power filter.

I/O Ports

The Targets

RT-LAB Real-Time
Simulator

Cascaded Multilevel
Inverters

Figure. 4. 7. Real time simulator and multilevel inverters setup for PHIL.

The flowchart of the proposed algorithm is shown in Figure.4. 8. It should be noted


that in real time, these equations are continuously providing the switching angles after the
calculations. Based on number of switching angles, the calculation times are different.
However, up to five H-bridge and five angles for the single phase, the total calculation
time for five angles will be less than 1ms. Then, the switching angles could achieve
108

minimum THD within one fundamental period after the occurrence of any transient in the
circuit or the model. This transient responding time is shown in Figure. 4. 8.

Inputs

Data acquisition
from RT-LAB

Calculate the
switching
angles

Calculate the
grid phase

THD
Calculation

Instantaneous
harmonics
detection

Smaller
THD

Newton-Raphson
method, finding the
junction point

Applying the
Switching
Angles

Modify the
reference
waveform

PWM signals
to the Inverters
Output voltage
to the RT-LAB

Figure. 4. 8. The flowchart for the four equations method.

109

Figure. 4. 9. Transient response for DC bus changing.

A) CHIL based simulation for selected harmonics compensation with high number of
dc levels
With CHIL, it is possible to test the algorithms with more voltage levels without
building more circuits. For selected harmonics compensation, as an example, an 11-level
multilevel inverter is simulated to compensate 0.2 p.u of 5th and 0.14 p.u. of 7th
harmonics of a three-phase nonlinear load. X m from the multilevel inverters side and
X L from the load side are 3% and 4% respectively which are typical magnitudes for the

power systems. The simulated parameters are listed in Table 4. 1. The system topology
from different sides are shown in Figure 4. 10 for more details.

Parameters
Per Unit (P.U)

Table 4.1. Real time simulation parameters for HIL.


Grid
Fundamental Current
Each DC Bus
Voltage
Magnitude
5.0
1.0
1.0

110

Xm

XL

0.03 0.04

Is1

Is+Ihm VL Current
Sensor

Vg

Grid

Nonlinear
Loads

XL
Xm

Is=Is1+Is2

Is2+Ihm

Vm

Multilevel
Inverters
Switching

Angles

Experimental
Setup

The selected harmonics


detection based on the proposed
method in the park transformer
and Four Equation
Method In DSP

ib

mt
...

RT-LAB

5t

1t
ia
ic

m mt 0

c
Figure 4.10. Circuit topology for CHIL in more details.

All results for current and harmonics are shown per unit.

Since it is a real-time

simulation, the results are monitored with a digital oscilloscope. Load current and
harmonic components are shown in Figures 4. 11, 4. 12, and 4. 13 respectively. These
harmonics are detected instantaneously, based on the proposed method and utilized for
switching angles calculation in multilevel inverters. As shown in the picture, the
proposed method for harmonics detection can provide the harmonics magnitude
precisely.

111

5 ms/div

0.5 A/div

Figure 4.11. Load current including the fifth and seventh harmonic components.

2 ms/div

0.2 A/div

Figure 4.12. The fifth instantaneous harmonics magnitude in the load current.

2 ms/div

0.1 A/div

Figure 4.13, The seventh instantaneous harmonics magnitude in the load current.
112

The staircase waveform for three-phase voltage, from multilevel, is shown in Figure 4.
14. In real applications, this voltage is generated by DERs for power generation and APF
purposes.

5 ms/div

2 V/div
Figure. 4.14 Three phase voltage waveform from multilevel inverters.

Three-phase grid current, after voltage injections by multilevel inverters, is shown in


Figure 4. 15. For the better analysis, the fifth and seventh harmonics in grid current are
depicted in Figures 4. 16 and 4. 17 respectively. The results show that harmonics from
the nonlinear load is compensated effectively. The grid-side currents have much less
harmonics contents than the load currents. The measured THD of grid current is less than
3%.

113

5 ms/div

0.5 A/div

Figure 4.15 The grid current after injecting the voltage by multilevel inverter.

20 ms/div

50 mA/div

Figure 4.16 The fifth instantaneous harmonics magnitude in the grid current.

100 ms/div

50 mA/div

Figure 4.17. The seventh instantaneous harmonics magnitude in the grid current.
114

B) PHIL based simulation


The circuit topology for the PHIL analysis is shown in Figure 4. 18 with more details.
The related simulation parameters of PHIL-based verification are summarized in Table 4.
2. The compensation target is 0.2 p.u of fifth and 0.14 p.u of seventh harmonics for a
single phase nonlinear load with a five-level inverter. To study the performance and the
capability of the system, two cases are studied for harmonics compensation without and
with active power injection.

Grid

Is+Ihm VL Current
Sensor

Vg

Nonlinear
Loads

XL
Xm

Is=Is1+Is2

Is2+Ihm

RT-LAB

Vm

Multilevel
Inverters
Switching Angles
The selected harmonics
detection based on the proposed
method in the park transformer
and Four Equation
Method In DSP

Experimental
Setup
q

b
ib

mt
...

Is1

5t

1t

ia
ic

m mt 0

Figure 4. 18. Circuit topology for CHIL in more details.

Parameters
Per Unit (P.U)

Table. 4. 2. Real time simulation parameters for PHIL.


Grid
Fundamental Current
Each DC Bus
Voltage
Magnitude
2.0
1.0
1.0
115

Xm

XL

0.03 0.04

Case 1: Selected harmonic compensation without active power injection


In this case, the multilevel inverter is just used for harmonics compensation. Multilevel
inverters voltage, simulated load and grid current are shown in Figure. 4. 19. Since it is a
real-time simulation, the both real and simulated circuit results are monitored with a
digital oscilloscope and can be measured together. As shown in the results, the quality of
the grid current is improved significantly. In this case, the THD in the grid current is
decreased to less than 3%. Since there is no need to increase the fundamental voltage for
power generation, the result shows that the area under the dc levels can be utilized
effectively for the harmonics compensation.

20 mS/div
Multilevel
inverter
voltage

100 V/div

Grid Voltage
in RT-LAB

2.5 V/div

Load Current
in RT-LAB

2 A/div

Grid current
in RT-LAB

2 A/div

Figure. 4. 19. SHE without power compensation.

Case 2: Selected harmonic compensation with active power injection


A limited amount of active power generation can be provided together with selected
harmonic compensation. When the effectiveness of selected harmonic compensation is to
116

limit the THD of the grid current to 5% with the same nonlinear load, the generated
active power can be as high as 1 p.u. The results are shown in Figure. 4. 20. At a higher
active power injection, the grid current THD will not be improved as desired. Based on
(4-8), since the magnitude of desired voltage is more than the dc level capabilities, the
output voltage from multilevel inverters and the resulting grid current have some
nonlinear behavior including sub-harmonics. This is shown in Figure. 4. 21, where the
active power injection is increased to be more than 1 p.u. It should be noted that the
measured current waveforms are shown in opposite direction compared with the previous
cases.
20 mS/div
Multilevel
inverter
voltage

100 V/div

Grid Voltage
in RT-LAB

2.5 V/div

Load Current
in RT-LAB

2 A/div

Grid current
in RT-LAB

2 A/div

Figure. 4.20. SHE with power compensation for low power.

117

20 mS/div
Multilevel
inverter
voltage

100 V/div

Grid Voltage
in RT-LAB

2.5 V/div

Load Current
in RT-LAB

2 A/div

Grid current
in RT-LAB

2 A/div

Figure. 4. 21. SHE for high power generation from the renewable sources.

4.6. Summary and Conclusion


In this chapter, a simple method is proposed for selected harmonics compensation and
power generation for distributed energy resources with multilevel inverter interfaces. For
APF, ancillary functions such as harmonics and reactive power compensations have also
been considered. This means that the distributed resources can be utilized as APF while
supplying active/reactive power to the load and the grid.
In this case, DERs will be controlled to:
1) Generate desired active and reactive power, for the load and the grid
2) Compensate selected harmonic currents caused by nonlinear loads.
To realize power generation at fundamental frequency and harmonics compensation at
the same time, maximum output voltage is limited by the dc bus input. This limitation is
118

also embodied in the available area for APF at a given power. For an APF approach,
since all the selected harmonics are odd numbers, each harmonic increases the total area
and limits the available area for the fundamental frequency. Furthermore, when the
harmonics compensation for load current is also included, the selected harmonics
significantly change the reference signal. Thus, there could be multiple junction points
between the reference and one single voltage level, which can lead to problems in angle
calculation.
For active power filtering, a swift and reliable harmonics detection algorithm is proposed
based on the Instantaneous Reactive Power (IRP) theory. Based on this idea, the
measured currents will be transformed from a-b-c to d-q axes at the selected harmonics
frequencies. The dc result for each transformation equals the harmonic magnitude for
that selected frequency. Therefore, magnitude for each selected harmonics can be
detected with minimum calculation.
Then, CHIL- and PHIL-based simulation/experimental results verify the effectiveness of
the proposed method and the discussions on the trade-off between harmonics
compensation and power generation. Based on the results, the proposed method can be
utilized as a simple and practical solution for online power generation as well as active
power filtering with distributed energy sources.

119

CHAPTER. 5

CONTRIBUTUION AND FUTURE WORK


5.1. Introduction
According to an IEA report, the worlds total CO2 emissions and primary energy supply
in 2030 will be twice as much as in 2000. This increasing energy consumption causes
serious environmental problems such as global warming and acid rain. Currently,
renewable energies are being considered as promising generation sources to meet the
continuously increasing demand of energy and to improve the reliability of electric power
systems. In this chapter the contributions of the proposed method are listed at the first.
Then, for the future study, the applications of distributed energy sources in smart grids
and further analyses on grid-tie inverters are discussed [138-140].

5.2. The Contributions


A brief summary of the main contributions of the proposed method is presented as
follows:

A four-equation method based simple and practical solution for SHE;

A method that utilizes additional and adjustment switching angles to provide


precise fundamental component compensation;
120

SHE for multilevel inverters with unbalanced DC inputs;

A four-equation method based simple solution for OPWM;

A method that utilizes the proposed OPWM method for multilevel inverters with
multiple switching angles per voltage step;

Weight oriented method for SHE in low modulation indices;

A study on harmonics cancelation and power generation for Grid-tie inverter.

In the next section, smart grids are discussed as possible directions for future studies.

5.3. Comprehensive Power Electronic Solutions for Smart Grid Applications


There are increasing needs to accelerate the development of low-carbon energy
technologies in order to address the global challenges of energy security, climate change
and economic growth. Smart grids are particularly important as they enable several other
low-carbon energy technologies, including electric vehicles, and variable renewable
energy sources.
A smart grid is an electricity network that uses communication technologies and other
advanced algorithms to monitor and control the transport of electricity from all
generation sources to meet the varying electricity demands of customers. Smart grids
organize the needs and capabilities of all energy sources, grid operators, customers and
electricity market to operate all parts of the system as efficiently as possible, minimizing
costs and environmental impacts while maximizing system reliability and stability.
The worlds electricity systems face a number of challenges, including ageing facilities,
continued growth in demand, the integration of increasing numbers of variable renewable
121

energy sources and electric vehicles, the need to improve the security of supply, the
power quality and the need to lower carbon emissions. Smart grid technologies offer
solutions not only to meet these challenges but also to develop a cleaner energy supply
that is more efficient, more affordable and more sustainable.
These challenges must also be addressed with different unique techniques for each
region, commercial and financial regulatory environment. Given the highly regulated
nature of electricity systems, must ensure that they engage with all consumers, including
equipment manufacturers and system operators, to develop technical and financial
solutions that enable and increase the potential of smart grids [141-146].
To achieve these goals, renewable energy sources and local distributed resources should
be considered for power delivery. Then, these sources are added to the traditional sources
of energy from the bulk generations for the distribution network. This network is
equipped with communication between different parts of the smart grid to improve power
quality and satisfy the increasing demands from the costumers. This topology for smart
grids is shown in Figure 5. 1 below [147]:

122

Bulk
Generations
Renewable
Energy Sources

Operation
and Control

Customers

Local and Distributed


Energy Resources

Figure 5. 1. Smart grid construction (Reference: CPRI).

Islanding is one of the typical operation scenarios of smart grids. It means part of a
distribution system becomes electrically isolated from the remainder of the power system,
yet continues to be energized by distributed energy resources (DERs) which are
connected to it locally. Current practice is such that almost all utilities require DERs to be
disconnected from the grid as soon as possible in case of islanding. IEEE 929-2000
standard [148] requires the disconnection of DERs once it is islanded, and IEEE 15472008 standard [149] specifies a maximum delay of two seconds for detection of an

123

unintentional island. Furthermore, all DERs are stopping to energize the distribution
system as there are failure modes with unintentional islanding.
Although there are some benefits of an islanding operation, there are some drawbacks as
well. Some of these drawbacks are summarized as follows [150-167]:
Line safety can be threatened by DERs feeding a system;
The voltage and frequency may not be maintained within a standard permissible level;
The islanded system may be inadequately grounded by the DERs interconnection;
Instantaneous reclosing could result in out of phase reclosing of DERs.
As a result for the transient conditions, large mechanical torques and currents are
generated that can damage the generators or other equipments. If out-of-phase reclosing
is occurring at a voltage peak, will generate a very severe capacitive switching transient
and in a lightly damped system, the crest over-voltage can approach three times the rated
voltage.
Due to these reasons, it is very important to detect the islanding mode quickly and
accurately. Several detection methods have been studied recently for islanding detection
in these applications. By using these analyses, more accurate strategies can be applied for
DERs usages based on loads and generation sides which is shown in Figure 5. 2.

124

Distribution Network
Low Voltage
Feeders

DC Source 1

Load #1

Islanding
System

Load #2

DC Source 2

Load #3

.
.
.

.
.
.
Load #M

DC Source N

Figure 5. 2. The general system topology for islanding.

Then, multilevel inverters can be used as an efficient solution to realize different


functions including dynamic or intentional islanding. By using the proposed method with
simple equations, a universal solution can be applied for a high-power inverter utilized in
distributed energy resources for smart grids. Further analysis and experimental
verification for this topic can be studied for future works. After CHIL and PHIL based
simulations, experimental setups can be implemented for grid-tie circuit construction.
Then, various control algorithms can be applied to achieve the better dynamic
performances of grid-tie inverters in the system level.
125

5.4. Summary and Conclusion


In this chapter, the contributions of the proposed method in a smart grid have been
summarized.
Smart grid technologies offer solutions not only to improve the security of supply and the
power quality, but also to develop a cleaner energy supply that is more efficient, more
affordable and more sustainable. For local distributed energy resources with different
characteristics, cascaded multilevel inverters can be used as an efficient solution for gridtie circuits for smart grid approaches. By using the proposed method with simple
equations, a universal electronic power solution can be applied for a high-power inverter
utilized in distributed energy resources for smart grids.
For online switching angle calculation with the proposed method, the dynamic
performances of energy sources and electrical loads should be considered. Subsequently,
the advanced analyses for control algorithms in the system level will be very useful.
More comprehensive solutions can be proposed by using islanding modes analyses.
These ideas can be verified by real-time simulation or experimental results.

126

REFERENCES
[1]. L. Freris, D. Infield, Renewable Energy in Power Systems, A John Wiley & Sons, Ltd,
Publication, 2008.
[2]. IEA PV 2009 annual report.
[3]. IEA USA 2008 annual report.
[4]. REN21 Renewable Status Report 2010.
[5]. S. Heier, Grid Integration of Wind Energy Conversion Systems. Hoboken, NJ: Wiley, 1998.
[6]. S. Muller, M. Deicke, and R. W. De Doncker, Doubly fed induction generator systems for
wind turbines, IEEE Ind. Appl. Mag., vol. 8, no. 3, pp. 2633, May/Jun. 2002.
[7]. F. M. Hughes, O. Anaya-Lara, N. Jenkins, and G. Strbac, Control of DFIG-based wind
generation for power network support, IEEE Trans.Power Syst., vol. 20, no. 4, pp. 19581966,
Nov. 2005.
[8]. J. M. Peter, Main future trends for power semiconductors from the state of the art to future
trends, presented at the PCIM, Nrnberg, Germany, Jun. 1999, Paper R2 667-671.
[9]. Electromagnetic Compatibility, General Guide on Harmonics and Interharmonics
Measurements and Instrumentation, IEC Standard 61000-4-7, 1997.
[10].

Electromagnetic Compatibility, Assessment of Emission Limits for Distorting Loads in

MV and HV Power Systems, IEC Standard 61000-3-6,1996.


[11]. L. Ake, S. Poul, and S. Fritz, Grid impact of variable speed wind turbines, in Proc.
EWEC, 1999, pp. 786789.
[12]. N. Kirby, L. Xu, M. Luckett, and W. Siepmann, HVDC transmission for large offshore
wind farms, Power Eng. J., vol. 16, no. 3, pp. 135141, Jun. 2002.
[13]. A preliminary study analysis of Very Large Scale Photovoltaic Power Generation (VLSPV) Systems, Report IEA-PVPS VI-5 1999:1, May 1999.
[14]. M. Kato, K. Komoto, K. Kichimi, T. Kurokawa, A Sensitivity Analysis of Very LargeScale Photovoltaic Power Generation (VLS-PV) Systems in Deserts, IEEE Conf on PV Energy
Conversion, pp. 2387 2390, Jan 2007.

127

[15]. K. Kurokawa, T. Takashima, T. Hirasawa, T. Kichimi, T. Imura, T. Nishioka, H. iitsuka,


N. Tashiro, Case studies of large-scale PV systems distributed around desert area of the world,
Solar Energy Materials and Solar Cells, pp.189-196, 1997.
[16]. N. Femia, G. Lisi, G. Petrone, G. Spagnuolo, and M. Vitelli, Distributed Maximum
Power Point Tracking of Photovoltaic Arrays: Novel Approach and System Analysis, IEEE
Trans on Indus Elect, vol. 55, no. 7, pp. 2610-2621, Jul 2008.
[17]. M. M. Casaro, D. C. Martins, Grid-connected PV system using a three-phase modified
dual-stage inverter, IEEE Power Elect Conf, COBEP, pp. 167-173, 2009.
[18]. M. Braun, G. Arnold, H. Laukamp, Plugging into the Zeitgeist--Experiences of
Photovoltaic Network Integration in Germany, IEEE Power and Energy Magazine, vol 7, Issue
3, pp. 63 76, May-Jun 2009.
[19].

V. Lughi, A. M. Pavan, S. Quaia, G. Sulligoi, Economical analysis and innovative

solutions for grid connected PV plants, in Proc. International Symposium on Power Electronics,
Electrical Drives, Automation and Motion,. SPEEDAM 2008 pp: 211-216, 11-13 Jun 2008.
[20]. T. Key, Finding a bright spot-- Utility experience, challenges, and opportunities in
Photovoltaic Power, IEEE Power and Energy Magazine, vol 7, Issue 3, pp. 34 44, May-Jun
2009.
[21]. J. Rodriguez, J. S. Lai and F. Z. Peng, Multilevel Inverters: Survey of Topologies,
Controls, and Applications, IEEE Transactions on Industry Applications, vol. 49, no. 4, Aug.
2002, pp. 724-738.
[22]. L. M. Tolbert, F. Z. Peng, and T. Habetler, Multilevel Converters for Large Electric
drives, IEEE Trans. Ind. Applicat.,vol.35,pp. 36-44, Jan./Feb. 1999.
[23]. J. S. Lai and F. Z. Peng, Multilevel Converters-A new Breed of Power Converters, IEEE
Trans. Ind. Applicat., vol.32,pp. 509-517, May/June 1996.
[24]. R. H. Baker and L. H. Bannister, Electric Power Converter, U.S. Patent 3 867 643, Feb.
1975.
[25]. M. F. Aiello, P. W. Hammond, and M. Rastogi, Modular Multi-level Adjustable Supply
with Series Connected Active Inputs, U.S. Patent 6 236 580, May 2001.
[26]. M. F. Aiello, P. W. Hammond, and M. Rastogi, Modular Multi-Level Adjustable Supply
with Parallel Connected Active Inputs, U.S. Patent 6 301 130,Oct. 2001.
[27]. J. P. Lavieville, P. Carrere, and T. Meynard, Electronic Circuit for Converting Electrical
Energy and a Power Supply Installation Making Use Thereof, U.S. Patent 5 668 711, Sept. 1997.

128

[28]. T. Meynard, J.-P. Lavieville, P. Carrere, J. Gonzalez, and O. Bethoux, Electronic Circuit
for Converting Electrical Energy, U.S. Patent 5 706 188, Jan. 1998.
[29]. M. F. Escalante, J. C. Vannier, and A. Arzande Flying Capacitor Multilevel Inverters and
DTC Motor Drive Applications, IEEE Transactions on Industry Electronics, vol. 49, no. 4, Aug.
2002, pp. 809-815.
[30]. L. M. Tolbert, F. Z. Peng, Multilevel Converters as a Utility Interface for Renewable
Energy Systems, in Proceedings of 2000 IEEE Power Engineering Society Summer Meeting, pp.
1271-1274.
[31]. L. M. Tolbert, F. Z. Peng, T. G. Habetler, A Multilevel Converter-Based Universal
Power Conditioner, IEEE Transactions on Industry Applications, vol. 36, no. 2, Mar./Apr. 2000,
pp. 596-603.
[32]. L. M. Tolbert, F. Z. Peng, T. G. Habetler, Multilevel Inverters for Electric Vehicle
Applications, IEEE Workshop on Power Electronics in Transportation, Oct 22-23, 1998,
Dearborn, Michigan, pp. 1424-1431.
[33]. A. Nabae, I. Takahashi, and H. Akagi, A New Neutral-point Clamped PWM inverter,
IEEE Trans. Ind. Applicat., vol. IA-17, pp. 518-523, Sept./Oct. 1981.
[34]. R. H. Baker, Bridge Converter Circuit, U.S. Patent 4 270 163, May 1981.
[35]. P. W. Hammond, Medium Voltage PWM Drive and Method, U.S. Patent 5 625 545,
Apr. 1977.
[36]. F. Z. Peng and J. S. Lai, Multilevel Cascade Voltage-source Inverter with Separate DC
source, U.S. Patent 5 642 275, June 24, 1997.
[37]. F. Z. Peng, J. S. Lai, J. W. McKeever, J. VanCoevering, A Multilevel Voltage-Source
Inverter with Separate DC Sources for Static Var Generation, IEEE Transactions on Industry
Applications, vol. 32, no. 5, Sept. 1996, pp. 1130-1138.
[38]. F. Z. Peng, J. S. Lai, Dynamic Performance and Control of a Static Var Generator Using
Cascade Multilevel Inverters, IEEE Transactions on Industry Applications, vol. 33, no. 3, May
1997, pp. 748-755.
[39]. F. Z. Peng, J. W. McKeever, D. J. Adams, A Power Line Conditioner Using Cascade
Multilevel Inverters for Distribution Systems, Conference Record - IEEE Industry Applications
Society 32nd Annual Meeting, 1997, pp. 1316-1321.
[40]. F. Z. Peng, J. W. McKeever, D. J. Adams, Cascade Multilevel Inverters for Utility
rd

Applications, Proceedings of 23 International Conference on Industrial Electronics, Control,


and Instrumentation, 1997, pp. 437-442.
129

[41]. E. Cengelci, S. U. Sulistijo, B. O. Woom, P. Enjeti, R. Teodorescu, and F. Blaabjerg, A


New Medium Voltage PWM Inverter Topology for Adjustable Speed Drives, in Conf. Rec.
IEEE-IAS Annu. Meeting, St. Louis, MO, Oct. 1998, pp. 1416-1423.
[42]. L. M. Tolbert, F. Z. Peng, and T. G. Habetler Multilevel Converters for Large Electric
Drives, IEEE Transactions on Industry Applications, vol. 35, no. 1, Jan/Feb. 1999, pp. 36-44.
[43]. G. Joos, X. Huang, B. T. Ooi, Direct-Coupled Multilevel Cascaded Series VAR
nd

Compensators, Conference Record IEEE Industry Applications Society 32 Annual Meeting,


1997, pp. 1608-1615.
[44]. J. S. Lai, F. Z. Peng, Multilevel Converters - A New Breed of Power Converters, IEEE
Transactions on Industry Applications, vol. 32, no. 3, May 1996, pp. 509-517.
[45]. K. Corzine, Y. Familiant, A New Cascaded Multilevel H-Bridge Drive, IEEE
Transactions on Power Electronics, vol. 17, no. 1, Jan 2002, pp. 125-131.
[46]. T. A. Meynard, H. Foch, Multi-Level Conversion: High Voltage Choppers and VoltageSource Inverters, IEEE Power Electronics Specialists Conference, 1992, pp. 397-403.
[47]. G. Sinha, T. A. Lipo, A New Modulation Strategy for Improved DC Bus Utilization in
Hard and Soft Switched Multilevel Inverters, IECON, 1997, pp. 670-675.
[48]. F. Z. Peng, A generalized multilevel converter topology with self voltage balancing,
IEEE Transactions on Industry Applications, vol. 37, pp. 611618, Mar./Apr. 2001.
[49]. Y. Chen, B. Mwinyiwiwa, Z. Wolanski, B.-T. Ooi, Unified Power Flow Controller
(UPFC) Based on Chopper Stabilized Multilevel Converter, IEEE Power Electronics Specialists
Conference, 1997, pp. 331-337.
[50]. P. W. Hammond, Four-quadrant AC-AC Drive and Method, U.S. Patent 6 166 513,
Dec. 2000.
[51]. R. W. Menzies, Y. Zhuang, Advanced Static Compensation Using a Multilevel GTO
Thyristor Inverter, IEEE Transactions on Power Delivery, vol. 10, no. 2, April 1995, pp. 732738.
[52]. Leon M. Tolbert, Fang Z. Peng, Tim Cunnyngham, John N. Chiasson, "Charge Balance
Control Schemes for Multilevel Converter in Hybrid Electric Vehicles," IEEE Transactions on
Industrial Electronics, vol. 49, no. 5, October 2002, pp. 1058-1065
[53]. M. D. Manjrekar, T. A. Lipo, A Hybrid Multilevel Inverter Topology for Drive
Applications, IEEE Applied Power Electronics Conference, 1998, pp. 523-529.
[54]. M. D. Manjrekar, T. A. Lipo, A Generalized Structure of Multilevel Power Converter,
IEEE Conference on Power Electronics, Drives, and Energy Systems, Australia, 1998, pp. 62-67.
130

[55]. C. Hochgraf, R. Lasseter, D. Divan, T. A. Lipo, Comparison of Multilevel Inverters for


Static Var Compensation, Conference Record - IEEE Industry Applications Society 29th Annual
Meeting, 1994, pp. 921-928.
[56]. W. A. Hill and C. D. Harbourt, Performance of medium voltage multilevel converters,
in Conf. Rec. IEEE-IAS Annu. Meeting, Phoenix, AZ, Oct. 1999, pp. 11861192.
[57]. B. M. Song and J. S. Lai, A multilevel soft-switching inverter with inductor coupling,
IEEE Trans. Ind. Applicat., vol. 37, pp. 628-636, Mar./Apr. 2001.
[58]. H. Fujita, H. Akagi, The Unified Power Quality Conditioner: The Integration of Seriesand Shunt-Active Filters, IEEE Transactions on Power Electronics, vol. 13, no. 2, March 1998,
pp. 315-322.
[59]. S.-J. Jeon, G.-H. Cho, A Series-Parallel Compensated Uninterruptible Power Supply with
Sinusoidal Input Current and Sinusoidal Output Voltage, IEEE Power Electronics Specialists
Conference, 1997, pp. 297-303.
[60]. F. Kamran, T. G. Habetler, A Novel On-Line UPS with Universal Filtering Capabilities,
IEEE Power Electronics Specialists Conference, 1995, pp. 500-506.
[61]. F. Kamran, T. G. Habetler, Combined Deadbeat Control of a Series-Parallel Converter
Combination Used as a Universal Power Filter, IEEE Transactions on Power Electronics, vol.
13, no. 1, Jan. 1998, pp. 160-168.
[62]. L. Moran, G. Joos, Principles of Active Power Filters, IEEE Industry Applications
Society Annual Meeting, October 1998, Tutorial Course Notes.
[63]. S. Muthu, J. M. S. Kim, Steady-State Operating Characteristics of Unified Active Power
Filters, IEEE Applied Power Electronics Conference, 1997, pp. 199-205.
[64]. A. van Zyl, J. H. R. Enslin, R. Spee, A New Unified Approach to Power Quality
Management, IEEE Transactions on Power Electronics, vol. 11, no. 5, Sept. 1996, pp. 691-697.
[65]. G. Sinha, T. A. Lipo, A Four-Level Rectifier-Inverter System for Drive Applications,
st

Conference Record IEEE Industry Applications Society 31 Annual Meeting, 1996, pp. 980987.
[66]. H. L. Liu, N. S. Choi, G. Ho. Cho, DSP Based Space Vector PWM for Three- Level
Inverter with DC-Link Voltage Balancing, Proceedings of the IECON 91 17th International
Conference on Industrial Electronics, Control, and Instrumentation, 1991, pp. 197-203.
[67]. H. L. Liu, G. H. Cho, Three-Level Space Vector PWM in Low Index Modulation Region
Avoiding Narrow Pulse Problem, IEEE Transactions on Power Electronics, vol. 9, no. 5, Sept.
1994, pp. 481-486.
131

[68]. G. Sinha, T. A. Lipo, A New Modulation Strategy for Improved DC Bus Utilization in
Hard and Soft Switched Multilevel Inverters, IECON, 1997, pp. 670-675.
[69]. B. P. McGrath, D. G. Holmes, and T. Lipo, Optimized Space Vector Switching
Sequences for Multilevel Inverters, IEEE Transactions on Power Electronics, vol. 18, no. 6,
Nov. 2003, pp. 1293-1301.
[70]. H. S. Patel and R. G. Hoft, Generalized Harmonic Elimination and Voltage Control in
Thyristor Converters: Part I harmonic elimination, IEEE Transactions on Industry
Applications, vol. 9, May/June 1973. pp. 310-317.
[71]. H. S. Patel and R. G. Hoft, Generalized Harmonic Elimination and Voltage Control in
Thyristor Converters: Part II Voltage Control Technique, IEEE Transactions on Industry
Applications, vol. 10, Sept./Oct. 1974, pp. 666-673.
[72]. L. Li, D. Czarkowski, Y. Liu, and P. Pillay, Multilevel Selective Harmonic Elimination
PWM Technique in Series-Connected Voltage Converters, IEEE Transactions on Industry
Applications, vol. 36, no. 1, Jan.-Feb. 2000, pp. 160 170.
[73]. J. N. Chiasson, L. M. Tolbert, K. J. McKenzie, Z. Du, A Complete Solution to the
Harmonic Elimination Problem, IEEE Transactions on Power Electronics, March 2004, vol. 19,
no. 2, pp. 491-499.
[74]. J. N. Chiasson, L. M. Tolbert, K. J. McKenzie, Z. Du, Control of a Multilevel Converter
Using Resultant Theory, IEEE Transactions on Control System Theory, vol. 11, no. 3, May
2003, pp. 345-354.
[75]. J. N. Chiasson, L. M. Tolbert, K. J. McKenzie, Z. Du, A New Approach to Solving the
Harmonic Elimination Equations for a Multilevel Converter, IEEE Industry Applications
Society Annual Meeting, October 12-16, 2003, Salt Lake City, Utah, pp. 640-645.
[76]. L. M. Tolbert, New Multilevel Carrier-Based Pulse Width Modulation Techniques
Applied to a Diode-Clamped Converter for Use as a Universal Power Conditioner, Ph.D.
Dissertation, Georgia Institute of Technology, 1999, pp. 76-103.
[77]. F. Kamran, T. G. Habetler, Combined Deadbeat Control of a Series-Parallel Converter
Combination Used as a Universal Power Filter, IEEE Transactions on Power Electronics, vol.
13, no. 1, Jan. 1998, pp. 160-168
[78]. S. J. Jeon, G.-H. Cho, A Series-Parallel Compensated Uninterruptible Power Supply with
Sinusoidal Input Current and Sinusoidal Output Voltage, IEEE Power Electronics Specialists
Conference, 1997, pp. 297-303.

132

[79]. F. Z. Peng, J. S. Lai A Static Var Generator Using a Staircase Waveform Multilevel
Voltage-Source Converter, PCIM/Power Quality Conference, Sept. 1994, Dallas, Texas, pp. 5866.
[80]. L. M. Tolbert, F. Z. Peng, T. G. Habetler, Multilevel PWM Methods at Low Modulation
Indices, IEEE Transactions on Power Electronics, vol. 15, no. 4, July 2000, pp. 719-725.
[81]. N. S. Choi, J. G. Cho, G. H. Cho, A General Circuit Topology of Multilevel Inverter,
IEEE Power Electronics Specialists Conference, 1991, pp. 96-103.
[82]. G. Sinha, T. A. Lipo, A Four-Level Inverter Drive with Passive Front End, IEEE Power
Electronics Specialists Conference, 1997, pp. 590-596.
[83].

S. Sirisukprasert, J. S. Lai, and T. H. Liu, Optimum Harmonic Reduction with a Wide

Range of Modulation Indexes for Multilevel Converters, IEEE Transactions on Industrial


Electronics, vol. 49, no. 4, Aug. 2002, pp. 875 881.
[84]. G. Carrara, S. Gardella, M. Marchesoni, R. Salutari, G. Sciutto, A New Multilevel PWM
Method: A Theoretical Analysis, IEEE Transactions on Power Electronics, vol. 7, no. 3, July
1992, pp. 497-505.
[85]. R. W. Menzies, P. Steimer, J. K. Steinke, Five-Level GTO Inverters for Large Induction
Motor Drives, IEEE Transactions on Industry Applications, vol. 30, no. 4, July 1994, pp. 938944.
[86]. S. Halasz, G. Csonka, A. A. M. Hassan, Sinusoidal PWM Techniques with Additional
Zero-Sequence Harmonics, Proceedings of 20th International Conference on Industrial
Electronics, Control, and Instrumentation, 1994, pp. 85-90.
[87]. D. G. Holmes, The Significance of Zero Space Vector Placement for Carrier Based PWM
th

Schemes, Conference Record IEEE Industry Applications Society 30 Annual Meeting, 1995,
pp. 2451-2458.
[88]. S. Bhattacharya, D. G. Holmes, D. M. Divan, Optimizing Three Phase Current
Regulators for Low Inductance Loads, Conference Record IEEE Industry Applications Society
th

30 Annual Meeting, 1995, pp. 2357-2364.


[89]. L. M. Tolbert, and T. G. Habetler, Novel Multilevel Inverter Carrier-Based PWM
Method, IEEE Transactions on Industry Applications, vol. 25, no. 5, Sep/Oct , 1999, pp. 10981107.
[90]. K. J. McKenzie, Eliminating Harmonics in a Cascaded H-bridges Multilevel Converter
using Resultant Theory, Symmetric Polynomials, and Power sums, Master thesis, The
University of Tennessee, 2004.
133

[91]. Z. Du, Active Harmonic Elimination in Multilevel Converters, Ph.D. Dissertation, The
University of Tennessee, 2005, pp. 33-36.
[92]. S. Khomfoi, L. M. Tolbert, Fault Diagnosis System for a Multilevel Inverters Using a
Neural Network, IEEE Industrial Electronics Conference, November 6-10, 2005, Raleigh, North
Carolina.
[93]. J. Wang, Y. Huang, and F.Z. Peng, A practical harmonics elimination method for
multilevel inverters in Proc. IEEE on Ind. Applicat. vol. 3, pp. 1665-1670, Oct. 2005.
[94]. A. Schonung, and, H. Stemmler, Static frequency changer with subharmonic control in
conjunction with reversible variable speed AC drives, Brown Boveri Rev, pp. 555-577, 1964.
[95]. S. R. Bowes, New sinusoidal pulsewidth-modulated inverter, IEE Proc, no.122, (11),
pp. 1279-1285, 1975.
[96].

F. G. Turnbull, Selected harmonic reduction in static DC-AC inverters, IEEE Trans.

Communication and Electronics, vol. 83, pp. 374-378, Jul 1964.


[97]. J. Vassallo, J. C. Clare, P. W. Wheeler, Power-equalized harmonic-elimination scheme
for utility-connected cascaded H-bridge multilevel converters, Ind Elect. Society, 2003. IECON
'03. The 29th Annual Conf. of the IEEE, vol. 2, pp. 1185 1190, Nov. 2003.
[98]. H. S. Pate1 and R. G. Hoft, Generalized technique of harmonics elimination and voltage
control in Thyristor inverts: Part I Harmonic Elimination, IEEE Trans. Ind. Applicat. vol. IA-9,
no. 3, pp. 310 -317, Jun, 1973.
[99]. G. Carrara, S. Gardella, M. Marchesoni, R. Salutari, and G. Sciutto, A new multilevel
PWM method: A theoretical analysis, IEEE Trans. Power Elect. vol. 7, no. 4, pp. 497505, Jul.
1992.
[100]. H. Lou, C. Mao, D. Wang, J. Lu, PWM optimization for three-level voltage inverter
based on clonal selection algorithm, IET Electric Power Applica, Vvol. 1, Issue 6, pp. 870
878, Nov. 2007
[101]. H. Qing; G. Qingding; Yu. Ongmei, The sliding mode control of power electronic
converters with fuzzy logic, Sixth International Conference on Electrical Machines and Systems,
ICEMS 2003, vol.1, pp.411 - 414, 9-11 Nov. 2003.
[102]. H. Shiyan, D. Czarkowski, A novel simplex homotopic fixed-point algorithm for
computation of optimal PWM patterns Han Huang, 35th IEEE Power Electronics Specialists
Conference, PESC, vol. 2, pp.1263 1267, June 2004

134

[103]. M. Mohaddes, A. Gole, M. McLaren, Hardware implementation of neural network


controlled optimal PWM inverter using TMS320C30 board, IEEE Communications, Power and
Computing. Conference Proceedings, pp.168 173, May 1997.
[104]. T. Kato, Sequential homotopy-based computation of multiple solutions for selected
harmonic elimination in PWM inverters, IEEE Trans. on Circuit and System., vol. 46, pp. 586
593, 1999.
[105]. N.A. Azli, S.N. Wong, Development of a DSP-based Fuzzy PI Controller for an Online
Optimal PWM Control Scheme for a Multilevel Inverter, International Conference on Power
Electronics and Drives Systems, PEDS 2005. vol 2, pp.1457 1462, Nov. 2005
[106]. J. Chiasson, L. Tolbert, K. McKenzie, and Z. Du, Elimination of harmonics in a
multilevel converter using the theory of symmetric polynomials and resultants, IEEE Trans.
Control Syst. Technol., vol. 13, no. 2, pp. 216223, Mar 2005.
[107]. J. Holtz, J.O. Krah, Adaptive optimal pulse-width modulation for the line-side converter
of electric locomotives, IEEE Transactions on Power Elecront, vol 7, Issue 1, pp.205
211, Jan. 1992.
[108]. B. Ozpineci, L. M. Tolbert, and J. N. Chiasson, Harmonic optimization of multilevel
converters using genetic algorithms, IEEE Power Electron. Lett., vol. 3, no. 3, pp. 9295, Sep.
2005.
[109]. J. Sun, S. Beineke, and H. Grotstollen, Optimal PWM based on real-time Solution of
harmonic elimination equations, IEEE Trans Power Elect. vol. 11, no. 4, pp. 612-621, Jul. 1996.
[110]. Y. Liu, H. Hong, and A. Q. Huang, Real-time calculation of switching angles minimizing
THD for multilevel inverters with Step modulation, IEEE Trans on Ind. Elect. vol. 56, no. 2, pp.
285-293, Feb 2009.
[111]. J. N. Chiasson, L. M. Tolbert, Z. Du, and K. J. McKenzie, The use of power sums to
solve the harmonic elimination equations for multilevel converters, Euro. Power Elect. Drives,
vol. 15, no. 1, pp. 1927, Feb. 2005.
[112]. J. Pontt, J. Rodriguez, and R. Huerta, Mitigation of non-eliminated harmonics of
SHEPWM three-level multi-pulse three-phase active front end converters with low switching
frequency for meeting standard IEEE-519-92, IEEE Trans. Power Elect., vol. 19, no. 6, pp.
15941600, Nov. 2004.
[113]. M.S.A. Dahidah, V.G. Agelidis, Selective harmonic elimination PWM control for
cascaded multilevel voltage source converters: a generalized formula, IEEE Trans. on Power
Electron., vol. 23, pp. 16201630, Jul. 2008.
135

[114]. V.G. Agelidis, A.I. Balouktsis, M.S.A. Dahidah, A five-level symmetrically defined
selective harmonic elimination PWM strategy: analysis and experimental validation, IEEE
Trans. on Power Electron., vol. 23, pp. 1926, Jan. 2008.
[115]. J. Wang, D. Ahmadi, A precise and practical harmonic elimination method for multilevel
inverters, IEEE Trans. Industry Application, vol. 46, Issue. 2, pp. 857-865, Mar 2010.
[116]. D. Ahmadi and J. Wang, Selective Harmonic Elimination for Multilevel Inverters with
Unbalanced DC Inputs, in Proc. IEEE Vehicle Power and Propulsion Conference (VPPC). pp.
773-778, Sep. 2009.
[117]. D. Ahmadi and J. Wang, Weight Oriented Optimal PWM in low Modulation Indices for
Multilevel Inverters with Unbalanced DC Sources, in Proc. IEEE Applied Power Electronics
Conference and Exposition (APEC), pp. 1038 1042, Feb. 2010.
[118]. D. Ahmadi, K. Zou, C. Li, Y. Huang, J. Wang A Universal Selective Harmonics
Elimination Method for High Power Inverters, IEEE Transactions on Power Elect, vol. 26,
no.10, pp. 2743-2752, Oct. 2011.
[119]. F. Blaabjerg, R. Teodorescu, M. Liserre,and A. V. Timbus, Overview of control and grid
synchronization for distributed power systems, IEEE Trans Ind. Electron.,vol. 53, no. 5, pp.
13981409, Oct. 2006.
[120]. D. M. Baker, V. G. Agelidis, and C. V. Nayer, A comparison of tri-level and bi-level
current controlled grid-connected single-phase full-bridge inverters, in Proc. IEEE Int. Symp.
Ind. Electron., 1997, pp. 463468.
[121]. F. J. ter Reide and J. Wanner, High-performance inverters for gridconnected PV
applications, in Proc. IEEE Photovolt. Spec. Conf., 1994,pp. 913916.
[122]. K. Kurokawa, T. Takashima, T. Hirasawa, T. Kichimi, T. Imura, T. Nishioka, H. iitsuka,
N. Tashiro, Case studies of large-scale PV systems distributed around desert area of the world,
Solar Energy Materials and Solar Cells, pp.189-196, 1997.
[123]. N. Femia, G. Lisi, G. Petrone, G. Spagnuolo, and M. Vitelli, Distributed Maximum
Power Point Tracking of Photovoltaic Arrays: Novel Approach and System Analysis, IEEE
Trans on Indus Elect, vol. 55, no. 7, pp. 2610-2621, Jul 2008.
[124]. IEC 61000-3-2, 1998: Limits for harmonic current emissions (equipment input current <
16 A per phase).
[125]. IEEE 519-1992 Recommended Practices and Requirements for Harmonic Control in
Electrical Power Systems.

136

[126]. L. Asiminoaei, F. Blaabjerg, S. Hansen, and P. Thogersen, Adaptive Compensation of


Reactive Power With Shunt Active Power Filters, IEEE Trans. Ind. Applicat. vol. 44, no. 3, pp.
867-877 , May/Jun. 2008.
[127]. A. Varschavsky, J. Dixon, M. Rotella, and L. Moran, Cascaded Nine-Level Inverter for
Hybrid-Series Active Power Filter, Using Industrial Controller, IEEE Trans. Ind. Elect. vol. 57,
no. 8, pp. 2761-2767 , Aug 2010.
[128]. A. Hamadi, S. Rahmani, and K. Al-Haddad, A Novel Hybrid Series Active Filter for
Power Quality Compensation, in Proc. Power Electron. Spec. Conf., 2007, pp. 10991104.
[129]. M. Singh, V. Khadkikar, A. Chandra, and R. K. Varma, Grid Interconnection of
Renewable Energy Sources at the Distribution Level With Power-Quality Improvement
Features, IEEE Trans. Power. Delivery. vol. 26, no. 1, pp. 307-315 , Jan 2011.
[130]. V. F. Corasaniti, M. B. Barbieri, P. L. Arnera, and M. I. Valla, Hybrid Active Filter for
Reactive and Harmonics Compensation in a Distribution Network, IEEE Trans. Ind. Elect. vol.
56, no. 3, pp. 670-677 , Mar 2009.
[131]. B. Singh, K. Al-Haddad, and A. Chandra, A Review of Active Filters for Power Quality
Improvement, IEEE Trans. Ind. Electron., vol. 46, no. 5, pp. 960971, Oct. 1999.
[132]. H. Akagi, E. Watanabe, and M. Aredes, Instantaneous Power Theory and Applications to
Power Conditioning (IEEE Press Series on Power Engineering). New York: Wiley, 2007.
[133]. L. A. Moran, J. W. Dixon, and R. R. Wallace, A Three-phase Active Power Filter
Operating with Fixed Switching Frequency for Reactive Power and Current Harmonic
Compensation, IEEE Trans. Ind. Electron., vol. 42, no. 4, pp. 402408, Aug. 1995.
[134]. H. P. To, F. Rahman, and C. Grantham, An Adaptive Algorithm for Controlling
Reactive Power Compensation in Active Power Filters, in Conf. Rec. IEEE IAS Annu. Meeting,
2004, vol. 1, pp. 102107.
[135]. H. Akagi, Y. Kanazawa and A. Nabae, Instantaneous reactive power compensators
comprising switching devices without energy storage components, IEEE Trans. Ind. AppL, vol.
20, pp. 625-630, May/Jun 1984.
[136]. F. Z. Peng, and J. Lai, Generalized Instantaneous Reactive Power Theory for Threephase Power Systems, IEEE Trans. Instr and Measure. vol. 45, no. 1, pp. 293-297 , Feb. 1996.
[137]. F. Z. Peng, G.W. Ott, D.J. Adams, Harmonic and Reactive Power Compensation based
on the Generalized Instantaneous Reactive Power Theory for Three-Phase Four-Wire Systems ,
IEEE Trans. Power. Elect. vol. 13, Issue. 6, pp. 1174-1181 , 1998.

137

[138]. Office of Electric Transmission and Distribution, U.S. Dept. Energy, Grid 2030: A
national version for electricitys second 100 years, Jul. 2003.
[139]. Towards a Smarter Grid, ABBs vision for the power system of the future, ABB Inc.
report, USA 2009.
[140]. The

smart

grid:

an

introduction,

(US)

Department

of

Energy,

2008

[http://www.oe.energy.gov/SmartGridIntroduction.htm].
[141]. SmartGrids, European technology platform for the electricity networks of the future
[http://www.smartgrids.eu/].
[142]. A. Chuang and M. McGranaghan, Functions of a local controller to coordinate distributed
resources in a smart grid, in Proc. IEEE PES Gen. Meet. 2008, pp. 16.
[143]. M. H. J. Bollen and et al, "Power Quality aspects of Smart Grid, International conference
on renewable Energies and Power Quality (CREPQ10), Granada, Spain, 23-25 March, 2010.
[144]. E. Lambert, J. Fremont, and C. Bouquet, Method and applications of IEC common
information model standard for distribution operations:A path towards smart grids development,
in Proc. IET-CIRED Seminar SmartGrids Distrib., Jun. 2324, 2008, pp. 14.
[145]. J. R. Roncero, Integration is key to Smart Grid management, in Proc. IET-CIRED
Seminar SmartGrids for Distrib., Jun. 2324, 2008, pp.14.
[146]. D. G. Hart, Using AMI to realize the Smart Grid, in Proc. IEEE PES Gen. Meet. 2008,
pp. 16.
[147]. International

Conference

on

Roadmap

for

Smart

GRID

Home

CPRI

(www.cpri.in/smartgrid/)
[148]. IEEE Std 929-2000, IEEE Recommended Practice for Utility Interface of Photovoltaic
(PV) Systems, lnstiute of Electrical and Electronics Engineers, Inc., New York, NY.
[149]. 1547.2-2008- IEEE Application Guide for IEEE Std 1547, IEEE Standard for
Interconnecting Distributed Resources with Electric Power Systems.
[150]. H. Zeineldin, E. El-Saadany, and M. Salama, Impact of dg interface control on islanding
detection and nondetection zones, IEEE Trans.Power Del., vol. 21, no. 3, pp. 15151523, Jul.
2006.
[151]. Q. Zhao, K. Sun, D. Zheng,. "A study of system splitting strategies for island operation of
power system: a two-phase method based on OBDDs," IEEE trans. Power syst. pp. 1556-1565.
2003.

138

[152]. H. Geng, D. Xu, B. Wu, and G. Yang, Design and comparison of active frequency
drifting islanding detectionmethods for dg system with different interface controls, in Proc. 2nd
IEEE Int. Symp. Power Electron. Distrib. Generat. Syst., Jun. 2010, pp. 459465.
[153]. S. J. Huang and F.-S. Pai, Design and operation of grid-connected photovoltaic system
with power-factor control and active islanding detection, IEE Proc.Generat., Transmiss.
Distrib., vol. 148, no. 3, pp. 243250,May 2001.
[154]. J. Kim, J. Lee, and K. Nam, Inverter-based local ac bus voltage controlutilizing two dof
control, IEEE Trans. Power Electron., vol. 23, no. 3,pp. 12881298, May 2008.
[155]. M. Kashem and G. Ledwich, Distributed generation as voltage supportfor single wire
earth return systems, IEEE Trans. Power Del., vol. 19,no. 3, pp. 10021011, Jul. 2004.
[156]. IEEE Recommended Practice for Industrial and Commercial Power SystemsAnalysis.
(Color Book SeriesBrown Book), IEEE Standard 399-1997, 1998.
[157]. H. Karimi, H. Nikkhajoei, and R. Iravani, Control of an electronically coupled
distributed resource unit subsequent to an islanding event, IEEE Trans. Power Del., vol. 23, no.
1, pp. 493501, Jan. 2008.
[158]. L. Lopes and H. Sun, Performance assessment of active frequency drifting islanding
detectionmethods, IEEE Trans. EnergyConvers., vol. 21, no. 1, pp. 171180, Mar. 2006.
[159]. W. Bower and M. Ropp, Evaluation of islanding detection methods for photovoltaic
utility-interactive power systems, Rep. IEA-PVPS, Tech. Rep. T5-09:2002, Int. Energy Agency,
Mar. 2002.
[160]. G. Kern, Sunsine300, utility interactive ac module anti-islanding test results, in Conf.
Record 26th IEEE Photovolt. Spec. Conf., Sep./Oct., 1997, pp. 12651268.
[161]. P. Mahat, Z. Chen, and B. Bak-Jensen, A hybrid islanding detection technique using
average rate of voltage change and real power shift, IEEE Trans Power Del., vol. 24, no. 2, pp.
764771, Apr. 2009.
[162]. H. Zeineldin and J. Kirtley, A simple technique for islanding detection with negligible
nondetection zone, IEEE Trans Power Del., vol. 24, no. 2, pp. 779786, Apr. 2009.
[163]. G. Smith, P. Onions, and D. Infield, Predicting islanding operation of grid connected PV
inverters, IEE Proc.Electr. Power Appl., vol. 147, no. 1, pp. 16, Jan. 2000.
[164]. M. Ropp, M. Begovic, A. Rohatgi, G. Kern, S. Bonn, R. H., and S. Gonzalez,
Determining the relative effectiveness of islanding detection methods using phase criteria and
non-detection zones, IEEE Trans. Energy Convers., vol. 15, no. 3, pp. 290296, Sep. 2000.

139

[165]. M. Ropp, M. Begovic, and A. Rohatgi, Analysis and performance assessment of the
active frequency drift method of islanding prevention, IEEE Trans Energy Convers., vol. 14, no.
3, pp. 810816, Sep. 1999.
[166]. G.-K. Hung, C. Chang, and L. Chen, Automatic phase-shift method for islanding
detection of grid-connected photovoltaic inverters, IEEE Trans Energy Convers., vol. 18, no. 1,
pp. 169173, Mar. 2003.
[167]. G. Hernandez-Gonzalez and R. Iravani, Current injection for active islanding detection of
electronically-interfaced distributed resources, IEEE Trans Power Del., vol. 21, no. 3, pp. 1698
1705, Jul. 2006.

140

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