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The integrated Circuit (IC) chip containing the CPU is called the microprocessor and the entire
computer including the microprocessor, memory and I/O is called a microcomputer.
The CPU is connected to memory and I/O devices through a strip of wires called a bus. The bus inside
a computer carries information from place to place. In every computer there are three types of busses:
1. Address Bus: The address bus is used to identify the memory location or I/O device the processor
intends to communicate with. The width of the Address Bus rages from 20 bits (8086) to 36 bits for
(Pentium II).
2. Data Bus: Data bus is used by the CPU to get data from / to send data to the memory or the I/O
devices. The width of a microprocessor is used to classify the microprocessor. The size of data bus
of Intel microprocessors vary between 8-bit (8085) to 64-bit (Pentium).
3. Control Bus. How can we tell if the address on the bus is memory address or an I/O device
address? This where the control bus comes in. Each time the processor outputs an address it also
activates one of the four control bus signals: Memory Read, Memory Write, I/O Read and I/O Write.
¾ The address and control bus contains output lines only, therefore it is unidirectional, but the data bus is
bidirectional.
¾ There two types of memory used in microcomputers:
♦ RAM (Random Access Memory/ Read-Write memory) is used by the computer for the temporary
storage of the programs that is running. Data is lost when the computer is turned off. So known as
volatile memory.
♦ ROM (Read Only Memory) the information in ROM is permanent and not lost when the power is
turned off. Therefore, it is called nonvolatile memory.
Note that RAM is sometimes referred as primary storage, where magnetic /optical disks are called
secondary storage.
Address Bus
CPU
Data Bus
Read/
Write Control Bus
Internal organisation of a microcomputer
Instruction Register
Instruction Decoder Control
Flags Timing and control Bus
ALU signals are generated
Data
Bus
Internal Register A
Busses Register B
Register C
Register D
Remainder
25/2 = 12 1 LSB (least significant bit)
12/2 = 6 0
6/2 = 3 0
3/2 = 1 1
1/2 = 0 1 MSB (most significant bit)
1101012 = Decimal
1x20 =1x1 = 1
0x21 =0x2 = 0
1x22 =1x4 = 4
0x23 =0x8 = 0
1x24 =1x16 = 16
1x25 =1x32 = + 32
53 1101012 =5310
Hexadecimal Number system:
Hexadecimal system is defined to be the base 16 number system and is used as a convenient representation of
binary numbers.
Quotient Remainder
45/16 = 2 13 (hex D) LSD (least significant bit)
2/16 = 0 2 MSD (most significant bit)
6B216 = Decimal
2 x 160 = 2 x 1 = 2
11x161 = 11x16 = 176
6 x 162= 6x256 = + 1536
1714 Therefore, 6B216 = 171410
Subtraction Example:
59F LSD : 15 - 8 =7
– 2B8 25 (9+16) – 11 (B) = 14, which is E
2E7 MSD 4 (5–1) –2 =2
ASCII Code : (American Standard Code for Information Interchange)
Hex Symbol Hex Symbol
41 A 61 a
42 B 62 b
42 C 62 c
44 D 64 D
45 E 65 E
46 F 66 F
47 G 67 G
48 H 68 H
49 I 69 I
4A J 6A J
4B K 6B K
4C L 6C L
4D M 6D M
4E N 6E N
4F O 6F O
50 P 70 P
51 Q 71 Q
52 R 72 R
53 S 73 S
54 T 74 T
55 U 75 U
56 V 76 V
57 W 77 W
58 X 78 X
59 Y 79 Y
5A Z 7A Z
bit 0
nibble 0000
byte 0000 0000
word 0000 0000 0000 0000
double-word 0000 0000 0000 0000 0000 0000 0000 0000
quad-word 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
1 kilobyte is 210 bytes. (Abbreviation K is used) Some floppy disks holds 356K bytes of data.
1 megabyte is 220 bytes. (a little over a million 1,048,576)
1 gigabyte is 230 bytes (over 1 trillion)
1 terabyte is 240 bytes
EEE 410 – Microprocessors I
Fall 05/06 – Lecture Notes # 2
Outline of the Lecture
Brief History of 80x86 Family of Microprocessors
Pipelining and Registers
Introduction to Assembly Programming
8086 8080/8085
1 megabyte Memory of 64 kilobyte
(20-bit add. bus) (16-bit add. bus)
16-bit Data bus 8-bit data bus
Pipelined processor Non-pipelined µpr
(first single-chip µpr.)
¾ In a system with pipelining, the data and the address bus are busy transferring data while the CPU is
processing information.
¾ IBMs decision to pick up 8088 as their choice of microprocessor in designing the IBM PC.
• 8088-based IBM PC was enormous success, because IBM and Microsoft made it an open
system.
• This enabled the cloning of this system and resulted a huge growth in both hardware and
software designs based on IBM PC.
• In contrast IBMs main competitor Apple computer introduced a closed system and blocked all
attempts of cloning.
¾ All microprocessors discussed so far were general-purpose microprocessors and could not handle
mathematical operations rapidly. For this reason, 8087, 80287, 80387 numeric data processing chips
called math co-processors were used.
¾ 80486: introduced in 1989 with 32-bit internal-external data bus and 32-bit address bus.
• built in math co-processor in a single chip.
• Introduction of cache memory ( Static RAM with very fast access time)
fetch 3 exec 3
¾ Intel implemented the concept of pipelining by splitting the internal structure of 8088/86 into two
sections.
• the execution unit (EU)
• These two sections work simultaneously. BIU accesses memory and peripherals while the EU
executes the instructions previously fetched.
• It only works if BIU keeps ahead of EU. Thus BIU has a buffer of queue. (8088 has 4 byte, and
8088 has 6 bytes).
• If the execution of any instruction takes to long, the BIU is filled to its maximum capacity and
busses will stay idle. It starts to fetch again whenever there is 2-byte room in the queue.
• When there is a jump instruction, the microprocessor must flush out the queue. When a jump
instruction is executed BIU starts to fetch information from the new location in the memory. In
this situation EU must wait until the BIU starts to fetch the new instruction. This is known as
branch penalty.
Registers of 8086 Microprocessor
¾ In the CPU, registers are used store information temporarily. The information can be one or two bytes of
data, or the address of data.
¾ In 8088/8086 general-purpose registers can be accessed as either16-bit or 8-bit registers. All other
registers can be accessed as full 16-bit registers.
AX
16-bit register
AH AL
8-bit reg. 8-bit reg.
8-bit register:
D7 D6 D5 D4 D3 D2 D1 D0
16-bit register:
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
¾ Different registers are used for different functions. Registers will be explained later within the context of
instructions and their applications.
¾ The first letter of each general register indicates its use.
• AX is used for the accumulator.
• BX is used for base addressing register.
• CX is used for counter loop operations.
• DX is used to point out data in I/O operations.
Registers of 8086
Category Bits Register Names
General 16 AX, BX, CX, DX
8 AH, AL, BH, BL, CH, CL, DH, DL
Pointer 16 SP (stack pointer), BP(base pointer)
Index 16 SI (source index), DI(destination index)
Segment 16 CS (code segment), DS(data segment)
SS (stack segment), ES(extra segment)
Instruction 16 IP (instruction pointer)
Flag 16 FR (flag register)
¾ Note: the general registers can be accessed as full 16 bits (such as AX), or as the high byte only (AH) or
low byte only (AL). The others are not!!
INTRODUCTION TO ASSEMBLY PROGRAMMING
Machine Language:
¾ Programs consist of 0s and 1s are called machine language.
¾ Assembly Languages provided mnemonics for machine code instructions.
¾ Mnemonics refer to codes and abbreviations to make it easier for the users to remember.
MOV instruction
mnemonic operands
Example: (8-bit )
MOV CL,55H ;move 55H into register CL
MOV DL,CL ;move/copy the contents of CL into DL (now DL=CL=55H)
MOV BH,DL ;move/copy the contents of DL into BH (now DL=BH=55H)
MOV AH,BH ;move/copy the contents of BH into AH (now AH=BH=55H)
Example: (16-bit)
MOV CX,468FH ;move 468FH into CX (now CH =46 , CL=8F)
MOV AX,CX ;move/copy the contents of CX into AX (now AX=CX=468FH)
MOV BX,AX ;now BX=AX=468FH
MOV DX,BX ;now DX=BX=468FH
MOV DI,AX ;now DI=AX=468FH
MOV SI,DI ;now SI=DI=468FH
MOV DS,SI ;now DS=SI=468FH
MOV BP,DS ;now BP=DS=468FH
¾ Data can be moved among all registers except the flag register. There are other ways to load the flag
registers. To be studied later.
¾ Source and destination registers have to match in size.
¾ Data can be moved among all registers (except flag reg.) but data can be moved directly into
nonsegment registers only. You can’t move data segment registers directly.
Examples:
MOV BX,14AFH ;move 14AFH into BX (legal)
MOV SI,2345H ;move 2345H into SI (legal)
MOV DI,2233H ;move 2233H into DI (legal)
MOV CS,2A3FH ;move 2A3FH into CS (illegal)
MOV DS,CS ;move the content of CS into DS (legal)
MOV FR,BX ;move the content of BX into FR (illegal)
MOV DS,14AFH ;move 14AFH into DS (illegal)
¾ Important points:
• Values cannot be loaded directly into (CS,DS,SS and ES)
MOV AX,1234H ; load 1234H into AX
MOV SS,AX ;load the value in AX into SS
ADD instruction
mnemonic operands
Ex:
MOV AL,24H ;move 24H into AL
MOV DL,11H ;move 11H into DL
ADD AL,DL ;AL=AL+DL (AL=35H) (DL =11H)
¾ If one register data is followed by an immediate data, it is called the immediate operand.
MOV CH,24H
ADD CH,11H
¾ 8-bit registers can hold FFH (255) maximum. Addition of larger numbers can be performed by
the 16-bit nonsegment registers.
MOV AX,34EH
MOV DX,6A5H
ADD DX,AX ;DX=DX+AX (DX=9F3H)
MOV CX,34EH
ADD CX,6A5H ;CX=34EH+6A5=9F3H
Segment:
¾ A segment is an area of memory that includes up to 64K bytes and begins an address evenly
divisible by 16 (such an address ends in 0H).
¾ Assembly Language Program consists of three segments:
• code segment : contains the program code (instructions)
• data segment : used to store data (information) to be processed by the program
• stack segment: used to store information temporarily.
Logical and Physical Address
¾ Physical Address is the 20-bit address that actually put on the address bus. (in 8086)
• Has a range of 00000H - FFFFFH
¾ Offset Address is a location within 64K byte segment range.
• Has a range of 0000H - FFFFH
¾ Logical Address consists of segment address and offset address.
CS IP
2 5 0 0 : 9 5 F 3
Logical Address: CS:IP
Offset address
• Physical Address is generated by shifting the CS one hex digit to the left and adding IP.
The microprocessor will retrieve the instruction in turn memory locations starting from
2E5F3.
¾ The area of memory allocated strictly for data is called data segment.
¾ Just as the code segment is associated with CS and IP as segment register and offset. The data
segment uses DS and an offset value. In 8086 BX, SI and DI are used to hold the offset address.
Other way: Assume that the offset for data segment begins at 200H
DS:0200 = 25
DS:0201 = 12
DS:0202 = 15 within data segment
DS:0203 = 1F
DS:0204 = 2B
In such a case the low byte goes to the low memory location and high byte goes to the high
memory location.
DS:1500 = F3 DS:1501 = 35
This convention is called little endian convention: This convention is used by Intel. The big endian
convention is the opposite, where the high byte goes to the low address and low byte goes to the
high address. Motorolla microprocessor uses this convention.
EEE 410 – Microprocessors I
Fall 04/05 – Lecture Notes # 4
¾ The 20-bit address of the 8086/8088 allows 1M byte of (1024 K bytes) memory space with the
address range 00000-FFFFF.
¾ The allocation of the memory is called a memory map.
00000H
RAM
640K
9FFFFH
Video Display A0000H
RAM 128K
BFFFFH
C0000H
ROM
256K
FFFFFH
RAM: Memory locations from 00000H to 9FFFFH (640K) are set aside for RAM. In an IBM PC
the DOS operating system first allocates the available RAM on the PC for its own use and let the
rest be used for applications such as word processors.
The amount of memory used by DOS varies among its various versions. That is why we do
not assign any values for the CS, DS, SS, and ES. Memory management functions within DOS
handle this for the operating system.
Video RAM: Memory locations from A0000H to BFFFFH (128K) are set aside for video. This
amount varies depending on the video board installed on the PC.
ROM: Memory locations from C0000H to FFFFFH (256K) are set aside for ROM. First 64 K bytes
is used by BIOS (Basic Input/Output System) ROM. Some of the remaining space is used for
adapter cards.
Function of BIOS ROM:
• CPU can only execute programs that are stored in memory, there must be some permanent
(nonvolatile) memory to hold the programs telling the CPU what to do when the power is turned
on.
• BIOS contains programs to test RAM and other components connected to the CPU.
STACK: PUSHING AND POPPING OPERATIONS
Ex: SP=1236, AX=24B6, DI=85C2, and DX=5F93, show the contents of the stack as each
instruction is executed.
PUSH AX
PUSH DI
PUSH DX
Solution:
SS:1230 93
SS:1231 5F
SS:1232 C2 C2
SS:1233 85 85
SS;1234 B6 B6 B6
SS;1235 24 24 24
SS:1236
• Note that in 80x86 the lower byte of the register is stored to the lower address.
Popping the stack
¾ Loading the contents of the stack into the CPU register is called a pop.
Ex: assume that the stack is shown below, and SP=18FA, show the contents of the stack and
registers as each of the following instructions is executed.
POP CX
POP DX
POP BX
Solution:
SS:18FA 23
SS:18FB 14
SS:18FC 6B 6B
SS:18FD 2C 2C
SS;18FE 91 91 91
SS;18FF F6 F6 F6
SS:1900
START After After After
POP CX POP DX POP BX
SP=18FA SP=18FC SP=18FE SP=1900
CX=1423 DX=2C6B BX=F691
Logical vs. physical address of the stack
¾ Calculating the physical address for the stack, the same principle is applied as was used for the
code and data segments. Physical address depends on the value of stack segment (SS) register
and the stack pointer (SP).
¾ The flag register is a 16-bit register sometimes referred as the status register. Although the
register is 16-bit. Not all the bits are used.
¾ Conditional flags: 6 of the flags are called the conditional flags, meaning that they indicate
some condition that resulted after an instruction was executed. These 6 are: CF, PF, AF, ZF, SF,
and OF.
¾ The 16 bits of the flag registers:
R R R R OF DF IF TF SF ZF U AF U PF U CF
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CF, the Carry Flag: This flag is set whenever there is a carry out, either from d7 after an 8-bit
operation, or from d15 after a 16-bit data operation.
PF, the Parity Flag: After certain operations, the parity of the result’s low-order byte is checked. If
the byte has an even number of 1s, the parity flag is set to 1; otherwise, it is cleared.
AF, the Auxiliary Carry Flag: If there is a carry from d3 to d4 of an operation this bit is set to 1,
otherwise cleared (set to 0).
ZF, the Zero Flag: The ZF is set to 1 if the result of the arithmetic or logical operation is zero,
otherwise, it is cleared (set to 0).
SF, the Sign Flag: MSB is used as the sign bit of the binary representation of the signed numbers.
After arithmetic or logical operations the MSB is copied into SF to indicate the sign of the result.
TF, the Trap Flag: When this flag is set it allows the program to single step, meaning to execute
one instruction at a time. Used for debugging purposes.
IF, Interrupt Enable Flag: This bit is set or cleared to enable or disable only the external interrupt
requests.
DF, the Direction Flag: This bit is used to control the direction of the string operations.
OF, the Overflow Flag: This flag is set whenever the result of a signed number operation is too
large, causing the high-order bit to overflow into the sign bit.
EEE 410 – Microprocessors I
Fall 04/05 – Lecture Notes # 5
Outline of the Lecture
• Flag Registers and bit fields
• 80x86 addressing modes.
Ex: Show how the flag register is affected by the addition of 38H and 2FH.
38 0011 1000
+ 2F 0010 1111
67 0110 0111
CF = 0 since there is no carry beyond d7
PF = 0 since there is odd number of 1`s in the result
AF = 1 since there is a carry from d3 to d4
ZF = 0 since the result is not zero
SF = 0 since d7 of the result is zero
Ex: Show how the flag register is affected by the following addition
¾ Note that the MOV instructions have no effect on the flag (Explain on the existing example)
The CPU can access operands (data) in various ways, called addressing modes. In 80x86 there are 7
addressing modes
1. register
2. immediate
3. direct
4. register indirect
5. based relative
6. indexed relative
7. based indexed relative
MOV AL,99H
MOV [3518],AL
Ex: MOV AL,[BX] ; moves into AL the contents of the memory location
pointed to by DS:BX
• Note that, the content of the low address will go into CL and the
high address contents will go into CH.
• There are alternative coding: MOV CX,[BX+10], MOV
CX,10[BX]
• BX+10 is effective address
¾ Alternative coding
MOV CL,[BX+DI+8]
MOV CL,[DI+BX+8]
Segment Override:
MOV AL,[BX] DS:BX however MOV AL,ES:[BX]
¾ Directives are statements that give directions to the assembler about how it should translate the
assembly language instructions into machine code.
Brackets indicate that the field is optional. Brackets are not typed.
1. The label field allows the program to refer to a line of code by name.
2. In a line of assembly language program there can be mnemonic (instruction) and operand(s).
3. Alternatively, instead of these two fields there can be directives. Directives are used by the
assembler to organize the program as well as other output files. The following program adds two
bytes to calculate their sum. IN this program SEGMENT, DB, ENDS, ASSUME, END, and ENDP
are examples of directives.
The stack segment defines storage for the stack, the data segment defines the data that the
program will use and the code segment contains the Assembly Language instructions.
“DB 64 DUP (?)” , directive reserves 64 bytes of memory for the stack.
• Load AL and BL with DATA1 and DATA2 and ADD them together, and store the result in
SUM.
MOV AL,DATA1 ;get the first operand
MOV BL,DATA2 ;get the second operand
ADD AL,BL ;add the operands
MOV SUM,AL ;store result in location SUM
• The last two instructions returns the control to the operating system.
MOV AH,4CH ;set up to
INT 21H ;return to DOS
SIMPLIFIED SEGMENT DEFINITION
¾ An assembly language program can be written in two segment definition formats. In addition to
the Full Segment Definition Format, the recent assemblers support Simplified Segment
Definition, which is simpler and easier to write.
¾ The following program uses the Simplified Segment Definition.
¾ In a program with Simplified Segment Definition, the memory model that the program will use must be
specified. The following Memory Models can be used:
• SMALL MODEL (.MODEL SMALL): The model uses maximum of 64K bytes for Code and
64K bytes for Data (Code<=64K and Data <=64K). This model is the most widely used
memory model and is sufficient for all the programs to be used in this course.
• MEDIUM MODEL, (.MODEL MEDIUM): The model uses maximum of 64K bytes for Data
and Code can exceed 64K bytes (Code>64K and Data <=64K).
• COMPACT MODEL, (.MODEL COMPACT): The model uses maximum of 64K bytes for
Code and Data can exceed 64K bytes (Code<=64K and Data >64K).
• LARGE MODEL, (.MODEL LARGE): Both Code and Data can exceed 64K bytes. However
no single data set (i.e. array) can exceed 64K bytes (Code>64K and Data >64K).
• HUGE MODEL, (.MODEL HUGE): Both Code and Data can exceed 64K bytes. Additionally,
a single data set (i.e. array) can exceed 64K bytes (Code>64K and Data >64K).
ASSEMBLE, LINK AND RUN A PROGRAM
The following table summarizes the process required to assemble, link and run an assembly
language program.
“.asm” file is the source file created with an editor or a word processor.
“.obj” assembler (e.g.TASM) converts .asm file’s Assembly language instructions into machine
language.
“.exe” TLINK is the program to produce the executable file.
DEBUG, is a program included in DOS operating system that allows the programmer to monitor the
programs execution.
Useful commands are:-u (unassemble command is used to look et the machine code)
Conditional Jumps
In the conditional jump, control is transferred to a new location if a certain condition is met.
JC (jump if carry) [CF is checked], JNZ (jump if not zero) [ZF is checked].
Note: “above” and “below” refer to the relationship of two unsigned values; “greater” and “less”
refer to the relationship of two signed values.
Short Jumps
• All conditional jumps are short jumps. In a short jump the address of the target must be
within –128 to +127 bytes of the memory
• A conditional jump is a two-byte instruction: one byte is the opcode of the J condition and
the second value is a value between 00 to FF.
• In a backward jump the second byte is the 2’s complement of the displacement value.
Ex: : : :
: : :
AGAIN: ADD AL,[BX] 1067:000D 0207 ADD AL,[BX]
INC BX 1067:000F 43 INC BX
DEC CX 1067:0010 49 DEC CX
JNZ AGAIN 1067:0011 75FA JNZ 000D
MOV SUM,AL 1067:0013 A20500 MOV [0005],AL
: : :
The instruction “JNZ AGAIN” is assembled as “JNZ 000D” and the 000D is the address of the
instruction with label AGAIN.
(000D = 0013+FA = 000D) the carry is dropped. Note that FA is 2’s complement of –6,
meaning that the address of target is –6 bytes from the IP of the next instruction.
The displacement value is added to the IP of the next instruction to calculate the jump address.
(06 + 000C = 0012) (02 + 0010 = 0012)
Unconditional Jumps
“JMP label” is the unconditional jump in which control is transferred unconditionally to the
target label. Unconditional jump can take the following forms.
1. SHORT JUMP, which is specified by the format “JMP SHORT label” . In this jump the
address of the target location is within –128 to +127 bytes of the current IP. It works like
the conditional jump.
2. NEAR JUMP, which is the default has the format “JMP label”. It jumps within the
current code segment. It is exactly same as the short jump, except that the target address
can be anywhere within the range of +32767 to –32768.
3. FAR JUMP, has the format “JMP FAR PTR label”. This is the jump out of the current
code segment, meaning that not only the IP, but also the CS is replaced with new values.
CALL STATEMENTS
• Another control transfer instruction is the CALL instruction, which is used to call a
procedure
• The target address can be in the current segment, hence a NEAR call (IP is changed CS is
not)
• The target address can be outside the current segment, hence FAR call (IP and CS are
changed)
• To make sure that after the execution of the called subroutine the microprocessor knows
where to come back, the microprocessor automatically saves the address of the instruction
following the call on the stack.
• The last instruction of the called subroutine must be RET (return) instruction, which directs
CPU to pop the address of the next instruction before the called subroutine to be restored
SUBROUTINES
In Assembly Language there can be one main program and many subroutions called from the
main program. Subroutines are organized as procedures. PROC can be FAR or NEAR. If not
mentioned, by default a PROC is NEAR
Shell of the Assembly Language Subroutines. Alternatively the following format can be used in
;-------------------------------------------------------
Simplified Segment Definition:
CODSEG SEGMENT
MAIN PROC FAR
;-------------------------------------------------------
ASSUME …….
.CODE
MOV AX,…
MAIN: MOV AX,@DATA
MOV DA,AX
MOV DS, AX
CALL SUBR1
CALL SUBR1
CALL SUBR2
CALL SUBR2
CALL SUBR3
CALL SUBR3
MOV AH,4CH
MOV AH,4CH
INT 21H
INT 21H
MAIN ENDP
;----------------------------------------------------
;----------------------------------------------------
SUBR1 PROC
SUBR1: …
…
RET
RET
SUBR1 ENDP
;----------------------------------------------------
SUBR2 PROC ;----------------------------------------------------
… SUBR2: …
RET RET
SUBR2 ENDP
;----------------------------------------------------
SUBR3 PROC ;----------------------------------------------------
… SUBR3: …
RET RET
SUBR3 ENDP END MAIN
;----------------------------------------------------
CODSEG ENDS
END MAIN
• ORG (Origin) : ORG is used to indicate the beginning of the offset address. The number
after ORG can be either in hex or decimal. Mostly used in Data segment.
• DB (define byte) : DB allows allocation of memory in bytes for decimal, binary, hex and
ASCII.
• DW(define word) : DW is used to allocate 2 bytes (one word) of memory at a time. DUP
is used to duplicate a given number of characters.
• DT(define ten bytes) : Allocates 10 bytes of memory space. Mostly used for BCD
numbers.
¾ Unsigned numbers are defined as data in which all the bits are used to represent data and no bits
are set aside for the positive and negative sign.
For 8-bit, data operand can be between 00H and FFH (0 to 255 decimal
For 16-bit, data operand can be between 00H and FFFFH ( 0 to 65535 decimal)
Ex: Show how the flag register is affected by the following addition
MOV AL,0F5H
ADD AL,0BH
Solution: F5 1111 0101
+ 0B + 0000 1011
100H 0000 0000
After the addition AL will contain 00 and the flags are as follows.
CF = 1 since there is a carry out from d7
SF = 0 the status of d7 of the result
PF = 1
AF = 1
ZF = 1
¾ ADC: Add with carry
If CF=1 prior to this instruction, then after execution of this instruction, source is added to
destination plus 1. If CF=0, source is added to destination plus 0. Used widely in multibyte and
multiword additions.
Ex: Write a program to calculate the total sum of 5 bytes of data. Each byte represents the daily
wages of a worker. This person does not make more than $255 (FFH) a day. The decimal
data is as follows: 125, 235, 197, 91, and 48.
• Note that these numbers are converted to hex by the assembler as follows: 125=7DH,
235=EBH, 197=C5H, 91=5BH, 48=30H.
• In this program following lines of the program can be replaced:
Replace these lines with these lines
BACK: ADD AL,[SI] BACK: ADD AL,[SI]
ADC AH,00 JNC OVER ;add 1 to AH if CF=1
INC SI INC AH
OVER: INC SI
Ex: Write a program to calculate the total sum of 5 words of data. Each data value represents
the yearly wages of a worker. This person does not make more than $65535 (FFFFH) a
year. The decimal data is as follows: 27345, 28521, 29533, 30105, and 32375.
Ex: Write a program that adds the following two multiword numbers and saves the result:
DATA1 = 548FB9963CE7H and DATA2 = 3FCD4FA23B8DH
Note: LOOP BACK ;is the equivalent of the following two instructions
DEC CX
JNZ BACK
EEE 410 – Microprocessors I
Fall 05/06 – Lecture Notes # 8
Outline of the Lecture
• Arithmetic and Logic Instructions and Programs
• Unsigned Addition and Subtraction
¾ Unsigned numbers are defined as data in which all the bits are used to represent data and no bits
are set aside for the positive and negative sign.
For 8-bit, data operand can be between 00H and FFH (0 to 255 decimal
For 16-bit, data operand can be between 00H and FFFFH ( 0 to 65535 decimal)
Ex: Show how the flag register is affected by the following addition
MOV AL,0F5H
ADD AL,0BH
Solution: F5 1111 0101
+ 0B + 0000 1011
100H 0000 0000
After the addition AL will contain 00 and the flags are as follows.
CF = 1 since there is a carry out from d7
SF = 0 the status of d7 of the result
PF = 1
AF = 1
ZF = 1
¾ ADC: Add with carry
If CF=1 prior to this instruction, then after execution of this instruction, source is added to
destination plus 1. If CF=0, source is added to destination plus 0. Used widely in multibyte and
multiword additions.
Ex: Write a program to calculate the total sum of 5 bytes of data. Each byte represents the daily
wages of a worker. This person does not make more than $255 (FFH) a day. The decimal
data is as follows: 125, 235, 197, 91, and 48.
• Note that these numbers are converted to hex by the assembler as follows: 125=7DH,
235=EBH, 197=C5H, 91=5BH, 48=30H.
• In this program following lines of the program can be replaced:
Replace these lines with these lines
BACK: ADD AL,[SI] BACK: ADD AL,[SI]
ADC AH,00 JNC OVER ;add 1 to AH if CF=1
INC SI INC AH
OVER: INC SI
Ex: Write a program to calculate the total sum of 5 words of data. Each data value represents
the yearly wages of a worker. This person does not make more than $65535 (FFFFH) a
year. The decimal data is as follows: 27345, 28521, 29533, 30105, and 32375.
Ex: Write a program that adds the following two multiword numbers and saves the result:
DATA1 = 548FB9963CE7H and DATA2 = 3FCD4FA23B8DH
Note: LOOP BACK ;is the equivalent of the following two instructions
DEC CX
JNZ BACK
EEE 410 – Microprocessors I
Spring 04/05 – Lecture Notes # 9
Outline of the Lecture
• Unsigned Subtraction
• Unsigned Multiplication and Division
• Arithmetic and Logic Instructions and Programs
Execution steps:
AL 3F 0011 1111 0011 1111
– BH – 23 – 0010 0011 + 1100 0001 (2’s complement)
1C 0001 1100 1 0001 1100 (CF=0) Step 3
Ex:
;from the data segment:
DATA1 DB 4CH
DATA2 DB 6EH
RESULT DB ?
DATA_A DD 62562FAH
DATA_B DD 412963BH
RESULT DD ?
….. …..
MOV AX,WORD PTR DATA_A ;AX=62FA
SUB AX,WORD PTR DATA_B ;AX=AX – 963B
MOV WORD PTR RESULT,AX ;save the result
MOV AX,WORD PTR DATA_A +2 ;AX=0625
SBB AX,WORD PTR DATA_B +2 ;SUB 0412 with borrow
MOV WORD PTR RESULT +2,AX ;save the result
Note: PTR (Pointer) Directive is used to specify the size of the operand. Among the options for
size are BYTE, WORD, DWORD and QWORD.
Solution:
After the SUB, AX = 62FA – 963B = CCBF and the carry flag is set. Since CF=1, when
SBB is executed, AX = 625 – 412 – 1 = 212. Therefore, the value stored in RESULT is
0212CCBF.
¾ byte x byte :
• One of the operands must be in AL . The other operand can be either in a register
or in memory.
• After the multiplication the result is in AX.
¾ word x word :
• One of the operands must be in AX . The other operand can be either in a register
or in memory.
• After the multiplication the lower word is in AX and the higher word is in DX.
Ex:
DATA3 DW 2278H
DATA4 DW 2F79H
RESULT1 DW 2 DUP?
...
MOV AX,DATA3 ; load first operand into AX
MUL DATA4 ; multiply it by the second operand
MOV RESULT1,AX ; store the lower word of the result
MOV RESULT1+2,DX ; store the higher word of the result
¾ word x byte :
• Similar to word x word, but AL contains byte operand and AH must be zero.
Ex:
DATA5 DB 6BH
DATA6 DW 12C3H
RESULT3 DW 2 DUP?
...
MOV AL,DATA5 ; AL holds byte operand
SUB AH,AH ; AH must be cleared
MUL DATA6 ; byte in AL multiplied by word
operand
MOV BX,OFFSET RESULT3 ; BX points the storage for product
MOV [BX],AX ; AX holds lower word
MOV [BX]+2,DX ; DX holds higher word
1. Byte / byte
• Numerator must be in AL and AH must be set to zero
• Denominator cannot be immediate but can be in memory or in a register.
• After the division AL will have the quotient and AH will have the remainder
Ex: DATA7 DB 95
DATA8 DB 10
QUOT1 DB ?
REMAIN1 DB ?
2. word / word
• Numerator must be in AX and DX must be cleared
• Denominator can be in memory or in a register.
• After the division AX will have the quotient and DX will have the remainder
Ex:
MOV AX,10050 ;AX holds numerator
SUB DX,DX ;DX must be cleared
MOV BX,100 ;BX is used for denominator
DIV BX ;divide AX by BX
MOV QUOT2,AX ;quotient = AX = 64H (100 )
MOV REMAIN2,DX ;remainder = DX = 32H (50)
3. word / byte
• Numerator must be in AX
• Denominator can be in memory or in a register.
• After the division AL will have the quotient and AH will have the remainder
Ex:
MOV AX,2055 ;AX holds numerator
MOV CL,100 ;BX is used for denominator
DIV CL ;divide AX by CL
MOV QUO,AL ;AL holds the quotient = AL = 14H (20)
MOV REMI,AH ;AH holds the remainder = AH = 37H (55)
4. doubleword / word
• Numerator must be in AX and DX, least significant word in AX and most significant word
in DX.
• Denominator can be in memory or in a register.
• After the division AX will have the quotient and DX will have the remainder
Ex: DATA1 DD 105432
DATA2 DW 10000
QUOT DW ?
REMAIN DW ?
…..
MOV AX,WORD PTR DATA1 ;AX holds the lower word
MOV DX,WORD PTR DATA1+2 ;DX holds the higher word of the
numerator
DIV DATA2
MOV QUOT,AX ;AX holds the quotient
MOV REMAIN,DX ;DX holds the remainder
5. “Divide Error”: If the denominator is zero (dividing any number by 00) and if the quotient is too
large for the assigned register, “Divide Error” message will be displayed.
LOGIC INSTRUCTIONS
AND
Solution:
35H 00110101
0FH 00001111
05H 00000101 SF=0, ZF=0, PF=1,CF=OF=0
This operation will AND DH with itself and if the result is zero set ZF=1
jumping to NEXT.
OR
XOR
XOR dest,source
¾ The XOR instruction can be used to clear contents of a register by XORing it with itself.
XOR CH,35H
Ex:
XOR BL,04H ;XOR BL with 000 0100
Solution: This will cause bit 2 of BL to change to the opposite value; all other bits would remain unchanged.
• SHIFT
0 MSB LSB CF
This is the logical shift right. The operand is shifted right bit by bit, and for every shift the LSB will
go to the CF and MSB is filled with a zero.
CF MSB LSB 0
SHL is also a logical shift instruction. The operand is shifted left bit by bit, and for every shift the LSB is
filled with a zero (0) and the MSB goes into CF.
Solution: 00000110
CF=0 00001100 (shifted left once)
CF=0 00011000
CF=0 00110000
CF=0 01100000 (shifted left 4 times)
¾ dest operand can be in a register or memory. Immediate addressing mode is not possible.
¾ If the dest. operand is to be shifted once only 1 can be used instead of CL.
Compare operands CF ZF
Destination >source 0 0
Destination = source 0 1
Destination < source 1 0
Flag settings of the CMP instruction.
Ex:
VAL1_BCD DB 29H
VAL3_ASC DW ?
….
MOV AL,VAL1_BCD
MOV AH,AL ;copy AL to AH. Now AH=29 and AL=29
AND AX,F00FH ;mask 9 from AH and 2 from AL
MOV CL,04 ;CL=04 for shift
SHR AH,CL ;shift right AH to get unpacked BCD
OR AX,3030H combine with 30 to get ASCII
XCHG AH,AL ;swap for ASCII storage convention
MOV VAL3_ASC,AX ;store the ASCII
EEE 410 – Microprocessors I
Fall 04/05 – Lecture Notes # 11
Outline of the Lecture
result=3FH result=D9H
(not a BCD) (not a BCD)
• To solve these problems add 6 to the lower nibble of 3FH and upper nibble of D9H.
3F + 6 = 45H D9 + 60 = 139H
• Now the results are BCD.
• There is a special instruction to do this correction.
• DAA works only after the ADD and ADC instruction. (E.g. it doesn’t work with INC instruction)
• In addition the destination operand must be AL in order for DAA to work.
• Note that in BCD addition the operands can never have any digit greater than 9.
AF (Auxiliary carry Flag) is only used for BCD addition and correction.
Ex:
Hex BCD
29 0010 1001
+18 + 0001 1000
41 0100 0001 AF=1
+6 + 0110 Because AF=1 DAA will add 6 to the lower nibble
47 0100 0111 The final result is BCD
¾ BCD Subtraction and correction
• The problem associated with the addition of packed BCD numbers also shows up in subtraction.
DAS is used to correct this problem.
• DAS must come after SUB or SBB instructions.
• AL must be used as the destination register in subtraction for the DAS to work
Note: AAA and AAS will only work on the AL register. The data can be unpacked BCD rather than ASCII.
ROTATE INSTRUCTIONS
or:
Ex: Write a program that finds the number of 1s in a word. Provide the count in BCD.
From the data segment:
DATAW1 DW 97F4H
COUNT2 DB ?
From the code segment:
SUB AL,AL ;clear BL to keep number of 1s
MOV DL,16 ;rotate total of 16 times
MOV BX,DATAW1
AGAIN: ROL BX,1 ;rotate it once
JNC NEXT ;check for 1
ADD AL,1 ;if CF =1 than add 1 to count
DAA ;adjust the count for BCD
NEXT: DEC DL ;go through this 8 times
JNZ AGAIN ;if not finished go back
MOV COUNT2,AL save the number of ones
Note: AL had to be used to make the BCD counter because DAA instruction works only on AL.
¾ BIOS and DOS contain some very useful subroutines, which can be used through INT (interrupt)
instruction.
¾ The INT instruction works like a FAR call. When it is invoked, it saves CS:IP and the flags on the
stack and goes to the subroutine associated with the interrupt.
1
• INT 10H function 02: setting the cursor to a specific location
Ex: Write the code to set the cursor position to row = 15 (= 0FH) and column = 25 (=19H).
Ex: Write a program segment to (1) clear the screen and (2) set the cursor at the center of the screen.
Ex: MOV AH,03 ;option 03 of BIOS INT 10H (read cursor position and size)
MOV BH,00 ;choose current (00) page
INT 10H ;interrupt10H routine
After the execution of the above program: DH = current row, DL = current column CX
will provide info about the shape of the cursor.
2
¾ The address in DX register is an offset address. Data is assumed to be the data segment.
¾ INT 21H option 09 will display the ASCII data string pointed at by DX until it encounters the
dollar sign ‘$’. Note that this option cannot display ‘$’ character on the screen.
Ex: ………………..
DATA_ASC DB ‘I love MICROPROCESSORS’,’$’
……………….
MOV AH,09 ;option 09 to display string of data
MOV DX,OFFSET DATA_ASC ;DX offset address of data
INT21H ;invoke the interrupt
INT 21H option 01: Keyboard input with echo (inputting a single character with echo)
¾ This function waits until a character is input from the keyboard, then echoes(displays) it to the
monitor.
¾ After the interrupt the character will be in AL.
INT 21H option 0AH: Inputting a string of data from the keyboard
¾ This function enables input a string of data from the keyboard and to store it in the data segment.
¾ The register settings are: AH=0AH
DX= offset address of the string to be stored (called as the buffer area)
Ex: …………………….
ORG 0010H
DATA1 DB 6,?,6 DUP(FF) ;0010H=06, 0012H – 0017H=FF
……………………
3
¾ The following shows the memory contents of offset 0010H: Before input is entered!!
¾ When the program is executed and the data is entered through the keyboard, the program will not
exit until the return key is pressed. Assume the data entered through the keyboard was,
“USA” ,RETURN>
Note that the value 03 is generated and stored by DOS to indicate the number of characters that
entered.
¾ In the previous sections it was explained that INT 21H function AH=07, waits for the user to input
a character.
¾ In some programs a task must run continuously while checking a key press? Such cases require to
use INT 16H.
4
Outline of the Lecture
• MACROS in Assembly Language
• MACRO definition
Macros are predefined functions which involve a group of instructions to perform a special task which can
be used repeatedly.
For example:
• in order to print a string to the screen INT 21H together with 2 more instructions can be used (3 lines
of code).
• It doesn’t make sense to rewrite them every time they are needed.
• In order to reduce the time to write the code and reduce the length of the code macros can be used.
• Macros allow programmer to define the task (set of codes to perform a specific job) once only and
invoke it whenever/wherever it is needed.
MACRO definition:
Ex: Write a macro called STRING to which display a string of text to the monitor.
The above code is the macro definition. You can invoke the above macro as follows:
Example: the following program contains 3 Macro definitions which are: clear the screen, display a
string and set the cursor position.
5
;THE FOLLOWING PROGRAM USES MACROS
;-------------------------------------------------
CLSCREEN MACRO ;THIS MACRO CLEARS THE SCREEN
MOV AX,0600H
MOV BH,07
MOV CX,0
MOV DX184FH
INT 10H
ENDM
;-------------------------------------------------
DISPSCREEN MACRO STRING ;THIS MACRO DISPLAYS A STRING OF DATA
MOV AH,09
MOV DX,OFFSET STRING
INT 21H
ENDM
;-------------------------------------------------
CURSOR MACRO ROW,COLUMN ;THIS MACRO SETS THE CURSOR POSITION
MOV BH,00
MOV AH,02
MOV DH,ROW
MOV DL,COLUMN
INT 10H
ENDM
;-------------------------------------------------
.MODEL SMALL
.STACK 64
.DATA
MESSAGE1 DB ‘My name ’,’$’
MESSAGE2 DB ‘is Ali’,’$’
MESSAGE3 DB ‘What is ‘,’$’
MESSAGE4 DB ‘your name?’,’$’
.CODE
MAIN: MOV AX,@DATA
MOV DS,AX
CLSCREEN
CURSOR 2,4
DISPSCREEN MESSAGE1
CURSOR 3,4
DISPSCREEN MESSAGE2
CURSOR 10,4
DISPSCREEN MESSAGE3
CURSOR 11,4
DISPSCREEN MESSAGE4
MOV AH,4CH
INT 21H
END MAIN
LOCAL name1 OR
LOCAL name2 <==> LOCAL name1,name2,name3
LOCAL name3
6
;The Following Program Defines a Macro to multiply two words by repeated addition. Macro is used in the main
;procedure below 3 times.
;-------------------------------------------------
MULTIPLY MACRO VALUE1, VALUE2, RESULT
LOCAL BACK ;
;THIS MACRO COMPUTES RESULT = VALUE1 x VALUE2
MOV BX,VALUE1
MOV CX,VALUE2
SUB AX,AX
MOV DX,AX
BACK: ADD AX,BX
ADC DX,00
LOOP BACK
MOV RESULT,AX
MOV RESULT+2,DX
ENDM
;-------------------------------------------------
.MODEL SMALL
.STACK 64
.DATA
RESULT1 DW 2 DUP(?)
RESULT2 DW 2 DUP(?)
RESULT3 DW 2 DUP(?)
.CODE
MAIN: MOV AX,@DATA
MOV DS,AX
MULTIPLY 2000,500,RESULT1
MULTIPLY 2500,500,RESULT2
MULTIPLY 300,400,RESULT3
MOV AH,4CH
INT 21H
END MAIN
Note: The reason why the LOCAL directive must be used is as follows: When a MACRO is assembled in
the program, the body of the MACRO is expanded as many times as the MACRO function is
invoked/called. This means that, for example in the above case, the same BACK label will be expanded in
the program 3 times. As a result, there will be the same BACK label in 3 different locations. This confuses
the processor so it is an error.
However if LOCAL directive is used the label which is defined as LOCAL in a MACRO will be the
only one to be considered. So, in the above example when a jump to BACK label is needed it will be the
local BACK label not the other two.
7
EEE 410 – Microprocessors I
Fall 05/06 – Lecture Notes # 13
Outline of the Lecture
• Signed Numbers and Signed Number Operations
¾ Until now we have seen unsigned numbers where entire 8-bit or 16-bit operand was used for the
magnitude.
¾ In order to represent positive and negative numbers signed numbers have been introduced. The
representation of signed numbers:
♦ The MSB is set aside for the sign (+ or –) and the rest of the bits are used
for the magnitude.
♦ The sign is represented by 0 for positive (+) numbers and 1 for (–)
negative numbers.
Signed byte operands:
D7 D6 D5 D4 D3 D2 D1 D0
sign
Positive Numbers:
The range of positive numbers that can be represented as a signed byte operand is 0 to +127.
Negative Numbers:
For negative signed numbers D7=1, but the magnitude operand is represented in 2’s complement.
Although the assembler does the conversion, it is important to understand how the conversion works.
To convert to negative number representation (2’s complement) follow the steps:
1. Write the magnitude of the number in 8-bit binary (no sign)
2. Invert each bit
3. Add 1 to it
sign
+ 96 0110 0000
+ 70 0100 0110
+166 1010 0110 According to the CPU this is –90, which is wrong.(OF=1, SF=1, CF=0)
2
As defined before max positive signed number for an 8-bit register is +127. Because +166 is greater
than +127 the problem is arising. The overflow flag is set to inform the programmer that there is erroneous
result from the signed number operation above.
1. There is a carry out from D6 to D7, but no carry out from D7 (CF=0).
2. There is a carry out from D7 (CF=1), but no carry out from D6 to D7.
According to the CPU, the result is +126, which is wrong. The error is indicated by the fact that
OF=1.
-2 1111 1110
+ -5 1111 1011
-7 1111 1001 OF=0, SF=1 (negatieve) , CF=1 : The result is correct since OF=0.
+7 0000 0111
+ +18 0001 0010
+25 0001 1001 OF=0, SF=0 (positive) , CF=0 : The result is correct since OF=0.
OF in 16-bit operations
In 16-bit signed number operations, OF is set to 1 in either of the cases:
1. There is a carry out from D14 to D15, but no carry out from D15 (CF=0).
2. There is a carry out from D15 (CF=1), but no carry out from D14 to D15.
3
Avoiding erroneous results in signed number operations
¾ In order to avoid the problem of signed number operations we can sign extend the operand. Sign
extension copies the sign bit (D7) of the lower byte of a register to the upper byte bits of of the register,
or copies the sign bit of a 16-bit register into another register.
¾ There are two commands used for sign extension.
Lets give an example program which takes into consideration of correction of signed byte addition
operation.
Ex: DATA1 DB +96
DATA2 DB +70
RESULT DW ?
…
MOV AH,0 ;AH=0
MOV AL,DATA1 ;get operand 1
MOV BL,DATA2 ;get operand 2
ADD AL,BL ;add them
JNO OVER ;jump if there is no overflow (OF=0) to OVER
MOV AL,DATA2 ;otherwise get operand 2 to
CBW ;sign extend it
MOV BX,AX
MOV AL,DATA1 ; get back operand 1 to
CBW ;sign extend it
ADD AX,BX ;add them
OVER: MOV RESULT,AX ;save the result
4
EEE 410 – Microprocessors I
Spring 04/05 – Lecture Notes # 14
Outline of the Lecture
• Signed Numbers and Signed Number Operations
• String Operations
Example shown below (Program 6-1) is an application of signed number arithmetic, which computes the
average of the following temperature measurements.
Ex: ……..
SIGN_DAT DB +13,-10,+19,+14,-18,-9,+12,-9,+16
ORG 0010H
AVERAGE DW ?
REMINDER DW ?
……..
MOV CX,9 ;load counter
SUB BX,BX ;clear BX, used as an accumulator
MOV SI,OFFSET SIGN_DAT ;set up pointer
BACK: MOV AL,[SI] ;move byte into AL
CBW ;sign extend into AX
ADD BX,AX ;ADD to BX
INC SI ;increment pointer
LOOP BACK ;loop if not finished
MOV AL,9 ;move count to AL
1
CBW ;sign extend into AX
MOV CX,AX ;save denominator in CX
MOV AX,BX ;move sum to AX
CWD ;sign extend the sum
IDIV CX ;find the average
MOV AVERAGE,AX ;store the average (quoitent)
MOV REMINDER,DX ;store the reminder
…..
¾ ARITHMETIC SHIFT
¾ There are two types of shifts: logical shift (unsigned numbers) and arithmetic shift (signed
numbers).
¾ The arithmetic shift is basically the same as the logical shift, except that the sign bit is copied to the
shifted bits.
• As the bits of the destination are shifted to the right into CF, the empty bits are filled with the sign bit.
• SAR instruction can be used to divide a signed number by 2 as shown in the example below:
SAL destination,count ;(shift arithmetic left) the same as SHL (shift left)
CF MSB LSB 0
2
¾ STRING OPERATIONS
¾ In 8086 family of microprocessors there are a group of instructions referred to as the string
instructions.
¾ DI and SI registers are used to point the source and the destination operands. Until now because
the ES(Extra segment) is not defined within the programs both the DI and SI registers were used
the offset of DS(Data segment).
¾ When ES is defined as:
…..
ASSUME CS:CODSEG, DS:DATSEG, SS:STASEG,ES:DATSEG
MOV AX,DATSEG
MOV DS,AX
MOV ES,AX
…
then by default DI becomes the offset address of ES and SI becomes the offset address of DS.
¾ In each of the string instructions the operands can be byte or word. This is indicated by adding B
(byte) and W (word) to the end of the instruction mnemonic.
¾ DF, the direction flag: To process operands in consecutive memory locations requires that the pointer
be incremented or decremented. DF in string operations is used to indicate if SI and DI pointers will
increment or decrement automatically.
¾ It is the job of the programmer to specify the choice of increment or decrement by setting the direction
flag high or low.
CLD ;(clear direction flag) will reset (put to zero) DF, indicating that the string instruction should
increment the pointers (SI,DI) automatically. This automatic incrementation is sometimes referred as
autoincrement.
STD ;(set direction flag) will set (put to one) DF, indicating that the string instruction should decrement
the pointers (SI,DI) automatically.
REP prefix ; The REP (repeat) allows a string instruction to perform the operation repeatedly. REP assumes
that CX holds the number of times that the instruction should be repeated. As the operation continues the
CX register is decremented until it becomes zero.
REPE/ REPNE prefix ; REPE allows a string instruction to perform the operation repeatedly as long as CX
is not zero and the comparison gives equality. REPNE allows a string instruction to perform the operation
repeatedly as long as CX is not zero and the comparison gives inequality.
3
Ex: Using the string instructions, write a program that transfers a block of 20 bytes of data.
¾ After the transfer of every byte by the MOVSB instruction, both SI and DI registers are incremented
automatically once only (notice CLD).
¾ The REP (repeat) prefix causes the CX counter to be decremented and MOVSB is repeated until CX
becomes zero.
Ex: Assuming that there is a spelling of “Europe” in an electronic dictionary and a user types in “Euorope”,
write a program that compares these two and displays the following message, depending on a result:
1. If they are equal, display “The spelling is correct”
2. If they are not equal, display “Wrong Spelling”
4
EEE 410 – Microprocessors I
Spring 04/05 – Lecture Notes # 15
Outline of the Lecture
• Basic Computer Architecture
CPU
Microprocessor
80x86 Memory
(RAM,ROM) I/O Device I/O Device
Input/Output Input/Output
(Keyboard) (Monitor)
Data Bus
Address Bus
Control Bus
CPU : Central Processing Unit/Microprocessor; the Brain and the Heart of the
Computer. Executes (processes) the information stored in memory.
Memory : Memory is the primary storage for the programs and data (RAM, ROM)
I/O : - Drives the disks (secondary storage units):Hard Disk, Floppy Disks etc.
- Monitor (CRT –Cathode Ray Tube)
- Keyboard
- Printer
- Mouse
- Fax, Modem
1
• Time Sequencing during an instruction execution
Control Bus
CPU C
o
n
t
Control Unit r .
o
l Memory
Registers .
Address Bus U
n .
i
t
ALU
Data Bus
CPU Memory
Fetch an instruction
READ
Decode
Execute
Generate
READ / WRITE
during execution READ
or
WRITE
Upgrade Program
counter
2
(a) 8086 Microprocessor (b) 8088 Microprocessor
Address Bus: - The 8086 CPU is has 20-bit address bus, where the AD0-AD15 and A16-A20 are used as the
address bus. To demultiplex the address signals from the address/data pins (AD0-AD15) a
latch must be used to grab the addresses.
- In 8086 microprocessor the address bus is 20-bit wide, however only 16-bit is shared with
data bus (AD0-AD15) through demultiplexing.
- The most widely used latch for demultiplexing is 74LS373 IC (see Figure 9-3 below: Note
that for 8088 the address bus is 20 bit and data bus is 8-bit. So only 8-bit is latched).
In addition to memory, 80x86 microprocessors are able to access I/O ports. Ports are
accessed either to bring data from the port into the CPU (inputting) or to send data from the
CPU to the port (outputting).
In format (1) above, port# is the address of the port, and can be from 00 to FFH. This 8-bit
address allows 256 input ports and 256 output ports. No segment register is involved in
computing the address, in contrast to the data accessed from memory.
In format (2) , port# is the address of the port, and can be from 0000 to FFFFH. This 16-bit
address allows 65,536 input ports and 65,536 output ports. No segment register (DS) is
involved.
Ex: Write a sequence of instructions that will output FFH to a byte-wide output port at the
address ABH of the I/O address space?
MOV AL,FFH
OUT ABH,AL
Ex: Write a sequence of instructions that will output FFH to an output port at the address
B000H of the I/O address space?
MOV DX,B000H ;Note that 16-bit address must be in DX
MOV AL,FFH
OUT DX,AL
Ex: Assume that the port address 22H is an input port for monitoring the temperature. Write
Assembly language instructions to monitor the port continuously for the temperature of 100
degrees. If it reaches 100, then BH should contain ‘Y’.
1
Case 2: 16-bit data ports
Inputting Data Outputting Data
Format IN dest,source OUT dest,source
(1) IN AX,port# OUT port#,AX
(2) MOV DX,port# MOV DX,port#
IN AX,DX OUT DX,AX
Ex: Assume that AX=98F6H and the output port address is 47H, then
OUT 47H,AX
¾ In the above case F6H, the content of AL, goes to port address 47H and 98H, the content of
AH goes into the port address 48H.
¾ In other words the low byte goes to the low port address, and the high byte goes to the high
byte address.
2
Detailed Block Diagram of 8255 (a), and the Pin layout (b)
• PA0-PA7 (Port A) : This 8-bit port can be programmed all as input or all as output or
all bits as bi-directional input/output.
• PB0-PB7 (Port B) : This 8-bit port can be programmed all as input or all as output or
all bits as bi-directional port.
• PC0-PC7 (Port C) : This 8-bit port can be all input or all output. It can also be split into
two parts:
CU (Upper 4 bits PC4-PC7) and
CL (Lower 4 bits PC0-PC3).
Each can be used for input or output.
• RD and WR : These two active low signals are inputs to the 8255. If the 8255 is using
isolated I/O design, IOR or IOW of the system bus are connected to these two pins. If
the port uses memory-mapped I/O, MEMR and MEMW activate them.
• RESET: This is an active high signal input to the 8255 used to clear the control register.
When RESET is activated, all ports are initialized as input ports.
• A0, A1, and CS: While CS selects the entire chip, it is A0 and A1 that select the
specific port. A0 and A1 are used to access ports A, B, C, or the control register
according to the table below.
3
A1 A0 Selects:
0 0 Port A
0 1 Port B Table 1:
1 0 Port C
1 1 Control Register
The Control Register; is used to configure the individual ports as to be in input or output
mode.
The Control Register in Mode 0
D7 D6 D5 D4 D3 D2 D1 D0
1=Mode 0 Mode selection Port A Port C Mode Port B Port C
I/O Mode 00 = Mode 0 1=input (PC7-PC4) Selection 1=input (PC3-PC0)
01 = Mode 1 0=output 1=input 0=Mode 0 0=output 1=input
1X = Mode 2 0=output 1=Mode 1 0=output
Ex: Configure 8255 as follows: port A as input, B as output, and all the bits in C as output.
Determine the content of the Control Register and,
Program the ports to input data from A and send it to both B and C.
(Assume the standard port addresses of 8255 given above)
1 0 0 1 0 0 0 0 = 90H
4
Ex: Configure the ports of 8255 as follows: port A=input, B=output/ PC0 –PC3=input, and PC4-
PC7=output.
Determine the content of the Control Register and,
Program the 8255 to get data from port A and send it to port B. In addition, input data from
PCL and send out to PCU.
1 0 0 1 0 0 0 1 = 91H
5
EEE 410 – Microprocessors I
Spring 04/05 – Lecture Notes # 17
Outline of the Lecture
• I/O Programming in Assembly Language
Soln:
Control register: A CH B CL
1 0 0 0
1 : input
0 : output
A CH B CL
1 0 0 1 0 0 0 1
.MODEL SMALL
.CODE
MAIN: MOV AL,10010001B
MOV DX,303H ;If PPI is at 300H, then Port A=300H,
OUT DX,AL ;Port B =301, Port C=302 and Control reg:303H
…
…
…
MOV AH,4CH
INT 21H
END MAIN
1
I/O INTERFACE APPLICATIONS
Stepper motors are used for position control applications, such as for the control of the
disk drives and in robotics.
• The most common stepper motors have four stator windings that are paired with a
center tapped common shown in Figure below (Figure 12.38-39 of the textbook).
• While the conventional motor shaft runs freely, the stepper motor shaft moves in a fixed
repeatable increment, which allows one to move it to a precise position.
• The table below shows a normal 4-step Sequence. Note that once, we start with any of
the sequences in Table below (i.e. step 3 [0110] ) we must continue in the sequence of
steps, 4, 1, 2, and so on.
2
Figure 12-40:8255 Connection to Stepper Motor
Ex: Given the 8255 connection to the stepper motor of Figure 12-40,
- code a program to rotate it continuously.
- press any key on the IBM PC keyboard to stop it.
A CH B CL
1 0 0 0
1 : input
0 : output
A CH B CL
1 0 0 0 0 0 0 0
…………
MOV AL,80H ;control word for all 8255 ports as out
MOV DX,303H ;control register address of 8255
OUT DX,AL ;to control register
MOV BL,66H ;or BL=33H, BL=99H or BL=0CCH
AGAIN: MOV AH,01 ;check the key press
INT 16H ;using INT 16
JNZ EXIT ;stop if any key pressed
MOV AL,BL ;otherwise send pulse to the stepper motor
MOV DX,300H ;port A address of 8255
OUT DX,AL
MOV CX,0FFFFH ;(change this value to see rotation speed)
HERE: SUB AH,AH
LOOP HERE ;wait for delay
ROR BL,1 ;rotate for the next step
JMP AGAIN ;and continue until a key is pressed
3
EXIT:
Application 2: 7 Segment Display Control
This program displays 5 hexadecimal digits on the 7-segment LED display units connected
to the 8255 PPI as shown above.
4
Application 3: Keyboard Control
This program reads a keystroke from the 64-key keyboard connected to the PPI as shown
above. (The program ignores the debounce effect)
5
EEE 410 – Microprocessors I
Spring 04/05 – Lecture Notes # 18
Outline of the Lecture
• Interfacing the Parallel Port
♦ Standard Parallel Port (SPP)
♦ Port addresses
♦ Software registers and programming
♦ Bi-directional ports
♦ Using parallel port’s IRQ
♦ Enhanced Parallel Port (EPP)
♦ Extended Capabilities Port (ECP)
¾ The Parallel Port is the most commonly used port for interfacing. This port will allow the
input of up to 9 bits or the output of 12 bits at any one given time, thus requiring
minimal external circuitry to implement many simpler tasks.
¾ It's found commonly on the back of your PC as a D-Type 25 Pin female connector.
Parallel Port’s are standardized under the IEEE 1284 standard first released in 1994.
This standard defines 5 modes of operation which are as follows,
¾
1. Compatibility Mode. (Centronics Mode)
2. Nibble Mode.
3. Byte Mode.
4. EPP Mode (Enhanced Parallel Port).
5. ECP Mode (Extended Capabilities Mode).
¾ Compatibility mode is also known as "Centronics Mode". In this mode you can only
output data.
¾ To receive/input data, you must change the mode to either Nibble or Byte mode.
Nibble mode can input a nibble (4 bits) from device to computer.
¾ Byte mode uses the Parallel's bi-directional feature (found only on some cards) to
input a byte (8 bits) of data.
¾ Extended and Enhanced Parallel Ports use additional hardware to generate and
manage handshaking.
¾ For example, to output a byte to a printer (or anything in that matter) using compatibility
mode, the software must,
¾ This limits the speed at which the port can run at. The EPP & ECP ports get around
this by letting the hardware check to see if the printer is busy and generate a strobe
and /or appropriate handshaking. This means only one I/O instruction need to be
performed, thus increasing the speed. These ports can output at around 1-2
1
megabytes per second. The ECP port also has the advantage of using DMA channels
and FIFO buffers, thus data can be shifted around without using I/O instructions.
• Port Addresses
The Parallel Port has three commonly used base addresses. LPT1 is normally assigned
base address 378h, while LPT2 is assigned 278h. 378h & 278h have always been
commonly used for Parallel Ports.
Notes:
Address
3BCH - 3BFH Used for Parallel Ports which were incorporated
on to Video Cards - Doesn't support ECP
addresses
378H - 37FH Usual Address For LPT 1
278H - 27FH Usual Address For LPT 2
Table 2 Port Addresses
• Hardware Properties
¾ Below is a table of the "Pin Outs" of the D-Type 25 Pin connector and the Centronics
34 Pin connector. The D-Type 25 pin connector is the most common connector found
on the Parallel Port of the computer, while the Centronics Connector is commonly
found on printers.
2
¾ The above table uses "n" in front of the signal name to denote that the signal is active
low. e.g. nError. If the printer has occurred error then this line is low.
¾ The "Hardware Inverted" means the signal is inverted by the Parallel card's hardware.
Such an example is the Busy line. If +5v (Logic 1) was applied to this pin and the status
register read, it would return back a 0 in Bit 7 of the Status Register.
¾ The output of the Parallel Port is normally TTL logic levels. The voltage levels are the
easy part. The current you can sink and source varies from port to port. Most Parallel
Ports can sink and source around 12mA. The best way is to use a buffer, so the least
current is drawn from the Parallel Port.
• Centronics?
¾ Centronics is an early standard for transferring data from a host to the printer. The
majority of printers use this handshake. This handshake is normally implemented using
a Standard Parallel Port under software control.
¾ Note 1 : If the Port is Bi-Directional then Read and Write Operations can be performed
on the Data Register.
¾ The base address, usually called the Data Port or Data Register is simply used for
outputting data on the Parallel Port's data lines (Pins 2-9). This register is normally a
write only port. If you read from the port, you should get the last byte sent. However if
your port is bi-directional, you can receive data on this address.
3
Offset Name Read/Write Bit No. Properties
Base + 1 Status Port/ Read Only Bit 7 Busy
Status Bit 6 Ack
Register Bit 5 Paper Out
Bit 4 Select In
Bit 3 Error
Bit 2 IRQ (Not)
Bit 1 Reserved
Reserved
Bit 0
Table 5 Status Port
¾ The Status Port (base address + 1) is a read only port. Any data written to this port will
be ignored. The Status Port is made up of 5 input lines (Pins 10,11,12,13 & 15), an IRQ
status register and two reserved bits.
¾ The Control Port (base address + 2) was intended as a write only port. When a
printer is attached to the Parallel Port, four "controls" are used. These are Strobe,
Auto Linefeed, Initialize and Select Printer, all of which are inverted except Initialize.
• Bi-directional Ports
¾ Bit 5 of the Control Port enables or disables the bi-directional function of the Parallel
Port. This is only available on true bi-directional ports. When this bit is set to one,
pins 2 to 9 go into high impedance state. Once in this state you can enter data on
these lines and retrieve it from the Data Port (base address). Any data which is
written to the data port will be stored but will not be available at the data pins. To
turn off bi-directional mode, set bit 5 of the Control Port to '0'.
¾ However not all ports behave in the same way. Other ports may require setting bit 6
of the Control Port to enable Bi-directional mode and setting of Bit 5 to dis-enable
Bi-directional mode, Different manufacturers implement their bi-directional ports in
different ways. If you wish to use your Bi-directional port to input data, test it with a
logic probe or multimeter first to make sure it is in bi-directional mode.
4
• Using The Parallel Port to Input 8 Bits.
If your Parallel Port doesn't support bi-directional mode, don't despair. You can
input a maximum of 9 bits at any one given time. To do this you can use the 5 input
lines of the Status Port and the 4 inputs (open collector) lines of the Control Port.
¾ In order to input 8-bit input data we input data both from status port and control port.
The high nibble of status port and low nibble of the control port are combined to
make an 8-bit input data.
¾ The Parallel Port's interrupt request is not used for printing under DOS or Windows.
Early versions of OS-2 used them, but don't anymore. Interrupts are good when
interfacing monitoring devices such as high temp alarms etc, where you don't know
when it is going to be activated. It's more efficient to have an interrupt request rather
than have the software poll the ports regularly to see if something has changed.
This is even more noticeable if you are using your computer for other tasks, such as
with a multitasking operating system.
¾ The Parallel Port's interrupt request is normally IRQ5 or IRQ7 but may be
something else if these are in use. It may also be possible that the interrupts are
totally disabled on the card, if the card was only used for printing.
¾ The Parallel Port interrupt can be disabled and enabled using bit 4 of the control
register, Enable IRQ Via Ack Line. Once enabled, an interrupt will occur upon a low
to high transition (rising edge) of the nACK. However like always, some cards may
trigger the interrupt on the high to low transition.
¾ You must program the programmable interrupt controller (PIC) at address 020H to
respond to the interrupt you are using and then place an Interrupt Service Routine
(ISR) at the appropriate Interrupt Vector.
5
• Programming of the Parallel Port
Ex1: Write required Assembly Language instructions to output 11111111B to the Data
Port of the SPP?
MOV DX,378H ;base address of SPP is 378H
MOV AL,11111111B ;Data Port is placed at [base address + 0]
OUT DX,AL
Ex2: Write required Assembly Language instructions to check if the Paper has run out
at the printer (paper out).
Bit 5 of the Status port indicates the status of paper at the Printer. So after inputting 8-
bit data from this port at [base address+1] we can check if paper is finished or not.
6
channels to move it's data about. It also uses a FIFO buffer for the sending and/or
receiving of data.
¾ Another feature of ECP is a real time data compression. It uses Run Length
Encoding (RLE) to achieve data compression ratio's up to 64:1. This comes is
useful with devices such as Scanners and Printers where a good part of the data is
long strings which are repetitive.
¾ The Extended Capabilities Port supports a method of channel addressing. This is
not intended to be used to daisy chain devices up but rather to address multiple
devices within one device. Such an example is many fax machines on the market
today which may contain a Parallel Port to interface it to your computer. The fax
machine can be split up into separate devices such as the scanner, modem/Fax
and printer, where each part can be addresses separately, even if the other devices
cannot accept data due to full buffers.
REFENENCE:
Read, http://www.beyondlogic.org/spp/parallel.htm ,for further details.
HOMEWORK: Write a subroutine to send a character to a printer using Standard Parallel
Port (SPP) communication. The subroutine will assume that the character is stored in AL.
7
EEE 410 – Microprocessors I
Spring 04/05 – Lecture Notes # 19
Outline of the Lecture
• Interfacing the Serial Port
• Basics of Serial Communication
• Asynchronous Data Communication and Data Framing
• RS232 and other Serial I/O Standards
Sender Receiver
Sender Receiver
D7
1
Serial Data Communication Systems
Transmitter Receiver
Simplex
Transmitter Receiver
Half Duplex
Receiver Transmitter
Transmitter Receiver
Full Duplex
Receiver Transmitter
UART chips are used for serial communication. The 8250 series, which includes the
16450, 16550, 16650, & 16750 UARTS, are the most commonly used.
¾ The data coming in the receiving end of the data line in a serial data transfer is all 1s
and 0s; it is difficult to make sense of data unless the sender and receiver agree on a
set of rules, a protocol on how the data is packed, how many bits constitute a
character, and when the data begins and ends.
2
¾ In the Asynchronous method, each character is put between a start and stop bits. This
is called framing. In data framing, for asynchronous communications, the data such as
ASCII characters are packed in between a start bit and stop bit.
¾ The start bit is always one bit, but the stop bit(s) can be one or two bits. The start bit
is always a 0 (low) and the stop bit(s) is 1 (high)
¾ The example below gives the framing of the ASCII character “A”, where, binary
0100 0001, is framed in between the start bit and two stop bits. Notice that the LSB is
sent out first.
3
RS232 Pins
¾ Serial Ports come in two "sizes". There are the D-Type 25 pin connector and the D-
Type 9 pin connector both of which are male on the back of the PC, thus you will
require a female connector on your device. Below is a table of pin connections for
the 9 pin and 25 pin D-Type connectors.
4
Pin Functions
5
EEE 410 – Microprocessors I
Spring 04/05 – Lecture Notes # 20
Outline of the Lecture
• Interfacing the Serial Port
• Serial Port registers
• Transmitting Serial Data
• Receiving Serial Data
¾ Above is the standard port addresses. These should work for most P.C's. However
some PCs can have different set of addresses and IRQ's. Just like the LPT ports,
the base addresses for the COM ports can be read from the BIOS Data Area.
1
¾ DLAB ?
• You will have noticed in the table of registers that there is a DLAB column.
When DLAB is set to '0' or '1' some of the registers change. This is how the
UART is able to have 12 registers (including the scratch register) through only 8
port addresses.
• DLAB stands for Divisor Latch Access Bit. When DLAB is set to '1' via the
line control register, two registers become available from which you can set
your speed of communications measured in bits per second.
• The UART will have a crystal which should oscillate around 1.8432 MHZ. The
UART incorporates a divide by 16 counter which simply divides the incoming
clock signal by 16. Assuming we had the 1.8432 MHZ clock signal, that would
leave us with a maximum, 115,200 hertz signal making the UART capable of
transmitting and receiving at 115,200 Bits Per Second (BPS). That would be
fine for some of the faster modems and devices which can handle that speed,
but others just wouldn't communicate at all. Therefore the UART is fitted with a
Programmable Baud Rate Generator which is controlled by two registers.
• Ex: Lets say for example we only wanted to communicate at 2400 BPS??
Speed (BPS) Divisor (Dec) Divisor Latch High Byte Divisor Latch Low Byte
50 2304 09h 00h
300 384 01h 80h
600 192 00h C0h
2400 48 00h 30h
4800 24 00h 18h
9600 12 00h 0Ch
19200 6 00h 06h
38400 3 00h 03h
57600 2 00h 02h
115200 1 00h 01h
Table : Table of Commonly Used Baudrate Divisors
2
¾ Line Control Register (LCR)
• The Line Control register sets the basic parameters for communication. Bit 7 is
the Divisor Latch Access Bit or DLAB for short. We have already talked about
what it does. Bit 6 Sets break enable. When active, the TD line goes into
"Spacing" state which causes a break in the receiving UART. Setting this bit to
'0' Disables the Break.
Bit 7 1 Divisor Latch Access Bit
Access to Receiver buffer, Transmitter buffer & Interrupt
0
Enable Register
Bit 6 Set Break Enable
Bits 3, Bit 5 Bit 4 Bit 3 Parity Select
4 and 5 X X 0 No Parity
0 0 1 Odd Parity
0 1 1 Even Parity
1 0 1 High Parity (Sticky) /Mark
1 1 1 Low Parity (Sticky) /Space
Bit 2 Length of Stop Bit
0 One Stop Bit
2 Stop bits for words of length 6,7 or 8 bits or 1.5 Stop Bits
1
for Word lengths of 5 bits.
Bits 0 Bit 1 Bit 0 Word Length
and 1 0 0 5 Bits
0 1 6 Bits
1 0 7 Bits
1 1 8 Bits
Table: Line Control Register
• Bits 3,4 and 5 select parity. If you study the 3 bits, you will find that bit 3 controls
parity. That is, if it is set to '0' then no parity is used, but if it is set to '1' then parity is
used. Jumping to bit 5, we can see that it controls sticky parity. Sticky parity is simply
when the parity bit is always transmitted and checked as a '1' or '0'. This has very little
success in checking for errors as if the first 4 bits contain errors but the sticky parity bit
contains the appropriately set bit, then a parity error will not result. Sticky high parity is
the use of a '1' for the parity bit, while the opposite, sticky low parity is the use of a '0'
for the parity bit.
• If bit 5 controls sticky parity, then turning this bit off must produce normal parity
provided bit 3 is still set to '1'. Odd parity is when the parity bit is transmitted as a '1' or
'0' so that there is a odd number of 1's. Even parity must then be the parity bit
produces and even number of 1's.
• Bit 2 sets the length of the stop bits. Setting this bit to '0' will produce one stop bit,
however setting it to '1' will produce either 1.5 or 2 stop bits depending upon the word
length. Note that the receiver only checks the first stop bit.
• Bits 0 and 1 set the word length. This should be pretty straight forward. A word length
of 8 bits is most commonly used today.
3
¾ Modem Control Register (MCR)
Bit Notes
Bit 7 Reserved
Bit 6 Reserved
Bit 5 Autoflow Control Enabled (16750 only)
Bit 4 LoopBack Mode
Bit 3 Aux Output 2
Bit 2 Aux Output 1
Bit 1 Force Request to Send
Bit 0 Force Data Terminal Ready
Table: Modem Control Register
• The Modem Control Register is a Read/Write Register. Bits 5,6 and 7 are reserved. Bit
4 activates the loopback mode. In Loopback mode the transmitter serial output is
placed into marking state. The receiver serial input is disconnected. The transmitter out
is looped back to the receiver in. DSR, CTS, RI & DCD are disconnected. DTR, RTS,
OUT1 & OUT2 are connected to the modem control inputs. The modem control output
pins are then place in an inactive state. In this mode any data which is placed in the
transmitter registers for output is received by the receiver circuitry on the same chip
and is available at the receiver buffer. This can be used to test the UARTs operation.
• Aux Output 2 maybe connected to external circuitry which controls the UART-CPU
interrupt process. Aux Output 1 is normally disconnected, but on some cards is used to
switch between a 1.8432MHZ crystal to a 4MHZ crystal which is used for MIDI. Bits 0
and 1 simply control their relevant data lines. For example setting bit 1 to '1' makes the
request to send line active.
Bit Notes
Bit 7 Error in Received FIFO
Bit 6 Empty Data Holding Registers
Bit 5 Empty Transmitter Holding Register
Bit 4 Break Interrupt
Bit 3 Framing Error
Bit 2 Parity Error
Bit 1 Overrun Error
Bit 0 Data Ready
Table : Line Status Register
• The line status register is a read only register. Bit 7 is the error in received FIFO bit.
This bit is high when at least one break, parity or framing error has occurred on a byte,
which is contained in the FIFO.
• When bit 6 is set, both the transmitter holding register and the shift register are
empty. The UART's holding register holds the next byte of data to be sent in parallel
4
fashion. The shift register is used to convert the byte to serial, so that it can be
transmitted over one line.
• When bit 5 is set, only the transmitter holding register is empty. So what's the
difference between the two? When bit 6, the transmitter holding and shift registers are
empty, no serial conversions are taking place so there should be no activity on the
transmit data line. When bit 5 is set, the transmitter holding register is empty, thus
another byte can be sent to the data port, but a serial conversion using the shift register
may be taking place.
• The break interrupt (Bit 4) occurs when the received data line is held in a logic state '0'
(Space) for more than the time it takes to send a full word. That includes the time for
the start bit, data bits, parity bits and stop bits.
• A framing error (Bit 3) occurs when the last bit is not a stop bit. This may occur due to a
timing error. You will most commonly encounter a framing error when using a null
modem linking two computers or a protocol analyzer when the speed at which the data
is being sent is different to that of what you have the UART set to receive it at.
• A overrun error normally occurs when your program can't read from the port fast
enough. If you don't get an incoming byte out of the register fast enough, and another
byte just happens to be received, then the last byte will be lost and a overrun error will
result.
• Bit 0 shows data ready, which means that a byte has been received by the UART and
is at the receiver buffer ready to be read.
Notes
Bit
Bit 7 Carrier Detect
Bit 6 Ring Indicator
Bit 5 Data Set Ready
Bit 4 Clear To Send
Bit 3 Delta Data Carrier Detect
Bit 2 Trailing Edge Ring Indicator
Bit 1 Delta Data Set Ready
Bit 0 Delta Clear to Send
Table: Modem Status Register
• Bit 0 of the modem status register shows delta clear to send, delta meaning a change
in, thus delta clear to send means that there was a change in the clear to send line,
since the last read of this register. This is the same for bits 1 and 3.
• Bit 1 shows a change in the Data Set Ready line where as Bit 3 shows a change in the
Data Carrier Detect line. Bit 2 is the Trailing Edge Ring Indicator which indicates that
there was a transformation from low to high state on the Ring Indicator line.
5
• Bits 4 to 7 show the current state of the data lines when read. Bit 7 shows Carrier
Detect, Bit 6 shows Ring Indicator, Bit 5 shows Data Set Ready & Bit 4 shows the
status of the Clear To Send line.
Example Questions:
Ex1: Write the required assembly Language program segment to provide the following
frame for serial communication?
- 7 bits character, 1 stop bit, odd parity
Solution: We can provide the above settings by using the Line Control Register.
D7 D6 D5 D4 D3 D2 D1 D0
DLAB Break Parity2 Parity1 Parity0 Stop Data1 Data0
XX0 = No parity 00 =5 data bits
001 = Odd parity 01 =6 data bits
011 = Even parity 10 =7 data bits
101 =High parity(sticky) 11 =8 data bits
111=Low parity(sticky)
0=1 stop bits
0=break 1=2 stop bits
1=disable break
Then, 0000 1010B = 0AH is to be sent to the address of the Line Control Register (base
+03H)
Ex2: Program the divisor latch to provide 9600 baud rate. Assume 1.8432 MHz frequency.
6
OUT DX,AL ;issue the low byte
MOV AL,00
INC DX ;high byte divisor latch address(3F8H+01)
OUT DX,AL
2. check DSR & CTS (DSR-Data Set Ready & CTS-Clear to send)
(check if bits 5 & 4 in the Modem Status register are equal to 1 at base
address+06) wait until timeout
REFERENCE:
Read, http://www.beyondlogic.org/serial/serial1.htm for further details.