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6821
I. INTRODUCTION
HE typical averaged and switched models of power converters depend on the sequence of modes and operating
conditions [1][4] which are determined by the specific switching functions [5] and control requirements [6]. Consequently, the
use of these classical models for the analysis of the closed-loop
power converters requires the introduction of suitable simplifying assumptions, [7], [8].
Complementarity models [9] represent an attractive solution
to overcome some of these drawbacks. Recently, they have been
proposed as an useful framework for modeling linear circuits
with diodes and ideal switches [10], [11]. Indeed, the complementarity framework can be used to model a wide class of nonsmooth dynamical systems, such as mechanical systems with
Coulomb friction [12] and piecewise linear Lure systems [13].
Such idea has been more specifically applied to power
converters in [14]. Linear complementarity (LC) models have been proposed for modeling specific open-loop
power converters topologies: single-phase diode bridges [15],
Manuscript received August 1, 2013; revised November 15, 2013 and January
15, 2014; accepted February 8, 2014. Date of publication February 20, 2014;
date of current version August 13, 2014. Recommended for publication by
Associate Editor C. K. Tse.
The authors are with the Department of Engineering, University of Sannio,
Piazza Roma 21, 82100 Benevento, Italy (e-mail: valentina.sessa; luigi.iannelli,
vasca@unisannio.it).
Digital Object Identifier 10.1109/TPEL.2014.2306975
three-phase rectifiers [16], switched capacitors [17], and resonant converters [18]. Dealing with more general classes of
power converters, the complementarity models proposed in [19]
and [20] are constructed by considering the specific switches
states and by assuming the a priori knowledge of the power
converter configuration at each switching time instant. A strong
limitation of the models proposed in [10], [14], and [21] is that
they require switching of the sets (cones) of the complementarity variables. Unfortunately, this property does not allow to
obtain the models of controlled power converters in a manageable closed form. An alternative approach with fixed cones and
characteristics depending on some external forcing variable is
presented in [22]: the switch model is a signum characteristic
having the switch current as the argument and whose amplitude
is a piecewise linear function of an external control voltage.
In [23], transistors are modeled within the complementarity
framework, but the analysis is limited to static circuits. In [15],
the switches are modeled by means of equivalent finite resistors
representing the ON (conducting) and OFF (blocking) states determined by the signum of an external voltage signal. That model
cannot be easily generalized to the case of zero conducting and
infinite blocking equivalent resistances.
The model proposed in this paper is able to represent in an LC
explicit form the large signal dynamics of closed-loop power
converters. The complementarity model is simple to be built
and captures all modes of the converter, without enumerating
them, nor assuming the a priori knowledge of the sequence
of modes and of the switching time instants. Such LC model
is shown to be useful for the computation of the control-tooutput frequency response, which is a crucial issue for controlled
power converters so as analyzed in [18], [24], and the references
therein. Moreover, the proposed LC model of closed-loop power
converters allows to obtain directly the closed-loop steady-state
behavior, which is often a nontrivial task so as in the case of LCC
resonant converters [25], [26] and modular multilevel converters
[27], [28].
The rest of the paper is organized as follows. In Section II, the
static LC models corresponding to the ideal diode and the controlled switches characteristics are presented. The procedure for
the construction of the dynamic LC model of a power converter,
both in open-loop and closed-loop, is described in Section III.
Section IV shows how this representation allows to compute
the steady-state periodic oscillation as a solution of a mixed
LC problem derived from the discretized closed-loop system.
In Section V, the approach used for the steady-state solution is
applied for the computation of the control-to-output frequency
response for a Z-source converter [29], whereas the uniqueness of the steady-state solution is guaranteed by the passivity
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 12, DECEMBER 2014
hypothesis. In Section VI, the usefulness of the proposed technique for the computation of transient and steady-state solutions
of closed-loop power converters is numerically demonstrated
by considering current-controlled and voltage-controlled boost
dcdc power converters with stable and unstable periodic solutions [4], [30] and a closed-loop buck dcdc converter which
exhibits multiple solutions [31]. Section VII concludes the
paper.
II. COMPLEMENTARITY MODELS OF ELECTRONIC DEVICES
The idealized voltagecurrent characteristics of electronic devices can be represented by means of static LC models. To show
this, let us introduce the definition of a mixed LC problem, [32].
Given a vector q Rr , a matrix M Rr r and lower and upper
bounds l, u Rr {, +}r , a mixed LC problem consists
of finding z Rr such that
w v = Mz + q
(1a)
0 w (z l) 0
(1b)
0 v (u z) 0
(1c)
(2a)
0 w z 0.
(2b)
(3)
(4a)
wd = d
(4b)
0 wd zd 0.
(4c)
(5a)
wd = + rD zd + VF
(5b)
0 wd zd 0
(5c)
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Fig. 2. Piecewise linear characteristics of a diode: (a) voltagecurrent characteristic, (b) currentvoltage characteristic, (c) (, ) characteristic with input
= v and output = i, and (d) (, ) characteristic with input = i and
output = v.
(6a)
(6b)
(6c)
(7a)
wc 1 = zc 2 + c
(7b)
wc 2 = zc 1 + im ax
(7c)
0 wc zc 0
(7d)
where wc = col(wc1 , wc2 ), zc = col(zc1 , zc2 ), and col() indicates a vector obtained by stacking in a unique column the
Fig. 3. Electronic switch: (a) symbol, (b) idealized voltagecurrent characteristic, (c) idealized currentvoltage characteristic, (d) characteristic with
c = v S and c = iS , and (e) characteristic with v = iS and v = v S .
Without loss of generality, it is assumed that the switch is able to block also
negative voltages.
(9a)
c < 0 zc 2 > 0 wc 2 = 0 c = zc 1 = im ax
(9b)
c = 0 {wc 1 0, zc 2 0} c = zc 1 [0, im ax ].
(9c)
For [0, 1], the model (7) describes the set of possible
voltagecurrent characteristics obtained by varying between
0 and 1. The matrix (8) is positive semidefinite (and not Pmatrix) and for c = 0 the solution zc of (7) is not unique, see
(9c). On the other hand, among all possible solutions of (7), the
following least-norm solution:
c > 0 zc = col(0, 0)
(10a)
c < 0 zc = col(im ax , c )
(10b)
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 12, DECEMBER 2014
c = 0 zc = col(0, 0)
(10c)
is unique.
An analysis similar to that presented above can be done if the
switch current iS and the switch command are given and the
corresponding switch voltage must be found. Indeed, one can
consider the currentvoltage characteristic shown in Fig. 3(e),
where v = vS is the switch voltage and v = iS is the switch
current. A possible LC model can be written as
v = z v 1 z v 2
(11a)
wv 1 = v
(11b)
wv 2 = v + im ax
(11c)
0 wv zv 0
(11d)
=0
v = zv 1 zv 2 R
0 < 1 wv 1 > 0 zv 1 = 0
v = im ax
(12b)
v = zv 2 0
=0
see(12a)
0 < v < im ax {wv 1 > 0, wv 2 > 0} v = 0. (12c)
Consider also the antiparallel connection of an electronic
switch and a diode. Assume that is the opposite of the voltage
across the parallel, that is equal to the voltage across the switch
and i is the total current through the parallel, that is the difference
between the switch and the diode currents. By combining the
voltagecurrent characteristic (c , c ) of the electronic switch
in Fig. 3(d) with the voltagecurrent characteristic (d , d ) of
the diode in Fig. 1(d), one gets the voltagecurrent piecewise
linear characteristic of the antiparallel connection in Fig. 4(b).
The resulting characteristic has one breaking point and it can be
modelled by the LC model
= z + im ax
(13a)
w =
(13b)
0 w z 0.
(13c)
(14a)
w = + im ax
(14b)
0 w z 0.
(14c)
= col(d , c , v )
(15a)
= col(d , c , v )
(15b)
wo = col(wd , wc , wv )
(15c)
zo = col(zd , zc , zv )
(15d)
= col(c , v )
(15e)
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Fig. 6.
Fig. 5.
(16a)
(16b)
(16c)
Fig. 7. Block diagram of a proportionalintegral controller: e 1 is the reference signal for the output variable y; m is the modulation signal; e 2 is the
carrier signal; x is the controller state variable (the integral of the error); k p
and k i are the proportional and integral gains, respectively; is the switching
signal.
x o = Ao xo + Bo + Eo eo
(18a)
= Co xo + Do + Fo eo
(18b)
x = Ax + Bz + Ee
(17a)
w = Cx + Dz + F e
(17b)
0wz0
(17c)
where x is the state vector, w and z are complementarity variables, e is the vector of the exogenous inputs, and A, B, C, D,
E, F are constant matrices of suitable dimensions.
The construction of the complementarity model is modular
in the sense that it directly follows by associating the converter
dynamic modelderived by standard methods and depending
only on its topologywith the electronic devices characteristics. A block scheme representation, corresponding to the model
(17) decomposed into its major subsystems, is shown in Fig. 5.
The model construction procedure is applied step-by-step to a
boost dcdc converter with voltage-mode pulse-width modulation (PWM) control, see Figs. 6 and 7.
A. Open-Loop LC Model
As a preliminary step, it is shown that a dynamic model of
open-loop power converters can be written in the form (17).
A typical approach for deriving a power converter dynamical
(19a)
(19c)
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 12, DECEMBER 2014
x o 1 =
(20a)
x o 2
(20b)
d = xo 1 c
(20c)
c = xo 2 + d
(20d)
= B z
w = C + D z +
0 w z 0
(23a)
(23b)
(23c)
d = z d
(21a)
c = zc 1
(21b)
wd = d
(21c)
x = A x + A o xo + E o eo + E e e
(24a)
wc 1 = c + zc 2
(21d)
= Cm x + Cm o xo + Fm e e
(24b)
wc 2 = zc 1 + im ax
(21e)
0 wo zo 0
(21f)
(22a)
x = col(xo , x )
(25a)
w 1 = z 2
(22b)
e = col(eo , e , 1N s )
(25b)
w 2 = z 1 + 1
(22c)
z = col(zo , z )
(25c)
(22d)
w = col(wo , w )
(25d)
= z 1
0 w z 0
Ao
0
A=
(26a)
A o A
Bo B 0
(26b)
B=
0
0
C Co
0
C=
(26c)
C Cm o C Cm
D=
E=
F =
C Do B + D
G B
Eo
E o
E e
(26d)
(26e)
C Fo
C Fm e
(26f)
(27a)
= ki x kp xo 2 + kp e 1 e 2
(27b)
R1
1
0
L1
L1
1
A= 1
C1
R2 C1
0
1
0
1
0
0 0 0
L1
1
B=
0 C1 0 0 0
0
0
0 0 0
1 0
0
0 1
0
0
C = 0 0
0 k
k
p
i
0
0
D = 0
0
0
(28b)
(28c)
0
0
0 0
0 0
0
0
0
F = 0
0 k
p
0 .
0
0
(28e)
(28f)
(29b)
(29c)
(31b)
with
1 0
(28a)
1
L1
E=
0
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0
0
1 0 imax
0
(28d)
(32)
M = CBz + D
and
qk = CAz xk 1 + (CEz + F )ek + CBz zk 1 + CEz ek 1
(33)
for k = 1, 2, . . . , Nh . Each LC problem (31) can be solved by
using standard (and efficient) algorithms widely studied in the
complementarity literature [9].
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 12, DECEMBER 2014
The dynamic LC model (29) can be used also to compute steady-state oscillations exhibited by closed-loop power
converters. Let us assume that the system (17) has a periodic absolutely continuous solution x(t) = x(t + T ) for every
continuous-time instant t with T being the known period of the
solution. We assume that the convergence property, also called
consistency, holds, i.e., the continuous piecewise linear interpolation of the samples sequence xk given by (29) converges
to the continuous-time solution x(t) of (17) as h = T /Nh goes
to zero. In particular, we assume that (29) has a periodic solution of period Nh , approximating the periodic continuous-time
solution of period T of the system (17). For a large class of
constrained complementarity systems, the consistency property
holds [33]. The numerical results in Sections V and VI will confirm the validity of this property also for the power converters
considered.
By defining
(34a)
x
= col(x1 , x2 , . . . , xN h )
0wz0
with
z = col(z1 , z2 , . . . , zN h )
(34c)
and
w = Cx + Dz + F e
IN x
0
0
Az
IN x
0
0
A
I
0
z
Nx
A=
..
..
..
..
.
.
.
.
0
Az
0
0
Bz
0
0
0
Bz Bz
0
0 B
Bz
0
z
B=
..
..
..
..
..
.
.
.
.
.
0
0 Bz Bz
0
0
0 Bz
0
0
..
.
IN x
Az
Bz
0
0
..
.
0
Bz
C = IN h C
(35b)
Az
0
0
..
.
0
IN x
(36a)
(36b)
(36c)
0
0
Ez
..
.
0
..
.
0
0
..
.
Ez
0
Ez
Ez
Ez
0
0
..
.
0
Ez
F = IN h F
where denotes the Kronecker product.
(36d)
(37)
h
has some eigenvalue in 1, which
then A is singular if AN
z
happens for instance when A has eigenvalues in the origin, see
(30a).
If the matrix A is invertible, the periodic solution of (29) can
be obtained by formulating a suitable LC problem. Indeed by
solving (35a) for the vector x, we obtain
1
x = A (B z + E e).
(38)
Then, by substituting (38) in (35b), we obtain
w = Mz + q
(39a)
(34b)
w
= col(w1 , w2 , . . . , wN h )
(34d)
with x R
, z R(4N s +N d )N h and by using the periodicity condition x0 = xN h , we can write simultaneously the
equations (29) along the period Nh which leads to
0 = Ax + Bz + E e
(35a)
D = IN h D
Ez
0
Ez Ez
0 E
z
E=
..
..
.
.
0
0
0
h
det(A) = (1)N h det(IN x AN
z )
e = col(e1 , e2 , . . . , eN h )
N x N h
with
M = CA B + D
1
q = (CA E + F ) e
(39b)
(40)
(41)
A B
M=
C D
E
q=
e
F
(42a)
(42b)
(42c)
l = col(N x N h , 0)
(42d)
u = col(+N x N h , +(4N s +N d )N h )
(42e)
(36e)
(36f)
The approach for the computation of the steady-state solution can be used to determine the control-to-output frequency
response of power converters, that is usually calculated by considering open-loop models. Then, in the following, we refer to
the application of the technique presented in the previous section
by considering the matrices
A = Ao , B = Bo B , C = C Co , D = C Do B + D
(43)
Fig. 8.
see (17) and (19). A useful property for such analysis is the
uniqueness of the steady-state solution x which corresponds to
the unique least-norm solution z of the LC problem (39)(41),
or if A is not invertible to the solution of the mixed LC problem
(1) with (42). Conditions for such uniqueness can be obtained by
using the passivity concept. In particular, if the open-loop model
(18) of a power converter is passive with respect to the input
and the output (with and being the inputoutput of the discussed idealized electronic devices), then the complementarity
problem (39) has a unique least-norm solution.
As an example, let us consider the Z-source dcdc converter
in Fig. 8, where eo is the input voltage, xo 1 , xo 3 , xo 5 are the
currents of the inductors, xo 2 , xo 4 , xo 6 are the voltages of the
capacitors, (c , c ) is the currentvoltage pair of the electronic
switch, and (d , d ) is the voltagecurrent pair of the diode. By
applying the Kirchhoff laws to the circuit, one obtains
x o 1 =
(R1 + R2 )
1
R2
1
xo 1
xo 2 +
xo 5 +
d
L1
L1
L1
L1
R2
1
c +
eo
L1
L1
1
1
1
=
xo
xo
c
C1 1
C1 5
C1
+
x o 2
x o 3 =
R2
1
c +
eo
L1
L1
1
1
1
=
xo 3
xo 5
c
C1
C1
C1
x o 5 =
(44c)
(44d)
R2
1
R2
1
R2
xo +
xo +
xo +
xo 2 xo 5
L2 1
L2 2
L2 3
L2 4
L2
1
1
R2
1
xo
d 2 c
eo
L2 6
L2
L2
L2
1
1
=
xo
xo
C2 5
R3 C2 6
x o 6
(44b)
(R1 + R2 )
1
R2
1
xo 3
xo +
xo +
d
L1
L1 4
L1 5
L1
x o 4
(44a)
d = xo 1 + xo 3 xo 5 c
(44e)
(44f)
(44g)
c = R2 xo 1 xo 2 R2 xo 3 xo 4 + 2R2 xo 5 + d
+ 2R2 c + eo
(44h)
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Moreover, by substituting the switch and the diode complementarity models (7) and (4), respectively, the resulting Zsource converter model in the form (19) is passive with respect
to the input zo and the output wo .
A typical approach in order to obtain the control-to-output
frequency response of power converters consists of considering a PWM with sinusoidal modulation signal e 1 = V0 +
V1 sin(2t/T ) and a periodic carrier signal, say e 2 . Without
loss of generality, it is useful to consider the modulation signal period T proportional to the carrier signal period Tc , i.e.,
T = Np Tc where Np is a positive integer. The sampling period
h can be chosen as h = T /Nh = Tc Np /Nh . By considering
Fig. 7 without the feedback, i.e., y = 0, kp = 1 and ki = 0, one
can write
= e 1 e 2
(45)
which is in the form (24b). The model of the power converter can be written in the form (17) by using (44) with (4)
for the pair (d , d ), (7) for the pair (c , c ), (22) for the
switching signal , (45) for the variable and by defining
x = xo , e = col(eo , e 1 , e 2 , 1), z = col(zd , zc 1 , zc 2 , z 1 , z 2 ),
and w = col(wd , wc 1 , wc 2 , w 1 , w 2 ).
The proposed LC approach for the computation of the steadystate solution can be applied to the resulting model.
Consider the following circuit parameters L1 = 175 H,
C1 = 220 F, R1 = 0.42 , R2 = 0.22 , R3 = 50 , L2 =
330 H, C2 = 470 F, and im ax = 5 A, and eo = 12 V. The
modulation voltage e 1 is a sinusoidal signal with V0 = 0.3 V
and V1 = 0.03 V and the carrier signal e 2 is a sawtooth with
unitary amplitude and frequency 1/Tc = 100 kHz. Fig. 9 shows
the amplitude and the phase of the first harmonic of the steadystate output voltage xo 6 obtained by varying Np = 2, 3, . . . , 10
with Nh = 4000, compared with the results obtained by using the averaged model and the analytical solution obtained by
considering the a priori knowledge of the commutation time
instants and the sequence of the modes. These data are not
required for the computation of the complementarity solution
which provides these information as results.
Fig. 9 confirms the good accuracy of the complementarity
approach whose results are very close to the analytical solution.
Instead, at 50 kHz, corresponding to Np = 2, we can note the
accuracy reduction of the averaged model when the frequencies
of the modulation and carrier signals become closer.
The LC model captures the switched behavior of the converter
independently of the modulation frequency, provided that a sufficiently small sampling period h is selected.
Once again, it is important to highlight that the same LC
model is valid for all operating conditions and does not require
the a priori knowledge of the modes sequence.
In the following, the control-to-output response is obtained
by considering a constant control voltage, as in [35], where a
Z-source converter with the parasitic resistances is considered.
The model of the Z-source converter is built by considering the
complementarity model of the diode and the electronic switch
with parasitics, see Section II. In order to prove the efficiency of
the proposed approach, we have compared our results with the
exact steady-state solution, computed with analytical map, see
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 12, DECEMBER 2014
Fig. 9. First harmonics of the output voltage of the Z-source converter obtained
with the LC steady-state approach (*), the averaged model (o), and the analytical
solution () for different values of N p .
TABLE 1
THEORETICAL, EXPERIMENTAL, AND SIMULATION RESULTS
closed-loop power converters. Before analyzing some examples, it is interesting to make a preliminary consideration on
the passivity of closed-loop power converters. We were not
able to find a power converter with a closed-loop model being
passive with respect to the complementarity variables: for all
cases analyzed, the passivity property is lost when going from
open-loop to closed-loop models. If the closed-loop complementarity model is not passive, it is not possible to conclude
the uniqueness of the solution of (39). However, the interesting thing is that closed-loop converters can be still analyzed by
using the complementarity modeling approach and the steadystate computation procedure presented previously. Indeed, for
determining the multiple solutions, one can enlarge the complementarity problem with opportune constraints. For instance, by
following the procedure shown in [36], it is possible to find all
different solutions of a LC problem. Briefly, say z a solution of
the LC problem (39): one can construct a new LC problem that
has all solutions of (39) except for z, i.e., to exclude z from the
solutions of (39). This can be repeated for all solutions. See [36]
and the references therein for more details. Another approach
could be to initialize the LC problem solver with different initial guesses. All LC problems are solved by using the PATH
tool [32].
As in Section V, the numerical results presented in this section
are verified by considering the exact steady-state solution computed by constructing the nonlinear closed-loop maps which can
be analytically obtained once the sequence of modes (but not
the switching time instant) is fixed.
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Fig. 11. Steady-state inductor current and output voltage computed by the LC
procedure for the closed-loop boost dcdc converter in discontinuous conduction
mode.
Fig. 12. Error in the switching time instant in which the current becomes zero
obtained by varying N h [42, 642] for the closed-loop boost dcdc converter
in discontinuous conduction mode. The horizontal axis is log 1 0 (1/N h ) and
the vertical axis is the log 1 0 |ts w ts w | where ts w and ts w are the switching
time instants in which the current becomes zero obtained for the analytical
and the complementarity solutions, respectively. The dashed lines are the linear
least-squares interpolations.
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Fig. 13. Time evolution obtained with the time-stepping LC procedure for the
closed-loop boost dcdc converter.
Fig. 14. Phase plane corresponding to the stable (continuous line) and the
unstable (dashed line) solutions obtained with the LC technique applied to the
closed-loop boost dcdc converter.
In [30], it is shown that the closed-loop power converter exhibits two periodic solutions with period Tc : one stable and
another unstable. Fig. 14 shows the stable (continuous line) and
the unstable (dashed line) solutions in the currentvoltage plane
obtained with the LC approach and Nh = 400, which corresponds to 0.005 s. The results are also coherent with those
presented in [37]. The two solutions are obtained by using the
PATH algorithm [32] with zero (nonzero) initial guess for the
stable (unstable) solution. The computation time is 2.04 s for
the stable solution and 2.06 s for the unstable one. In Fig. 15, it
is shown the comparison of the complementarity solution with
the exact steady-state solution of the nonlinear closed-loop map
obtained by assuming the sequence of modes. The qualitative
comments on the error accuracy reported for Fig. 10 are confirmed for the boost converter.
C. Boost Converter With Current-Mode Control
Consider the boost dcdc converter in Fig. 6 under currentmode control with slope compensation. Because of the presence
Fig. 18.
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proposed in this paper decreases when the time step chosen for
the discretization decreases.
D. Buck Converter With Period Doubling Bifurcation
,k = xo 1 ,k e 1 ,k + e 2 ,k
(46b)
(48c)
wc 1 = zd + zc 2 eo
(48d)
wc 2 = zc 1 + im ax z 1
(48e)
(47a)
w 1 = kp xo 2 + z 2 kp e 1 + e 2
(48f)
w 1 ,k = z 2 ,k + 1
(47b)
w 2 = z 1 + 1
(48g)
w 2 ,k = z 1 ,k + z 2 ,k z 3 ,k 1 + k 1
(47c)
w 3 ,k = z 4 ,k ,k
(47d)
w 4 ,k = z 3 ,k + 1
(47e)
k = 1 (1 e 3 ,k )z 2 ,k
0 w,k z,k 0
(47f)
0wz0
(48h)
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 12, DECEMBER 2014
Fig. 19. Carrier signal e 2 (dotted line) and modulation signals for stable
double-period solution (continuous line) and single-periodic unstable solution
(dashed line) for the closed-loop buck dcdc converter.
Fig. 20. Phase plane corresponding to the different solutions of the closed-loop
buck dcdc converter in Fig. 19: unstable (dashed line) and stable (continuous
line). Note the presence of multiple discontinuous conduction mode phases
during the double-periodic solution.
Fig. 21. Comparison with experimental results (dots) for the closed-loop buck
dcdc converter: carrier signal e 2 (dotted line) and simulation solution (continuous line). Numerical solution with sliding motion (dot-dashed line) obtained
with different control parameters.
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