Professional Documents
Culture Documents
90 VIN = 2.7V
80 VIN = 3.6V
70
EFFICIENCY (%)
60
50
VIN = 4.2V
40
30
VOUT = 1.8V
Figure 1. Basic Application Circuit with 20 TA = 25C
APS1006 adjustable version, Vout = 1.8V
10
0.1 1 10 100 1000
OUTPUT CURRENT (mA)
Package/Order Information
Adjustable Output Version: Fixed Output Versions:
MARKING
GND 2 GND 2
SW 3 4 VIN SW 3 4 VIN
TSOT23-5
TSOT23-5
Part Number Top Mark Temp Range
APS1006ET5 A1XY(note4) -40°C to +85°C Part Number Top Mark Temp Range
APS1006ET5-1.5 A2XY
APS1006ET5-1.8 A3XY -40°C to +85°C
APS1006ET5-1.2 A4XYB
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula:
TJ = TA + PD x ӨJA.
Note 3: Thermal Resistance is specified with approximately 1 square of 1 oz copper.
Note 4: XY = Manufacturing Date Code
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
95 90
VIN = 2.7V
90 80
85 70
Iload = 500 mA
EFFICIENCY (%)
EFFICIENCY (%)
VIN = 3.6V
80 Iload = 100 mA 60
75 50
Iload = 10 mA VIN = 4.2V
70 40
65 30
60 20
VOUT = 1.2V
55 10 TA = 25C
50 0
2 3 4 5 6 0.1 1 10 100 1000
INPUT VOLTAGE (V) OUTPUT CURRENT (mA)
EFFICIENCY (%)
60
60
50
VIN = 3.6V 50
40
VIN = 4.2V
40
30
20 30
VOUT = 1.5V VOUT = 1.8V
10 TA = 25C 20 TA = 25C
0 10
0.1 1 10 100 1000 0.1 1 10 100 1000
OUTPUT CURRENT (mA) OUTPUT CURRENT (mA)
Efficiency vs Output Current Efficiency vs Load Current
100 100
90 VIN = 3.6V
VIN = 2.7V 90 VOUT = 1.8V
80 TA = 25C
80
70 L = 2.2 uH
VIN = 4.2V 70
EFFICIENCY (%)
EFFICIENCY (%)
60
60 L = 1.4 uH
50
50
40 L = 10 uH
VIN = 3.6V
40
30
20 VOUT = 2.5V 30
TA = 25C
10 20 L = 4.7 uH
0 10
0.1 1 10 100 1000 0.1 1 10 100 1000
OUTPUT CURRENT (mA) LOAD CURRENT (mA)
60 L = 10 uH 1.76
50 L = 4.7 uH 1.74
40 1.72
0 1.64
0.1 1 10 100 1000 0 200 400 600 800 1000 1200
LOAD CURRENT (mA) LOAD CURRENT (mA)
1.43
MAIN SWITH
FREQUENCY (MHz)
R DS(ON) (OHM)
1.42 0.3
1.41
1.4 0.2
1.39
SYNCHRONOUS SWITCH
1.38 0.1
1.37
1.36 0.0
2.7 3.15 3.6 4.05 4.5 4.95 5.4 0 1 2 3 4 5 6 7
INPUT VOLTAGE (V) INPUT VOLTAGE (V)
0.6064 0.34
REFERENCE VOLTAGE (V)
0.32
0.6056 P_RDS(ON)
RDS(ON) (OHM)
0.30
0.6048
0.28
0.6040
0.26
0.6032
0.24
0.6024 0.22
N_R DS(ON)
0.6016 0.20
0.6008 0.18
-50 -30 -10 10 30 50 70 90 -45 -30 -15 0 15 30 45 60 75 90
TEMPERATURE (C) Temperature (C)
0.31 1.45
0.29 1.35
0.29 1.30
0.28 1.25
0.28 1.20
0.27 1.15
0.26 1.10
2.7 3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 -50 -25 0 25 50 75 100
INPUT VOLTAGE (V) Temperature (C)
300
Supply Current (uA)
280
260
240
220
200
-50 -30 -10 10 30 50 70 90
Temperature (C)
Load Transient Response
Pulse Skipping Mode to PWM Mode
PWM
Pulse Skipping
Mode
Operation
Dropout Operation
APS1006 is a monolithic switching mode Step-
Down DC-DC converter. It utilizes internal When the input voltage decreases toward the
MOSFETs to achieve high efficiency and can value of the output voltage, the APS1006 allows
generate very low output voltage by using internal the main switch to remain on for more than one
reference at 0.6V. It operates at a fixed switching switching cycle and increases the duty cycle (Note 5)
frequency, and uses the slope compensated until it reaches 100%. The output voltage then is
current mode architecture. This Step-Down DC- the input voltage minus the voltage drop across
DC Converter supplies 600mA output current at the main switch and the inductor. At low input
VIN = 3V with input voltage range from 2.5V to supply voltage, the RDS(ON) of the P-Channel
5.5V. MOSFET increases, and the efficiency of the
converter decreases. Caution must be exercised
Current Mode PWM Control to ensure the heat dissipated not to exceed the
maximum junction temperature of the IC.
Slope compensated current mode PWM control
Note 5: The duty cycle D of a step-down converter is
provides stable switching and cycle-by-cycle defined as:
current limit for excellent load and line responses
V OUT
and protection of the internal main switch (P-Ch D = TON × f OSC × 100% ≈ ×100%
MOSFET) and synchronous rectifier (N-CH VIN
MOSFET). During normal operation, the internal
P-Ch MOSFET is turned on for a certain time to Where TON is the main switch on time and fOSC is the
ramp the inductor current at each rising edge of oscillator frequency (1.5Mhz).
the internal oscillator, and switched off when the
peak inductor current is above the error voltage. Maximum Load Current
The current comparator, ICOMP, limits the peak
inductor current. When the main switch is off, the
The APS1006 will operate with input supply
synchronous rectifier will be turned on
voltage as low as 2.5V, however, the maximum
immediately and stay on until either the inductor
load current decreases at lower input due to large
current starts to reverse, as indicated by the
IR drop on the main switch and synchronous
current reversal comparator, IZERO, or the
rectifier. The slope compensation signal reduces
beginning of the next clock cycle. The OVDET
the peak inductor current as a function of the duty
comparator controls output transient overshoots
cycle to prevent sub-harmonic oscillations at duty
by turning the main switch off and keeping it off
cycles greater than 50%. Conversely the current
until the fault is no longer present.
limit increases as the duty cycle decreases.
Figure 3. APS1006 Four Layers Layout Example, with the 2nd and 3rd Internal Plane GND
Rated
Setting the Output Voltage L
Max
D.C.
Size
Part # DCR WxLxH
(µH) Current
Figure 1 above shows the basic application (mΩ) (mm)
(A)
circuit with APS1006 adjustable output version. 1.4 56.2 2.52
The external resistor sets the output voltage Sumida 2.2 71.2 1.75
according to the following equation: 4.5x4.0x3.5
CR43 3.3 86.2 1.44
⎛ R2 ⎞ 4.7 108.7 1.15
VOUT = 0.6V × ⎜1 + ⎟ 1.5
⎝ R1 ⎠
Sumida 2.2 75 1.32
4.7x4.7x2.0
CDRH4D18 3.3 110 1.04
Table 1 Resistor select for output voltage setting 4.7 162 0.84
VOUT R1(R3) R2(R4) 1.5 120 1.29
1.2V 316k 316k Toko
2.2 140 1.14
1.5V 316k 470k D312C 3.6x3.6x1.2
3.3 180 0.98
1.8V 316k 634k 4.7 240 0.79
2.5V 316k 1000k
Inductor Selection Input Capacitor Selection
The input capacitor reduces the surge current
For most designs, the APS1006 operates with drawn from the input and switching noise from
inductors of 1µH to 4.7µH. Low inductance the device. The input capacitor impedance at
values are physically smaller but require faster the switching frequency shall be less than input
switching, which results in some efficiency loss. source impedance to prevent high frequency
The inductor value can be derived from the switching current passing to the input. A low
following equation: ESR input capacitor sized for maximum RMS
current must be used. Ceramic capacitors with
VOUT × (VIN − VOUT ) X5R or X7R dielectrics are highly recommended
L= because of their low ESR and small temperature
V IN × ΔI L × f OSC coefficients. A 4.7µF ceramic capacitor for most
Where ΔI L is inductor Ripple Current. Large applications is sufficient.
value inductors lower ripple current and small
value inductors result in high ripple currents. Output Capacitor Selection
Choose inductor ripple current approximately The output capacitor is required to keep the
35% of the maximum load current 600mA, or output voltage ripple small and to ensure
regulation loop stability. The output capacitor
ΔI L =210mA. must have low impedance at the switching
frequency. Ceramic capacitors with X5R or X7R
dielectrics are recommended due to their low
VOUT × (V IN − VOUT ) ⎛ 1 ⎞
ΔVOUT ≤ × ⎜⎜ ESR + ⎟
V IN × f OSC × L ⎝ 8 × f osc × C 3 ⎟⎠
Package Description
IMPORTANT NOTICE
Analog Power Semiconductor (Shanghai) Co., Ltd. reserves the right to make changes without further
notice to any products or specifications herein. Analog Power Semiconductor (Shanghai) Co., Ltd. does
not assume any responsibility for use of any its products for any particular purpose, nor does Analog
Power Semiconductor (Shanghai) Co., Ltd assume any liability arising out of the application or use of any
its products or circuits. Analog Power Semiconductor (Shanghai) Co., Ltd does not convey any license
under its patent rights or other rights nor the rights of others.