You are on page 1of 7

1.

Introduction

Institute of
Microelectronic
Systems

Status of Microelectronics Technology

Vdd

Future VLSI chip

50

Vt

0.5

20
0.2

10
5

0.1

tOX

Gate oxide thickness t OX (nm)

Threshold voltage Vt (V) and power supply (V)

10

CMOS feature size


Core voltage (V)
Chip size
Transistors/cm

2005

2011

0.1 m

0.05 m

0.9-1.2 V
520 mm

DRAM bits /chip


Number of wiring levels

0.5-0.6 V
2

750 mm

40 M

100 M

17.2 G

275 G

7-8

(Source: International Technology Roadmap for


Semiconductors 1998 update)

1
0.02
0.05 0.1
0.5 1
MOSFET channel length (m)

1: Introduction

Institute of
Microelectronic
Systems

ASIC Outlook 1997: Semiconductor and Electronic


Equipment Sales Trends (1992 - 2001)

1: Introduction

Institute of
Microelectronic
Systems

Interconnect
Passivation

Technology Requirements:
Inductive effects will become
increasingly important
Additional metal patterns or Global
ground planes for inductive
shielding
Thinner metallization
Lower line-to-line capacitance
Increasing pitch and
Intermediate
thickness at each
conductor level to alleviate
the impact of interconnect
delay
Local

Dielectric
Etch stop
layer
Dielectric
diffusion
barrier

Copper
conductor
with metal
barrier liner

Pre-metal
dielectric
Tungsten
contact
plug
Source: SIA Roadmap 1999

1: Introduction

Institute of
Microelectronic
Systems

Productivity Gap: Technology vs. CAD

1: Introduction

Institute of
Microelectronic
Systems

Productivity Gap: Technology vs. CAD


Need to increase Designers Productivity in order to make use of
new Technologies
SIA Roadmap for the Design Technology Requirements (near
term)

1: Introduction

Institute of
Microelectronic
Systems

Productivity Gap: Beyond 2008


SIA Roadmap for the Design Technology Requirements (far
term)

Institute of
Microelectronic
Systems

1: Introduction

EDA: High-Level Design


architecture structural of first_tap is
signal x_q,red : std_logic_vector(bitwidth-1 downto 0);
signal mult : std_logic_vector(2*bitwidth-1 downto 0);

VHDL-Description
Gate-Level
Netlist

begin
delay_register:
process(reset,clk)
begin
if reset='1' then
x_q <= (others => '0');
elsif (clk'event and clk='1') then
x_q <= x_in;
end if;
end process;

RTL-Synthesis
(Synopsys)

mult <= signed(coef)*signed(x_q);

Placement &
Routing
(Cadence/Mentor)

Production

ASIC

1: Introduction

Layout
Institute of
Microelectronic
Systems

Challenge: System-on-a-Chip Design ?


System on a Chip

Reuse, IP Cores

Design
Complexity

RTL

Synthesis
Gates

Place & Route


Transistors

Polygons
1975

Design
Productivity

Masks
1980

1985

1990

1995

2000

Chasing the design gap


Institute of
Microelectronic
Systems

1: Introduction

Traditional ASIC market


ASICs are customer specific Ics
If application-specific processor: ASIP
The product is made only once
an application is found
Semicustom

ASIC
(customer
specific)
Custom

Non-standard
IC
ASIP
(application
specific)

1: Introduction

Programmable

Institute of
Microelectronic
Systems

One or more
customised layers

All layers
customised

Circuit with fuse,


antifuse or
memory that can
be programmed
10

SoC: Silicon Components Categories


Silicon
Siliconcomponents
components
Discrete
Discretedevices
devices
and
optoelectronics
and optoelectronics

Integrated
Integratedcircuits
circuits

Analog
Analogand
and
Mixed
Mixedsignal
signal

Logic
Logic
Logic
Logic
Gate
Gatearrays
arrays
Cell
Cellbased
based
FPLDs
FPLDs
SoC
Other

Microcomponets
Microcomponents
Microprocessors
Microprocessors
Microcontrolers
Microcontrollers
Microperipherals
Microperipherals

Memory
Memory
DRAMs
DRAMs
SRAMs
SRAMs
Flash
Flash
Other
Other

Modern SoCs can integrate different components


Institute of
Microelectronic
Systems

1: Introduction

11

Market for Systems-on-a-Chip


Source:
Hugo De Man
EIS99, Darmstadt

Services Broadband
Network
100Mb/sWLAN
RF

20Gop/s

WWW

Area Examples:
Multimedia
Mobile Communication
Automotive
...
1: Introduction

Java
Configurable
Multi-Standard
Info Plug...

<1 Watt

LAN
MPEG 4-7
100 Gop/s
5 Gtr/s
10 Watt

??

-> Domain Specific Computing

SoC

Institute of
Microelectronic
Systems

12

Application: Single-Chip Integrated CMOS


Radio
Berkeley Wireless Centre

Conventional cellular
Phone Solution

Research into Technology and


Design Methodologies for
CMOS single Chip Radios
Exploring future Applications
of wireless Technology, 4th
Generation and beyond
Institute of
Microelectronic
Systems

1: Introduction

13

Application Example: Transceiver Design


Receiver
Low Noise
Amplifier

Oscillator
Filter

Mixer

Demodulator

Digital Baseband
AD/DA
Converter

Memory

Transmitter
Power
Amplifier

1: Introduction

CMOS
Logic

AD/DA
Converter

Oscillator
Filter

Institute of
Microelectronic
Systems

Mixer

Modulator

14

You might also like