Ansaldo SM-6470B Coded Track Circuit

SM 6470B
1000 Technology Drive, Pittsburgh, PA 15219

645 Russell Street, Batesburg, SC 29006
MICROTRAX
Coded Track Circuit
Installation
Operation
Troubleshooting
Copyright 2008
Union Switch & Signal Inc.
SM 6470B, Rev. 1
April 2008
Notices
Proprietary Notice
This document and its contents are the property of Union Switch & Signal Inc. (hereinafter
US&S). This document has been furnished to you on the following conditions: no right or license
under any patents or any other proprietary right in respect of this document or its content is given
or waived in supplying this document. This document or its content are not to be used or treated
in any manner inconsistent with the rights of US&S, or to its detriment, and are not to be copied,
reproduced, disclosed to others, or disposed of except with the prior written consent of US&S.
Important Notice
US&S constantly strives to improve our products and keep our customers apprised of changes in
technology. Following the recommendations contained in the attached service manual will
provide our customers with optimum operational reliability. The data contained herein purports
solely to describe the product, and does not create any warranties.
Within the scope of the attached manual, it is impossible to take into account every eventuality
that may arise with technical equipment in service. Please consult your local US&S sales
representative in the event of any irregularities with our product.
We expressly disclaim liability resulting from any improper handling or use of our equipment,
even if these instructions contain no specific indication in this respect. We strongly recommend
that only approved US&S spare parts are used as replacements.
SM 6470B, Rev. 1, April 2008
Revision History
Revision History
ii
REV.
DATE
NATURE OF REVISION
Original
October 1997
April 2008
Original Issue.
Incorporate ECO EE-2006, update
format to current T&D guidelines.
SM 6470B, Rev. 1, April 2008
Table of Contents
Table of Contents
1.
2.
SYSTEM OVERVIEW ........................................................................................................................1-1

1.1. MICROTRAX Coded Track Circuit Unit.................................................................................... 1-5
1.2. MICROTRAX Coded Track Circuit ........................................................................................... 1-7
1.2.1. Quick Shunt Mode ........................................................................................................1-8
1.2.2. Sleep Mode.................................................................................................................1-10
1.3. MICROTRAX Processor Control.................................................................................................1-10
1.4. Signal Lighting/Mechanism Control ........................................................................................1-11
1.5. Vital Isolated Inputs/Outputs...................................................................................................1-11
1.6. Vital Non-Isolated Inputs/Outputs...........................................................................................1-12
1.7. Vital Output Control ................................................................................................................1-12
1.8. Cross Unit Lighting .................................................................................................................1-12
1.9. Software Programming ...........................................................................................................1-12
1.10. Power......................................................................................................................................1-14
1.11. Unit Grounding........................................................................................................................1-14
1.12. Mounting and Environment.....................................................................................................1-14
1.13. Surge Protection .....................................................................................................................1-15
1.14. General Wiring Practices ........................................................................................................1-17
1.15. Cardfile Local I/O Connections...............................................................................................1-17
1.16. Coded Track Interface Wiring .................................................................................................1-17
1.16.1. Track Leads and Surge Protection .............................................................................1-17
1.16.2. Track Polarity ..............................................................................................................1-20
1.17. Wiring of Serial Communication Ports....................................................................................1-20
SYSTEM HARDWARE OVERVIEW .................................................................................................2-1
2.1. MICROTRAX Coded Track Circuit Unit Cardfile ...................................................................... 2-1
2.2. Plug-In Modules........................................................................................................................ 2-4
2.3. Track Interface Panel................................................................................................................ 2-4
2.4. Quick Shunt Module ...............................................................................................................2-14
2.5. VCOR Relay ...........................................................................................................................2-15
2.6. MICROTRAX Track Code Generator .....................................................................................2-15
2.7. MICROTRAX Development System.......................................................................................2-15
2.8. Specifications..........................................................................................................................2-16
2.8.1. Physical/Mechanical Specifications ............................................................................2-16
2.8.2. Operating Power.........................................................................................................2-16
2.8.3. I/O Power ....................................................................................................................2-18
2.8.4. Electrical Connections (Power and Data)...................................................................2-18
2.8.5. Coded Track Communications ...................................................................................2-18
2.8.6. Serial Communications...............................................................................................2-19
2.8.7. Local Signal and Relay I/O .........................................................................................2-20
2.8.8. Miscellaneous .............................................................................................................2-20
2.9. Consolidated Material Part Number Listing ............................................................................2-21
SM 6470B, Rev. 1, April 2008
iii
Table of Contents
3.
4.
iv
INSPECTION .....................................................................................................................................3-1
3.1. Set-Up....................................................................................................................................... 3-1
3.1.1. Power-Up ......................................................................................................................3-1
3.1.2. CPU Module Reset Sequence Displays .......................................................................3-3
3.2. ON-SITE CONFIGURATION WITH PC.................................................................................... 3-4
3.2.1. Introduction ...................................................................................................................3-4
3.2.2. Initial Setup ...................................................................................................................3-5
3.2.3. Restart Program Command (0) ..................................................................................3-10
3.2.4. Read (1) and Set (2) Real Time Clock Commands ....................................................3-10
3.2.5. Display Configuration Command (3) ..........................................................................3-12
3.2.6. Reconfiguration Command (4)....................................................................................3-13
3.2.7. Open Log File Command (8) ......................................................................................3-20
3.2.8. Exit Command (X) ......................................................................................................3-20
3.3. TRACK AND SIGNAL ADJUSTMENT ...................................................................................3-22
3.3.1. Coded Track Circuit Polarity Check............................................................................3-22
3.3.2. General Considerations For Track Circuits ................................................................3-23
3.3.3. Manual Track Circuit Adjustment................................................................................3-25
3.3.4. Shunting Test..............................................................................................................3-26
3.3.5. Front Panel Procedure For Track Circuit Adjustment and Status Display..................3-26
3.3.6. CPU Front Panel Display Status (DISP STAT) .......................................................3-28
3.3.7. Manual Track Circuit Adjustment................................................................................3-29
3.3.8. Track Circuit Operating Margin CPU Module Display .............................................3-30
3.3.9. Display Track Circuit Operating Margin......................................................................3-31
3.3.10. Coded Track Shunting Test ........................................................................................3-31
3.3.11. CPU Front Panel Procedure For Signal Lamp Adjustment ........................................3-32
3.3.12. General Considerations for Signal Lamp Adjustment ................................................3-33
3.3.13. Adjustment of Searchlight Signals ..............................................................................3-33
3.3.14. Adjustment Procedure ................................................................................................3-35
3.3.15. Signal Lamp Voltage Adjustment................................................................................3-35
3.4. MISCELLANEOUS CONTROL FUNCTIONS ........................................................................3-36
3.4.1. Clear Logs and Displayed Events ..............................................................................3-36
3.4.2. Keyboard Input On and Off.........................................................................................3-36
3.4.3. Display Off ..................................................................................................................3-37
MAINTENANCE AND MONITOR......................................................................................................4-1
4.1. PERIODIC INSPECTION ......................................................................................................... 4-1
4.2. System Monitoring .................................................................................................................... 4-2
4.2.1. System Monitoring Via the CPU Front Panel ...............................................................4-2
4.2.2. Display System Status..................................................................................................4-4
4.2.3. Display Events ..............................................................................................................4-5
4.2.4. Display Configuration....................................................................................................4-6
4.2.5. Display Status ...............................................................................................................4-7
4.2.6. Display Track Circuit Operating Margin........................................................................4-8
SM 6470B, Rev. 1, April 2008
Table of Contents
5.
6.
4.3. System Monitoring via a PC .....................................................................................................4-9

4.3.1. Initial Setup ...................................................................................................................4-9
4.3.2. Get Events Command (3) ...........................................................................................4-12
4.3.3. Get Errors Command (4) ............................................................................................4-13
4.3.4. Dynamic Display (6)....................................................................................................4-13
4.3.5. Memory Display Command (7) ...................................................................................4-17
4.3.6. Track Data (9) .............................................................................................................4-18
4.4. System Restoration Following a Failure .................................................................................4-19
4.4.1. MICROTRAX Shutdown and Reset ................................................................................4-19
4.4.2. CPU Module Reset Sequence Displays .....................................................................4-19
4.4.3. Restoration From Selective Shutdown Mode .............................................................4-21
4.4.4. Restoration from Full Shutdown Mode .......................................................................4-22
4.5. Use of the Reset Menu ...........................................................................................................4-23
4.5.1. Initial Access ...............................................................................................................4-23
4.5.2. Display Errors .............................................................................................................4-24
4.5.3. Display Events ............................................................................................................4-25
4.5.4. Clear CPS ...................................................................................................................4-26
4.5.5. PC Link .......................................................................................................................4-27
4.5.6. Cold Reset ..................................................................................................................4-28
MICROTRAX CODED TRACK APPLICATIONS..............................................................................5-1
5.1. Track Connections.................................................................................................................... 5-1
5.2. COLORLIGHT SIGNAL CIRCUIT ............................................................................................ 5-1
5.3. MICROTRAX Testing with Track Code Generator ................................................................... 5-5
5.4. Searchlight Signal Circuit.......................................................................................................... 5-5
5.5. Software Considerations for Searchlight Signal Circuit............................................................ 5-8
5.6. Non-Isolated I/O Circuit ............................................................................................................ 5-8
5.7. Isolated I/O Circuit .................................................................................................................... 5-8
5.8. Quick Shunt Circuit ................................................................................................................... 5-8
ALPHANUMERIC CODES ................................................................................................................6-1
6.1. CPU MODULE ERROR CODES.............................................................................................. 6-1
6.1.1. Critical Errors ................................................................................................................6-1
6.1.2. Static Warnings.............................................................................................................6-8
6.1.3. Dynamic Warnings........................................................................................................6-9
6.2. CPU Module Event Codes......................................................................................................6-12
6.3. CPU Module Configuration Items ...........................................................................................6-16
6.3.1. Predefined...................................................................................................................6-16
6.3.2. User-Defined...............................................................................................................6-17
6.4. Serial Link Module Status and Error Codes ...........................................................................6-18
6.4.1. Status Indications and Short Error Codes ..................................................................6-18
6.4.2. Long Error Codes .......................................................................................................6-19
SM 6470B, Rev. 1, April 2008
Table of Contents
7.
6.5. Generic Errors ........................................................................................................................6-21

6.5.1. Generic Noise Errors ..................................................................................................6-21
6.5.2. Generic I/O Errors.......................................................................................................6-22
6.5.3. Vital Link Warnings .....................................................................................................6-22
RAIL TEAM AND TECHNICAL SUPPORT ......................................................................................7-1
vi
SM 6470B, Rev. 1, April 2008
Table of Contents
List of Figures
Figure 1-1.
MICROTRAX
Coded Track Circuit System Basic Applications ........................................ 1-2
Figure 1-2.
Serial Communications Adapter Panel ............................................................................ 1-3
Figure 1-3.
Complete Track Transmit and Receive Cycle Waveform (Typical) ................................. 1-4
Figure 1-4.
Complete Coded Track Code Formats ............................................................................ 1-4
Figure 1-5.
Coded Track Circuit Unit.................................................................................................. 1-6
Figure 1-6.
Typical Coded Track Circuit............................................................................................. 1-8
Figure 1-7.
Wiring of Track Interface Panel........................................................................................ 1-9
Figure 1-8.
Basic Control of Local Inputs and Outputs ....................................................................1-13
Figure 1-9.
System Input Power Configuration ................................................................................1-16
Figure 1-10.
Coded Track Cardfile Top Connector I/O Assignments..............................................1-18
Figure 1-11.
MICROTRAX
to MICROTRAX Serial Daisy Chain Cable (Port A, Port B).............................1-21
Figure 1-12.
MICROTRAX
to MICROLOK/MICROLOK PLUS Serial Cable (Port A, Port B) ..........................1-22
Figure 1-13.
Cross Lighting Serial Link Cable....................................................................................1-23
Figure 1-14.
PC Port Serial Link Cable ..............................................................................................1-23
Figure 1-15.
Standard 20 milliamp Current Loop Vital Interface ........................................................1-24
Figure 2-1.
MICROTRAX
Figure 2-2.
Cardfile............................................................................................................................. 2-3
Figure 2-3.
Coded Track Unit Module Placement .............................................................................. 2-5
Figure 2-4.
CPU Module Front Panel ................................................................................................. 2-6
Figure 2-5.
System Power Supply Module Front Panel .....................................................................2-7
Figure 2-6.
Track Interface Module Front Panel................................................................................. 2-8
Figure 2-7.
Searchlight Lamp Driver Module Front Pane................................................................... 2-9
Figure 2-8.
Colorlight Lamp Driver Module Front Panel...................................................................2-10
Figure 2-9.
Non-Isolated I/O Module Front Panel ............................................................................2-11
Figure 2-10.
Isolated Module Front Panel ..........................................................................................2-12
Figure 2-11.
Sleep Mode Module Front Panel ...................................................................................2-13
Figure 2-12.
Typical Track Interface Panel ........................................................................................2-14
Figure 2-13.
Quick Shunt Module.......................................................................................................2-15
Figure 2-14.
Unit Mounting Dimensions .............................................................................................2-17
Coded Track System Hardware .................................................................... 2-2
SM 6470B, Rev. 1, April 2008
vii
Table of Contents
Figure 3-1.
CPU Module DIP Switch Settings .................................................................................... 3-6
Figure 3-2.
Track Polarity Test Set-Up.............................................................................................3-24
Figure 3-3.
Track Circuit Shunting Sensitivity ..................................................................................3-25
Figure 3-4.
CPU Display Modules Flowchart ...................................................................................3-27
Figure 3-5.
Signal Lamp Operating Characteristics .........................................................................3-34
Figure 4-1.
CPU Display Modules Flowchart ..................................................................................... 4-3
Figure 5-1.
Typical MICROTRAX Repeater............................................................................................ 5-2
Figure 5-2.
Typical MICROTRAX Intermediate Signal (Colorlight)......................................................... 5-3
Figure 5-3.
Typical MICROTRAX Test Box Connection......................................................................... 5-6
Figure 5-4.
Typical MICROTRAX Intermediate Signal (Searchlight)...................................................... 5-7
Figure 5-5.
Typical MICROTRAX with Non-Isolated I/O......................................................................... 5-9
Figure 5-6.
Typical MICROTRAX with Isolated I/O ..............................................................................5-10
Figure 5-7.
Typical MICROTRAX Repeater with Quick Shunt .............................................................5-11
viii
SM 6470B, Rev. 1, April 2008
Table of Contents
List of Tables
Table 1-1.
Slots in the Cardfile ..........................................................................................................1-5
Table 1-2.
Top Connector Pin-Outs ................................................................................................1-19
Table 2-1.
Track Interface Panel Part Numbers................................................................................ 2-4
Table 2-2.
Track Circuit Lengths for Welded Rail/Ballast ...............................................................2-18
Table 2-3.
Track Circuit Lengths for Bonded Rail/Ballast ...............................................................2-19
Table 2-4.
Part Number Listing .......................................................................................................2-21
Table 3-1.
CPU Module Dip Switch SW1 Functions ...................................................................... 3-5
Table 3-2.
CPU Module Standard Jumper Positions ..................................................................... 3-7
Table 3-3.
Coded Track Circuit Polarity Check Procedure .............................................................3-22
Table 3-4.
Maximum Track Circuit Length ......................................................................................3-23
Table 3-5.
Display Track Status/Error Codes Procedure................................................................3-28
Table 3-6.
Manual Track Circuit Adjustment Procedure .................................................................3-29
Table 3-7.
Display Track Circuit Operating Margin Procedure .......................................................3-31
Table 3-8.
Code Track Circuit Shunt Test Procedure .....................................................................3-32
Table 3-9.
Maximum Line Resistance for 18W and 25W Lamps....................................................3-34
Table 3-10.
Signal Lamp Voltage Adjustment Procedure .................................................................3-35
Table 3-11.
Clearing Log Procedure .................................................................................................3-36
Table 3-12.
Keyboard Input On and Off Procedure ..........................................................................3-37
Table 3-13.
Display Off Procedure ....................................................................................................3-37
Table 4-1.
Display System Status Procedure ................................................................................... 4-4
Table 4-2.
Display Events Procedure................................................................................................ 4-5
Table 4-3.
Display Configuration Procedure ..................................................................................... 4-6
Table 4-4.
Display Status Procedure ................................................................................................ 4-7
Table 4-5.
Display Track Circuit Operating Margin ........................................................................... 4-8
Table 4-6.
Restore from Selective Shutdown Procedure................................................................4-21
Table 4-7.
Restore from Full Shutdown Procedure.........................................................................4-22
Table 4-8.
Manual Reset Procedure ...............................................................................................4-23
Table 4-9.
Display Errors Procedure...............................................................................................4-24
Table 4-10.
Display Events Procedure..............................................................................................4-25
SM 6470B, Rev. 1, April 2008
ix
Table of Contents
Table 4-11.
Clear CPS Procedure.....................................................................................................4-26
Table 4-12.
Enable Serial Data Port Procedure................................................................................4-27
Table 4-13.
Cold Reset Procedure....................................................................................................4-28
Table 5-1.
Lightning Arresters ........................................................................................................... 5-5
Table 6-1.
Critical Errors ................................................................................................................... 6-1
Table 6-2.
Static Warnings ................................................................................................................6-8
Table 6-3.
Dynamic Warnings ........................................................................................................... 6-9
Table 6-4.
CPU Event Codes ..........................................................................................................6-12
Table 6-5.
CPU Configuration Items ...............................................................................................6-16
Table 6-6.
User Defined Configuration Items..................................................................................6-17
Table 6-7.
Serial Link Status/Error Short Codes .............................................................................6-18
Table 6-8.
Serial Link Status/Error Long Codes..............................................................................6-19
SM 6470B, Rev. 1, April 2008
0BSystem Overview
1.
System Overview
The MICROTRAX Coded Track Circuit is a solid state, programmable, microprocessor-based

system designed to control wayside circuit applications in non-electrified territory.
A MICROTRAX system consists of a Coded Track Circuit Unit cardfile assembly with plug-in
modules and one-track interface panel per operating track. The cardfile assembly plug-in
modules are specific to the requirements of the location. For example, certain locations may
only require track circuit operation. Other locations may require signal lighting, driving relays,
and/or receiving inputs. An individual location may combine portions or all of the options noted.
Primarily, the MICROTRAX system is used to manage track circuits by providing end-to-end rail
integrity, including detection of a train shunt, faulty insulated joint, or broken rail. Generally, the
track coding (equivalent to four-wire Home/Distant (HD) circuitry) is achieved through the rails;
however, it may also operate over line wire. In addition to managing track circuits, the
MICROTRAX system allows the user to control signals, drive relay outputs, and receive inputs
from external sources.
Features of the MICROTRAX system include:
Track circuits in excess of four miles with minimum three ohm ballast.
Configurable software allowing a single "typical" program usable for all customer locations
including control points, intermediate signals, and repeater locations.
Twenty user-defined track codes with a 12 second acceptance time.
Two user-defined fast codes with a six second acceptance time (typically used for
tumbledown and sleep mode).
Quick Shunt mode (reduces shunt time from 612 seconds to 100 milliseconds).
System power conservation feature (sleep mode).
Adjustments for track circuits and signal lighting made from the Central Processing Unit
(CPU) module.
Compatibility with highway crossing motion sensors/predictors without the need for external
blocking units.
The MICROTRAX Coded Track Circuit Unit can function independently, managing track circuits
and controlling signals at an intermediate location, or can be interfaced to a vital relay
interlocking or a master controlling unit such as a MICROTRAX End-of-Siding or MICROLOK
unit. Figure 1-1 shows general examples of the uses of the MICROTRAX Coded Track Circuit
unit.
MICROTRAX
MICROLOK
is a registered trademark of Union Switch and Signal

is a registered trademark of Union Switch and Signal
SM 6470B, Rev. 1, April 2008
1-1
0BSystem Overview
Figure 1-1.
1-2
MICROTRAX
Coded Track Circuit System Basic Applications
SM 6470B, Rev. 1, April 2008
0BSystem Overview
MICROTRAX Coded Track Circuit Units can be serially connected to a MICROTRAX End-of-Siding
unit, MICROLOK unit, or other MICROTRAX Coded Track Circuit Units. The system allows as
many as 16 cardfile assemblies to be connected to one interlocking controller in a daisy chain

configuration. Maximum allowable cable length between two serially connected units is 50 feet.
A modem is required for units further than 50 feet apart.
MICROTRAX units cannot directly handle current loop communications. For locations where the
vital interlocking controller and the MICROTRAX Coded Track Circuit Unit are in different
houses, US&S Serial Communications Adapter Panels are recommended (see Figure 1-2). These
devices convert EIA-level signals to a 20 milliamp current loop for protection from transient line
noise. Serial Communications Adapter Panels are required at both unit locations. Refer to
MICROLOK Manual SM 6400B for additional data on the Serial Communications Adapter Panel.
Figure 1-2. Serial Communications Adapter Panel

The track code signal format is AC. The signal connects to the rails through a Track Interface
Panel that consists of a transformer and a low impedance inductor.
The MICROTRAX track code is bi-polar, and consists of a pattern of positive and negative pulses.
Each message is two seconds long and contains an equal number of short positive and negative
pulses, and an equal number of long positive and negative pulses. The code message begins and
ends with a 167 millisecond guard pulse, and consists of either 167 or 333 millisecond pulses at
2 Vp-p. Figure 1-3 shows an example of a complete transmit/receive cycle.
This code format allows for 23 possible codes. Twenty codes are available for user applications.
The remaining three codes are used for link-up, sleep mode, and quick tumble down. Figure 1-4
shows all available codes.
SM 6470B, Rev. 1, April 2008
1-3
0BSystem Overview
Figure 1-3. Complete Track Transmit and Receive Cycle Waveform (Typical)
Figure 1-4. Complete Coded Track Code Formats
1-4
SM 6470B, Rev. 1, April 2008
0BSystem Overview
1.1. MICROTRAX Coded Track Circuit Unit
The MICROTRAX Coded Track Circuit Unit consists of a cardfile assembly and plug-in modules
of various types (see Figure 1-5). Included within the cardfile is a vital relay mounted in the left
side and slots for seven modules as listed in Table 1-1.
Table 1-1.
SLOT
Slots in the Cardfile
MODULE
REQUIRED?
Left slot
Power Supply module
Always required
Slot #1
Colorlight module, or
Searchlight module, or
Non-Isolated I/O module
Design-dependent
Slot #2
Same as Slot #1
Slot #3
Isolated I/O module
Design-dependent
Slot #4
Traffic Interface module
Always required
Slot #5
Sleep Mode module
Design-dependent
Slot #6
CPU module
Always required
The left side of the upper sloping panel of the unit contains Association of American Railroads
(AAR) terminals for connecting 12 volt (nominal) operating power. The system will operate
with a supply of between 9.8 to 16.2 volts. However, to avoid premature loading of a recharging
battery, the system will not power-up unless the supply is 11.5 volts or higher. When batteries
are used, a constant voltage charger is required. A TransZorb type surge suppressor is connected
between the (+) and () posts to protect against over-voltage and reverse polarity. The On/Off
switch for the unit is located next to the battery terminals.
The right side of the upper sloping panel on the unit contains two 25-pin D-connector RS-232
serial ports that serve as data ports to the CPU module and allow the unit to be serially connected
to a MICROLOK unit or other MICROTRAX units.
The top edge of the unit contains three 22-way screw lock plug connectors for external wiring
interfaces. These connectors mount on a common bar to allow simultaneous removal. A label
located on the upper sloping panel shows correct wire connections for the required application
(refer to Section 1.16 for additional wiring information).
SM 6470B, Rev. 1, April 2008
1-5
0BSystem Overview
Figure 1-5. Coded Track Circuit Unit
1-6
SM 6470B, Rev. 1, April 2008
0BSystem Overview
1.2. MICROTRAX Coded Track Circuit

The coded track circuit (see Figure 1-6) is based upon a handshake-type superiority protocol.
The overall system track coding format must be designed for this feature. The track interface
module mounted in the MICROTRAX unit is capable of operating one master and one slave portion
of two separate track circuits. On the MICROTRAX Coded Track Circuit Unit, track connections
are designated Master and Slave, and (+) and (). Either side of the insulated rail joints can be
designated Master or Slave. However, after one end of a track circuit is designated Master, the
other end must be designated Slave. When establishing rail polarities, two rules must be
observed:
Polarity must be staggered or alternated across a set of insulated joints. For example, if the
north rail is positive on the left side of the joints, the north rail must be negative on the right
side of the joints.
The rail must have the same polarity at both ends of the same circuit.
Because the coding format is low frequency AC, track circuit lengths in the range of 22,000 feet
at 3 ohms ballast/1000 feet are attained. Refer to Section 2.8.5 for allowable track circuit lengths
and associated parameters.
The track code signal is connected to the rails through a Track Interface Panel that contains a
transformer and low impedance inductor(s). There are four different types of single-track
interface panels that provide an inductance ranging from 10 to 40 mH. The 10 mH panel offers
about 10 ohms impedance at 150 Hz and proportionately more impedance at higher frequencies.
This makes the MICROTRAX system compatible with highway crossing motion and predictor
equipment without need of external blocking units. The 15 mH panel is designed for maximum
compatibility with 86 Hz crossing predictors, and should be used where there is 60 Hz
interference.
NOTE
Do not use wide-band joint couplers. Do not use wide-band shunts
as joint couplers.
For areas where there is 60 Hz interference, a Termination Capacitor Printed Circuit Board
(PCB) may be mounted on the interface panel as a noise filter.
SM 6470B, Rev. 1, April 2008
1-7
0BSystem Overview
Twisted pair (3-4 twists per

foot) and separated from
"dirty" wiring (i.e., relay and
relay control) by at least 6
inches.
Figure 1-6. Typical Coded Track Circuit

1.2.1.
Quick Shunt Mode
For heavy traffic applications where the fastest possible train shunt detection is needed or where
a detection zone is required to release a switch lock, an optional Quick Shunt Module is
provided. This unit reduces the normal shunt detection time of 612 seconds to about 100
milliseconds. The module contains circuitry for independent train detection on both sides of an
insulated joint. One unit services both adjacent track circuits at an intermediate location, with
connections run to both Track Interface Panels. Any inputs on the MICROTRAX cardfile may be
used to receive quick shunt inputs (see Figure 1-7).
The circuitry of the module includes an audio frequency transmitting source and an output
transformer with two secondary windings, each having conditioning circuitry in series with their
respective outputs. The output of the module is a DC voltage that decreases significantly when a
shunt is detected. There are two independent receivers tuned to the system transmitting
frequency which connect to the track interface panel(s). With this configuration, true shunt
mode operation is attained without the need for separate track termination leads. Inputs from the
quick shunt module may be applied to any MICROTRAX module with input capability (Lamp
Driver, Isolated I/O, Non-Isolated I/O). Inputs operate at a threshold of 8.0 volts (nominal) and
are calibrated like a vital relay, except that there is virtually no difference between pick-up and
drop-away voltages.
1-8
SM 6470B, Rev. 1, April 2008
1
1
SM 6470B, Rev. 1, April 2008

1
Twisted pair (3-4 twists per foot)
and separated from "dirty"
wiring (i.e., relay and relay
control) by at least 6 inches.
0BSystem Overview
Figure 1-7. Wiring of Track Interface Panel
1-9
0BSystem Overview
The detection zone (when used as a switch lock release) of the Quick Shunt Module is limited to
about 75 feet. The length of the Quick Shunt track circuit may be extended if the transmitter and
receiver track terminations are separated. The actual length of operation is based upon many
factors including rail, ballast, and track lead length. The Quick Shunt module can also be used
instead of a DC track circuit for short Over Switch (OS) circuits used to protect a switch. In this
application, the transmitter and receiver leads must be connected at opposite ends of the track.
NOTE
The MICROTRAX unit must be programmed to declare a shunt when
the designated input is detected as off.
1.2.2.
Sleep Mode
The MICROTRAX system can be turned turn off to conserve power until new codes appear on the
track. The logic may be programmed to enter Sleep Mode when certain conditions exist. For
example, in a territory with low traffic activity, the dispatcher can instruct a Master end unit to
enter Sleep Mode. This Master unit then transmits the Sleep Mode (code c) to its Slave unit.
That Slave then propagates the Sleep Mode code to the next unit and places itself into Sleep
Mode. The sequence cascades down the entire territory, putting all MICROTRAX units into
Sleep Mode. When units are to be reactivated, the Master end unit will again transmit codes
other than Sleep Mode (code c), and all units down the line will sequentially exit Sleep Mode.
1.3.
MICROTRAX
Processor Control
The MICROTRAX Coded Track Circuit system is managed by a single microprocessor and
standard Executive software located on the CPU module. The CPU module is responsible for the
following basic functions:
Encoding and output of transmitted track codes.
Decoding and processing of received track codes.
Responding to loss of track codes.
Sending output commands to local devices.
Reading input indications from local devices.
Responding to signal lamp filament and searchlight mechanism status.
Controlling power to vital outputs.
Processing on-site configuration inputs from user.
Displaying status and error codes.
Performing internal diagnostics.
Managing vital slave serial communications.
1-10
SM 6470B, Rev. 1, April 2008
0BSystem Overview
CPU communication with all other modules is carried over a common data bus. Successful
diagnostic tests result in a 250 Hz output to a conditional power supply on the System Power
Supply module, which energizes the Vital Cut-Off Relay (VCOR). Vital or critical faults
detected within the system cause this relay to de-energize and remove power from all outputs.
There are three operational modes associated with the MICROTRAX system: Normal, Selective
Shutdown, and Full Shutdown. If all diagnostic tests pass, the CPU maintains the system in
Normal mode.
After a critical failure is detected, the unit resets, goes through the power-up sequence, and
attempts normal operation. However, if five critical errors occur within 40 seconds of
operational time, the unit enters Selective Shutdown mode. In this mode, the VCOR
de-energizes and all I/O de-activates; but, track communications can continue. This feature
allows trains to approach the affected location even when the outputs are de-energized and
prevent the signals from clearing.
If the unit is currently in Selective Shutdown mode and another five critical errors within 40
seconds of operational time, the unit enters Full Shutdown mode and all operations (including
track communication) stop.
1.4. Signal Lighting/Mechanism Control
MICROTRAX Coded Track units can provide direct control of colorlight or searchlight signals.
Signal lamp outputs are regulated and do not require use of external adjustment resistors.
Adjustment of the lamps for proper lamp voltage and intensity can be performed at the
MICROTRAX unit. (For adjustment procedures, refer to Section 3.3.11.)
Hot and cold filament checks and searchlight mechanism checks are provided. These features
allow the designer (through application logic) to provide orderly signal light-out downgrades in
advance and report light-out conditions to the control point for maintainer attention. Power for
all signal lamp and mechanism outputs is passed through contacts of the VCOR (refer to Section
1.7). Both the searchlight and the colorlight modules also have two isolated inputs available.
1.5. Vital Isolated Inputs/Outputs
The MICROTRAX Coded Track units provide isolated inputs and outputs for remote equipment
located outside of the case or house using double break circuit design. Isolation from the battery
is required to prevent interference from external voltage transients such as lightning. Each
isolated output can operate a switch lock coil and/or any 12 volt relay with at least 150 ohms
resistance. The isolated I/O module contains four inputs and two outputs.
SM 6470B, Rev. 1, April 2008
1-11
0BSystem Overview
1.6. Vital Non-Isolated Inputs/Outputs
units provide logic inputs and outputs that do not require isolation from battery.
These are used for I/O within the MICROTRAX equipment case or house. Non-isolated I/O are
typically used in an interface to a relay-based interlocking control system. Two versions of this
module (12 volt outputs driving minimum 65 ohm coils or 24 volt outputs driving minimum 130
ohm coils) are available. The non-isolated module contains four inputs and four outputs.
MICROTRAX
1.7. Vital Output Control

All MICROTRAX Coded track units are equipped with a VCOR that controls power to the outputs
(see Figure 1-8). The VCOR is mounted internally within the MICROTRAX Coded Track unit.
This relay is energized as long as CPU internal diagnostics are passed. Any vital failure causes
the relay to drop, removing power from all outputs.
1.8. Cross Unit Lighting
The cross unit control function is designed to allow one non-vital input and one non-vital output
to be passed between two MICROTRAX units. The typical application is lighting of signals on
opposite sides of double track right-of-way to prevent inadvertent observation of the wrong
signal. This function can be accomplished by using the serial port defined for the serial slave
link. The serial ports on the MICROTRAX unit operate in the RS-432 mode, which limits the
distance between MICROTRAX units to 50 feet. Cross lighting control can also be activated by
wiring two MICROTRAX units together, either input-to-output or output-to-input. In both cases,
the control is through user-defined application software.
1.9. Software Programming
The site-specific application program (location design) is contained on an Erasable
Programmable Read Only Memory (EPROM), 27C256 chip, located on the standard CPU
module along with the Exec EPROMs. The application EPROM is labeled U203. The Exec
EPROMs are labeled U204 and U205 (U26). Refer to Section 3.1.2 for a description of the
CPU module and EPROM placement.
After the program is written into a standard text editor, it is compiled utilizing the MICROTRAX
Development System (MTDS). Development system equipment includes compiler software,
EPROM, and an EPROM programmer. Refer to MICROTRAX Application Logic Programming
Manual SM 6470A for detailed information on programming MICROTRAX.
1-12
SM 6470B, Rev. 1, April 2008
0BSystem Overview
Figure 1-8. Basic Control of Local Inputs and Outputs
SM 6470B, Rev. 1, April 2008
1-13
0BSystem Overview
The MICROTRAX unit is capable of operating with various I/O configurations using the same
program. This feature allows the flexibility of using one program in different locations with
varying I/O combinations. The site-specific application logic software for the MICROTRAX unit
contains a section labeled Configuration that allows the user to customize a single program
to multiple or different type locations. MICROTRAX Application Logic Programming Manual SM
6470A provides direction on the structure and format of the MICROTRAX program.
Site-specific configuration programming (such as unit ID and number of signal heads) is
contained in an Electrically Erasable Programmable Read Only Memory (EEPROM) mounted
on the motherboard in the MICROTRAX cardfile, not the CPU module. This allows CPU modules
to be interchanged between cardfiles without having to transfer EPROMs. Configuration
programming is applied through a separate RS-232 serial port on the CPU module, using a
portable computer. This same port is also available for system debugging and maintenance.
1.10. Power
The MICROTRAX unit is powered from a single 12V (nominal) battery. The system will operate
with an input supply of 9.8 to 16.2V. To avoid premature loading of a recharging battery,
however, the input supply must be at least 11.5V to initialize the system. System current
requirements are based on a 1.0A load for the unit, plus any current load required for signal
lighting. While in Sleep Mode, the unit current load is reduced to only 50 mA.
1.11. Unit Grounding
Do not ground the MICROTRAX cardfile chassis. High ground potential could create undesirable
current paths through the system. Fiberglass mounting brackets are available to electrically
insulate the cardfile. The Track Interface Panel and optional Quick Shunt Module also do not
require chassis grounds.
1.12. Mounting and Environment
Coded Track Circuit Unit cardfiles may be mounted on a wall, shelf, or standard 19
inch equipment rack using the fiberglass mounting brackets. Keep the cardfile away from
sources of excessive heat or battery vapors. Positive ventilation is not required. Cardfile
operating ambient temperature limits are 40 to +70C.
MICROTRAX
Track Interface Panels, when mounted in the same location, must be separated by at least
18 inches to minimize magnetic interference between panels. The panels can also be mounted
close to the track to minimize the length of heavy track cable. If this is done, the panels should
be mounted in a ventilated, protective box and placed where water cannot accumulate.
Temperature limits on the panels are the same as those for the cardfiles.
1-14
SM 6470B, Rev. 1, April 2008
0BSystem Overview
NOTE
The wiring between the Track Board and the Track Interface Panel
must be a twisted pair with three to four twists per foot. This
twisted pair must then be separated from any "dirty" wiring (such
as relay and relay control wiring) by at least six inches.
1.13. Surge Protection

Lightning protection (see Figure 1-9) should be configured with line-to-line and line-to-ground
arresters only on the relay logic wires that leave the case. The dielectric breakdown provided by
isolation should exceed the firing voltage of the arresters. This will ensure that no current paths
to ground exist through electronic components and that all such current is diverted through the
arresters. As a result, lightning arresters should not be used on the wiring between the battery
and the cardfile; however, line-to-line and line-to-ground protection should be provided on the
AC feed to the battery charger.
For line-to-line equalization use the USGA low voltage (blue) arresters (N451552-0101). For
line-to-ground equalization use the USGA high voltage (red) arresters (N451552-0201).
On the AC feed to the battery charger, use a 40 or 60 mm block type Metal Oxide Varistor
(MOV) from line-to-line and line-to-ground on the utility side. If the feed is 110V, use a
Siemens B40K130 or B60K130, or a GE V131DA40 or V131BA60. If an isolation transformer
is used, use a block type MOV on the secondary line-to-line also.
Secondary surge suppression (such as US&S USSP units) and common mode filtering is not
required on the battery wiring to the cardfile.
CAUTION
Lightning arresters and transient suppressors described above
MUST be used in all MICROTRAX installations. Failure to do so
could result in system damage from lightening surges or improper
operation due to transient signals.
SM 6470B, Rev. 1, April 2008
1-15
0BSystem Overview
Figure 1-9. System Input Power Configuration
1-16
SM 6470B, Rev. 1, April 2008
0BSystem Overview
1.14. General Wiring Practices
installations should be configured to minimize cross talk between wires. Dirty
wiring (control wiring connections to external equipment) should be separated as much as
possible from wires carrying electronic data signals. Cables and wires in general should be kept
as short as possible to minimize induced line noise. Case and house wiring layouts should also
be arranged to minimize noise. Switch heater wire runs, track leads, switch machine power
wiring, and any other noisy wiring should be separated as much as possible from MICROTRAX
wiring, both in the case or house and in outside cable runs. Battery lead length should also be
minimized and isolated as much as possible from noisy wiring.
MICROTRAX
1.15. Cardfile Local I/O Connections

On the MICROTRAX cardfile (see Figure 1-10), all inputs and outputs are made on three 22-way
screw lock plug connectors located along the top of the cardfile. These are designed to hold up
to #14 AWG wire. For proper connection, bare no more than 3/8 inch of conductor.
Connector pin-outs are listed in Table 1-2. Pin-outs are defined according to the type of module
assigned to a specific slot. Connections to the same terminal block will be different depending
on module placement in the unit. For example, if a colorlight module is in I/O slot 1, it will be
wired to pins 1 through 18 for head 1; if a non-isolated module is in I/O slot 1, input 1 would be
wired to pin 15.
1.16. Coded Track Interface Wiring
1.16.1. Track Leads and Surge Protection
CAUTION
The track leads to the track interface panel must be equipped with
US&S-specified lightning arresters. Failure to do so may result in
damage to the MICROTRAX equipment from lightning surges.
Per standard railroad practice, leads from the Track Interface Panel to the track should be
equipped with line-to-line and line-to-ground lightning arresters. Special track surge suppression
or common mode filtering is not required on these leads (see Figure 1-7).
NOTE
SM 6470B, Rev. 1, April 2008
1-17
0BSystem Overview
Figure 1-10. Coded Track Cardfile Top Connector I/O Assignments
1-18
SM 6470B, Rev. 1, April 2008
0BSystem Overview
Table 1-2.
CONNECTOR POSITION
Left TB1
Non-isolated module
mounted in Slot #1
PIN-OUTS
PURPOSE
1, 2
4, 5
Isolated input #2 on Searchlight or Colorlight drive module

8-12
9-12
Searchlight signal head #2 drive (-7301 module)

Colorlight signal head #2 drive (-1501 module)
14-18
15-18
20, 21

Typical: Logic source for isolated inputs
1, 2, 4, 5, 8
Left TB1
Colorlight or Searchlight
module mounted in Slot #1
Center TB2
Colorlight or Searchlight
module mounted in Slot #2
9,12
14
Non-isolated module
mounted in Slot #2
Non-Isolated I/O common (batt. )

Non-Isolated I/O outputs
15-18
Non-Isolated I/O inputs
20, 21
Isolated 12V logic source for remote contacts (Battery not

used for this function to avoid lightning exposure.)
1, 2
4, 5

8-12
9-12

14-18
15 18

1, 2, 4, 5, 8
Center TB2
Top Connector Pin-Outs
9,12
14
15-18

Non-Isolated I/O outputs
Non-Isolated I/O inputs
Right TB3
6-7, 15-16
Isolated I/O outputs
Isolated module
mounted in Slot #3
9-10, 12-13
Isolated I/O inputs
18-19, 21-22
Isolated I/O inputs
Right TB3
1, 2
Track interface, Slave end 1 () 2 (+)
Track module
mounted in Slot #4
3, 4
Track interface, Master end 3 () 4 (+)
SM 6470B, Rev. 1, April 2008
18-19, 21-22
Isolated I/O inputs
1-19
0BSystem Overview
1.16.2. Track Polarity
CAUTION
Track polarity between adjacent tracks must be reversed to protect
against a unit communicating through a faulty insulated joint
connection.
Figure 1-7 shows how to connect the track interface panels to the rails so that proper polarity is
established between adjacent track circuit blocks. To confirm proper track circuit polarity, use
the procedure in Section 3.3.1.
1.17. Wiring of Serial Communication Ports
cardfiles are equipped with two 25-pin D-connectors that serve as RS-232 serial
data ports to the CPU Module. Figure 1-11 shows the daisy chain wiring concept. Figure 1-12
through Figure 1-15 further show the general cabling application of these ports.
MICROTRAX
1-20
SM 6470B, Rev. 1, April 2008
0BSystem Overview
Figure 1-11.
MICROTRAX
SM 6470B, Rev. 1, April 2008
to MICROTRAX Serial Daisy Chain Cable (Port A, Port B)
1-21
0BSystem Overview
Figure 1-12.
1-22
MICROTRAX
to MICROLOK/MICROLOK PLUS Serial Cable (Port A, Port B)
SM 6470B, Rev. 1, April 2008
0BSystem Overview
Figure 1-13. Cross Lighting Serial Link Cable
Figure 1-14. PC Port Serial Link Cable
SM 6470B, Rev. 1, April 2008
1-23
0BSystem Overview
Figure 1-15. Standard 20 milliamp Current Loop Vital Interface
1-24
SM 6470B, Rev. 1, April 2008
1BSystem Hardware Overview
2.
System Hardware Overview
A complete MICROTRAX Coded Track Circuit system consists of a cardfile assembly with plug-in
modules and one track interface panel per operating track. Plug-in modules are mounted in the
cardfile assembly as required to operate the specific location (see Figure 2-1).
2.1. MICROTRAX Coded Track Circuit Unit Cardfile
The unit cardfile (N451812-4101), see Figure 2-2, is designed for standard 19 inch rack, shelf, or
wall mounting. Fiberglass mounting brackets on the cardfile inhibit transient electrical currents
that might interfere with circuit operation. Plug-in modules with front panels are inserted to
form a complete front control and display panel. Certain slots are dedicated to specific types of
modules, while other slots can accept different types of modules. Empty slots are covered with
blank panels.
Plug-in modules and Printed Circuit Boards (PCBs) are arranged in the cardfile according to the
system requirements. A MICROTRAX plug-in module is a printed circuit board with a built-in
front control and display panel, while a PCB is a printed circuit board without a front panel.
Plug-in modules attach to the cardfile with top and bottom thumbscrews. Alphanumeric LEDs
visible for monitoring and toggle switches and potentiometers for adjustment are accessible
though the front panel.
Battery power is connected to AAR terminal posts on the top sloping panel of the cardfile. A
TransZorb-type surge suppressor is connected between the (+) and () posts to protect against
over-voltage and reverse polarity. All other external wire connections are made on three 22-way
screw lock plug connectors along the top edge of the cardfile. These connectors mount on a
common bar to allow simultaneous removal.
The upper sloping panel of the MICROTRAX cardfile also contains the power On/Off switch,
25-pin D serial data port connectors, and a label with basic application wiring diagrams. The
MICROTRAX cardfile includes a US&S PN-150B relay (400 ohm) in the left-hand bay that serves
as the cut-off for all vital outputs. The relay is covered with a removable panel.
SM 6470B, Rev. 1, April 2008
2-1
1
inches.
1
1
Figure 2-1.
2-2
MICROTRAX
Coded Track System Hardware
SM 6470B, Rev. 1, April 2008
Figure 2-2. Cardfile
SM 6470B, Rev. 1, April 2008
2-3
2.2. Plug-In Modules

Eight types of plug-in modules are available for use in the Coded Track Circuit Unit and are
usually arranged in the cardfile as shown in Figure 2-3. The eight modules are:
CPU Required for system operation (see Figure 2-4).
System Power Supply Required for system operation (see Figure 2-5).
Track Interface Required for track operation (see Figure 2-6).
Searchlight Lamp Driver Required for searchlight signals (see Figure 2-7).
Colorlight Lamp Driver Required for colorlight signals (see Figure 2-8).
Non-Isolated Input/Output Required for internal I/O (see Figure 2-9).
Isolated Input/Output Required for external I/O (see Figure 2-10).
Sleep Mode Required for power reduction (see Figure 2-11).
Figure 2-4 through Figure 2-11 also provide the description and function for each module.
2.3. Track Interface Panel
The types of track interface panels that can be used with the MICROTRAX Coded Track Unit are:
Table 2-1.
Track Interface Panel Part Numbers
DESCRIPTION
US&S PART
NUMBER
Track Interface Panel w/10 mH inductor
N451835-0101
Track Interface Panel w/15 mH inductor
N451835-0102
The Track Interface Panels (see Figure 2-12) carry all track code communications between the
rails and the MICROTRAX cardfile and serve as a filter for unwanted track signals and voltage
transients. Panel components include a transformer and an inductor. Components are mounted
on a heavy duty stamped steel base intended for wall or shelf mounting. All wiring is terminated
on two, 2-post AAR terminal blocks.
The 10 mH panel is intended for general application while the 15 mH panel is designed for
maximum compatibility in territories with 86-Hz highway crossing predictor circuits and in areas
of 60 Hz noise interference. The Termination Capacitor PCB (N16401801) is used for filtering
in territories where there is 60 Hz interference. This unit is mounted on the track interface panel
and is connected across the line terminals of the unit.
2-4
SM 6470B, Rev. 1, April 2008
VCOR
Relay
Power
Supply
Non-isolated
or
Colorlight
or
Searchlight
Non-isolated
or
Colorlight
or
Searchlight
Isolated
Track
Sleep
CPU
Slot #1
Slot #2
Slot #3
Slot #4
Slot #5
Slot #6
Figure 2-3. Coded Track Unit Module Placement

Notes:
Blank panels placed in empty slots.
Part number for single-width blank panel (0.75 inch): N451850-2902.
Part number for double-width blank panel (1.55 inch): N451850-2901.
SM 6470B, Rev. 1, April 2008
2-5
Figure 2-4. CPU Module Front Panel
2-6
SM 6470B, Rev. 1, April 2008
Figure 2-5. System Power Supply Module Front Panel
SM 6470B, Rev. 1, April 2008
2-7
Figure 2-6. Track Interface Module Front Panel
2-8
SM 6470B, Rev. 1, April 2008
Figure 2-7. Searchlight Lamp Driver Module Front Pane
SM 6470B, Rev. 1, April 2008
2-9
Figure 2-8. Colorlight Lamp Driver Module Front Panel
2-10
SM 6470B, Rev. 1, April 2008
Figure 2-9. Non-Isolated I/O Module Front Panel
SM 6470B, Rev. 1, April 2008
2-11
Figure 2-10. Isolated Module Front Panel
2-12
SM 6470B, Rev. 1, April 2008
Figure 2-11. Sleep Mode Module Front Panel

SM 6470B, Rev. 1, April 2008
2-13
Figure 2-12. Typical Track Interface Panel

NOTE
The T+ and T post tags on Revision 12 and later panels are as
shown in Figure 2-12. The tags on earlier panels were reversed
(T on top and T+ on bottom). This change only affects track
polarity test observations. Circuit operation is not affected.
When installing a Revision 12 or later panel at an existing location,
reverse the T+ and T post tags on the new panel. This will avoid
revisions to the existing wayside drawings for that location.
2.4. Quick Shunt Module

Quick Shunt Module (N451052-5601, see Figure 2-13) is used to decrease shunt detection
response time in high-traffic areas. Internal circuits are contained in an Audio Frequency
Overlay (AFO) type sheet metal housing designed for shelf or wall mounting. External wiring is
connected via screw-lock plug connectors. The unit contains no user displays or controls.
2-14
SM 6470B, Rev. 1, April 2008
Figure 2-13. Quick Shunt Module

2.5. VCOR Relay
systems use the US&S PN-150B (N322500-701) plug-in relay to switch power to
all vital outputs (under control of the CPU). This relay is mounted inside the MICROTRAX
cardfile. The PN-150B is a 400 ohm relay with 6FB Std. contacts. Refer to SM 4596 for
detailed information on this relay.
MICROTRAX
2.6. MICROTRAX Track Code Generator

For test purposes, the MICROTRAX Track Code Generator (N16401801) may be connected to the
MICROTRAX unit being tested to simulate the opposite end of the track circuit. The track code
generator has the capability of simulating both master and/or slave ends of the circuit. The track
code generator should be connected to the line side of the track interface panel being tested (refer
to Section 5.3 for additional information on testing).
2.7. MICROTRAX Development System
For design of application software for the MICROTRAX system, the user is required to have the
MICROTRAX Development System Software (MTDS), which is available on either 3-1/2 inch
diskette (N451232-0119) or 5-1/4 inch disk (N451800-0301).
The files included on either disc are:
Compiler exec file
Programmable Read Only Memory (PROM) exec file
Simulator exec file
Configure exec file
Monitor exec file
SM 6470B, Rev. 1, April 2008
2-15

The compiler, programming, and simulator files are explained in the MICROTRAX Application
Programming Manual SM-6470A. Configure and monitor files are explained within the
Installation, Setup, Maintenance, and Monitor sections of this manual.
2.8. Specifications
2.8.1.
Physical/Mechanical Specifications
Cardfile Dimensions:
Unit Weights:
(See Figure 2-14)

Cardfile (w/plug-in components) 30.0 lbs
Track Interface Panels
45.0 lbs
Quick Shunt Module
4.0 lbs
Unit Mounting:
Cardfile: Std. 19
Rack, shelf, or wall
Track Panels
Shelf or wall
Quick Shunt Module
Shelf or wall
Cardfile Internal Access: Removable plug-in modules or blank panels.
2.8.2.
Operating Power
System Battery Voltage:
System Start Minimum Voltage:
Battery Ripple:
Built-In Suppression:
Current (In-Service, Steady State):
Required Charger:
Short Circuits:
Circuit Breaker:
2-16
9.8 16.2 VDC

11.5 VDC
0.5 Vp-p (max.).
Transient voltage suppressor
1.0A plus lamp load
Constant voltage type
I/O withstands continuous short
circuits (system shuts down)
15A
SM 6470B, Rev. 1, April 2008
Figure 2-14. Unit Mounting Dimensions
SM 6470B, Rev. 1, April 2008
2-17

2.8.3.
I/O Power
Signal Lamp Drive:
Signal Lamp Adjustment
18 or 25W, 10V lamps.

8.5 12.4V @ 13V battery
(front panel potentiometer).
1 (ON) Greater than 9.0 VDC
0 (OFF) Less than 7.0 VDC
Non-Isolated Inputs:
Non-Isolated Outputs:
Module N451910-6601:
Module N451910-6602:
12V 65 ohms or greater.

24V 150 ohms or greater.
0 (OFF) Outputs less than 1.8 VDC
1 (ON) Greater than 9.0 VDC
0 (OFF) Less than 7.0 VDC
0 (OFF) Outputs less than 1.8 VDC
Isolated Inputs:
Isolated Outputs:
2.8.4.
Electrical Connections (Power and Data)

Cardfile Power Input:
Cardfile Vital Local I/O and Track I/O:
Interface Panels:
Quick Shunt Module:
2.8.5.
Coded Track Communications

Track Circuit Length:
Table 2-2.
2-18
One 2-terminal AAR block

Three screw-lock plugs, 22-way.
Two 2-terminal AAR blocks.
Two screw-lock connectors, 8-way
Up to 23,000 feet.
(@ 3 ohms/1000 feet ballast).
Track Circuit Lengths for Welded Rail/Ballast
WELDED RAIL*
WEIGHT
@3 OHMS
BALLAST
@4 OHMS
@5 OHMS
100#
21,000 ft
25,000 ft
29,000 ft
118#
22,000 ft
26,000 ft
30,000 ft
136#
22,000 ft
27,000 ft
31,000 ft
145#
23,000 ft
27,000 ft
32,000 ft
SM 6470B, Rev. 1, April 2008

Table 2-3.
Track Circuit Lengths for Bonded Rail/Ballast
BONDED RAIL*
WEIGHT
@3 OHMS
BALLAST
@4 OHMS
@5 OHMS
100#
18k ft.
22k ft.
25,000 ft
118#
19k ft.
23k ft.
26,000 ft
136#
19k ft.
23k ft.
27,000 ft
145#
20k ft.
25k ft.
27,000 ft
*Assumes 100 foot or shorter #6 AWG (0.78 ohm) track leads at both ends.
For longer leads, reduce maximum distance by 1000 feet for each additional
100 foot lead.
NOTE
Reduce track circuit length by 1000 feet for each switch circuit
controller through which the track circuit passes.
Track Codes:
Code Format:
Message Characteristics:
Standard Shunt Response:
Quick Shunt Option:

Track Interface Inductance:
2.8.6.
22 (max) available for user application.

One fixed code for internal functions.
Bipolar.
167 or 333 msec. Pulses.
Amplitude: 2 Vp-p.
Message length: 2.0 sec.
Complete transmit/receive cycle: 6 sec.
Detect: 6 to 12 sec.
Clear: 12 to 18 sec.
(application-logic dependent).
Detect: 6 to 12 sec.
Track Panel N451835-0101: 10 mH.
Track Panel N451835-0102: 15 mH .
Serial Communications
Cardfile Serial Data Ports:
Communications Modes:
SM 6470B, Rev. 1, April 2008
A vital Slave port for MICROTRAX

consisting of two 25-pin D-connectors
for daisy chaining of units.
EIA RS-423 (RS-232C compatible).
2-19

Baud Rates: Vital links.
MICROTRAX
Vital Serial Up to I/O Bits:
CPU Module 9-Pin Port:
2.8.7.
Local Signal and Relay I/O

Colorlight/Searchlight
Signal Module:
Inputs:
Outputs:
Non-Isolated I/O Module:
Inputs:
Outputs:
Non-Isolated I/O Module:
Inputs:
Outputs:
Isolated I/O Module:
Inputs:
Outputs:
2.8.8.
Part No.: N451910-1501 or -7301.

Two isolated inputs per module.
Two signal heads per module.
Maximum of two modules per unit.
Part No.: N451910-1901.
Four non-isolated inputs per module.
Four non-isolated outputs per module.
Part No.: N451910-6601 or -6602.
Four non-isolated inputs per module.
Four non-isolated outputs per module.
Part No.: N451910-2101.
Four isolated inputs per module.
Two isolated outputs per module.
Maximum of one module per unit.
Miscellaneous
Track Interface Module:
Cardfile Vibration:
Temperature Range:
2-20
150, 300, 600, 1200, 1800, 2400 Bits

Per Second (BPS).
Up to 32 serial input bits.
Up to 32 serial output bits.
EIA RS-232: 1200 and 4800 BPS.
IBM PC compatible (DOS).
Two transmitters, two receivers

1.0G RMS, 0.2 displacement,
5-1000 Hz
40 to +70C
SM 6470B, Rev. 1, April 2008

Vital Cut-Off Relay:
Serial Communications
Adapter Panel:
Power Input:
US&S PN-150B
(part no. N322500-701)
Coil: 400 ohms
Contacts: 6 FB Std.
Energization: 0.0132 A, 5.3 Vdc
Reference: US&S SM-4596
Part No: N451460-3001
+5 Vdc 5% @ 100 mA
5 Vdc 5% @ 100 mA
(PCB component power)
9.9 to 16.2 VDC @ 200 mA
12 VDC nominal
2.9. Consolidated Material Part Number Listing

Table 2-4.
EQUIPMENT
Part Number Listing

PART NUMBER
Coded Track Cardfile
N451812-4101
CPU Module
N451910-0103
Power Supply
N166003-01
Colorlight Lamp Driver
N451910-1501
Searchlight Lamp Driver
N451910-7301
N451910-1901
Non-Isolated I/O
N451910-6601
N451910-6602
Isolated I/O
N451910-2101
Track Interface
N451910-0701
Sleep Mode
N451910-2301
Quick Shunt
N451052-4601
Blank Plate, .75
N451850-2902
Blank Plate, 1.55
N451850-2901
Blank Plate, 6.69
N451910-7201
Cardfile Mtg. Brackets
X451812-4102
Relay PN-150B
N322500-701
SM 6470B, Rev. 1, April 2008
2-21

EQUIPMENT
PART NUMBER
Track Interface Panel 10 mH
N451835-0101
Track Interface Panel 15 mH
N451835-0102
Termination PCB
N16401801
Serial Comm. Panel
N451460-3001
Track Code Generator
N1640801
Software Development
2-22
Disc 3-1/2
N451232-0119
Disc 5-1/4
N451800-0301
SM 6470B, Rev. 1, April 2008
2BInspection
3.
Inspection
units may be shipped as individual units, mounted on a rack, or mounted on a shelf

in a housing as part of a complete system. The plug-in modules associated with the MICROTRAX
unit are shipped separately. Following receipt of these items, each part should be visually
inspected for damage and should be checked for agreement with the design plans. If there is any
damage or the supplied material does not agree with the design plans, contact a US&S
representative immediately.
MICROTRAX
3.1. Set-Up
Following the proper mounting and external wiring (input power and I/O requirements) of the
associated MICROTRAX system equipment as described in Section 1 of this manual, the unit will
be ready for initialization and on-site set-up including adjustment of tracks and signals as
required. Ensure that all of the Executive and application EPROMS have been installed on the
CPU module prior to power-up.
3.1.1.
Power-Up
When a MICROTRAX unit is powered-up, the following indications and displays should occur:
1. The System Power Supply module:
The green 5V ON LED should light steadily indicating that the power supply is providing
a +5 VDC output to all internal circuits.
2. On the Power Supply module, the green FAILOVER RELAY LED should remain dark
while the CPU initializes (about 15 seconds). If no internal or external faults are
detected, this LED should light steadily when the VCOR relay energizes. If any faults
are detected and the VCOR does not energize, refer to Section 4.3 to evaluate the event or
error.
NOTE
The green fail-over relay LED will not light if the MICROTRAX
unit has not been configured. Refer to Section 3.2 for how to
configure the unit.
3. On the CPU module, the following displays should occur:
a. At the moment of power-up, the top and bottom LED displays should run through the
following sequence:
RES
RAM
RES
PROM
RES
BUS
RES
CPS
Refer to Section 3.1.2 for explanations of these resets.
SM 6470B, Rev. 1, April 2008
3-1
2BInspection
b. After the initialization is complete, the upper display on the CPU module should
scroll US&S MICROTRAX. The lower display should show the revision number of the
executive software installed in the system. The revision number is in the format
RV X.
c. STATUS LED 1 (red) should remain dark during the CPU initialization period. If no
internal or external faults are detected, this LED should then flash once per second.
d. STATUS LED 2 (yellow) should remain dark until the non-vital input is activated via
toggle switches (refer to Section 3.3).
e. STATUS LED 3 (green) should light indicating proper continuity on the CPU
backplane bus.
f. WATCHDOG LED (red) should light during the first part of the CPU initialization
period. If no internal or external faults are detected, this LED should remain lit.
4. Track Interface Module:
All LEDs should remain dark at power up until the unit is initialized and the track codes
attempt to transmit or receive.
5. Colorlight or Searchlight Driver Module:
All LEDs should remain dark at power up until the unit is initialized and the Cold
Filament Test begins to execute and/or lamp driver outputs are turned on or isolated
inputs are received.
6. Isolated I/O Module:
All LEDs should remain dark at power up until the unit is initialized and the cold
Filament Test begins to execute and/or lamp driver outputs are turned on or isolated
inputs are received.
7. Non-Isolated I/O Module:
All LEDs should remain dark at power up until the unit is initialized and non-isolated
outputs are delivered on and/or inputs received.
8. Sleep Mode Module:
SLEEP MODE (FLASHING) LED should remain dark until the unit is initialized and the
unit enters the Sleep Mode.
3-2
SM 6470B, Rev. 1, April 2008
2BInspection
3.1.2.
CPU Module Reset Sequence Displays
During the unit reset process, several internal tests are performed to verify the integrity of the
overall system. During each of these steps, the displays on the CPU module identify which
diagnostic is being performed:
1. The first action performed is a set of microprocessor diagnostics. These diagnostics
verify that the microprocessor is capable of running correctly. If these diagnostics pass,
the upper display will show RES. If the display does not show RES, the microprocessor
may be faulty.
2. The next action is a RAM test. At the start of this test, the displays will show RES
RAM. This test verifies all RAM in the system. If this message does not appear, or only
appears very briefly, then there may be a memory problem.
3. The next diagnostic performed is an EPROM test. At the start of this test, the displays
will show RES PROM. If this does not appear, the fault may be related to the EPROM.
The displays must be watched very carefully because information may only appear very
briefly.
For example, if the PROM test fails at the very beginning, it may be difficult to see the
RES PROM message. It may appear that the system is still doing the RAM test.
4. The next test performed is the BUS test. During this test, the bus is verified to make sure
that the correct modules are installed for the application and that no extra modules are
present.
During this test the displays will show RES BUS. If an incorrect module is installed,
however, this message will only be displayed for an instant. The display must be
watched very carefully for this message.
It is difficult to determine if an error is occurring during the PROM or the BUS test. To
verify which test is failing, watch the LEDs on the CPU Module. LED #3 (green) flashes
at the beginning of the BUS test. The instant the display changes from PROM to BUS,
the green LED is flashed. If this LED does not flash, the PROM test has failed. If it
does flash, the BUS test has failed.
5. After the bus has been verified, time is allotted for the picking of the CPS. During this
time, the display will show RES CPS. During this time, output monitors are read to
verify that no output is turned "On." After sufficient time has elapsed for the CPS to
pick, the system then goes into the operational mode.
If the CPS test starts, this indicates the correct input/output modules are installed in the
cardfile. If the unit fails after the CPS test starts, it is likely that an I/O module is faulty,
or there is an external I/O problem, or the VCOR is faulty.
SM 6470B, Rev. 1, April 2008
3-3
2BInspection
3.2. ON-SITE CONFIGURATION WITH PC
3.2.1. Introduction
*** Configuration can only be accomplished through the use of a PC. ***
This section gives procedures for on-site configuration programming of the MICROTRAX unit
using a PC. On-site configuration may only be accomplished if the application software has
been designed to permit the unit to be configured.
See the Application Programming manual SM-6470A for directions on how to set up
configuration items. Below is the list of items that may be configured:
Track Board Enable/Disable
Track A and Track B Enable/Disable
Unit Type (intermediate, end, repeater)
Lamp Driver or Non-Isolated I/O Module Enable/Disable
Lamp Driver Signal Head 2 Enable/Disable
Isolated I/O Module Enable/Disable
Slave Serial Port Information:

Enable/Disable
Address
Baud Rate
Key-on and Key-off Delays
Stale Data Timeout
Sleep Mode Enable/Disable
Logic Version
User Defined Activity (bits)
If the MICROTRAX unit is already configured, different start-up screens will appear on the PC. PC
communication COM-1 or COM-2 may be used for the MICROTRAX connection. Use a null
modem cable with a 9-pin plug for the MICROTRAX end (see Figure 1-14) for cable wiring. The
PC baud rate is selected prior to the start-up, while the CPU Module baud rate is set with a DIP
switch on the modules circuit board (refer to Section 3.2.2).
3-4
SM 6470B, Rev. 1, April 2008
2BInspection
3.2.2.
Initial Setup
Prior to unit initialization, DIP switches on the CPU module must be set to the proper position
and jumpers need to be checked for proper locations (See Figure 3-1).
1. With the MICROTRAX unit power OFF, pull out the CPU Module.
2. DIP switch SW1 (4 rockers) on the CPU Module must be set prior to cut-in. Switch
options are listed in Table 3-1.
Table 3-1.
ROCKER
POSITION
Closed
Open
CPU Module Dip Switch SW1 Functions

FUNCTION
4800 baud
1200 baud
Closed **
Open
Log shunts and errors

(see below)
Closed **
Open
Log errors without

shunts (see below)
COMMENTS
For front panel 9-pin interface to the on-site PC.
When active, switch causes system to log
events 1 to 45*:
Errors/warnings
Track shunted
User-defined events
events 1 to 35*:
Errors/warnings
User-defined events
events 1 to 85*:
2 and 3
Open
Log all
Closed
CPU display automatic

turn-off
Open***
Errors/warnings
Track shunted
User-defined events
Bad messages
Shunt removed
Display remains on after 25 minutes of non-use.
Reset system to enable this switch.
If none of the toggle switches are used for 25
minutes, displays are turned off to conserve
power. Reset system to enable this switch.
Refer to Section 4.2.3 for accessing event code displays on the CPU alphanumeric LEDs, and
Section 6 for definitions of the code.
**
When rockers 2 and 3 are both closed, rocker 2 takes precedence.
***
In addition to the CPU display being turned off, track interface module LEDs will also be turned off.
SM 6470B, Rev. 1, April 2008
3-5
2BInspection
Figure 3-1. CPU Module DIP Switch Settings
3-6
SM 6470B, Rev. 1, April 2008
2BInspection
On DIP switch SW3, check that rocker #5 is CLOSED. This position is required for
normal operation of the system. All other rockers on this switch should be OPEN.
The CPU Module contains nine jumper locations. The positions of these jumpers must
not be changed in the field. Before putting the CPU Module into service, check that
jumper positions conform to Table 3-2.
Table 3-2.
CPU Module Standard Jumper Positions
JUMPER
NUMBER
POSITION
FUNCTION
JP1
WDE
Watch dog enabled
JP2
SHORT
Watch dog line toggle
JP3
NA
Not used
JP4
485+
Select 485
JP5
423+
Select 423
JP6
EPROM
JP7
423-
Select 423
JP8
PFE
Internal system requirement
JP9
JP10
INT
3. Reinstall the CPU Module (power turned OFF).

4. Turn system power ON:
a. Hold down the MODE switch on the CPU until RES MENU is displayed.
b. Toggle the MODE switch down until PC LINK is displayed.
c. Push down the ENTER switch and the display will cycle and display WAIT CNFG.
5. With the null modem cable connected between the PC and the MICROTRAX unit, turn
ON the PC and run the program called TRXCONFG (which is part of the MICROTRAX
development system software).
6. The first screen shows which communications port is connected and the baud rate.
SM 6470B, Rev. 1, April 2008
3-7
2BInspection
Current MICROTRAX/PC Communications Link
M I C R O T R A X
CONFIGURATION PACKAGE
Version 3.00
Copyright 1992, Revised 1994
Communication Cable Connected To - -> COM2 :
MICROTRAX
Baud Rate - -> 4800 BPS
Is the information correct ( Y OR N ) ?

Y - to run program
N - to change selections
7. If (Y) is selected and the settings are correct, communications between the PC and the
MICROTRAX are established as shown below.
Communications Link-Up Active
M I C R O T R A X
Version 3.00
Connect Cable to COM2:
Current MICROTRAX Time:
02-21-95 15:47:57
3-8
Unit
Current PC Time:
02-21-1995 15:47:58
MICROTRAX
SM 6470B, Rev. 1, April 2008
2BInspection
8. If (N) is selected, the screen will display the selections shown below.
Non-Configured MICROTRAX Unit
M I C R O T R A X
Version 3.00
Select Communication Port:
[Current Selection is - -> COM 2 : ]
1 - Communication Port 1
(COM Port 1)
2 - Communication Port 2
(COM Port 2)
Enter 1 or 2 for the available Communication Port - ->
Second PC Screen Display: Non-Configured MICROTRAX Unit

M I C R O T R A X
Version 3.00
Select Baud Rate :
[ Current Selection is - -> 4800 BPS ]
1. - 1200
2. - 4800
Enter 1 or 2 for the correct baud rate - ->
SM 6470B, Rev. 1, April 2008
3-9
2BInspection
9. As instructed on the screen, press any key to continue on to the main menu.
Configuration Program Main Menu
M I C R O T R A X
Version 3.00
0
1
3
8
3.2.3.
Select a command
restart program
read real time clock
display configuration
open log file
Enter a command --->
2
4
x
set real time clock

reconfigure unit
exit
Restart Program Command (0)
This command returns the program back to the prompts for the PC communications port and
baud rate selections (see sample screen in Section 3.2.2 Step 8).
3.2.4.
Read (1) and Set (2) Real Time Clock Commands
The Read Real Time Clock command screen shows the current MICROTRAX and PC date/time.
The Set Real Time Clock command shows the current PC date/time and asks if the MICROTRAX
date/time should be updated. If (Y) is entered, the MICROTRAX system resets itself to the current
PC date/time. If any key except (Y) is not entered, the current MICROTRAX time and date is
retained.
3-10
SM 6470B, Rev. 1, April 2008
2BInspection
Read Real Time Clock
M I C R O T R A X
Version 3.00
Select a command
restart program
open log file
Processing Command
02-21-95
15:52:07
0
1
3
8
2
4
x
set real time clock

reconfigure unit
exit
Current PC Time
02-21-1995
15:52:09
Set Real Time Clock

M I C R O T R A X
Version 3.00
Select a command
restart program
2
4
open log file
x
Processing Command
The Current PC Date & Time is:
02-21-1995 15:52:17
The current PC Date & Time is used to set the MICROTRAX
Do you want to continue with these settings?
Press 'Y' to set the Date & Time, or any other key to
0
1
3
8
SM 6470B, Rev. 1, April 2008
set real time clock

reconfigure unit
exit
clock.
exit - ->
3-11
2BInspection
3.2.5.
Display Configuration Command (3)
The Display Configuration command loads the configuration from the MICROTRAX system to
the PC for user review. Note that the dates/times displayed (last configuration and last track
adjustment) are not the system clock date/time as shown in menu commands 1 and 2.
When (C) (Current) is pressed, the program shows the current Track A/Track B lengths, Track
A/Track B enabled/disabled status, board (module) types and cardfile locations, board
enabled/disabled status, slave port parameters, and user bit values (if any). Note that all
configurable items are marked with an asterisk (*) and that no unit type (end or intermediate) is
specified in this particular example (no unit type is a valid entry). Also note that this particular
configuration has only one user-defined configuration item. This item is assigned a value during
the configuration process. This variable can then be used in the application logic.
When (D) (Default) is pressed, the program shows default values for the system parameters.
NOTE
The examples shown are based on specific MICROTRAX application
logic programming. Displays will vary considerably with other
application programs.
Press (X) to exit the Display Configuration program.
Display Current Configuration Values
M I C R O T R A X
Version 3.00
Last Config:
02-21-95
16:05:34
Last Trk Adjst: 00-00-00 00:00:00
Logic Version =>
0
Unit Type =>
Sleep Mode =>
Disabled
TRACK BOARD DISABLED*
TRACK A Length: 20 Kft*
DISABLED*
TRACK B Length: 20 Kft* DISABLED*
BOARD 1
SEARCH LIGHT I/O*
HEAD 2 ENABLED
BOARD 2
DISABLED
BOARD 3
DISABLED
LCP
DISABLED
Serial SLAVE
DISABLED
Address: 0
Stale Data Timeout:
4.0 sec
KeyOn Delay: 20* msec. KeyOff Delay:
10* msec.
Baud Rate: 2400*
BPS
Bit #
Item
String
Value
Bit #
Item String
Value
143
APPROACH NORTH
1
3-12
SM 6470B, Rev. 1, April 2008
2BInspection
Display Default Configuration Values
M I C R O T R A X
Version 3.00
Last Config:
02-21-95
16:05:34
Last Trk Adjst: 00-00-00 00:00:00
Logic Version =>
0
Unit Type =>
Sleep Mode =>
Disabled
DISABLED*
BOARD 1
DISABLED
BOARD 2
DISABLED
BOARD 3
DISABLED
LCP
ENABLED
Serial SLAVE
DISABLED
Bit #
143
3.2.6.
Item
String
APPROACH NORTH
Value
1
Bit #
Item String
Value
Reconfiguration Command (4)
The Reconfiguration Command permits actual reconfiguration of the MICROTRAX unit. When
the command is executed, the required steps in the reconfiguration process are shown.
The Reconfiguration Program can only be used with entry of the proper password. New
MICROTRAX units received from the factory are programmed with MICROTRAX (capital letters
only) as the initial password. This can be changed during the reconfiguration process.
1. After the command is executed and the directions are displayed, the proper password must be
entered. If the password entered was not correct, an error will be displayed and a prompt will
appear asking the user to retry the password.
2. As indicated on the response screen, press the RESET button on the MICROTRAX unit within
30 seconds of entering the password on the PC.
3. Also as indicated, wait until CNFG MODE is displayed on the four-character CPU module
displays and press any PC key to continue the reconfiguration program.
4. Like the Display Configuration program, (C) or (D) may be pressed to show the current or
default system configurations. The resulting screen displays have the same general format as
the Display Configuration command.
SM 6470B, Rev. 1, April 2008
3-13
2BInspection
5. When (X) is pressed, the screen indicates that the default and current values for each
configuration parameter are displayed, along with instructions on how to enter a new
parameter value. When any key is pressed, all configurable parameters are sequentially
displayed and the user is prompted to enter the new values.
6. After the last reconfiguration parameter is entered, the system goes back to the summary
display of the parameter selections. Note the prompt on this screen. This prompt enables
the user to accept the parameter changes (A), retry the changes as needed (R), or exit the
program (changes not implemented).
7. If (X) is pressed, the reconfiguration process is aborted and any changes are lost. If (A) is
pressed, the user is given the option of changing the password. If (Y) is pressed, a new
password is entered and reconfirmed. The new password is only stored in the units
EEPROM if the entire configuration process is completed.
8. After the changes are accepted, the system allows the user to perform a final review of the
parameter selections and provides a prompt (T) for transferring the configuration data to the
MICROTRAX EEPROM (see the sample screen on Page 3-20). Note that the date of the
reconfiguration is now updated.
9. When the prompt Please Reset Your MICROTRAX Unit appears, press the RESET
button on the CPU Module. The reconfiguration process is complete and another main menu
item may be selected.
NOTE
The examples shown are based on specific MICROTRAX application
logic programming. Displays will vary considerably with other
application programs.
3-14
SM 6470B, Rev. 1, April 2008
2BInspection
Password Prompt
M I C R O T R A X
Version 3.00
Please enter the password ?
Reconfiguration Program Activation

M I C R O T R A X
Version 3.00
Please enter the password ?
MICROTRAX
You have 30 seconds to reset the MICROTRAX unit to enter configuration
mode. After the unit has been reset, wait for the display on the
MICROTRAX unit to read CNFG/MODE and then press any key on the PC
keyboard to continue.
Reset the MICROTRAX now.
Last Configuration Date:
Last Track Adjust Date:
02-25-1995 15:15:14
00-00-00 00:00:00
Press (C)urrent values, (D)efault values or (X) to reconfigure
Changing Password
M I C R O T R A X
Version 3.00
Please enter the new password? MICROTRAX
Please confirm the new password? MICROTRAX
The new password has been accepted into the MICROTRAX RAM.
It will be transferred into the EEPROM when the unit is configured.
Press any key when ready to continue.
SM 6470B, Rev. 1, April 2008
3-15
2BInspection
Reconfiguration Program Structure
M I C R O T R A X
Version 3.00
The Configuration Process will consist of the following steps:
- Password Verification
- Review Current and Default Configuration
- Select New Configuration Values
- Review New Configuration Values
- Download New Configuration Values
- Upload and Confirm New Configuration Values
- Transfer the New Configuration Data to the EEPROM
Reconfiguration Procedure: Initial Screen

M I C R O T R A X
Version 3.00
You will be shown the default and current value for each item and then
be asked for the new value
3-16
SM 6470B, Rev. 1, April 2008
2BInspection
Sample Reconfiguration: Track Parameters
ITEM
TRACK
Enter
ITEM
TRACK
Enter
ITEM
TRACK
Enter
ITEM
TRACK
Enter
ITEM
TRACK
Enter
DEFAULT
A Enable
1
the new value or press
DEFAULT
A Length
26
DEFAULT
B Enable
1
DEFAULT
B Length
26
DEFAULT
B Board
1
return to
return to
return to
return to
return to
CURRENT
1
retain the
CURRENT
26
retain the
CURRENT
1
retain the
CURRENT
26
retain the
CURRENT
0
retain the
current
current
current
current
current
INPUT RANGE
0,1
value ==> 1
INPUT RANGE
0-36K Feet
value ==> 26
INPUT RANGE
0,1
value ==> 1
INPUT RANGE
0-36K Feet
value ==> 26
INPUT RANGE
0,1
value ==> 1
Sample Reconfiguration: Unit Type

ITEM
DEFAULT
CURRENT
INPUT RANGE
UNIT Type
3
0
0 - 3
1 = end,
2 = repeater,
3 = intermediate,
0 = none
Enter the new value or press return to retain the current value ==> 0
Sample Reconfiguration: Board Enable/Disable

ITEM
DEFAULT
CURRENT
INPUT RANGE
Board 1 Enable
0
2
0 - 3
1 = no board,
2 = colorlight,
3 = searchlight,
0 = non-iso relay
ITEM
DEFAULT
CURRENT
INPUT RANGE
Board 2 Enable
0
0
0 - 3
1 = no board,
2 = colorlight,
3 = searchlight,
0 = non-iso relay
ITEM
DEFAULT
CURRENT
INPUT RANGE
Board 3 Enable
0
0
0, 3, 4
1 = no board,
2 = colorlight,
3 = searchlight,
0 = non-iso relay
Result: First cardfile I/O slot is set up for a Non-Isolated I/O Module. Second slot is set up for
a Colorlight Lamp Driver Module. Third slot is set up for an Isolated I/O Module.
SM 6470B, Rev. 1, April 2008
3-17
2BInspection
Sample Reconfiguration: Signal Head 2 Board Enable/Disable
ITEM
BOARD
Enter
ITEM
BOARD
Enter
DEFAULT
CURRENT
INPUT RANGE
1 Head 2 Enable
1
1
0,1
the new value or press return to retain the current value ==> 0
DEFAULT
CURRENT
INPUT RANGE
2 Head 2 Enable
1
1
0,1
the new value or press return to retain the current value ==> 1
Result: Second signal head enabled for operation by Colorlight Lamp Driver Module.
Sample Reconfiguration: Communications Link to Slave Unit
ITEM
DEFAULT
CURRENT
INPUT RANGE
SLAVE Enable
0
0
0,1
ITEM
DEFAULT
CURRENT
INPUT RANGE
SLAVE Address
0
0
0 - 15
ITEM
DEFAULT
CURRENT
INPUT RANGE
SLAVE Baud Rate
3
4
1 - 6
ITEM
DEFAULT
CURRENT
INPUT RANGE
SLAVE Address
0
0
0 - 15
ITEM
DEFAULT
CURRENT
INPUT RANGE
SLAVE Keyon Delay
0
50
0 - 255ms
ITEM
DEFAULT
CURRENT
INPUT RANGE
SLAVE Keyoff Delay
0
50
0 - 255ms
ITEM
DEFAULT
CURRENT
INPUT RANGE
SLAVE Stale Data Time Out
10
20
0-100 100 msec. tics
Enter the new value or press return to retain the current value ==>
Result: Communications link to MICROLOK or MICROLOK PLUS unit (or MICROTRAX EOS Serial
communications Controller Module) is enabled (previously disabled). This unit has a Slave
address of (1). Link to operate at 300 baud with key-on and key-off delays of 75 milliseconds.
Stale data time out retained at 2000 milliseconds.
3-18
SM 6470B, Rev. 1, April 2008
2BInspection
Sample Reconfiguration: Sleep Mode
ITEM
DEFAULT
CURRENT
INPUT RANGE
Sleep Mode
0
0
0 - 1
Result: Sleep mode remains disabled.

Sample Reconfiguration: User Logic Version Number
ITEM
DEFAULT
CURRENT
INPUT RANGE
Logic Version
0
0
0 - 255
Sample Reconfiguration: User-Defined Activity

ITEM
APPROACH NORTH
DEFAULT
1
CURRENT
1
INPUT RANGE
0,1
Sample Reconfiguration: Review New Configuration Values to This Point

Last Config:
02-21-95
16:05:34
Last Trk Adjst: 00-00-00
00:00:00
Logic Version =>
0
Unit Type =>
Sleep Mode =>
Disabled
DISABLED*
BOARD 1
SEARCH LIGHT I/O*
HEAD 2 ENABLED*
BOARD 2
DISABLED*
BOARD 3
DISABLED*
LCP
ENABLED*
Serial SLAVE
ENABLED*
Address: 0
KeyOn Delay: 20* msec. KeyOff Delay:10* msec. Baud Rate: 2400* BPS
Bit #
Item String
Value Bit #
Item String
Value
143
APPROACH NORTH
1
Please type A to accept, X to exit, or R to retry
This section allows entry of the user-defined configuration items. When (A) (configuration
accepted) is entered, the prompt changes to show that the Reconfiguration mode password may
be changed at this point. When changing the password, the same prompt appears as shown on
the initial entry screen for the Reconfiguration mode.
SM 6470B, Rev. 1, April 2008
3-19
2BInspection
Sample Reconfiguration: Final Review of New Configuration Values
Last Config:
02-21-95
16:05:34
Last Trk Adjst: 00-00-00
00:00:00
Logic Version =>
0
Unit Type =>
Sleep Mode =>
Disabled
DISABLED*
BOARD 1
SEARCH LIGHT I/O*
HEAD 2 ENABLED*
BOARD 2
DISABLED*
BOARD 3
DISABLED*
LCP
ENABLED*
Serial SLAVE
ENABLED*
Address: 0
KeyOn Delay: 20* msec. KeyOff Delay:10* msec. Baud Rate: 2400* BPS
Bit #
Item String
Value Bit #
Item String
Value
143
APPROACH NORTH
1
Please review the new configuration. If this configuration is correct, please
press T to transfer this data to the EEPROM. Press X to abort the
configuration data transfer.
Last Configuration Date:
Last Track Adjust Date:
02-22-95
08:48:01
00-00-00
00:00:00
Please Reset Your MICROTRAX Unit -- Type any key to continue
3.2.7.
Open Log File Command (8)
This option enables the user to record default and/or current configuration information in a usernamed file. The name may include up to eight characters (numbers and/or letters). Note that all
items shown on the sample screen will be written to the new file name. When the file name is
entered, main menu item (8) changes from open to close. As indicated, enter (8) to close the file.
3.2.8.
Exit Command (X)
To exit the general configuration program, enter menu item (X).
3-20
SM 6470B, Rev. 1, April 2008
2BInspection
Open Log File
M I C R O T R A X
Version 3.00
Select a command
restart program
2
set real time clock
4
reconfigure unit
open log file
x
exit
Processing Command
Enter file name ==>? USERFILE
Event & Error ? Displays, Time Changes, Logic Free Runs, Memory Displays and
Configuration Displays be written to "USERFILE"
Press any key when ready to continue
0
1
3
8
Close Log File

M I C R O T R A X
Version 3.00
Select a command
restart program
open log file
Processing Command
Log File: USERFILE is now closed
Press any key when ready to continue
0
1
3
8
SM 6470B, Rev. 1, April 2008
2
4
x
set real time clock

reconfigure unit
exit
3-21
2BInspection
3.3. TRACK AND SIGNAL ADJUSTMENT

After the MICROTRAX unit has been configured properly and is operational, the track circuit
margin and the signal lamp intensity should be adjusted for optimum efficiency.
Track circuit margins may only be adjusted if the track circuit is operational and communicating
from end to end. For testing purposes, the track code generator may be utilized in lieu of the
actual physical track circuit. The track leads from the track code generator should be connected
to the line side of the Track Interface Panel to operate the circuit (refer to Section 5.3). The track
code generator can communicate with both the master and/or slave ends of the track circuit. To
ensure that the track circuit is operational, use the CPU mode switch to view the DISP
STAT which indicates the operational status of the track circuit. This CPU toggle switch
operation is explained in Section 3.3.5 and also in Section 4, Maintenance and Monitor.
When the unit initializes, the track circuit is in the shunt mode (S). When the Master unit
attempts to communicate with the Slave unit, the Master transmits a linkup (A) code and enters
the remove shunt (R) mode. If the track circuit is operational and the Slave communicates
successfully with the Master, the Master and Slave enter normal (N) mode.
If the track circuit is not operational, first check that the wiring is correct from the MICROTRAX
unit to the rails. If wiring is correct, a track circuit polarity check should be performed first.
3.3.1.
Coded Track Circuit Polarity Check
The test procedure outlined below requires a Simpson 260 or equivalent Volt Ohm Meter
(VOM). Figure 3-2 shows the test set-up.
Table 3-3.
Coded Track Circuit Polarity Check Procedure
STEP
OPERATION
RESULT
Set meter to the RX1 scale and use zero adjust to

set an initial reading of 2.0 ohms.
No response
Connect meter common lead to the rail

corresponding with the T(-) track connection.
Connect the probe lead to the T(+) connection
No response
During intervals with no transmissions, the meter
should read 2.0 ohms.
Operate system to periodically generate track

communications.
During transmit or receive intervals, meter should

go up scale to about 5.0 ohms (first pulse is +).
During receive interval, meter deflection should be
considerably less, depending on track circuit
length.
3-22
SM 6470B, Rev. 1, April 2008
2BInspection
3.3.2.
General Considerations For Track Circuits
For most MICROTRAX applications, traditional track circuit adjustments are not required. Track
circuit length is among the configuration data entered on-site with a portable PC. When track
circuit length is specified, receiver sensitivity is automatically established. The MICROTRAX
sensitivity setting is based on 100 pound rail and up to 200 loop feet of #6 wire (0.078 ohm)
track leads.
Table 3-4 indicates maximum track circuit length for leads of 100 and 200 loop feet if the
MICROTRAX automatic adjustment feature is used. Although it appears in the table that 200 foot
leads restrict track circuit length, this is not the case. The same track circuit length can be
attained with 200 foot leads as 100 foot by operating the circuit with greater sensitivity.
If it is necessary to operate the longest possible track circuit length with 200 foot leads, use the
manual track circuit adjustment feature (refer to Section 3.3.7) or enter a length that is up to 6000
feet longer than actual at the time of set-up.
Table 3-4.
Maximum Track Circuit Length
MAXIMUM LENGTH LEADS: 100 FEET

Maximum ballast
(ohms/1k ft.)
100# Rail
118# Rail
136# Rail
17,000 ft.
18,600 ft.
19,900 ft.
23,400 ft.
25,600 ft.
27,000 ft.
29,400 ft
30,000 ft.
30,000 ft.
MAXIMUM LENGTH LEADS: 200 FEET

Maximum ballast
(ohms/1k ft.)
SM 6470B, Rev. 1, April 2008
100# Rail
118# Rail
136# Rail
15,100 ft.
16,400 ft.
19,600 ft.
21,400 ft.
22,800 ft.
25,300 ft.
26,600 ft.
29,200 ft.
30,000 ft.
3-23
2BInspection

inches.
Figure 3-2. Track Polarity Test Set-Up
3-24
SM 6470B, Rev. 1, April 2008
2BInspection
3.3.3.
Manual Track Circuit Adjustment
An unusual track circuit configuration may require the use of a manual adjustment. Examples:
Circuit with exceptionally long leads, dumping of new ballast, or salt dumped across tracks at
highway crossing. Refer to Section 0 for the manual track circuit adjustment procedure.
When adjusting the track length on the CPU module, a larger number entered for the track circuit
length will provide greater margin by making the receiver more sensitive, and a lower number
will reduce the margin. Normally, the number (such as 16) should agree with the approximate
track circuit length in thousands of feet. For these special cases, the number will be larger than
the track circuit length in thousands of feet. To ensure that the circuit is not over energized, drop
it out with an 0.06 ohm shunt. Normally, the margin can be as high as 250% when ballast is high
and the shunting sensitivity will not be impaired.
Figure 3-3 shows the operating margin and shunting sensitivity for 100 and 200 foot leads. This
figure illustrates that more operating margin is tolerated with longer leads.
Figure 3-3. Track Circuit Shunting Sensitivity

SM 6470B, Rev. 1, April 2008
3-25
2BInspection
3.3.4.
Shunting Test
When the MICROTRAX system is first installed, track circuits under the control of a given
MICROTRAX unit should be given a shunting test with a 0.06 ohm shunt. As this test requires the
use of the CPU module, the procedure for the shunt test is shown in Section 0.
NOTE
With short track leads, 0.06 ohm shunting may not be achieved.
To achieve the 0.06 shunting a 0.1 ohm resistor must be added to
the track leads.
3.3.5.
Front Panel Procedure For Track Circuit Adjustment and Status Display
This section describes how to use the CPU front panel (CPU four-character displays and toggle
switches) to enter set-up parameters and view track circuit operational status data. Refer to
Section 4for front panel operations specific to troubleshooting.
All CPU toggle switches are return-to-center switches. They only enter a bit when held up or
down. Each switch must be held at least one second to execute a displayed function.
Figure 3-4 summarizes all CPU set-up and review functions in flowchart form.
NOTE
The CPU front panel four-character displays may be turned OFF
(refer to Section 3.2.2). Noted that turning OFF the four-character
displays also turns OFF the LEDs on the Track Interface Panel.
3-26
SM 6470B, Rev. 1, April 2008
2BInspection
Figure 3-4. CPU Display Modules Flowchart
SM 6470B, Rev. 1, April 2008
3-27
2BInspection
3.3.6.
CPU Front Panel Display Status (DISP STAT)
This function shows the status of the tracks (A and B) and stored error codes. Section 6 gives a
detailed listing of the basic error messages.
NOTE
If a track side (A or B) has not been enabled in the application
software, the information for that track will not be displayed.
Table 3-5.
STEP
Display Track Status/Error Codes Procedure
OPERATION
RESULT
Toggle the MODE switch up or down until DISP

STAT is displayed.
No response
Move the ESCAPE/ENTER switch to the ENTER

position.
One or more sets of data (variable number)

should be repeated in the following format:
axby
eenn
Display position ax shows the track A side, while
by shows the track B side.
Display positions a and b display the code being
transmitted and received. Received codes are
shown in upper-case letters, while transmitted
codes are shown in lower-case.
Display positions x and y show the state of the
respective track. Codes include: S for shunt, R
for remove shunt, and N for normal.
Display position ee shows a number that
represents a particular error code. These codes
are listed in Section 6.
Display position nn indicates the number of times
that the associated ee error code was logged.
When 0000 appears in display positions eenn, the
error code listed is concluded.
All above displays are updated in real time while
the system is operating.
3-28
Move the ESCAPE/ENTER switch to the ESCAPE

position.
The display returns to US&S MICROTRAX and

the software revision number.
SM 6470B, Rev. 1, April 2008
2BInspection
3.3.7.
Manual Track Circuit Adjustment
This procedure can only be utilized after the track circuit is operational as explained in
Section 3.3.
NOTE
To enable this menu option, a test bit for tracks A and/or B must be
set in the application software, and the unit must be properly
configured. If track A or track B is disabled, its length cannot be
adjusted.
To abort the manual adjustment process at any point in the following procedure, press any toggle
switch other than that specified in the procedure. Then reset the system by pushing the RESET
button. This restores the existing adjustment values to the system.
Refer to Section 3.3.9 for procedure to access present track circuit operating data.
Table 3-6.
STEP
Manual Track Circuit Adjustment Procedure
OPERATION
RESULT
Hold the MODE switch up or down until the

ADJ TRK display is reached.
No response
Move the ESCAPE/ENTER switch to the

ENTER position.
The display should show PUSH RES.
Press the RESET button as soon as the

PUSH RES display appears.
When RESET is pushed, the system should

go through power-up diagnostics. If RESET
is not pushed in 15 seconds, the operation is
aborted and the display returns to the
scrolling US&S MICROTRAX. Repeat this step
if required to clear the automatic adjustment.
This action overrides the track circuit
adjustment in the system. Configuration data
is read from the system EEPROM. A system
shut-down will occur if the read is successful.
When the read is successful, the display
should then show TK A xx.
"xx" (range 0 36) is the length of track A
obtained from the EEPROM.
Move the ADJUST switch up or down to

change the displayed value.
Display shows new value.
When the desired value is set, move the

ESCAPE/ENTER switch to the ENTER
position.
If track B is enabled, the display will change

to TK B xx.
SM 6470B, Rev. 1, April 2008
3-29
2BInspection
STEP
6
OPERATION
Repeat steps 4 and 5 for track B.
RESULT
When the track B adjustment is complete, the
displays will show xx=A and xx=B.
xx=A and xx=B are the newly entered
adjustments for track A and track B
respectively. This information is displayed in
different locations to aid in the detection of
display failures.
If the values in the current display are

correct, move the ESCAPE/ENTER switch to
the ENTER position. If these values are
incorrect, press the ESCAPE switch to abort
the adjustment.
If ENTER is selected, the values will then be

written to the EEPROM. If the write to the
EEPROM was successful, the unit will
display ADJ GOOD. If the write failed, the
display will shown DOWN 007A (which is the
error code for a faulty EEPROM).
If ESCAPE is selected, the values entered
will be ignored and the display will show ADJ
ABRT (adjust abort).
3.3.8.
Push the RESET button to reset the unit.
If the message displayed from step 7 was

ADJ GOOD, the unit will run with the new
track length values; otherwise, the old
lengths will be used.
Track Circuit Operating Margin CPU Module Display
To ascertain that the track circuit is adjusted properly, use the CPU MODE switch to view the
DISP MARG, which indicates the track circuit operating margin. The number displayed
represents the signal strength relative to operating sensitivity. For example, if 100 is displayed,
the circuit is on the verge of shunting. If 200 is displayed, the signal strength is twice what is
required for operation. The procedure for this display is also explained in Section 4.
Operating Margin
With dry ballast, the operating margin generally should be greater than 150 percent. With wet
ballast, the operating margin should be smaller. If the operating margin is too high, the circuit
may not shunt at 0.06 ohm. A 0.1 ohm resistor in series with the track leads may be required for
0.06 ohm shunting.
3-30
SM 6470B, Rev. 1, April 2008
2BInspection
3.3.9.
Display Track Circuit Operating Margin

NOTE
Table 3-7.
STEP
Display Track Circuit Operating Margin Procedure

OPERATION
RESULT

MARG is displayed.
No response

position.
The display should show signal strength for each

track in the following format:
sm11
pppp
s track side A or side B
m track operating mode ("S" for shunt, "R" for
remove shunt, or "N" for normal)
11 track length in 1000 ft. increments, ranging
from 00 to 36.
pppp the percentage of shunt. Generally, the
margin should be greater than 150 percent (0150
on the display). The display is dynamically
updated, showing signal strength of the last
message received. The display continually
toggles between track A and track B until the
function is exited (step 3).

position.

3.3.10. Coded Track Shunting Test

The following procedure is intended to meet Federal Railroad Association (FRA) regulations
which require that a coded track circuit system be certified as properly responding to the
presence of a shunt. If a track side (A or B) has not been enabled in the application software,
the information for that track will not be displayed.
The MICROTRAX shunting test requires separate 0.06 ohm shunts for installation across the
Master and Slave ends of the track circuit.
SM 6470B, Rev. 1, April 2008
3-31
2BInspection
Table 3-8.
STEP
Code Track Circuit Shunt Test Procedure
OPERATION
RESULT

MARG is displayed.
No response

position.
The display should show signal strength for each

track in the following format:
sm11
pppp
s track side A or side B
m track operating mode ("S" for shunt, "R" for
remove shunt, or "N" for normal)
11- track length in 1000 ft. increments, ranging
from 00 to 36.
pppp the percentage of shunt. Generally, the
on the display). The display is dynamically
updated, showing signal strength of the last
message received. The display continually
toggles between track A and track B until the
function is exited (Step 5).
At the Master (A) end, place a 0.06 ohm shunt

across the track.
The top display should alternate as indicated in

Step 2, with an S display for a shunt condition on
the A side. The bottom display should alternate
between a margin of less than 0100 (%) for the
A-side and the original reading for the B-side. The
margin for the A side may be 0000.
Remove the 0.06 ohm shunt from the Master end

and install the same type of shunt across the
Slave (B) end.
The top display should alternate as indicated in

Step 2, with an S display for a shunt condition on
the B-side. The bottom display should alternate
between the original margin for the A-side and a
margin less than 0100 for the B-side. The margin
display for the B-side may be 0000.

position.

3.3.11. CPU Front Panel Procedure For Signal Lamp Adjustment

This section describes how to use the CPU front panel (CPU four-character displays and toggle
switches) to enter set-up parameters and view signal lamp status data. Refer to Section 4 for
front panel operations specific to troubleshooting.
All CPU toggle switches are return to center switches that only enter a bit when they are held up
or down. Each switch must be held at least one second to execute a displayed function.
3-32
SM 6470B, Rev. 1, April 2008
2BInspection
3.3.12. General Considerations for Signal Lamp Adjustment
NOTE
To avoid a sudden in-rush current, the application software should
be written to turn on all lamps with about a one-second delay on
opposing signals.
systems allow adjustment of signal lamp voltage on the cardfile. This is done with
small potentiometers on the front panel of the Colorlight Lamp Driver and Searchlight Lamp
Driver Modules, in conjunction with an adjustment program run and displayed on the CPU
Module. Dropping resistors in the signal assembly are not required. With proper adjustment,
signal lamp filament life is maximized without significant reduction of lamp intensity.
MICROTRAX
Figure 3-5 shows the relationship between lamp voltage, current, candlepower and bulb life
for 18- and 25-watt lamps. During the CPU adjustment procedure, the CPU alphanumeric
display shows current. To obtain the equivalent lamp voltage, translate this to voltage shown in
Figure 3-5. For example, to adjust lamp voltage adjustment to 9.0 volts, note the following on
the graph:
18W lamps: Corresponding current = 1.7 amps
25W lamps: Corresponding current = 2.35 amps
Projecting the 9.0 volt line upwards shows candle power of 70 percent and bulb life 3.6 times
greater than adjustment at 10 volts. Note that the projected current is indicative of voltage across
the bulb at the signal head and is independent of line drop. There will be some voltage variation
due to variations in bulb manufacturing tolerances. Light output is more consistent if current,
rather than voltage, is the parameter of adjustment, especially with aging of bulbs. Maximum
output of the regulated MICROTRAX source is one volt less than battery voltage. This places a
limit on the line drop that can be tolerated.
3.3.13. Adjustment of Searchlight Signals
When adjusting voltage for a searchlight signal, the lamp and mechanism coil current are
measured together. With red aspect selected, the current is accurate. With a green aspect
selected, the displayed current is lower than the actual lamp current by 0.04 amperes. With a
yellow aspect, the current displayed is higher than the actual lamp current by 0.04 amperes.
Refer to Figure 3-5 for desired lamp current and compensate reading as required. For example:
For an 18W lamp and desired voltage of 9.0 volts, the corresponding current is 1.7 amps. If
green is selected, set the current to 1.66 A. If yellow is selected, set the current to 1.74 A. These
readings will accurately reflect 9.0 volts across the lamp.
Table 3-4 shows the maximum line resistance which can be used to operate 18W lamps at 1.7A
(9 volts) and 25W lamps at 2.35A (9 volts):
SM 6470B, Rev. 1, April 2008
3-33
2BInspection
Table 3-9.
Maximum Line Resistance for 18W and 25W Lamps
MIN. BATTERY
VOLTAGE
MAX.
RESISTANCE 18W
MAX.
RESISTANCE 25W
10V
0.0 ohms
0.0 ohms
11V
0.59 ohms
0.42 ohms
12V
1.18 ohms
0.85 ohms
13V
1.76 ohms
1.28 ohms
Figure 3-5. Signal Lamp Operating Characteristics

3-34
SM 6470B, Rev. 1, April 2008
2BInspection
3.3.14. Adjustment Procedure
Refer to Section 3.3.12 for the lamp adjustment procedure using the CPU display and switches.
3.3.15. Signal Lamp Voltage Adjustment
Refer to Section 3.3.11 for background information on adjustment of signal lamp voltage.
Table 3-10. Signal Lamp Voltage Adjustment Procedure
STEP
OPERATION
RESULT
Hold the MODE switch up or down until the ADJ

LAMP display is reached.
No response.
Hold the ESCAPE/ENTER switch to the ENTER

position
If the system is configured with lamp driver

module (1) operating signal head (1), the upper
display should show the following:
B1H1
Depending on the configuration, other possible
first displays may include:
BIH2
B2H1
B2H2
The bottom display shows the lamp current
adjustment for the displayed signal head. If the
signal is turned off or current is zero, this display
should show 0.000.
To adjust the lamp current for this particular signal

head, turn the potentiometer on the respective
lamp driver module. If no adjustment is required,
continue with step 4.
The bottom display should change with the

adjustment of the potentiometer.
Move the ADJUST switch to the UP position.

Move the switch to the DOWN position to go back
to the previous head.
The upper display should show the next lamp

driver/signal head configuration per step 2.
Repeat steps 3 and 4 for each lamp driver/signal

head defined for the system.
No response.
When all lamp current adjustments are to

specification, move the MODE switch to the
ESCAPE position.
The displays return to US&S MICROTRAX and

SM 6470B, Rev. 1, April 2008
3-35
2BInspection
3.4. MISCELLANEOUS CONTROL FUNCTIONS

The MICROTRAX system provides the user with some optional control functions to be used as
required. This section describes the available options.
3.4.1.
Clear Logs and Displayed Events
Following the initialization and setup of the MICROTRAX Coded Track unit including track and
signal adjustment, any logged events or errors should be cleared from the system.
Table 3-11. Clearing Log Procedure
STEP
1
2
3.4.2.
OPERATION
RESULT
Hold the MODE switch up or down until the CLR

LOGS display is reached.
Hold the ESCAPE/ENTER switch to the ENTER
position
No response.
This action executes the clearing function. The
display returns to US&S MICROTRAX and the
software revision number.
Keyboard Input On and Off

WARNING
The Keyboard Input On and Off function can place a vital
operation under non-vital control. Make certain this function is
only used when vital control is not required (e.g., no trains in the
territory). To avoid an operating hazard, make certain vital
operation is restored by turning off this function when not
required.
This function is used to set/clear a non-vital application logic bit. For example, the bit could be
used to allow turn-on of a signal lamp for voltage adjustment. In this case, the application logic
should be written to only allow lamp turn-on when no trains are in the territory (override of
approach lighting). The input will also clear when the unit is reset or power has been cycled.
3-36
SM 6470B, Rev. 1, April 2008
2BInspection
Table 3-12. Keyboard Input On and Off Procedure
STEP
OPERATION
RESULT
Hold the MODE switch up or down until the INP

ON display is reached.
No response.

position.
The display should return to US&S MICROTRAX

and the software revision number. Also, STATUS
LED 2 (yellow) should light. This indicates that
the non-vital input is in effect.
When the non-vital input is no longer required,

hold the MODE switch down until the INP OFF
display is reached.
No response.

position

the software revision number. Also, STATUS LED
2 (yellow) should go dark. This indicates that the
non-vital input is no longer in effect.
3.4.3.
Display Off
This function is used to conserve system power by turning off both four-character LED displays
when not needed.
Table 3-13. Display Off Procedure
STEP
OPERATION
RESULT
Hold the MODE switch up or down until the DISP

OFF display is reached.
No response.

position.
Both displays should go dark.
To restore the displays, toggle any switch.

SM 6470B, Rev. 1, April 2008
3-37
2BInspection
3-38
SM 6470B, Rev. 1, April 2008
3BMaintenance and Monitor
4.
Maintenance and Monitor

WARNING
Do not attempt to repair any MICROTRAX plug-in module, PCB,
Quick Shunt Module, or Track Interface Panel in the field.
Improper repair of these devices could result in an equipment
malfunction and/or operating hazard.
This section provides troubleshooting and maintenance procedures for an in-service MICROTRAX
system. Repairs are limited to correction of basic wiring and hardware problems, and
replacement of complete modules to isolate and remove a faulty module from service.
Shop testing and repair procedures for the various MICROTRAX units, plug-in modules and PCBs
are not provided. These vital units require special factory test equipment and procedures. If
determined to be faulty, these units should be returned to US&S for repair or replacement. For
service information, contact:
Service Shop
645 Russell St.
Batesburg, SC 29006-1800
Phone: l-800-652-7276
Request US&S service manual SM-4596E for service information on the PN-150B relay used as
the VCOR.
4.1. PERIODIC INSPECTION
CAUTION
To avoid equipment damage and/or faulty operation, do not install
or remove any MICROTRAX plug-in module with the system power
turned ON.
The MICROTRAX cardfile and associated units should be periodically inspected, in conjunction
with inspections of related vital equipment:
Make certain the cardfile, Track Interface Panels, and Quick Shunt Module (if used) are
mounted securely, and that all cardfile plug-in modules are fully inserted (front panel hold
down screws tight).
Check all power input and lamp driver/logic wiring for frayed, loose, or broken connections.
Also check for evidence of lightning damage around the arresting devices.
SM 6470B, Rev. 1, April 2008
4-1
With system power turned OFF, remove each plug-in module and check the cardfile
backplane for loose or damaged connectors. Also check each module itself for physical
damage, damaged components, broken component leads, and copper tracks. Replace
damaged boards with appropriate spares.
Extract the VCOR relay and perform inspections according to service manual SM 4596E.
4.2. System Monitoring

There are displays available on both the CPU module and also via the PC that will allow
maintenance personnel to monitor the status of the system. This includes status of tracks and
signals and also events and errors that may have occurred causing the system to reset. The
display diagnostics will provide maintenance personnel with a quick diagnosis of the system and
a timely elimination of system problems.
4.2.1.
System Monitoring Via the CPU Front Panel
This section describes how to use the CPU four-character displays and toggle switches to view
system status and error data.
CPU toggle switches are used to select and execute menu options. These are return-to-center
switches that only enter a bit when they are held up or down. Each switch must be held at least
one second to execute a displayed function.
Use the MODE UP/DOWN switch on the CPU to scroll through menu options. The DOWN
position moves the display to the next menu item, and the UP position moves the display to the
previous menu item. If the display reaches the beginning or the end of the menu, it will not wrap
around to the other end of the menu by holding the switch up or down.
Use the CPU ENTER switch to select the currently displayed menu option.
Figure 4-1 summarizes all CPU set-up and review functions in flowchart form.
NOTE
This section only describes the monitoring section of the displays.
For adjustments, see Section 3.
4-2
SM 6470B, Rev. 1, April 2008
Figure 4-1. CPU Display Modules Flowchart
SM 6470B, Rev. 1, April 2008
4-3

4.2.2.
Display System Status
This function displays selected system level operations, including the status of the vital serial
link (if used) and the status of the cross lighting serial link (if used). This function also reports
the status of the system EPROM.
Table 4-1.
STEP
Display System Status Procedure
OPERATION
RESULT

SYS display is reached.
No response.

position.
The displays present system status in the

following format:
SsXx
Cc
S is the marker for the slave vital serial link.
s may be one of the following:
U slave link not defined
1 slave link up
0 slave link down
X is the marker for the cross lighting serial link.
x may be one of the following:
U
i
o
b
cross lighting serial link not defined

cross lighting input active
cross lighting output active
cross lighting input and output both active
C is the marker for the configuration data in the

system EEPROM. c may be one of the following:
0 configuration bad; defaults in use
1 good configuration
The displays are repeated and dynamically
updated as the system changes.
3
4-4

position.

SM 6470B, Rev. 1, April 2008

4.2.3.
Display Events
This function displays errors/warnings, track occupancy, bad messages, and user-defined events.
For errors and related diagnostic information, it supplements the basic error code data obtained
with the Display Status function.
Table 4-2.
STEP
Display Events Procedure
OPERATION

EVNT display is reached.

position.
RESULT
No response.
DDHR
xxxx
MNss
xxxx
These terms show the date and time of the first
event to be displayed. DD=day, HR=hour,
MN=minute, and SS-second.
After the date/time displays, the first event code
logged will be displayed. The general format of
the code is as follows:
aa bb
cc dd
aa is byte 0, the basic event reference number.
Events are listed in Section 6 by these numbers.
All events are referenced by this number.
If the event has a second level description, bb
(byte 1) provides this description. Similarly, if the
event has third and fourth level descriptions, ee
and dd (bytes 2 and 3) provide these descriptions.
If the second event has been logged, the display
will repeat the above cycle starting with a new
date/time and code. When the last event has
been displayed, the system will return to the first
logged event and repeat the entire cycle.
To clear all logged events (optional) use the Clear

Logs function described in Section 3.4.1.
No response.

position.

SM 6470B, Rev. 1, April 2008
4-5

4.2.4.
Display Configuration
This function displays the on-site configuration data loaded with a portable PC. These data
include factory pre-defined items and user-defined items (see Section 6 for a listing of these
items). Items with a zero value will not be displayed.
Table 4-3.
STEP
Display Configuration Procedure
OPERATION
RESULT

CONF display is reached.
No response.

position.
The displays should show the configuration data

in the following format:
B#bb
V=vv
B may be P for a pre-defined item, or U for a userdefined item.
bb is the bit number in hexadecimal form. Refer
to Section 6 for a listing.
vv is the bit value in hexadecimal.
The displays are repeated until the function is
exited.
4-6

position.

SM 6470B, Rev. 1, April 2008

4.2.5.
Display Status
NOTE
This function shows the status of the tracks (A and B) and stored error messages covering all
system functions. Section 6 gives a detailed listing of basic error messages. The Display Events
function provides more detailed information on the possible causes of basic error codes.
Table 4-4.
STEP
Display Status Procedure
OPERATION
RESULT

STAT display is reached.
No response.

position.
One or more sets of data (variable numbers)

should be repeated in the following manner:
axby
eenn
Display position ax shows the track A side, while
by shows the track B side.
Display positions a and b display the code being
transmitted and received.
lower-case letters - See Figure 5-2 for a
description of the letters associated with each
track code. Received codes are shown in uppercase, while transmitted codes are shown in lowercase. See Figure 1-3 for a description of the
letters associated with each track code.
Display positions x and y show the state of the
respective track. Codes include S for shunt, R for
remove shunt, and N for normal.
Display position ee shows a number that
represents a particular error code. These codes
are listed in Section 6.
Display position nn indicates the number of times
that the associated ee error code was logged.
When 0000 appears in display positions eenn, the
error code listed is concluded.
The displays are repeated until the function is
exited in Step 3.

position.
SM 6470B, Rev. 1, April 2008

4-7

4.2.6.

NOTE
Table 4-5.
STEP
OPERATION
RESULT

MARG display is reached.
No response.

position.
The displays should show receive signal strength

for each track in the following manner:
sm11
pppp
s is track side A or side B.
m is the track operating mode:
S Shunt
R Remove shunt
N Normal
11 is the track length in 1000-ft increments,
ranging from 00 to 36.
pppp is the percentage of shunt. Generally, the
on display). The display is dynamically updated,
showing signal strength of the last message
received. The display continuously toggles
between track A and track B until the function is
exited in Step 3.
4-8

position.

SM 6470B, Rev. 1, April 2008
4.3. System Monitoring via a PC

NOTE
The real time clock, display configuration, open log file, restart
program, and exit functions are identical to those used in the
Configuration program. Refer to Section 3.2 for detailed
information on these functions.
This section gives procedures for on-site monitoring of the MICROTRAX unit using a PC,
including selected hardware and software (executive and application) functions in real time.
Available functions include:
Read and set real time clock
Display current or default configuration
Get logged events and errors
Dynamic display
Memory display
Open log file
Restart program
Track Data
Exit
4.3.1.
Initial Setup
1. If the system is OFF, turn the power ON and following the power up reset, the CPU
module should show a scrolling US&S MICROTRAX and the current software revision
number or if the unit will not come out of reset, turn "On" the power and do the
following:
a. Hold down the MODE switch on the CPU until RES MENU is displayed.
b. Toggle the MODE switch down until PC LINK is displayed.
c. Push down the ENTER switch. The display will cycle and display WAIT CNFG.
2. When the system is powered and operational, connect the null modem cable between
the PC and the MICROTRAX unit, turn the PC ON, and run the MICROTRAX program
TRXMONTR.
SM 6470B, Rev. 1, April 2008
4-9

First PC Screen Display: MICROTRAX Unit
M I C R O T R A X
Version 3.00
Communication Cable Connected To - -> COM2 :
MICROTRAX
Baud Rate
- -> 4800 BPS
Is the information correct
('Y' OR 'N') ?
Y - to run program
N - to change selection
3. Answer (Y) or (N) to the prompt, as required. If (Y) is selected, the application starts (go
to Step 4. If (N) is selected, the communications port and baud rate must be selected.
a. Select the communications port to use.
Second PC Screen Display: MICROTRAX Unit
M I C R O T R A X
MONITOR
Version 3.00
Select Communication Port:
[ Current Selection is - -> COM2 : ]
1 - Communication Port 1 (COM Port 1)
2 - Communication Port 2 (COM Port 2)
Enter 1 or 2 for the available Communication Port - ->
b. Select the baud rate that agrees with the setting on the CPU module.
Third PC Screen Display: MICROTRAX Unit
M I C R O T R A X
MONITOR
Version 3.00
Select Baud Rate:
[ Current Selection is
1 1200
2 4800
Enter 1 or 2 for the correct baud rate - ->
4-10
-> 4800 BPS ]
SM 6470B, Rev. 1, April 2008

c. The selected PC communications port and baud rate are then displayed for
verification.
4. As instructed, connect the communications cable to the selected port.
Communications Link-Up Active
M I C R O T R A X
MONITOR
Version 3.00
Connect Cable to COM2:
MICROTRAX

02-21-02
15:47:57
unit
Current PC Time:
02-21-02
15:47:58
5. Press any key to continue onto the main menu.

Monitor Program Main Menu
M I C R O T R A X
MONITOR
Version 3.00
Select a command
0
1
3
5
7
9
x
Enter
restart program
get events
configuration display
memory display
track data
exit
a Command -->
SM 6470B, Rev. 1, April 2008
2
4
6
8
set real time clock

get errors
dynamic display
open log file
4-11

4.3.2.
Get Events Command (3)
This command loads and displays recorded events and includes a description with each. (Refer
to Section 6 for a complete listing of logged events.) When the command is entered, there will
be a brief delay as event items are retrieved and the message Uploading Event Information will
be displayed. The computer uploads 11 parts of information (part 1 of 11, part 2 of 11, etc.).
The first column indicates the sequence of the events in numerical order since the last access
to the events file. The second and third columns indicate the date and time of each event. The
fourth column lists the descriptions of each event.
Get Events Sample Display
1
2
02/22 10:08:08
02/22 10:08:09
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
02/22
02/22
02/22
02/22
02/22
02/22
02/22
02/22
02/22
02/22
02/22
02/22
02/22
02/22
02/22
02/22
4-12
10:08:10
10:08:12
10:08:22
10:08:24
10:08:56
10:08:57
10:08:58
10:08:58
10:09:02
10:09:04
10:09:05
10:09:16
10:09:46
10:09:49
10:09:58
10:10:01
Errors Cleared
Warning
Vital Link Stale Date Timer e x p i r e d
Slave Remove Shunt
Master Remove Shunt
Slave Normal
Master Normal
Bad Guard
Bad Guard
Master Bad Message TO Time Out
Slave Bad Message TO Time Out
Bad Guard
Master Shunt TO Time Out
Slave Shunt TO Time Out
Minimum Area TO Time Out
Slave Remove Shunt
Master Remove Shunt
Slave Normal
Master Normal
01 85 F1 AC 00
71
71
53
54
71
42
44
81
0B
29
83
83
20
83
83
01
06
16
00
00
11
00
00
16
C6
BB
00
00
33
00
00
8A
00
00
00
00
00
00
00
00
SM 6470B, Rev. 1, April 2008

4.3.3.
Get Errors Command (4)

NOTE
Error number $81 is not actually an error code. It is used to
indicate the total number of events that have been logged. This
ranges from 0 to 255 (HEX 00 to FF).
This command loads and displays a summary of recorded errors by error code, count and
description. In the example shown, the first column indicates the error number in decimal
format.
The second column indicates the error number in hexadecimal format. The hexadecimal format
is used when the error codes are displayed on the CPU alphanumeric displays (refer to Section
4.2.5). This format is also used in Section 6 where the error codes are described in detail. On
this display, every error code has a $ prefix which does not appear on the CPU module display.
The third column specifies the number of times the error has occurred. This count ranges from
1 to 240, and will remain at 240 if a particular error occurs more than 240 times.
The fourth column lists the descriptions of each error. Refer to Section 6 for the complete list of
MICROTRAX error codes.
Get Errors Sample Display
116
129
133
176
179
4.3.4.
($74)
($81)
($85)
($B0)
($B3)
1
31
3
1
1
Output Error Count

- Lamp
EVENT COUNTER
Vital Link Stale Data Timer
Filament Failure slot 1
Filament Failure slot 1
I/O - slot 1 head 1

Expired
head 1 RED aspect
head 2 RED aspect
Dynamic Display (6)
The Dynamic Display command provides several accessing and monitoring functions. It may be
used to display up to 40 application logic data bits, and it dynamically updates the status of these
bits in real time as the MICROTRAX system operates. This command may also be used to open the
debug file generated when the application logic was compiled (refer to SM 6470A). The debug
file is used to associate the names with the application bits that are being monitored. This
command also allows the monitoring information to be written to a log file.
When the Dynamic Display command is entered, the screen displays a sub-menu for this
particular program.
SM 6470B, Rev. 1, April 2008
4-13

Dynamic Display Command Sub-Menu
M I C R O T R A X
MONITOR
Version 3.00
Current Debug File:
no file
Select a command
1
3
x
bit display
open debug file
exit
Enter a command
2
8
free run
open log file
==>
4.3.4.1. Bit Display Command (Dynamic Display Menu Item 1)
When sub-menu item 1 (Bit Display) is selected, the screen first shows the 40-bit display limit
and three prompts. As indicated, (A) adds bits to the display, (R) removes bits from the display
and (X) ends the bit display.
When any key is pressed, the initial bit display appears. The first column lists individual bits
by number. The second column gives the user-defined name of each bit. When (A) is entered, a
prompt for bits to be added appears on the screen.
Bit Display Initial Screen
LOGIC ACTIVITY DISPLAY
Up to 40 bits may be displayed at one time
Press A to add bits to the display
Press R to remove bits from the display
Press X to end the bit display
Press any key to continue, X to abort
In this sample bit display data screen, 1-32 was entered, which indicates that the values of
application logic bit numbers 1 through 32 will be monitored.
NOTE
If a debug file had been entered, the actual application bit names
would have been displayed (instead of names) of the form
BITNUMBER xxx.
4-14
SM 6470B, Rev. 1, April 2008

Sample Bit Display
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
BITNUMBER001
BITNUMBER002
BITNUMBER003
BITNMUBER004
BITNUMBER005
BITNUMBER006
BITNUMBER007
BITNUMBER008
BITNUMBER009
BITNUMBER010
BITNUMBER011
BITNUMBER012
BITNUMBER013
BITNUMBER014
BITNUMBER015
BITNUMBER016
BITNUMBER017
BITNUMBER018
BITNUMBER019
BITNUMBER020
set
set
clr
clr
clr
set
clr
clr
clr
set
set
clr
clr
clr
set
clr
clr
clr
clr
clr
21
22
23
24
25
26
27
28
29
30
31
32
BITNUMBER021
BITNUMBER022
BITNUMBER023
BITNUMBER024
BITNUMBER025
BITNUMBER026
BITNUMBER027
BITNUMBER028
BITNUMBER029
BITNUMBER030
BITNUMBER031
BITNUMBER032
clr
clr
clr
clr
clr
clr
clr
clr
clr
clr
clr
clr
4.3.4.2. Free Run Command (Dynamic Display Menu Item 2)
When sub-menu item 2 (Free Run) is selected, the screen displays a free running list of the
application logic bits as they change. The system stable indication specifies when the system
logic has become stable and outputs will be delivered. The clock times give a reference as to
when bit values have changed. A time is associated with the logic that appears on the screen
before the time.
The (B) option can be used to select which bit values will be displayed on this screen. The (C)
option clears the screen of all currently displayed information. If a log file has been opened, data
from free run will be written to the log file. In this screen, the debug file was opened and the
actual bit names displayed.
SM 6470B, Rev. 1, April 2008
4-15

Sample Free Run Display
Bit
Bit
Bit
10:19:35
Bit
Bit
Bit
Bit
Bit
Bit
Bit
10:19:42
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
10:19:52
76
40
40
S2. LAMP2
S1. LAMP2
S1. LAMP2
is
is
is
set
clear
set
147
147
28
42
76
26
40
F
F
C1.Y2
S1.Y2
S2.LAMP2
C2.LAMP2
S1.LAMP2
is
is
is
is
is
is
is
set
clear
clear
clear
clear
clear
clear on timer queue system stable
147
147
147
28
42
76
26
40
F
F
F
X1.Y2
S1. Y2
S2. LAMP2
C1.LAMP2
S1.LAMP2
is
is
is
is
is
is
is
is
clear
set
set clear on timer queue
set
set
set clear on timer queue
set
clear on timer queue system stable
4.3.4.3. Open Debug File Command (Dynamic Display Menu Item 3)
When this sub-menu item is selected, the user is prompted for the name of the debug file created
by the MICROTRAX development system (filename.TDG) when the application program was
compiled. This file contains the user-defined names of the application logic bits. After the
debug file name has been entered, the actual names of the bits can be referenced on the Bit
Display and Free Run screens.
4.3.4.4. Open Log File Command (Dynamic Display Menu Item 8)
This is the same type of menu function available in the main Configuration and Monitor menus.
It is provided in the sub-menu for dumping dynamic display information to a user-defined file.
Refer to Section 3.2.7 for the format and use of this function.
4.3.4.5. Exit Command (Dynamic Display Menu Item X)
This command takes the program out of the Dynamic Display mode and returns the display to
the Main Monitor Menu.
4-16
SM 6470B, Rev. 1, April 2008

4.3.5.
Memory Display Command (7)
This command is used to dump memory from selected parts of the MICROTRAX CPU RAM. It is
intended for system diagnostics and should be used in consultation with a US&S engineer.
These addresses are between 8000H and FFF0H. A typical display is shown below.
Sample Memory Display
M I C R O T R A X
MONITOR
Version 3.00
Perform a memory dump
Enter starting address
Enter Ending address
Enter ending address
($800 --> $FFF0)
==>
$?
800
(or press return for 256 byte page dump)

$? 900
0800
01
00
00
00
00
4E
01
00
F0
21
B0
29
A4
01
9B
E4
0810
24
6C
0F
82
01
ED
ED
00
DA
00
B6
03
04
00
0A
33
0820
03
03
03
93
0A
00
00
00
DA
00
01
07
00
00
03
00
0830
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
0840
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
0850
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
0860
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
02
0870
D0
02
D4
02
00
00
B4
00
B5
00
80
00
00
00
00
00
0880
00
00
14
03
00
04
00
00
0F
00
FF
00
00
03
00
00
0890
00
00
00
26
F9
26
F9
00
00
04
04
IF
00
00
19
D1
08A0
0B
F0
A4
14
00
00
00
00
00
00
00
00
00
00
00
02
08B0
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
08C0
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
08D0
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
08E0
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
08F0
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
Press a key when ready to continue
SM 6470B, Rev. 1, April 2008
4-17

4.3.6.
Track Data (9)
Executive software revisions three and higher, and Development System version 3.00 and
higher, provide a Track Data menu option. This option displays the current track margin and
number of shunts logged. Numbers for both the Master (A) Track and Slave (B) Track are
displayed. This display is not dynamically updated.
The track margin is the same as the numerical display on the CPU Module display menu
(DISP MENU) item. These numbers represent the percentage of shunts. A reading of 100% is
the shunt limit. Any message over 100% is acceptable, while any message below 100% causes a
shunt. The percentage received is the value from the last message received. If the unit is not
receiving messages, the number will be zero.
The number of the shunt counter is simply the number of times that a track has declared a shunt.
This counter is cleared when the CLR LOG function is executed from the CPU Module front
panel (refer to Section 3.4.1).
Track Parameters
TRACK PARAMETERS
Track Margins
4-18
Number of Shunts
Master Track (A)
109%
Slave Track (B)
206%
SM 6470B, Rev. 1, April 2008
4.4. System Restoration Following a Failure

The MICROTRAX system will generate errors and warnings in response to a system problem. All
errors generated by the MICROTRAX system have the same effect. The error code is logged and
the system performs a reset. When a critical error occurs, the system goes through the power-up
reset process (all outputs are de-energized, and the system starts over).
When a warning occurs, the system may continue to operate. For example, if a microprocessor
diagnostic fails, a critical error is logged and the system resets. However, if a colorlight filament
failure is detected, a warning is logged stating that a filament has failed and the system continues
to operate.
When an error or warning occurs, two different actions transpire: First, the error/warning counter
is incremented to indicate the number of times this error/warning has occurred. Second, an event
is logged with information about the error/warning.
Two different types of warnings exist in the MICROTRAX system: Dynamic and Static. When a
static warning happens, an event is logged indicating the warning occurred. When a dynamic
warning occurs, an event will be logged only if another event for the same warning has not
previously been logged. For example, when a colorlight filament failure is detected, a warning is
logged. The diagnostic that detects the filament failure runs very frequently. If an event were
logged every time that diagnostic failed, the event queue logging area would fill very quickly.
To prevent this, the filament failure warning is defined as a dynamic warning, and will only be
logged once.
4.4.1.
MICROTRAX
Shutdown and Reset
The MICROTRAX Unit will enter one of two possible modes when a persistent critical failure is
detected: Selective Shutdown mode or Full Shutdown mode. This section describes how to
restore unit operation in the event the unit enters either mode.
NOTE
When replacing the CPU module with a spare, make sure to
transfer the system application EPROM to the replacement
module.
4.4.2.
CPU Module Reset Sequence Displays
When a failure occurs or after the problem causing the failure has been corrected, the unit will go
through a reset process. During the unit reset process, several internal tests are performed to
verify the integrity of the overall system. Throughout the steps that follow, the displays on the
CPU module identify which diagnostic is being performed:
SM 6470B, Rev. 1, April 2008
4-19

1. The first action performed is a set of microprocessor diagnostics. These diagnostics
verify that the microprocessor is capable of running correctly. If these diagnostics pass,
the upper display will show RES. If the display does not show RES, the microprocessor
may be faulty.
2. The next action is a RAM test. At the start of this test, the displays will show RES
RAM. This test verifies all RAM in the system. If this message does not appear, or only
appears very briefly, then there may be a memory problem.
3. The next diagnostic performed is an EPROM test. At the start of this test, the displays
will show RES PROM. If this does not appear, the fault may be related to the EPROM.
The displays must be watched very carefully because information may only appear very
briefly. For example, if the PROM test fails at the very beginning, it may be difficult to
see the RES PROM message. It may appear that the system is still doing the RAM test.
4. The next test performed is the bus test. During this test, the bus is verified to make sure
that the correct modules are installed for the application and that no extra modules are
present. During this test the displays will show RES BUS. However, if an incorrect
module is installed, this message will only be displayed for an instant. The display must
be watched very carefully for this message.
It is difficult to determine if an error is occurring during the PROM or the BUS test. To
verify which test is failing, watch the LEDs on the CPU Module. LED #3 (green) flashes
at the beginning of the BUS test. The instant the display changes from PROM to BUS,
the green LED is flashed. If this LED does not flash, the PROM test has failed. If it
does flash, the BUS test has failed.
5. After the bus has been verified, time is allotted for the picking of the CPS. During this
time, the display will show RES CPS. At the same time, output monitors are read to
verify that no output is turned "On." After sufficient time has elapsed for the CPS to
pick, the system then goes into an operational mode.
If the CPS test starts, this indicates the correct input/output modules are installed in the
cardfile. If the unit fails after the CPS test starts, it is likely that an I/O module is faulty,
or there is an external I/O problem, or the VCOR is faulty.
4-20
SM 6470B, Rev. 1, April 2008

4.4.3.
Restoration From Selective Shutdown Mode
When the unit is operating in the Selective Shutdown mode, all front panel LEDs will be
normal, except for the FAILOVER LED on the System Power Supply Module. This LED will
be dark, indicating that the VCOR is dropped.
To identify the type of failure and attempt a restart, perform the following steps:
Table 4-6.
STEP
1
Restore from Selective Shutdown Procedure
OPERATION
Check the LEDs on the Track Module during a
communication sequence.
RESULT
If LEDs on either end are not flashing, check track
polarity and communications per Section 3.3.
Fault could also be with the CPU, System Power
Supply, or Track Module itself. Replace these
modules to isolate the faulty module. Note: Power
must be turned off each time a module is
replaced.
If the Track Module LEDs indicate good
communications, the fault may be with a lamp or
logic output.
Use the Display Status function (Section 4.2.2) to

read error codes and determine if any I/O errors
have been logged.
When all checks and repairs conducted in steps 1

and 2 are complete, press the RESET button on
the CPU module. As soon as RES appears on
the upper display, hold down any of the four
toggle switches until RES MENU appears.
Replace modules as required to isolate the faulty

unit.
Note: Turn off system power each time a module
is replaced. If a suspected module is replaced, go
to step 3 and reset the system. If error codes are
still displayed after restarting the unit, check all
wiring and equipment external to the MICROTRAX
unit.
Holding the toggle switch puts the system into the
special Reset Menu. Refer to Section 4.5 for
detailed instructions on the use of this menu. If
the toggle switch is not pressed in time, the
displays will run through the reset sequence.
Note: Refer to Section 3.1 for a detailed
description of the reset sequence CPU displays
and related problem indications.
Toggle the MODE switch in the DOWN position

until CLR/CPS appears on the display.
No response.

position.
If the system is operating properly, the displays

should run through the reset sequence and the
system should return to normal operation. If the
system is not restored, continue with the
troubleshooting instructions given in remaining
sections.
SM 6470B, Rev. 1, April 2008
4-21

4.4.4.
Restoration from Full Shutdown Mode
When a unit is in the FULL SHUTDOWN mode, the following indications will appear on the
front panel:
CPU:
The STATUS 1 LED will be dark

The WATCHDOG LED will be dark
The four-character displays will show:
DOWN
eeOO
ee is the ID code of the error that caused the system to

enter the Non-Operational mode. (Refer to Section 6
for error code listing.)
System Power
Supply:
The FAILOVER LED will be dark (VCOR)
To identify the type of failure and attempt a restart, perform the following steps:
Table 4-7.
Restore from Full Shutdown Procedure
STEP
OPERATION
Use the Display Status function (Section 4.2.5) to

read error codes and determine if any I/O errors
have to be logged.
When all checks and repairs conducted in Step 1

are complete, press the RESET button on the
CPU module. As soon as RES appears on the
upper display, hold down any of the four toggle
switches until RES MENU appears.
RESULT
Replace modules as required to isolate the faulty
unit.
Note: Turn off system power each time a module
is replaced. If a suspected module is replaced, go
to Step 3 and reset the system. If error codes are
still displayed after restarting the unit, check all
wiring and equipment external to the MICROTRAX
unit.
Holding the toggle switch puts the system into the
special Reset Menu. Refer to Section 4.5 for
detailed instructions on the use of this menu. If
the toggle switch is not pressed in time, the
displays will run through the reset.
Toggle the MODE switch in the DOWN position

until CLR/CPS appears on the display.
No response.

position.
If the system is operating properly, the displays

should run through the reset sequence and the
system should return to normal operation. If the
system is not restored, continue with the
troubleshooting instructions given in remaining
sections.
4-22
SM 6470B, Rev. 1, April 2008
4.5. Use of the Reset Menu

4.5.1.
Initial Access
A special Reset Menu is available to test and run the MICROTRAX system while the system is in a
reset condition. This menu can only be accessed by manually resetting the system.
Table 4-8.
Manual Reset Procedure
STEP
OPERATION
Press the RESET button on the CPU module. As

soon as the RES button appears on the upper
display, hold down any of the four toggle switches
until RES MENU appears.
RESULT
The display should change from the scrolling
US&S MICROTRAX and software revision
number to the indicated displays. If the toggle
switch is not pressed in time, the displays will run
through the reset sequence.
Toggle the MODE switch in the DOWN position to

select the desired Reset Menu item.
CPU Module displays:

DISP (Display Errors)
ERRS
DISP (Display Events)
EVNT
CLR
CPS
(Clear Conditional Power Supply)
COLD (Cold Reset)

RES
3
To cycle back through this menu, hold the MODE

switch in the UP position
No response.
To exit from the Reset Menu, press the RESET

button.
The display runs through the reset sequence.
SM 6470B, Rev. 1, April 2008
4-23

4.5.2.
Display Errors
This function displays all logged errors and warnings. The same data is accessible using
the Display Status function when the system is not in reset (refer to Section 4.2.2). Refer to
Section 6 for a complete listing of error messages.
Table 4-9.
Display Errors Procedure
STEP
OPERATION

RESULT


position.
The displays will cycle through the complete log of

error messages in this format:
DISP (Display Errors)

ERRS
ERR
Eenn
ee is the error number. Refer to Section 6 for a
definition.
nn is the number of times the associated error
was logged.
4-24
SM 6470B, Rev. 1, April 2008

4.5.3.
Display Events
This function displays all logged events. Refer to Section 6 for a complete listing of logged
events.
Table 4-10. Display Events Procedure
STEP
OPERATION




position
The first two displays should appear as:
RESULT
DISP (Display Events)

EVNT
DDHR
xxxx
MNSS
xxxx
These terms show the date and time of the first
event to be displayed.
After the date/time displays, the first event code
logged appears. The general format of the code
is:
aa bb
cc dd
aa is byte 0, the basic event reference number.
Events are listed in Section 6 by these numbers.
All events are referenced by this number.
If the event has a second-level description, bb
(byte 1) provides this description. Similarly, if the
event has third- and fourth-level descriptions, cc
and dd (bytes 2 and 3) provide these descriptions.
If a second event has been logged, the display will
repeat the above code starting with a new
date/time and code. When the last event is
displayed, the system will return to the first logged
event and repeat the entire cycle.
SM 6470B, Rev. 1, April 2008
4-25

4.5.4.
Clear CPS
This function attempts to restore the system conditional power supply during a reset condition. It
is typically used to run the complete MICROTRAX system during troubleshooting.
Table 4-11. Clear CPS Procedure
STEP
OPERATION

RESULT


position.
If the system is operating properly, the display

should cycle once as follows:
CLR
CPS
(Clear Conditional Power Supply)
RES
RAM
RES
PROM
RES
BUS
RES
CPS
The display should resume scrolling US&S
MICROTRAX. At the same time, the FAILOVER
RELAY LED on the System Power Supply Module
should light, indicating the CPS is up.
If there is a persistent problem, the above display
will repeat five times, followed by a system reset
in the shut-down mode.
4-26
SM 6470B, Rev. 1, April 2008

4.5.5.
PC Link
This function is used to enable the serial data port on the CPU Module when the system is in a
reset condition. It allows on-site connection of a portable PC for system diagnostics and
reconfiguration. (Refer to Section 4.3 and 4.4.)
Table 4-12. Enable Serial Data Port Procedure
STEP
OPERATION
RESULT




position.

PC (Clear Conditional Power Supply)

LINK
RES
RAM
RES
PROM
WAIT
CNFG
The PC is then ready to receive inputs via the
laptop PC.
NOTE
If the unit fails to enter WAIT CNFG mode when using the Reset
Menu-PC link feature, the likely cause of the error is the CPU
Module itself. To enter this mode, only components on the CPU
Module are tested.
Verify both the Executive and Application EPROMs. If
unsuccessful in entering the PC link mode, replace the CPU
Module. Make certain the correct EPROMs are installed on the
replacement module.
SM 6470B, Rev. 1, April 2008
4-27

4.5.6.
Cold Reset
NOTE
Be careful with the use of the COLD RES function. All logged
events and errors will be lost. Be sure to examine errors and
events before using this feature.
This function is used to reset the system such that all data stored in CPU RAM is cleared. This
includes clearing logs and clearing CPS.
Table 4-13. Cold Reset Procedure
STEP
OPERATION

RESULT


position.

COLD
RES
(Cold Reset)
RES
RAM
RES
PROM
RES
BUS
RES
CPS
Then the display should return to the scrolling
US&S MICROTRAX, indicating that the reset was
executed.
At the same time, the FAILOVER LED on the
System Power Supply Module should light,
indicating the CPS is up.
If there is a persistent problem, the above display
will repeat five times, followed by a system reset
in the shut-down mode.
4-28
SM 6470B, Rev. 1, April 2008
4BMICROTRAX Coded Track Applications
5.
MICROTRAX Coded Track Applications
This section provides illustrations and written explanations of some typical applications of the
MICROTRAX Coded Track Unit. Figure 5-1 illustrates a MICROTRAX unit internal detail and
external wiring of a typical repeating cut location. Figure 5-2 illustrates a MICROTRAX unit
internal detail and external wiring of a typical intermediate colorlight signal location.
5.1. Track Connections
Track wires from the rail (via the track interface panel) are connected to the right terminal block
(TB3) on the MICROTRAX unit. These track connections are designated Master and Slave and (+)
and (). The Slave connections are terminals 1() and 2(+) and the Master connections are
terminals 3() and 4(+).
NOTE
To make the track circuit operational, either side of an insulated joint can be designated as
Master (or Slave); however, the opposite end must then be designated as Slave (or Master). Each
track circuit must have both a Master and a Slave. In addition, polarity must be staggered across
the set of joints. Figure 5-1 and Figure 5-2 illustrate this with the West track being the Master
side and the East track being the Slave side.
5.2. COLORLIGHT SIGNAL CIRCUIT
Figure 5-2 illustrates a typical MICROTRAX colorlight control circuit. In this application, the
West signal is driven by a Colorlight Lamp Driver Module in slot #1 and the East signal is driven
by a Colorlight Lamp Driver Module in slot #2.
When a module is assigned to slot #1, the external wiring connects to the left-hand connector
(TB1). When a module is assigned to slot #2, the external wiring connects to the center
connector (TB2). Note that the designer of the typical circuit assigned the west signal to Module
#1 and the east signal to Module #2, however the signals could also have been driven from the
opposite modules.
In the example, the west signal is a two headed signal. Each Colorlight Lamp Driver Module is
capable of driving two signal heads. Module #1 Head 1 controls the green/yellow/red aspects
and Head 2 controls the lunar aspect. The east signal has only one head and is controlled by
Head 1 of the second module.
SM 6470B, Rev. 1, April 2008
5-1
1
inches.
1
1
Figure 5-1. Typical MICROTRAX Repeater
5-2
SM 6470B, Rev. 1, April 2008
1
1

Figure 5-2. Typical MICROTRAX Intermediate Signal (Colorlight)
SM 6470B, Rev. 1, April 2008
5-3

For the west Colorlight Lamp Driver Module, the application designation within the software
application program (see programming manual SM-6470A) would be as follows:
BOARD 1
COLOR.LIGHT: West
HEAD 1
LAMP:
ASPECT:
LAMPOUT:
HEAD 2
LAMP:
ASPECT:
LAMPOUT:
WALITE
WDG, WHG, WRG
WGLO,WYLO,WRLO
WBLITE
WBLG
WBLLO
These software designations determine which connector pins have voltage applied when an
equation is valid. For example, when lamp and aspect equations on BOARD 1, HEAD 1 are
valid, voltage is applied to pins 15 through 18 on the cardfile left connector (TB1). BOARD 1,
HEAD 2 is associated with pins 9 through 12 of the left connector (TB1). A BOARD 2 software
designation would be related to the center connector (TB2). Therefore, a BOARD 2, HEAD 1
software designation would control voltage to pins 15 through 18 of the center connector (TB2).
The configuration of I/O modules (boards) and BOARD designations in the application software
are totally flexible and are assigned by the application engineer.
As information, pins 15 and 9 (common leads to each signal head) are the positive (+) voltage
from the MICROTRAX unit.
The Colorlight Lamp Driver Module also has two isolated (double-break) inputs available.
These may be used as any external or internal inputs (such as an NWP and RWP input from a
hand throw switch). The pin-outs shown are directly related to designations in the application
software. For example, voltage present on pins 4 and 5 is read as a defined valid input #1 in the
software. Voltage present on pins 1 and 2 is read as a defined valid input #2. For example,
assume the colorlight module (board) is defined, in part, as follows:
BOARD 1
COLOR.LIGHT: XYZ
HEAD 1
LAMP:
ASPECT:
LAMPOUT:
INPUT:
A;
B;
C;
1NWP, 1RWP
When voltage is present across pins 4 and 5, the application program would read 1NWP.
Voltage across pins 1 and 2 would be read as 1RWP.
5-4
SM 6470B, Rev. 1, April 2008

The MICROTRAX Unit is the source voltage for these inputs. The voltage source is intentionally
isolated from battery to minimize the risk of grounding the battery and to maximize lightning
protection. US&S recommends that all wires external to the equipment house or case be
equipped with the following US&S lightning arresters:
Table 5-1.
Lightning Arresters
DESCRIPTION
US&S PART NUMBER
Line-to-Line Type (Blue)
N451552-0101
Line-to-Ground Type (Red)
N451552-0201
5.3. MICROTRAX Testing with Track Code Generator

The MICROTRAX track code generator allows the user to test a MICROTRAX unit without the need
of another MICROTRAX unit and the physical track. This unit is connected to the line side of the
track interface panel and has the capability of simulating either the Master and/or the Slave
side of the track under test. As shown in Figure 5-3, the Master of the track code generator is
connected to the Slave of the MICROTRAX unit and vice versa.
5.4. Searchlight Signal Circuit
Figure 5-4 illustrates a typical MICROTRAX searchlight control circuit. In this application, the
West signal is driven by a Searchlamp Driver Module in slot #1 and the East signal is driven by
a Searchlight Lamp Driver Module in slot #2. As with the colorlight module, when a module
is assigned to slot #1, the external wiring connects to the left connector (TB1); when a module is
assigned to slot #2, the external wiring connects to the center connector (TB2).
Note that the designer assigned the west signal to Module #1 and the east signal to Module #2,
however each signal could also have been driven from the other module. With this
configuration, the lamp is connected to pins 16 and 18. The mechanism coil is driven by
opposite polarity voltages on pins 16 and 17. Mechanism correspondence is checked on pin 14
with pulses from either pin 15 (for the red position) or pin 17 (for the yellow position). When
the mechanism is in the green position, mechanism correspondence pulses are brought back into
unit through a connector on the front of the searchlight board. These mechanism inputs are
labeled head 1GP and head 2GP.
SM 6470B, Rev. 1, April 2008
5-5
1
inches.
1
Figure 5-3. Typical MICROTRAX Test Box Connection
5-6
SM 6470B, Rev. 1, April 2008

1
1
Figure 5-4. Typical MICROTRAX Intermediate Signal (Searchlight)
SM 6470B, Rev. 1, April 2008
5-7

5.5. Software Considerations for Searchlight Signal Circuit
CAUTION
No attempt should be made to display red in the failed state. If the
searchlight mechanism is stuck, a less restrictive aspect should be
displayed.
The MICROTRAX Executive Software is designed to ensure that the position of the mechanism
agrees with the application logic. In the event of a disagreement, the Executive software
commands a system reset and compares the mechanism position with the application logic a
second time. This comparison process will occur a maximum of five times. If the comparison
fails a fifth time, a critical error is logged and the system removes power from all outputs (CPS
drops). Logic can continue to be processed and track codes transmitted/received based on
conditions at the location (Selective Shut-Down Mode).
5.6. Non-Isolated I/O Circuit

Figure 5-5 illustrates a MICROTRAX non-isolated input/output circuit. This application illustrates
the wiring and detailing of two inputs and outputs. As the Non-Isolated module has been
assigned to slot #2 by the engineer, the external wiring connects to the center connector (TB2).
Non-Isolated modules are used for circuits that are within the same housing as the MICROTRAX.
5.7. Isolated I/O Circuit
Figure 5-6 illustrates a MICROTRAX isolated input/output circuit. This application illustrates the
wiring and detailing of one input and output. As the isolated module has been assigned to slot
#3, the external wiring connects to the right connector (TB3). Isolated modules are used for
circuits that are external to the housing where the MICROTRAX is located (double-break circuitry).
5.8. Quick Shunt Circuit
Figure 5-7 illustrates a MICROTRAX unit utilizing a quick shunt module. This application
illustrates the wiring and detailing of the quick shunt requirements. The input from the quick
shunt is received via a non-isolated I/O module in the MICROTRAX.
5-8
SM 6470B, Rev. 1, April 2008
1
1

Figure 5-5. Typical MICROTRAX with Non-Isolated I/O
SM 6470B, Rev. 1, April 2008
5-9
5-10
1

Figure 5-6. Typical MICROTRAX with Isolated I/O
SM 6470B, Rev. 1, April 2008

1
1
Figure 5-7. Typical MICROTRAX Repeater with Quick Shunt
SM 6470B, Rev. 1, April 2008
5-11
5-12
SM 6470B, Rev. 1, April 2008
5BAlphanumeric Codes
6.
Alphanumeric Codes
CPU Module and Serial Communications Module

6.1. CPU MODULE ERROR CODES
6.1.1.
Critical Errors
NOTE
These codes apply to ALL SYSTEMS.
Table 6-1.
NO.
NAME
Critical Errors
DESCRIPTION
TROUBLESHOOTING
Executive Error
Refer to Section 6.5.1.
Task Scheduling
Executive task not scheduled correctly.
System logic possibly overloaded.
Invalid CPS Key
During reset, status of CPS is determined;

Run with CPS up, or run in selective
shutdown. Implies unit cannot determine
CPS state.
I/O Bus Error
Generic I/O bus error.
Verify correct I/O modules installed.

If error repeats, I/O module may be
faulty.
Board Type Error
Wrong module (board) installed.
Same as Error 6.
Board Echo Error
Every I/O board access verified by echo

register. This error: After a board was
accessed, echo register did not contain
correct information.
Same as Error 6.
Sleep Failure
The GOTO.SLEEP was set, but the unit

failed to enter the Sleep Mode.
Faulty or missing Sleep Mode

Module.
10
Double Store RAM
Most critical variables stored in two RAM

locations. When variable is needed, both
copies checked to verify a match. This
error: One RAM copy corrupted.
11
Reset RAM Test Failure
During reset, RAM diagnostics detected

faulty RAM. If error cannot be cleared,
RAM chips may have failed.
Inspect CPU module circuit board

for damaged RAM chips.
12
Valid Interrupt Request
Microprocessor received interrupt from

unknown source.
CPU module may be faulty. Refer

to Section 6.5.1.
13
Invalid Fast Interrupt

Request
Same as Error 12, except different

interrupt level.
Same as Error 12.
14
Illegal Interrupt
Unused interrupt on microprocessor

generated an interrupt.
CPU module may be faulty. Refer

to Section 6.5.1.
SM 6470B, Rev. 1, April 2008
6-1
NO.
NAME
DESCRIPTION
TROUBLESHOOTING
15
6809 Addressing Bus
One of the microprocessor diagnostics

verifies integrity of address bus. This
error indicates address bus test failed.
If error repeats, fault may be

hardware failure on address bus. If
error happened only once, refer to
Section 6.5.1.
20
Track Decode Called:

Receiver Active
Track message decode attempted while

message was still being received.
21
Track Transmit Called:

Track Receiving
Track message transmit attempted while

message was still being received.
22
Track Receiver Called:

Track Transmitting
Track receiver turn on attempted while

track transmission in progress.
23
Track Transmitter and

Receiver Both Active
Transmitter and receiver for the same

track both turned on.
24
Track A: Transmit and

Receive Levels Drift
Transmit and receive levels not drifting the

same amount.
Temperature problem. Fault in

Track Interface Module
25
Track B: Transmit and

Receive Levels Drift
Same as Error 24, but on B side.
Same as Error 24.
26
Track A Levels
Out of Range
During side A transmitter and receiver

check, level out of tolerance.
Fault in Track Interface Module.
27
Track B Levels
Out of Range
Same as Error 26, but on B side.
28
Track Receive
Levels Bad
During track diagnostics, A and B receiver

levels out of tolerance.
29
Track Transmit
Levels Bad
During track diagnostics, A and B

transmitter levels out of tolerance.
2A
Track Monitor Failed

During Transmit
During track code transmission, monitors

verify that requested signal is being
transmitted. This error: Track monitor did
not match the requested output state.

Also may be caused by low battery
voltage.
2B
Track Monitor
Count Bad
During track code transmission, monitor

check must run fixed number of times.
This error: Monitor was not read correct
number of times.
2C
Slave Track
Diagnostics Stale
Slave track diagnostics not running at

correct interval.
30
General Diagnostics
Failure
One of the diagnostics has failed, but was

detected by main Executive. (Each
diagnostic should report its own error.)
31
Diagnostics
Number Bad
Next diagnostic scheduled to execute was

not a valid diagnostic.
32
Diagnostics Flag Bad

In Interrupt Routine
As a cross-check, the state of the

diagnostics are verified in the interrupt
routines. This error: State of error flag
found bad by an interrupt routine.
(Individual diagnostic should detect the
error before the interrupt routine does.)
6-2
SM 6470B, Rev. 1, April 2008
NO.
NAME
DESCRIPTION
TROUBLESHOOTING
33
Executive EPROM
Linear Checksum Bad
As part of system security, Executive

EPROM is verified with checksums check
during run-time. Failed checksum
suggests EPROM program change,
causing error.
Repeating error indicates EPROM

failed. If error happened only once,
refer to Section 6.5.1.
34
Executive EPROM
Linear Checksum Bad
Same as Error 33, but with BCH

checksum.
Same as Error 33.
35
Microprocessor
Instruction Test Failure
Microprocessor executes fixed set of code

and check results. If test result does not
match expected result, microprocessor
assumed to be faulty.
Repeating error indicates

microprocessor failure. If error
happened only once. Refer to
Section 6.5.1.
36
Stack Underflow
During normal operations, run-time stack

became invalid.
37
Stack Overflow

became invalid.
38
Bad Return Address

On Stack

became invalid.
39
Illegal I/O Type
Board type stored in application EPROM

is not valid with the Executive.
Possibly caused by incompatibility

problem between Executive and
Development System.
3B
Illegal Application
EPROM.
Inconsistency discovered in the

application EPROM.
Possibly caused by incompatibility

between Executive and
Development System.
3C
Illegal Timer Compares
System has two independent time

sources. These are compared to verify
absolute time. If first timer drifts, time
cannot be determined.
Faulty CPU Module timer

components.
3D
Illegal Second Time

Source Compare
Like Error 3C, Second timer not running

properly.
Same as Error 3C.
3E
Application EPROM
Linear Checksum Bad
As part of system security, application

EPROM is verified with checksums check
during run-time. Failed checksum
suggests EPROM program change,
causing error.
Repeating error indicates EPROM

failed. If error happened only once,
refer to Section 6.5.1.
3F
Application EPROM
BCH Bad
Same as Error 33, but with BCH

checksum.
Same as Error 33.
40
Outputs Stale
When application logic completes

executing all of logic changes, a timer is
started. If outputs are not delivered
before timer expires, outputs are
considered stale. Error indicates time
between system stable and output
delivery exceeded.
Most like cause is excessive

system loading (logic, timers, serial
links, etc.). Determine if error
occurs at the same time as certain
operating event. If this is
confirmed, revise the application
logic to stagger the execution of the
logic.
41
Trace Routine Not

Running
Trace routine ensures that all system

tasks running at correct rate. This error:
Trace routine has stopped running.
Check for excessive loading of the

system logic.
SM 6470B, Rev. 1, April 2008
6-3
NO.
NAME
DESCRIPTION
TROUBLESHOOTING
42
Trace Queue Overflow
Too many events placed on event queue.
Check for excessive loading of the

system logic.
43
Illegal Trace Queue
Trace queue contains an illegal entry.
44
Trace Counter Overflow
A timed event has stopped running.
Check for overloading of the

system logic. Refer to Section
6.5.1.
45
Trace Sequence Bad
Some events must happen in a specified

order. This error: Events happened out
of sequence.
47
Trace Timer
Out-of-Range
Similar to Error 44. A traceable event has

run, but not at the correct time interval.
Check for overloading of the

system logic. Refer to Section
6.5.1.
4A
No Slave Address
Vital serial defined, but not slave address

defined.
Check Slave Address section in

application logic.
4B
Bad Slave Address
Vital serial link defined, but illegal slave

address was specified.
Check slave address section in

application logic.
4C
Bad Slave Serial

Buffer Checksum
As serial message is received, its data is

placed in a buffer and a checksum is
maintained. If the checksum or buffer
becomes invalid, the checksum error
detects it.
4D
Illegal Slave Buffer
After a serial message is processed,

buffer is cleared. This error: Buffer was
not cleared correctly.
4E
Illegal Slave Baud Rate
As indicated.
Correct baud rate setting as

required. Refer to Section 6.5.1.
50
Illegal Timer Queue
When timer queue manager was

processing application logic timers, an
illegal entry was found.
51
Illegal Application
Logic Equation
As indicated.
If error repeats, recompile

application program and load into a
new PROM. Refer to Section 6.5.1.
52
Illegal Logic Scheduling
Logic equation processor scheduled, but

no logic was pending for execution.
53
Illegal Application
Logic Stack
A stack is used to execute the application

logic. This error: Stack became invalid.
If the error repeats, check

application for very long, complex
equations. If needed, reduce one
long equation to several shorter
equations. Refer to Section 6.5.1.
54
Stable System
Logic Change
When the system becomes stable, the

executive continues to execute logic
equations to verify nothing is changing.
This error: Something changed in a
stable system.
6-4
SM 6470B, Rev. 1, April 2008
NO.
NAME
DESCRIPTION
TROUBLESHOOTING
55
Illegal Application
Logic Bit Number
During logic execution, an illegal bit

number was found.
If error repeats, verify that

application program was compiled
with correct version of
Development System. Refer to
Section 6.5.1.
56
Trigger List Overflow
An attempt was made to queue too many

logic equations.
This may be the result of system

overloading. If error is related to a
certain event, examine logic and
restructure to reduce the amount of
logic that is processed at one time.
Also, examine logic to see where
most number of logic equations are
triggered. If there are large bursts
of logic execution, delay some logic
with the use of repeater relays and
timers.
57
Double Path
Logic Execution
Disagreement
Application logic executed on two different

paths using different methods. This error:
Each path arrived at different value.
58
Application
EPROM Bad
Application EPROM generated by an

incompatible version of Development
System.
Reload EPROM with correct

version of Development System.
5A
Illegal Configuration
An illegal or unimplemented configuration

was found.
Verify compiler operation. Refer to

Section 6.5.1.
5B
Bad Logic Variables
During idle loop, certain key variables are

examined to verify they are correct. This
error: Variables are corrupted.
5C
Illegal Track Input Bit
An illegal input value was found for a track

input bit.
5D
Reset CPS Time Out
Reset routine took too long to run.
60
Isolated Output Error
Bad outputs on Isolated I/O Module.
61
Isolated Output
Bit String Error
Bit string entries for isolated outputs are

invalid.
62
Non-Isolated
Output Error
Bad outputs on Non-Isolated I/O Module

in I/O slot 1.
63
Non-Isolated Output
Same as Error 62, but for I/O slot 2
Same as Error 62.
64
Non-Isolated Output
Same as Error 62, but for I/O slot 3
Same as Error 62.
65
Non-Isolated Output
Bit String Error
Invalid bit string entries for non-isolated

outputs in I/O slot 1.
66
Non-Isolated Output
Bit String Error

67
Non-Isolated Output
Bit String Error

68
Output Reference
Voltage Bad
Output voltage reference checks failed at

I/O slot 1.
SM 6470B, Rev. 1, April 2008
6-5
NO.
NAME
DESCRIPTION
TROUBLESHOOTING
69
Output Reference
Voltage Bad

I/O slot 2.
6A
Output Reference
Voltage Bad

I/O slot 3.
6B
Input Reference
Voltage Bad
Input voltage reference checks failed at

I/O slot 1.
6C
Input Reference
Voltage Bad

I/O slot 2.
6D
Input Reference
Voltage Bad

I/O slot 3.
70
Lamp Output Bit

String Error
Invalid bit string entries for outputs on I/O

slot 1 lamp driver module controlling
signal head 1.
71
Lamp Output Bit

String Error

signal head 2.
72
Lamp Output Bit

String Error

signal head 1.
73
Lamp Output Bit

String Error

signal head 2.
74
Lamp Output Error
Faulty lamp driver outputs on I/O slot 1

lamp driver module controlling signal
head 1.
75
Lamp Output Error

head 2.
76
Lamp Output Error

head 1.
77
Lamp Output Error

head 2.
79
Default
Configuration Bad
Default configuration data in unit

EEPROM is invalid. Data specified in
Standard Configuration section of
application program was illegal.
Verify that application program is

correct.
7A
EEPROM Write Error
During configuration process, EEPROM is

written with new configuration data. This
error: Writing process to device failed.
System still capable of running with
default data stored in application logic
program.
Configuration EEPROM has failed.
6-6
SM 6470B, Rev. 1, April 2008
NO.
NAME
DESCRIPTION
TROUBLESHOOTING
7B
Incompatible
Configuration
Data in the EEPROM does not agree with

related data in application logic program.
Example: Board 1 can only be search or
colorlight lamp driver module in
application program. But in configuration
data, board 1 is identified as a NonIsolated I/O Module.
Correct logic as necessary.
7E
Reset Bit Set in

Application Logic
Application logic assigned a "1" to RESET

system bit.
Examine application logic.
7F
Kill Bit Set

Application Logic
Application logic set the KILL system bit.
Examine application logic.
SM 6470B, Rev. 1, April 2008
6-7
6.1.2.
Static Warnings
NOTE
Table 6-2.
NO.
NAME
Static Warnings
DESCRIPTION
TROUBLESHOOTING
81
Error Count
Not actually a warning or error code, but

a count to indicate the number of events
logged. Permits observation of error
display to see how many events have
been logged. Normally, at least one
event always logged. Example: Under
Display Status screen, the bottom
display reads 8109. Meaning: 9 events
logged. Note: Count (09) is a hex
number. Maximum display: FF.
Not applicable.
83
Configuration
EEPROM Bad
EEPROM data is faulty, illegal, or

absent. Unit runs with default
configuration data.
Reconfigure unit. If error persists,

recompile application logic and burn
into a different EPROM.
84
Configuration EEPROM
Mismatch with
Application EPROM.
As indicated. When unit is configured,

application and Executive program
checksums stored in the EEPROM.
If application or Executive program is
changed, unit will detect configuration
data was for different application
program. If left uncorrected, unit will
run with default configuration data.
Reconfigure unit to eliminate error.
85
Slave Link/Time-Out
Link Down
Slave vital serial link has not received a

valid message in the required time and
has declared the link down. All data in
serial message is forced to 0 and system
status bit (MASTER.ON) is cleared. The
time-out is specified via application logic.
Verify cable for vital link

communication. Verify that the
MICROLOK or MICROLOK PLUS Master
is operational and scanning its
slaves at an acceptable rate.
86
System Becoming
Overloaded
System is approaching critical overload

error. (Refer to critical errors 32, 40, 41,
or 47 in Section 6.5.1.) Warning
intended to help develop and debug
large applications. If this warning
happens frequently, system is
approaching limit of processing that can
be accomplished.
Refer to indicated codes in Section

6.1.1. Restructure application logic
as required. User lower serial link
baud rates, slower flashers.
6-8
SM 6470B, Rev. 1, April 2008
6.1.3.
Dynamic Warnings
NOTE
Table 6-3.
NO.
90
NAME
Input Error
Dynamic Warnings
DESCRIPTION
Faulty input #1 on a Non-Isolated I/O
Module (forced to 0). I/O slot 1.
Faulty input #1 on a Color or Searchlight
91
Input Error

TROUBLESHOOTING
Likely cause is a faulty Non-Isolated
Module, or a Color or Searchlight
Module.
Module.
92
Input Error

Module (forced to 0). I/O slot 1
Likely cause is faulty Non-Isolated

I/O Module. Refer to Section 6.5.2.
93
Input Error

Module (forced to 0). I/O slot 1

94
Input Error


Module.

95
Input Error


Module.
96
Input Error


97
Input Error


98
Input Error
Faulty input #1 on an Isolated I/O Module

(forced to 0). I/O slot 3.
Likely cause is faulty Isolated I/O

Module. Refer to Section 6.5.2.
99
Input Error

Likely cause is a faulty Isolated

Module, or a Non-Isolated Module.
Faulty input #2 on Non-Isolated I/O




9A
Input Error
SM 6470B, Rev. 1, April 2008
6-9
NO.
9B
NAME
Input Error
DESCRIPTION
TROUBLESHOOTING



9C
Inputs Unstable
Noise on inputs detected; input declared

unstable (forced to 0). I/O slot 1.
Likely cause is faulty I/O module or

noise entering that module. Refer to
Section 6.5.2.
9D
Inputs Unstable


Section 6.5.2.
9E
Inputs Unstable


Section 6.5.2.
A0
Invalid Lamp Aspects

Selected
More than one aspect for a given lamp

was selection. I/O slot 1, head 1.
Verify that application logic selects

only one aspect per head at a time.
A1

Selected


A2

Selected


A3

Selected


A4
Invalid Lamp Bulb

Turn-On
Bulb turned on without first selecting an

aspect. I/O slot 1, head 1.
Verify that application selects an

aspect before turning on bulb.
A5
Invalid Lamp Bulb

Turn-On


A6
Invalid Lamp Bulb

Turn-On


A7
Invalid Lamp Bulb

Turn-On


B0
Lamp Out/Filament
Failure
I/O slot 1, head 1, red aspect
Repair signal as necessary.
B1
Lamp Out/Filament
Failure
I/O slot 1, head 1, yellow aspect
B2
Lamp Out/Filament
Failure
I/O slot 1, head 1, green aspect
B3
Lamp Out/Filament
Failure
B4
Lamp Out/Filament
Failure
B5
Lamp Out/Filament
Failure
B6
Lamp Out/Filament
Failure
6-10
SM 6470B, Rev. 1, April 2008
NO.
NAME
DESCRIPTION
TROUBLESHOOTING
B7
Lamp Out/Filament
Failure
B8
Lamp Out/Filament
Failure
B9
Lamp Out/Filament
Failure
BA
Lamp Out/Filament
Failure
BB
Lamp Out/Filament
Failure
D0
Slave Vital Link

Transmit Abort
MICROTRAX
unit aborted transmission

because it began to receive data from its
master.
D1
Slave Link BCH Error
Serial message received was invalid

because BCH Checksum was incorrect.
D3
Slave Link Inter Byte

Time-Out
Message declared bad: Periods

between reception of two bytes was too
long.
D4
Slave Link
Framing/Overrun
Serial link controller chip on CPU Module

detected a framing or overrun error.
D5
Vital Link DCD Failure

Off
Data Carrier Detect (DCD) signal went

off during message reception.
D6
Vital Link DCD Failure

On
Data Carrier Detect (DCD) signal went

on during message reception.
D8
Vital Link Transmit

Interrupt Error
Serial link controller chip on CPU

generated a transmit interrupt when
slave was not transmitting a message.
SM 6470B, Rev. 1, April 2008
6-11
6.2. CPU Module Event Codes

Each record in the event queue holds detailed information about the event. Each event is 10
bytes long and has the following format:
Bytes 0 3
Event Information
Referring to Section 4.5.3, display events:
Byte 0
Event Number
aa bb
Byte 1 3
Event information
cc dd
Byte 4
Not Used
aa = byte 0
Event number (number in table)
Bytes 5 9
Time the event occurred
bb = byte 1
Event information
Byte 5
Seconds
cc = byte 2
Event information
Byte 6
Minutes
dd = byte 3
Event information
Byte 7
Hours
Byte 8
Days
Byte 9
Months
NOTE
Table 6-4.
NO.
DESCRIPTION
CPU Event Codes
BYTE
COMMENTS
Error/Warning
Byte 1
Bytes 2, 3
Error or warning number.

Address in executive that detected this error.
Unit went through reset

and CPS will be down.
Not applicable.
Not applicable.
Unit went through reset

and CPS will be down.
Not applicable.
Not applicable.
Error codes and events

Not applicable.
cleared via toggle switches.
Not applicable.
Application logic bit

LOG.EVENT.1 changed
from 0 to 1.
Not applicable.
Not applicable.
Application logic bit

LOG.EVENT.1 changed
from 0 to 1.
Not applicable.
Not applicable.
Sleep Event (user set

GOTO.SLEEP)
Not applicable.
Not applicable.
6-12
SM 6470B, Rev. 1, April 2008
NO.
DESCRIPTION
11
Track A diagnostics failure
BYTE
Byte 1
Bytes 2, 3
12
Track B diagnostics failure
Byte 1
COMMENTS
1 = Zero level check failed.
2 = Transmit level check failed.
3 = Receive level check failed.
Value that was out of range.
Bytes 2, 3
1 = Zero level check failed.

2 = Transmit level check failed.
3 = Receive level check failed.
Value that was out of range.
13
Track diagnostics failure:

Receivers are not tracking
together
Byte 2
Byte 3
Receive level for Track A.

Receive level for Track B.
14
Track diagnostics failure:

Transmitters are not
tracking together
Byte 2
Byte 3
Receive level for Track A.

Receive level for Track B.
16
Track A monitor failure
Byte 1
0 = Unit was transmitting a low.

1 = Unit was transmitting a high.
Byte 2
Byte 3
Value of the "high" monitor.

Value of the "low monitor.
Byte 1
0 = Unit was transmitting a low.

1 = Unit was transmitting a high.
Byte 2
Byte 3
Value of the "high" monitor.

Value of the "low monitor.
17
Track B monitor failure
18
Track A transmit and

receive levels not
tracking together
Byte 2
Byte 3
Transmit level.
Receive level.
19
Track B transmit and

receive levels not
tracking together
Byte 2
Byte 3
Transmit level.
Receive level.
21
Trace Routine Failure
Byte 1
Bytes 2, 3
Task number of the task with failed trace check.

Task numbers are:
1 = Master transmit task
2 = Slave receive task
3 = Master receive task
4 = Unused I/O address test
5 = Executive BCH diagnostics
6 = Master track diagnostics
7 = Slave track diagnostics
8 = Master shunt flag update
9 = Slave shunt flag update
A = Processor diagnostics
B = Track diagnostics
C = Timer queue manager
D = Application BCH diagnostics
E = Physical input processor
F = Physical output processor
Trace timer value
Bytes 2, 3
Address of data that did not match.
31
Track A double-path
RAM fault
SM 6470B, Rev. 1, April 2008
6-13
NO.
DESCRIPTION
32
Track B double-path RAM

fault
33
Track double-path RAM

fault data values
BYTE
Bytes 2, 3
COMMENTS
Address of data that did not match.
Two of these events are logged. One holds the data for
path 1 and the other holds the data for path 2.
Bytes 2, 3
Data from 1 path that did not match.
41
Master track went into

normal mode.
Not applicable.
Not applicable.
42

shunt mode.
Byte 1
Reason for shunt.

Trailing noise was too big. Bytes 2, 3 = Area of trailing noise.
One of the "area under the curve" checks failed. Previously
logged events will give information on what area tests failed.
Too many state changes (longs + shorts) to be a valid
message.
Not enough state changes (longs + shorts) to be a valid
message. Bytes 2, 3 contain: Number of states detected.
A pulse was too short to be a short. Bytes 2, 3 contain:
Duration of pulse (in 8.3333 msec. increments).
A pulse was too long to be a short and too short to be a
long. Bytes 2, 3 contain: Number of states detected.
A pulse was too long to be a long. Bytes 2, 3 contain:
Duration of pulse (in 8.3333 msec. increments).
A valid code (1 1AH) was not detected. Bytes 2, 3
contain: Raw data of the code that was received (a
10-bit quantity).
8C: Received a bad message when in Remove Shunt
mode (slave). Bytes 2, 3 contain: Received code.
8D: Received the link-up message or an invalid message
when in Normal mode (slave.) Bytes 2, 3 contain:
Received code.
8F: Master did not receive the response it expected when
it was in Remove Shunt mode. Bytes 2, 3 contain:
Received code.
44
Slave track went into

Shunt mode.
Not applicable.
Refer to Event 42.
51

Remove Shunt mode.
Not applicable.
Not applicable.
52
Slave track went into

Remove Shunt mode.
Not applicable.
Not applicable.
53
Master track is in Normal

mode but received a bad
message.
Not applicable.
Refer to Event 42.
54
Slave track is in Normal

mode but received a bad
message.
Not applicable.
Refer to Event 42.
6-14
SM 6470B, Rev. 1, April 2008
NO.
61
DESCRIPTION
BYTE
Area of track message

has changed too much
previous message.
COMMENTS
This event is part of a pair of events. (Refer to Event 62.)
This event gives the area of the previous message and
the next event gives the area of the current message.
Byte 1
Bytes 2, 3
Code received.
Area of average long pulse.
62
Area of track message

has changed too much
current message.
Not applicable.
Refer to Event 61.
71
The leading guard pulse

is bad.
Byte 1
Bytes 2, 3
Length of the guard pulse.

Area of the guard pulse.
81
Area of received code was

not sufficient.
Byte 1
Bytes 2, 3
Received code.
Area of the average long pulse.
SM 6470B, Rev. 1, April 2008
6-15
6.3. CPU Module Configuration Items

6.3.1.
Predefined
The table below lists index values of the predefined configuration items. These are the values of
"bb" as defined in Section 4.2.4.
NOTE
Table 6-5.
INDEX
DESCRIPTION OF
CONFIGURATION ITEM
CPU Configuration Items

VALID
VALUES
VALUE DESCRIPTION
01
TRACK A ENABLE
0 or 1
0 = disable, 1 = enable
02
TRACK A LENGTH
0 36
1000-ft lengths
03
TRACK B ENABLE
0 or 1
04
TRACL B LENGTH
0 36
1000-ft lengths
05
UNIT_TYPE
03
0 = none, 1 = end, 2 = repeater, 3 = intermediate
06
BOARD 1 TYPE
03
0 = disable, 1 = colorlight, 2 = searchlight,

3 = non-isolated
07
BOARD 2 TYPE
03
0 = disable, 1 = colorlight, 2 = searchlight,

3 = non-isolated
08
BOARD 3 TYPE
0, 3, or 4
0 = disable, 3 = non-isolated, 4 = isolated
09
HEAD2/BOARD 1 ENABLE
0 or 1
0A
HEAD2/BOARD 2 ENABLE
0 or 1
0B
SLAVE ENABLE
0 or 1
0C
SLAVE ADDRESS
1 16
Station address
0D
SLAVE BAUD RATE
16
Baud rate in BPS:

1 = 150
4 = 1200
2 = 300
5 = 1800
3 = 600
6 = 2400
0E
SLAVE KEY-ON DELAY
0 255
Key-on display in msec
0F
SLAVE KEY-OFF DELAY
0 255
Key-on display in msec
10
SLAVE STALE TIME
0 255
Stale data time-out in 100 msec tics
11
SLEEP ENABLE
0 or 1
12
LOGIC VERSION
1 255
Application logic version
6-16
SM 6470B, Rev. 1, April 2008
INDEX
DESCRIPTION OF
CONFIGURATION ITEM
VALID
VALUES
VALUE DESCRIPTION
13
LOCAL CONTROL PANEL

ENABLE
0 or 1
14
TRACK ENABLE
0 or 1
15 1F
Unused (all zeros)
Not applicable.
Not applicable.
6.3.2.
User-Defined
The following tabulation lists index values of the user-defined configuration items. These are
the values of "bb" as defined in Section 4.2.4.
NOTE
Table 6-6.
User Defined Configuration Items
INDEX
DESCRIPTION OF
CONFIGURATION ITEM
VALID
VALUES
VALUE DESCRIPTION
01 1F
User-defined
0 or 1
User-defined
SM 6470B, Rev. 1, April 2008
6-17
6.4. Serial Link Module Status and Error Codes

6.4.1.
Status Indications and Short Error Codes

Table 6-7.
ERROR
CODE
6-18
Serial Link Status/Error Short Codes
TYPE
INDICATION
Status Indication
Module is normal.
Status Indication
"Initial Output Inhibit Delay" time running (time specified by the

"L Switch" in application logic).
Short Error Code
General error in memory, either in RAM or EPROM.
Short Error Code
Application logic EPROM not installed or compiler of wrong version

was used.
Status Indication
Module is in reset routine.
Short Error Code
Generic software error. Possibly a noise glitch disrupted normal

operation of the software.
Short Error Code
Non-recoverable fault on Master portion of vital serial

communication link.
Short Error Code
Non-recoverable fault on Slave portion of vital serial

communication link.
Short Error Code
Recoverable fault on Master portion of vital serial communication

link.
Short Error Code
Recoverable fault on Slave portion of vital serial communication

link.
Short Error Code
Hardware error detected within module.
SM 6470B, Rev. 1, April 2008
6.4.2.
Long Error Codes

Table 6-8.
ERROR
CODE
Serial Link Status/Error Long Codes
TYPE*
INDICATION
* Type values: NR/C = Non-Recoverable/Critical R = Recoverable NR = Non-Recoverable

10
NR/C
Trigger List Overflow
12
NR/C
Master/Slave Data Buffer Corrupted
13
NR/C
Master/Slave Indexing Overflow
14
NR/C
Master/Slave Checksum Error
15
NR/C
Wrong Slave Responded
16
NR/C
Serial Link Baud Rate Out-of-Range
17
NR/C
Serial Link Input Processor Scheduled with no Serial LInk
18
NR/C
Serial Link Output Processor Scheduled During an Active Transmit
19
NR/C
Compiler Table Check Byte Not Valid
1A
NR/C
Bad Compiler Stamp in Application EPROM
20
NR/C
False Interrupt from Peripheral PCB Timer
21
NR/C
Logic Equation Error
22
NR/C
Bad Logic Equation
23
NR/C
Bit Range Overflow
24
NR/C
Equation Processor Scheduled at Wrong Time
2E
NR/C
Illegal Software Interrupt
2F
NR/C
Bad Scheduling Counters
31
NR/C
Application Software Timer Processing Fault
32
NR/C
Reset Sequence Error Code System Interface Not Initialized
33
NR/C
Error in Executive Software User or System Stack
34
NR/C
RAM Failure
35
NR/C
Executive Software Idle Routine Executed at Wrong Time
36
NR/C
Bad Stack Pointer in Executive Software
37
NR/C
Error During Long Cycle Diagnostic Check of Microprocessor
38
NR/C
Kill Bit Activated by Application Logic
39
NR/C
Executive Software Dual-Path Process Faults Do Not Agree
3B
NR/C
Reset Bit Assigned a "1" by Application Logic, Causing Reset
3C
NR/C
Parallel I/O Defined in Serial Link Module Application
41
NR/C
Executive Software Dual-Path Process Unequal Bit Strings
42
NR/C
Executive Software Dual-Path Process Unequal Trigger Lists
SM 6470B, Rev. 1, April 2008
6-19
ERROR
CODE
TYPE*
43
NR/C
Bad Return Address in Executive Software
46
NR/C
Problem With Application or Executive Software EPROMs
47
NR/C
Executive Software Routines Out of Sequence
51
NR/C
Executive Software Vital Security Mask(s) Corrupted
52
NR/C
Microprocessor System Overloaded
53
NR/C
Executive Software Vital Timer(s) Corrupted
54
NR/C
Bad Return Address in Executive Software
55
NR/C
Module's Independent Time Sources Out-of-Synchronization
56
NR/C
Error During Long Cycle Diagnostic Check of Microprocessor
57
NR/C
Problem With Application or Executive Software EPROMs
58
NR/C
Fault During Test of Microprocessor Data Bus
59
NR/C
Fault During Test of Microprocessor Address Bus
5A
NR/C
Executive Software Routine Time Sequencing Problem
83
BCH Security Code Error Received at Master Vital Serial Port
84
BCH Security Code Error Received at Slave Vital Serial Port
85
Master Message Time-Out on Vital Serial Link
86
Slave Message Time-Out on Vital Serial Link
87
Master Unit Detects Its Slave Link Down
88
Slave Unit Detects Its Master Link Down
8F
Wrong Slave Unit Responded
9D
Code Line Link Down (Common mode is cleared)
A1
Fast Polling of Slaves Selected
B3
Bad Data Into Master Serial Port Incorrect Data Format
B4
Bad Data Into Slave Serial Port Incorrect Data Format
B7
Bad Data Into Master Serial Port DCD Signal in Wrong Sequence
B8
Bad Data Into Slave Serial Port DCD Signal in Wrong Sequence
B9
Bad Data Into Master Serial Port DCD Signal in Wrong Sequence
BA
Bad Data Into Slave Serial Port DCD Signal in Wrong Sequence
BB
Bad Data Into Master Serial Port No CTS Signal Detected
BC
Bad Data Into Slave Serial Port No CTS Signal Detected
FF
NR
6-20
INDICATION
Status Error Code Sequence Marker

Module Reset With No Error Codes Displayed
SM 6470B, Rev. 1, April 2008
6.5. Generic Errors

The MICROTRAX system will generate errors and warnings in response to a system problem. All
errors generated by the MICROTRAX system have the same effect: The error code is logged and
the system performs a reset. When a critical error occurs, the system goes through the power-up
reset process (all outputs are de-energized, and the system starts over). When a warning occurs,
the system may continue to operate. For example, if a microprocessor diagnostics fails a critical
error is logged and the system resets; however, if a colorlight filament failure is detected, a
warning is logged stating that a filament has failed and the system continues to operate.
When an error or warning occurs, two different actions transpire. First, the error/warning
counter is incremented to indicate the number of times this error/warning has occurred. Second,
an event is logged with information about the error/warning. Two different types of warnings
exist in the MICROTRAX system: Dynamic and Static. When a static warning happens, an event is
logged indicating the warning occurred. When a dynamic warning occurs, an event will be
logged only if another event for the same warning has not previously been logged. For example,
when a colorlight filament failure is detected, a warning is logged. The diagnostic that detects
the filament failure runs very frequently. If an event were logged every time that diagnostic
failed, the event queue logging area would fill very quickly. To prevent this, the filament
warning is defined as a dynamic warning. When the warning logger observes that this is a
dynamic warning, the warning will be logged only if the warning count for this warning is zero
(first instance of this warning).
6.5.1.
Generic Noise Errors
Many errors detected by the MICROTRAX system are spurious and typically indicate a problem
with an unrelated function or piece of equipment. For example, a routine in the system is called
exclusively with a value of either 1 or 2. When this routine runs, it checks to make sure that its
input is either 1 or 2. If it is not, a critical error is logged. If everything in the system is
functioning correctly, this error should not occur; however, if a noise glitch or some other failure
occurred when this routine was called, the input could be corrupted. In this case, the error would
be logged; therefore, many of the errors listed in this chapter refer to a generic type of noise
error.
Troubleshooting such an error may be difficult. If the error only happened once, it is likely a
random failure that happened to be detected by this error code; therefore, if the error is not
repeatable, then the error may be ignored. If the error repeats, various factors need to be
investigated:
Does the error happen at a repeatable time frame? If so, does this time frame relate to this
application? For example, every 15 minutes a general noise type error is logged. Also, the
application logic is written so that every 15 minutes all the lamps in the system are turned on.
A likely source of the noise problem is the batteries. Make certain the power source can handle
this type of load.
SM 6470B, Rev. 1, April 2008
6-21
Does the error occur at the same time an external event occurs? For example, every time an
external event generates an input into the MICROTRAX system, the system detects a failure. A
logical place to examine is the input source. Perhaps as a result of this input, several other
external events are triggered that generate noise. Begin troubleshooting by examining that
external hardware.
6.5.2.
Generic I/O Errors
When an I/O error or warning occurs, several factors must be considered. External noise can
generate virtually any error or warning in the system. The I/O is more susceptible to noise
because of the external wires and connections. All I/O errors are filtered; they must occur more
than once before the system will actually process the error.
Does the error happen at the same time an external event occurs? For example, every time an
external event generates an input into the MICROTRAX system, the system detects a failure. A
logical place to examine is the input source. Perhaps as a result of this input, several other
external events are triggered that generate noise. Begin troubleshooting by examining that
external hardware.
Check the I/O module, which may be faulty. Inspect the module, checking for loose or damaged
components. Replace the module with a spare. If the error clears, then the problem is with the
module. If the error persists, the problem is with the external I/O hardware. (If a spare is not
readily available, but two of the same type module are installed in another slot, swap these
modules for testing purposes.)
Check battery voltages. Verify that the batteries can properly handle the various demands and
loads.
Check that the wiring between the Track Board and the Track Interface Panel must be a twisted
pair with three to four twists per foot. This twisted pair must then be separated from any "dirty"
wiring (i.e., relay and relay control wiring) by at least six inches.
6.5.3.
Vital Link Warnings
When a vital link warning has been detected, the following troubleshooting guidelines should be
followed:
External noise can generate any of the vital link warnings. If these warnings occur
infrequently, check for sources of external noise.
If the vital link warnings occur frequently, or the serial link does not operate at all, consult
US&S Service Manual SM 6400C for detailed troubleshooting procedures.
6-22
SM 6470B, Rev. 1, April 2008
6BRAIL Team and Technical Support
7.
RAIL Team and Technical Support
The Rapid Action Information Link Team (RAIL Team) is a group of experienced product
and application engineers ready to assist you to resolve any technical issues concerning this
product. Contact the RAIL Team in the United States at 1-800-652-7276 or by e-mail at
railteam@switch.com.
SM 6470B, Rev. 1, April 2008
7-1
6BRAIL Team and Technical Support
7-2
SM 6470B, Rev. 1, April 2008

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SM 6470B

1000 Technology Drive, Pittsburgh, PA 15219

SM 6470B, Rev. 1, April 2008

SM 6470B, Rev. 1, April 2008

SYSTEM OVERVIEW ........................................................................................................................1-1

SM 6470B, Rev. 1, April 2008

SM 6470B, Rev. 1, April 2008

4.3. System Monitoring via a PC .....................................................................................................4-9

SM 6470B, Rev. 1, April 2008

6.5. Generic Errors ........................................................................................................................6-21

SM 6470B, Rev. 1, April 2008

Coded Track Circuit System Basic Applications ........................................ 1-2

Serial Communications Adapter Panel ............................................................................ 1-3

Complete Coded Track Code Formats ............................................................................ 1-4

Coded Track Circuit Unit.................................................................................................. 1-6

Typical Coded Track Circuit............................................................................................. 1-8

Wiring of Track Interface Panel........................................................................................ 1-9

Basic Control of Local Inputs and Outputs ....................................................................1-13

System Input Power Configuration ................................................................................1-16

Coded Track Cardfile Top Connector I/O Assignments..............................................1-18

to MICROTRAX Serial Daisy Chain Cable (Port A, Port B).............................1-21

to MICROLOK/MICROLOK PLUS Serial Cable (Port A, Port B) ..........................1-22

Cross Lighting Serial Link Cable....................................................................................1-23

PC Port Serial Link Cable ..............................................................................................1-23

Standard 20 milliamp Current Loop Vital Interface ........................................................1-24

Coded Track Unit Module Placement .............................................................................. 2-5

CPU Module Front Panel ................................................................................................. 2-6

System Power Supply Module Front Panel .....................................................................2-7

Track Interface Module Front Panel................................................................................. 2-8

Searchlight Lamp Driver Module Front Pane................................................................... 2-9

Colorlight Lamp Driver Module Front Panel...................................................................2-10

Non-Isolated I/O Module Front Panel ............................................................................2-11

Isolated Module Front Panel ..........................................................................................2-12

Sleep Mode Module Front Panel ...................................................................................2-13

Typical Track Interface Panel ........................................................................................2-14

Quick Shunt Module.......................................................................................................2-15

Unit Mounting Dimensions .............................................................................................2-17

Coded Track System Hardware .................................................................... 2-2

SM 6470B, Rev. 1, April 2008

CPU Module DIP Switch Settings .................................................................................... 3-6

Track Polarity Test Set-Up.............................................................................................3-24

Track Circuit Shunting Sensitivity ..................................................................................3-25

CPU Display Modules Flowchart ...................................................................................3-27

Signal Lamp Operating Characteristics .........................................................................3-34

CPU Display Modules Flowchart ..................................................................................... 4-3

Typical MICROTRAX Repeater............................................................................................ 5-2

Typical MICROTRAX Intermediate Signal (Colorlight)......................................................... 5-3

Typical MICROTRAX Test Box Connection......................................................................... 5-6

Typical MICROTRAX Intermediate Signal (Searchlight)...................................................... 5-7

Typical MICROTRAX with Non-Isolated I/O......................................................................... 5-9

Typical MICROTRAX with Isolated I/O ..............................................................................5-10

Typical MICROTRAX Repeater with Quick Shunt .............................................................5-11

SM 6470B, Rev. 1, April 2008

Slots in the Cardfile ..........................................................................................................1-5

Top Connector Pin-Outs ................................................................................................1-19

Track Interface Panel Part Numbers................................................................................ 2-4

Track Circuit Lengths for Welded Rail/Ballast ...............................................................2-18

Track Circuit Lengths for Bonded Rail/Ballast ...............................................................2-19

Part Number Listing .......................................................................................................2-21

CPU Module Dip Switch SW1 Functions ...................................................................... 3-5

CPU Module Standard Jumper Positions ..................................................................... 3-7

Coded Track Circuit Polarity Check Procedure .............................................................3-22

Maximum Track Circuit Length ......................................................................................3-23

Display Track Status/Error Codes Procedure................................................................3-28