Journal of the Korean Physical Society, Vol. 45, December 2004, pp.

S716S719

Annealing Effects of HfO2 Gate Thin Films Formed by Inductively Coupled

Sputtering Technique at Room Temperature

Won Joon Choi, Eun Joung Lee, Kap Soo Yoon, Jung Yup Yang, Jong Hyun Lee, Chae Ok Kim and Jin Pyo Hong
New Functional Materials and Device Laboratory,
Department of Physics, Hanyang University, Seoul 133-791

Hee Jae Kang

Department of Physics, Chungbuk National University, Cheongju 361-763

Ultrathin HfO2 dielectrics for gate oxide layer in metal-oxide-semiconductor devices were pre-
pared on Si substrates by using an inductively coupled rf magnetron sputtering method at room
temperature. This new sputtering method is designed to improve the uniformity and efficient for-
mation of high quality HfO2 gate dielectric. As-grown HfO2 gate dielectrics were also systematically
annealed with a rapid thermal annealing. Electrical transport of as-grown and post-annealed HfO2
thin films was characterized by the C-V and I-V measurements. The post-annealed HfO2 gate dielec-
tric exhibited more significant reduction of gate leakage current from 105 A/cm2 to 106 A/cm2
at 1 V, together with the enhanced capacitance values. In addition, the combined measurements
of X-ray photoemission spectroscopy and X-ray diffraction confirm the structural improvement of
post-annealed HfO2 gate dielectrics.

PACS numbers: 73.40.Qv

Keywords: High-k, Gate dielectric, Gate oxide, HfO2 , MOS, MOSFET

I. INTRODUCTION crystalline or amorphous phases, depending on experi-

Recently, high-k gate dielectrics have become attrac-
tive to replace well-known SiO2 or SiON thin film as
gate oxide layers of sub-20 A metal-oxide-semiconductor
field-effect transistors (MOSFET) [1,2]. As the gate ox-
ide layer of SiO2 or SiON thin films is scaled down, these
films easily induce higher leakage current density due to
direct tunneling through the gate oxide layer [3]. There-
fore, the high leakage current density requires the urgent
development of new materials with dielectric constants
higher than that of SiO2 or SiON material. Up to now,
following materials for HfO2 , ZrO2 , Al2 O3 , TiO2 , Ta2 O3 ,
silicate (HfSix Oy ) and Al2 O3 /HfO2 stack gate dielectrics
have been studied [4, 5]. Among these materials, HfO2
thin film has become a promising gate dielectric candi-
date to replace Si-based gate oxide layer in MOSFET be-
cause of its large bandgap and high-k value of about 25.
It is also well known to be thermally compatible with Si
substrate[1]. Therefore, a lower effective electrical thick-
ness of HfO2 gate dielectric can possibly avoid the direct
tunneling effect of carriers between the gate and the Si
channel[6]. In addition, currently available HfO2 gate di-
electrics have been prepared by conventional rf reactive
sputtering, atomic layer deposition techniques or chem-
ical vapor deposition methods. They frequently reveal
E-mail: jphong@hanyang.ac.kr
-S716-
mental conditions [7]. In particular, the crystallization
of HfO2 gate dielectric is known to induce increased cur-
rent density through the grain boundaries.
In this work, ultrathin HfO2 gate dielectrics of about
100 A were prepared by an inductively coupled rf mag-
netron sputtering system at room temperature. This
method was designed to reduce a self-bias effect on gate
dielectrics by internal rf external power and to increase
atomic oxygen concentrations, compared with those in
the conventional rf reactive sputtering method [8,9]. This
technique shows the useful capability of suppressing the
crystallization of HfO2 gate dielectric, depending on the
externally applied rf power. As-grown HfO2 gate di-
electrics result in more excellent leakage current density
and C-V properties at optimum conditions. In addition,
as-grown HfO2 gate dielectrics were annealed by a rapid
thermal annealing (RTA) process in ambient of N2 from
650 C to 850 C for 2 min in order to obtain better elec-
trical properties, as a compared with as-deposited HfO2
gate dielectrics.
II. EXPERIMENTS
p-type Si (100) substrates were etched with a 10 %
HF solution in methyl alcohol in order to remove nat-
ural oxide and contaminants from the substrates. This
Annealing Effects of HfO2 Gate Thin Films Formed by Inductively Coupled Sputtering
Fig. 1. Schematic of inductively coupled rf sputtering sys-
tem.
Fig. 2. XRD results of the HfO2 (600 A) gate dielectric
fabricated by an inductively coupled rf sputtering method.
cleaning method produces a hydrogen-passivated surface
on the substrate. Then, the HfO2 gate dielectrics were
deposited by using an inductively coupled rf magnetron
reactive sputtering method. A more detailed descrip-
tion of our modified sputtering system is given in Figure
1. The internal sputtering power of the HfO2 gate di-
electrics was fixed at 50 W, with variation of external
power from 0 W to 60 W. The post annealing of the
HfO2 gate dielectrics was performed by the RTA process
from 650 C to 850 C for 2 min in N2 ambient. As gate
electrode, aluminum (Al) was sputtered on the HfO2 gate
dielectric for the C-V curve and leakage current measure-
ments by using a shadow mask with gate area of 7.0
104 cm2 . Structural characterizations of the HfO2 gate
dielectrics were measured by X-ray diffraction ( XRD )
by using a Cu source and XPS systems.
III. RESULTS AND DISCUSSION
Figure 2 shows typical XRD patterns as a function of
external power. In general, the HfO2 gate dielectric pre-
pared by the conventional rf sputtering method at room
temperature mainly exhibits the monoclinic phase peak
at 2 = 28.4 [10, 11]. However, the HfO2 gate dielec-
tric formed by our process indicates a weak crystalline
phase at 0 W. The crystalline of HfO2 film (not shown in
Won Joon Choi et al. -S717-
Fig. 3. XPS spectra of the HfO2 (100
A) gate dielectrics
as a function of external power (EP). EP= (a) 0 W, (b) 60
W.
this paper) varies from the weak crystalline phase to an
amorphous phase with increasing external power. This
variation may be due to a large number of active oxy-
gen radicals around an external electrode controlled by
external rf power. The control of external rf power was
proven to be relevant for the efficient deposition of HfO2
gate thin film at room temperature. The chemical char-
acterization of HfO2 gate oxide was accomplished by the
X-ray photoemission spectroscopy (XPS). Figure 3 re-
veals the chemical compositions of HfO2 gate oxides pre-
pared at external power of 0 and 60 W. As shown in
this figure, the Hf4f core-level spectra of HfO2 gate di-
electric clearly show typical spin-orbit splitting values of
16.85 eV and 16.90 eV. They are considered in the fit to
the 4f doublet. In addition, no peak at lower binding
energy is detected, which means that no Hf-Hf or Hf-Si
bond is present within the detection limit [12].
Figure 4 shows the C-V measurements of HfO2 sam-
ples formed without and with external power. The sam-
ple thickness was about 100 A, and the measurement was
made at 100 kHz. The HfO2 gate dielectric fabricated at
external power of 60 W indicates C-V hysteresis of less
than 80 mV in a 4 V range at a flatband voltage of
+0.2 V. The maximum values of capacitance and capac-
itance density are found to be 254 pF and 0.36 F/cm2 ,
respectively. However, the HfO2 gate dielectric prepared
at zero external power does not exhibit any accumula-
tion capacitance in a bias voltage range of 4 V, together
with large C-V hysteresis. As mentioned with reference
to Figure 2, the possible poor C-V characteristics might
be due to the large leakage current through the grain
boundaries [13, 14]. As shown in this figure, the basic
properties of leakage current densities of 0W and 60 W
samples are 105 and 102 A/cm2 , respectively.
-S718-
) structure
Fig. 4. Electrical properties of Si / HfO2 (100 A
as a function of external power: (a) C-V curve, (b) J-V curve.
) structure
Fig. 5. C-V characteristics of Si / HfO2 (100 A
as a function of annealing temperature in N2 ambient. The
HfO2 gate dielectrics were fabricated at external power of 60
W.
Figure 5 shows the C-V curves of samples annealed
from 650 C to 850 C for 2 min in N2 ambient. When
the HfO2 gate dielectrics fabricated at an external power
of 60 W were annealed from 650 C to 750 C, the max-
imum capacitance value increased to 783 pF. This ex-
perimental result suggest that as-deposited HfO2 gate
dielectrics may locally have many defect states inside
HfO2 films, but the annealing process can reduce the de-
fect densities with increasing dielectric constant. How-
ever, the capacitance value decreased to above 750 C.
The significant reduction of the capacitance at higher an-
nealing temperatures was due to the formation of Hf-Si
Journal of the Korean Physical Society, Vol. 45, December 2004
Fig. 6. Leakage current characteristics of Si / HfO2 (100
A) structure as a function of annealing temperature in N2
ambient.
Fig. 7. XRD results of as-deposited and annealed
HfO2 (100 A) gate dielectrics. The gate dielectric was an-
nealed at 750 C in N2 ambient.
bonds at interface layers between the HfO2 gate dielec-
tric and Si substrate [15]. This additional result induces
a higher leakage current at high annealing temperatures.
In our process, all annealed samples display better C-V
hysteresis properties of less than 80 mV.
Figure 6 shows typical leakage current densities as a
function of annealing temperature from 650 C to 850
C. As shown in this figure, the leakage current decreased
to 106 A/cm2 at 750 C, but above 750 C the leakage
current density started to increase and then reached
103 A/cm2 . Therefore, it is expected that the high leak-
age current of crystalline samples is due to grain bound-
aries that serve as high leakage paths of the gate oxide
layer. Therefore, a weak crystalline phase of gate oxide is
critically desirable, due to the lack of grain boundaries,
for future new applications.
Figure 7 shows typical X-ray diffraction patterns of
as-deposited and annealed HfO2 gate dielectrics of 100
A. As shown in this figure, the post-annealed HfO2 gate
dielectric still shows a very weak crystalline phase, even
though it was annealed at 750 C in N2 ambient. In addi-
tion, the electrical properties of the post-annealed HfO2
gate thin film seem not to be affected by the variation
of crystalline phases. More experiments are currently in
Annealing Effects of HfO2 Gate Thin Films Formed by Inductively Coupled Sputtering
progress to investigate the relationship between electri-
cal and structural properties under a high temperature
annealing process of gate oxides.
IV. CONCLUSION
A new inductively coupled rf magnetron sputtering
method was used to fabricate ultrathin HfO2 gate di-
electrics with better electrical and structural quality by
reducing the self-bias effect of the conventional rf sput-
tering system. Our process was designed to increase
atomic oxygen concentrations with high energies, for
room temperature formation and efficient deposition.
Experimental results indicate that the gate dielectrics
with a weak crystalline phase have enhanced electrical
properties, compared with those of strong crystalline
phases. In addition, the post-annealed HfO2 gate di-
electrics at optimum conditions clearly reduce gate leak-
age current, with enhancement of the capacitance value,
at an optimum annealing temperature of about 750 C.
ACKNOWLEDGMENTS
This work was supported by Hynix Semiconductor Inc.
REFERENCES
Won Joon Choi et al. -S719-
[1] D. C. Gilmer, R. Hegde, R. Garcia and V. Dhandapani,
Appl. Phys. Lett. 81, 1288 (2002).
[2] Y. Hoshino, K. Yamamoto, S. Hayashi and Y. Kido,
Appl. Phys. Lett. 81, 2650 (2002).
[3] Kazuhiko Yamamoto, Shigenori Hayashi and Masaaki
Niwa, Appl. Phys. Lett. 81, 2053 (2002).
[4] P. D. Kirsh, C. S. Kang, J. Lozano and J. C. Lee, J.
Appl. Phys. 91, 4353 (2002).
[5] Byoung Hun Lee, Laegu Kang, Renee Nieh and Jack C.
Lee, Appl. Phys. Lett. 76, 1926 (2000).
[6] Y. S. Lin, R. Puthenkovilakam and J. P. Chang, Appl.
Phys. Lett. 81, 2041 (2002).
[7] Hyeoksu Kang and Yonghan Roh, J. Vac. Sci. Technol.
B 20, (2002).
[8] Chae Ok Kim, Kap Soo Yoon, Jung Yup Yang and Jin
Pyo Hong, J. Korean Phys. Soc. 41, 110 (2002).
[9] K. S. Yoon, J. Y. Yang, W. J. Choi and J. P. Hong, J.
Korean Phys. Soc. 42, S195 (2003).
[10] M. Y. Ho, G. D. Wilk, P. M. Voyles and H. Gong, Appl.
Phys. Lett. 81, 4218 (2002).
[11] H. Y. Yu, N. Wu and M. F. Li, Appl. Phys. Lett. 81,
3618 (2002).
[12] O. Renault, D. Samour, J.-F. Damlencourt and D. Blin
Appl. Phys. Lett. 81, 3627 (2002).
[13] G. D. Wilk and R. M. Wallace, Appl. Phys. Lett. 74,
2854 (1999).
[14] G. D. Wilk and R. M. Wallace, J. Appl. Phys. 87, 484
(2000).
[15] P. D. Kirsh, C. S. Kang, J. Lozano, J. C. Lee and J. G.
Ekerdt, J. Appl. Phys. 91, 4353 (2002).