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AIM: To Study frequency shift keying

APPARATUS; FSK Sigma kit, DSO, CRO probes patch cords

CIRCUIT DIAGRAM:-

THEORY :
In FSK frequency of the carrier is shifted according to the binary
SL(t) = 2Ps cos wL

GENERATION OF BFSK:

The block dig. of BFSK consists of two oscillators which produce carrier frequency
fh (640 KHz ) & fL (320 KHz ). The oscillators are applied to the I/p of multipliers
(Balanced Modulators ).the other two i/p to the multiplier are the binary data i/ps
Ph (t) [NRZ ] &PL (T) [ NRZ ] inverse .the multipliers o/ps are then added together
to get the BFSK signal . thus when a binary (0 ) is transmitted NRZ= 1 &NRZ
INVERSE = 0 & vice versa .Thus the transmitted signal will either have the
frequency Fh or FL.

SPECTRUM OF BFSK:-

The BFSK o/p in terms of variables Ph(t) &PL(t) is

VBFSK (t) = 2PsPh cos (wht+ h )+ 2PsPL cos (wht+ L )

Here Ph (t)= 1/2+1/2 Ph (t)

Here PL (t)= 1/2+1/2 PL (t )

Where Ph (t) & PL (t ) are bipolar variables which alternate between 1& -1
therefore the spectrum equation on substitution is given as .

VBSK (t) = Ps/2 cos (wht+ h ]+ Ps/2 cos (wLt+ L]+ Ps/2 wh cos (wht+ h ]
+ Ps/2 wL cos (wLt+ L]

BFSK RECIEVER :

The BFSK receiver consist of two band pass filters one with centre frequency Fh
& FL since FH-FL =2fb the o/ps of the filter do not overlap . The BPF pass their
corresponding mains lobes without much distortion the o/ps of the filters are
applied to the envelope detectors are compared by the comparator is used then o/p
of the comparator is the bit sequence b(t )

.
CIRCUIT DETAILS OF FREQUENCY SHIFT KEYING MODULATION AND
DEMODULATION
WITH NOISE.

The FSK Modulation and Demodulation with noise consist of following sections.
1. Digital Data Generator section
2. ASK modulator using Balanced Modulator.
3. Carrier Generator.
4. Adder section.
5. Gaussian Noise Generator Section.
6. Noise Adder section
7. FSK demodulator using PLL detector
8. Integrated & Dump Filter (Matched Filter)
9. Comparator Section
10. Power supply section

Output 2K2 preset is used to vary output level. The outputs are two ASK Modulated
signals.

3) RF Carrier Generator section: -

The function of this section is to generate phase synchronized carrier signal with
respect to modulating digital NRZ input. It converts 640KHz and 320 KHz. TTL
Clock signal in to 640KHz and 320KHz. Sine wave carriers signal using pie filter of
lOOuH coil and two 100 Pf capacitors. These signal are given as carrier signal to
balanced modulators as one input.

(4) Adder section: -

This section adds two input signals with unity gain. This is used to add to ASK
signals to converts into FSK signal.

(5) Gaussian Noise Generator section: -

Four-transistor circuit is used to generate Gaussian noise signal. The amplitude pot
varies its amplitude from FSK signal.

(6) Noise Adder section: -

This section adds FSK modulated signal and Gaussian noise signal. The output is
Noisy FSK signal.

(7) FSK demodulator: -

This circuit is based on PLL made of 1C 4046. The free running frequency of PLL is
set at 320 KHz value. Hence when FSK signal having two frequency 320 KHz and
640 KHz is given to it input, it produced demodulated signal locked to 320 KHz.
Hence output is raw data signal. This signal is then given to squarer circuit.

(8) Integrated & Dump Filter (Matched Filter)


This section integrates the noisy FSK demodulated signal and then it is dumped at
bit clock interval at the output. The output is maximized at bit sampling pulse.

(7) Comparator section;


-
This Section converts integrated output of Matched filter into pure recovered data
using comparator 1C 311.

(6) Power supply section:

The regulated power supply is used for different supply voltages.


Following output D.C. Voltages are required to operate FSK Modulation
demodulation system.
+ 15V, 250mA, -15V, 250mA, + 5V, 250mA + 5V, 250mA
Three terminal regulators are used for different output voltages i.e. 1C 7805 for +
5V, 1C 7815 for + 15V, 1C 7915 for-15V, 7905 for-5V
These ICs are supplied different dc input voltages by two Bridge rectifiers consisting
of D1-D4 and D5-D8 & Iwo 1000/25 EC and 1000/10 EC. The capacitors at each
input & each output are for filtering purpose.

PROCEDURE FOR FSK


1. Connect CRO channel-1 at carrier clock socket & observe it
2. Connect CRO channel-1 at bit clock socket & observe it
3. Connect CRO channel-1 at word clock socket & observe it
4. Connect CRO channel-1 at NRZ Data socket & observe it
5. Connect CRO channel-1 at NRZ Data Inverse socket & observe it
6. Connect CRO channel-1 at RF Career socket (in career generator section) for
frequency 320 kHz &640 kHz. & observe the waveform on CRO
7. Connect CRO channel-1 at NRZ Data socket& CRO channel-2 at the output
of balanced modulator-1 & observe ASK output
8. Connect CRO channel-1 at NRZ Data socket& CRO channel-2 at the output
of balanced modulator-2& observe ASK output
9. Apply both the output of balanced modukators-1&2 to adder section &check
FSK output on CRO
10. Connect CRO channel-1 at Gaussian noise output & observe it keep noise
level minimum.
11. observe recovered raw data signal t the o/p of Fsk demodulator
12. observe received pure NRZ data at the o/p of Data squarer
13. add Gaussians noise by rotating noise level pot & observe its effect on all
received signals

OBSERVATION TABLE:-

SRNO SIGNAL AMPLITUDE FREQUENCY


1. NRZ DATA 4.8V 41.66K

2. NRZ DATA INVERSE 4.8 41.66K

3. CARRIER-1 3.2 333K

4. CARRIER-2 2V 666K

5. BM-1O/P 3V -

6. BM-2 O/P 3V -

7. ADEER O/P 3V -

8. FSK DEMOD. O/P 1.2V 41.66K

9. COMP. O/P 7.2V 41.66K

CONCLUSION:-

Thus according to change in I/p binary data the frequency of the o/p waveform is
varied between 320k &640 kHz.

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