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CIRCUIT DIAGRAM:-
THEORY :
In FSK frequency of the carrier is shifted according to the binary
SL(t) = 2Ps cos wL
GENERATION OF BFSK:
The block dig. of BFSK consists of two oscillators which produce carrier frequency
fh (640 KHz ) & fL (320 KHz ). The oscillators are applied to the I/p of multipliers
(Balanced Modulators ).the other two i/p to the multiplier are the binary data i/ps
Ph (t) [NRZ ] &PL (T) [ NRZ ] inverse .the multipliers o/ps are then added together
to get the BFSK signal . thus when a binary (0 ) is transmitted NRZ= 1 &NRZ
INVERSE = 0 & vice versa .Thus the transmitted signal will either have the
frequency Fh or FL.
SPECTRUM OF BFSK:-
Where Ph (t) & PL (t ) are bipolar variables which alternate between 1& -1
therefore the spectrum equation on substitution is given as .
VBSK (t) = Ps/2 cos (wht+ h ]+ Ps/2 cos (wLt+ L]+ Ps/2 wh cos (wht+ h ]
+ Ps/2 wL cos (wLt+ L]
BFSK RECIEVER :
The BFSK receiver consist of two band pass filters one with centre frequency Fh
& FL since FH-FL =2fb the o/ps of the filter do not overlap . The BPF pass their
corresponding mains lobes without much distortion the o/ps of the filters are
applied to the envelope detectors are compared by the comparator is used then o/p
of the comparator is the bit sequence b(t )
.
CIRCUIT DETAILS OF FREQUENCY SHIFT KEYING MODULATION AND
DEMODULATION
WITH NOISE.
The FSK Modulation and Demodulation with noise consist of following sections.
1. Digital Data Generator section
2. ASK modulator using Balanced Modulator.
3. Carrier Generator.
4. Adder section.
5. Gaussian Noise Generator Section.
6. Noise Adder section
7. FSK demodulator using PLL detector
8. Integrated & Dump Filter (Matched Filter)
9. Comparator Section
10. Power supply section
Output 2K2 preset is used to vary output level. The outputs are two ASK Modulated
signals.
The function of this section is to generate phase synchronized carrier signal with
respect to modulating digital NRZ input. It converts 640KHz and 320 KHz. TTL
Clock signal in to 640KHz and 320KHz. Sine wave carriers signal using pie filter of
lOOuH coil and two 100 Pf capacitors. These signal are given as carrier signal to
balanced modulators as one input.
This section adds two input signals with unity gain. This is used to add to ASK
signals to converts into FSK signal.
Four-transistor circuit is used to generate Gaussian noise signal. The amplitude pot
varies its amplitude from FSK signal.
This section adds FSK modulated signal and Gaussian noise signal. The output is
Noisy FSK signal.
This circuit is based on PLL made of 1C 4046. The free running frequency of PLL is
set at 320 KHz value. Hence when FSK signal having two frequency 320 KHz and
640 KHz is given to it input, it produced demodulated signal locked to 320 KHz.
Hence output is raw data signal. This signal is then given to squarer circuit.
OBSERVATION TABLE:-
4. CARRIER-2 2V 666K
5. BM-1O/P 3V -
6. BM-2 O/P 3V -
7. ADEER O/P 3V -
CONCLUSION:-
Thus according to change in I/p binary data the frequency of the o/p waveform is
varied between 320k &640 kHz.