CH341 Asd 2

Page 1 CH341 Chinese Manual (2)
1
USB bus adapter chip CH341
Chinese manual (2): parallel port and serial port instructions
Version: 2C
HTTP: //wch.c N
1, parallel port function description
1.1. General description
CH341 parallel port is active parallel port, in the computer-side program contro
l, you can directly from the external circuit input and output data, a
Do not need an external microcontroller / DSP / MCU.
CH341 parallel port has two kinds of interface: EPP and MEM mode. EPP is similar
to EPP V1.7 or EPP V1.9
Specification, MEM mode similar to the INTEL timing memory read and write mode.
The default mode after chip reset is EPP, which is configured on USB
After the computer program can be controlled at any time CH341 in the above two
ways to switch between. There is also a way to BUS,
7-bit address and 8-bit data are provided in the form of address and data multip
lexed bus.
1.2. EPP parallel port
The main pins of the EPP parallel port include the WR # pin, the DS # pin, the A
S # pin, the WAIT # pin, and the timing of the relevant signal.
According to EPP specifications V1.7 and V1.9.
The EPP mode performs specific operations through the logical combination of WR
#, DS #, and AS #. WR # is used to indicate the current data or address transfer
party
To the computer side, the high level is the external circuit to perform a read o
peration, the low level is the external circuit to write operations. Strobe sign
al
Is a low level effective pulse signal, the strobe signal includes data strobe DS
# and address strobe AS #, DS # effectively perform data operation, AS #
Effectively perform address operations. The actual operation of the EPP occurs d
uring the gating signal valid period, for example, when WR # is high, the DS # o
utput
Pulse, the implementation of a data read operation; WR # is low during the AS #
output pulse, the implementation of an address write operation.
CH341A EPP data read and write operations DS # support WAIT # wait signal, in CH
341 start output low level strobe signal, such as
If WAIT # is low, the strobe signal will remain low until WAIT # returns to high
or 85uS waits
End the output.
CH341A EPP address read and write operations AS # does not support WAIT # wait s
ignal, so EPP address read and write operations than data read and write operati
ons
Slightly faster.
The minimum effective width of the strobe signal of the write operation is 0.16
uS or 0.25 uS, and the low level of the strobe signal of the read operation is
The effective width of the minimum is 0.25uS or 0.33uS, the ideal state of the m
aximum transmission speed is 800KB / s, in the WINDOWS XP SP2 environment
Under the use of continuous large data block for speed testing, the measured tra
nsmission speed is about: download 510KB / S, upload 560KB / S.
1.3. MEM parallel port
The main pins of the MEM parallel port include the WR # pin, the RD # pin (alias
for the DS # pin), the A0 pin (AS # pin alias), WAIT #
Pin.
MEM mode is similar to the memory read and write, WR # and RD # are active low p
ulse signal. MEM the actual operation occurred
During the WR # or RD # active period, for the computer side, when the WR # is v
alid, the external circuit is written and when the RD # is valid
The part circuit performs a read operation. A0 is used to indicate the address o
f the current read and write operation, for example: the inverse of A0 and A0 is
used for two external
Device chip select; or A0 = 1 when the operation points to the external device c
ommand port, and A0 = 0 when the operation point to the data port.
The MEM read and write operations of the CH341A support the WAIT # wait signal.
WR # low effective width of the minimum is 0.25uS, RD # low effective width is 0
.33uS minimum, the ideal state of the largest
The transmission speed is 800KB / s. Measured transmission speed and EPP data re
ad and write almost, but slightly lower than the EPP address read and write oper
ation speed.
1.4. BUS Parallel (It has not been fully tested)
The main pins of the BUS parallel port include the WR # pin, the RD # pin (alias
for the DS # pin), the ALE pin (AS # pin alias), WAIT #
Pin.
Page 2
CH341 Chinese Manual (2)
2
BUS mode is equivalent to more address lines MEM mode, WR # and RD # are low act
ive pulse signal, in each read and write pulse
Before data, the data bus D0-D7 first outputs the 7-bit destination address to b
e operated, and then the ALE signal outputs a high level so that the external gr
ound
The latch circuit (for example, 74LS373) latches the 7-bit address and outputs i
t for chip select of the external device. Then, WR # or RD #
One of the output read and write pulses. The actual read and write operation of
BUS occurs during the WR # or RD # active period. For the computer side,
When WR # is active, the external circuit is written and the external circuit is
read when RD # is active.
CH341A BUS read and write operations support WAIT # wait signal.
WR # low effective width is 0.33uS minimum, RD # low effective width is 0.51uS m
inimum, the ideal state of the largest
The transmission speed is 300KB / s, but the speed may be only 1K / S when perfo
rming multiple read / write operations for multiple I / O addresses.
1.5. Auxiliary pin
The auxiliary pins include the RST # pin and the INT # pin, as well as pins such
as ERR #, SLCT, PEMP.
RST # pin is the reset output pin, when it is low, indicating CH341 chip is rese
t or computer-side program requirements
Reset the external circuit. INT # pin is the interrupt request input pin, when i
t detects a rising edge, the computer side of the program will receive an interr
upt
Notice. The other pins are custom general-purpose input pins, and the computer-s
ide application can query its pin status.
2, synchronous serial port function description
2.1. General description
CH341 synchronous serial port is an active serial port, only as Host / Master ho
st side, in the computer-side program control, can
To directly from the external circuit input and output data, generally do not ne
ed an external microcontroller / DSP / MCU.
CH341A using FlexWire (TM) technology, through the computer-related program cont
rol can be achieved: 2-wire serial port, 4-wire
Serial port, 5-wire serial port, which is a 2-wire serial port and 4-wire serial
port is more commonly used.
2.2. 2-wire serial port
The main pins of the 2-wire serial port include the SCL pin and the SDA pin. SCL
is used for unidirectional output synchronous clock, open drain output and buil
t on
Pull resistor, SDA for quasi-bidirectional data input and output, open drain out
put and input and built-in pull-up resistor.
2-wire serial port of the basic operating elements include: start bit, stop bit,
bit output, bit input.
The start bit is defined as the falling edge of the SCL output (switching from h
igh to low) when SDA is high.
The stop bit is defined as the rising edge of the SCL input (switching from low
to high) when SDA is high.
The bit output is defined as SDA output bit data when SCL is low, and then SCL o
utputs a high pulse.
The bit input is defined as SCL output high pulse, and bit data is input from SD
A before falling edge.
The byte output is defined as 8 bits of output and one bit is used for the ackno
wledge.
The byte input is defined as 8 bits of input and 1 bit of output is used for ack
nowledgment.
2-wire serial data input and output in bytes, each byte contains 8 bits, high in
the front.
CH341 2-wire serial port supports two-wire serial A / D, D / A, memory and I / O
expansion chip. For example, the common 24C series string
Line EEPROM: 24C01A to 24C16, 24C32 to 24C1024 and so on.
2.3. 4-wire serial interface (It has not been fully tested)
The main pins of the 4-wire serial interface include the DCK pin, the DIN pin, t
he DOUT pin, and the chip select pins CS0, CS1, and CS2. DCK is used
One-way output synchronous clock, DIN for unidirectional input data, DOUT for un
idirectional output data, chip select pin CSn for selecting device.
4-wire serial port of the basic operating elements include: chip select, chip se
lect the end of the bit output, bit input.
The chip select is defined as the chip select pin CSn output active level (which
can be defined as high or low).
Chip select end is defined as chip select pin CSn output non-active level.
The bit output is defined as DOUT output bit data when DCK is low, and then DCK
outputs a high pulse.
The bit input is defined as input bit data from DIN when DCK is high.
The byte output is defined as 8 bits of output and the byte input is defined as
8 bits of input.
Page 3
3
4-wire serial data input and output in bytes, each byte contains 8 bits, support
the low before the first and high in the front.
2.4. 5-wire serial interface (It has not been fully tested)
The main pins of the 5-wire serial port include the DCK pin, the DIN pin, the DI
N2 pin, the DOUT pin, the DOUT2 pin, the chip select pin CS0,
CS1, CS2. DCK for one-way output synchronous clock, DIN and DIN2 for unidirectio
nal input data, DOUT and DOUT2 for unidirectional input
The chip select pin CSn is used to select an external device.
5-wire serial port is a 4-wire serial port to add a set of data input DIN2 and a
set of data output DOUT2 version.
5-wire serial port of the basic operating elements include: chip select, chip se
lect the end of the two-bit output, two-bit input.
The two-bit output is defined as DOUT and DOUT2 output bit data when DCK is low,
and then DCK outputs a high level pulse. one
Byte 8 bits of data, the upper 4 bits are output from DOUT and the lower 4 bits
are output from DOUT2.
The two-bit input is defined as input bit data from DIN and DIN2 when DCK is hig
h. A byte of 8 data, 4 bits high
Since the DIN input, the lower four bits are from the DIN2 input.
The byte output is defined as a byte of 8 bits divided into two groups of 4 bits
respectively output.
The byte input is defined as the input of two groups of four bits into one byte.
5-wire serial port data input and output in nibble units, each nibble with 4 bit
s, support low before the first and high in the front.
To generate byte output separately in DOUT and DOUT2, a two-byte output combinat
ion is required.
The CH341 5-wire serial port is used to simulate a synchronous serial interface
with multiple I / O.
2.5 Bit operations (It has not been fully tested)
Under normal circumstances, CH341 synchronous serial port operation is byte-base
d units, an operation may be a byte or a few
Even dozens of bytes. And the actual application may need to input or output non
-8 times the data bits, such as an A / D acquisition chip needs
Input 10-bit data, in order to facilitate this application, CH341's FlexWire (TM
) technology provides a basic operation that can be done once
Input or output 1-bit data, re-use the operation to enter 2-bit data, plus a byt
e operation, in order to achieve 10
Data input and output. This method is only applicable to 4-wire serial port or 5
-wire serial port, can control DCK, DOUT, DOUT2, CS0, CS1,
The CS2 pin generates a bit output that enables a bit from DCK, DIN, DIN2, DOUT,
DOUT2, CS0, CS1, CS2 pins
enter.
2.6. Auxiliary pins
Synchronous serial port applications under the auxiliary pin and parallel applic
ations under the same, please refer to the parallel function description.
3, the computer side of the software
On the computer side of the Windows operating system, CH341 parallel port driver
and dynamic link library DLL to the application provided
Application layer interface, including: device management API, parallel port dat
a transfer API, synchronous serial data transfer API, interrupt handling API.
For the description of API parameters, please refer to CH341DLL.H, the main API
is as follows.
3.1. Device Management API
CH341OpenDevice (// open the CH341 device, return the handle, the error is inval
id
ULONG iIndex); / / specify the CH341 device serial number, 0 corresponds to the
first device
CH341 as a device, you must first use before you can use
CH341CloseDevice (// Turn off the CH341 device
ULONG iIndex); // Specify the CH341 device serial number
After using CH341, or before the application exits, the CH341 device should be t
urned off
Page 4
4
CH341SetDeviceNotify (// set the device event notification program
ULONG iIndex, // Specifies the CH341 device number, 0 corresponds to the first d
evice
PCHAR iDeviceID, // optional parameter, point to string, specify the ID of the d
evice being monitored, the string ends with \ 0
MPCH341_NOTIFY_ROUTINE iNotifyRoutine); // specify the device event callback pro
gram
Used to monitor the pluggable events of the CH341 device to ensure that the appl
ication knows at all times whether the USB device is present,
Ready to pull out after sending and receiving data, and timely response to the i
nsertion of USB devices
CH341GetStatus (/ / through CH341 direct input data and status, similar to the A
PI and CH341GetInput
ULONG iIndex, // Specify the CH341 device serial number
PULONG iStatus); // points to a double word unit that holds the state data
In the acquired status data: bit 7 - bit 0 corresponds to the D7-D0 pin of CH341
, bit 8 corresponds to the ERR # pin of CH341, bit 9 corresponds to CH341
Of the PEMP pin, bit 10 corresponds to CH341 INT # pin, bit 11 corresponds to CH
341's SLCT pin, bit 13 corresponds to CH341
BUSY / WAIT # pin, bit 14 corresponds to CH341's AUTOFD # / DATAS # pin, bit 15
corresponds to CH341's SLCTIN # / ADDRS #
The bit 23 corresponds to the SDA pin of CH341
CH341SetOutput (/ / set CH341 I / O direction, and through CH341 direct output d
ata
// Use this API with caution to prevent the I / O direction from changing the in
put pin to output and cause a short circuit between other output pins.
ULONG iEnable, // data valid flag
ULONG iSetDirOut, / / set the I / O direction, bit 0 is the corresponding pin for
the input, the location of the corresponding pin for the output
ULONG iSetDataOut); // output data, if the I / O direction is output, then the b
it data will be output through the pin
The above I / O direction and output data are represented by 32-bit data, where:
bit 7 - bit 0 corresponds to the D7-D0 pin of CH341, bit 8 corresponds
CH341 ERR # pin, bit 9 corresponds to CHMP1 PEMP pin, bit 10 corresponds to CH34
1 INT # pin, bit 11 corresponds to CH341
Of the SLCT pin, bit 13 corresponds to CH341's WAIT # pin, bit 14 corresponds to
CH341's DATAS # / READ # pin, bit 15 corresponds
CH341 ADDRS # / ADDR / ALE pin
In addition, the following pins can only be output, regardless of I / O directio
n: bit 16 corresponds to CH341 RESET # pin, bit 17 corresponds to CH341
WRITE # pin, bit 18 corresponds to CH341's SCL pin, bit 29 corresponds to CH341'
s SDA pin
CH341Set_D5_D0 (/ / set CH341 D5-D0 pin I / O direction, and through the D5-D0 p
in directly output data
// Use this API with caution to prevent the I / O direction from changing the in
put pin to output and cause a short circuit between other output pins.
ULONG iSetDirOut, / / set D5-D0 pin of the I / O direction, clear the 0 pin is the
input, set the pin for the output
ULONG iSetDataOut); / / set D5-D0 pin output data, only when the I / O direction
for the output to take effect
3.2. Interrupt handling API
CH341SetIntRoutine (// Set the interrupt service routine
MPCH341_INT_ROUTINE iIntRoutine); // specify the interrupt service routine, NULL
to cancel the interrupt service
Set CH341 interrupt service routine, iIntRoutine is a mPCH341_INT_ROUTINE format
subroutine,
When the INT # pin of CH341 has a rising edge, the DLL automatically calls iIntR
outine and provides it with a pin state parameter,
In the pin status parameter, bit 1 indicates that the corresponding pin is high,
bit 0 indicates that the corresponding pin is low,
Bit 7 corresponds to the D7-D0 pin of CH341, bit 8 corresponds to the ERR # pin
of CH341, bit 9 corresponds to the PEMP pin of CH341,
Bit 10 corresponds to the INT # pin of CH341, bit 11 corresponds to the SLCT pin
of CH341
For example: main program
Main {
...
CH341OpenDevice (0); // open the device, for 0 # devices, if there are multiple,
you can count
CH341SetIntRoutine (0, myInterruptEvent); // set the interrupt service routine
Page 5
5
... read and write data, or after receiving the interrupt service routine notifi
cation interrupt
CH341CloseDevice (0); // Turn off the device after use
}
Interrupt service routine, when the CH341 INT # pin appears on the rising edge,
the DLL will automatically call the subroutine
Void
CALLBACK
MyInterruptEvent (unsigned long
PinStatus) {
If (PinStatus & mStateBitERR) printf ("ERR # pin is high when an interrupt occur
s");
Else printf ("ERR # pin is low when an interrupt occurs");
... handle or notify the main program itself
}
3.3. Parallel Port Data Transfer API
CH341InitParallel (// resets and initializes the parallel port, RST # outputs a
low level pulse
ULONG iMode); // specify the parallel port mode: 0 for the EPP mode, 2 for the M
EM mode,> = 256 to keep the current mode
In CH341 power automatically when the initialization port, if necessary, you can
re-initialize the port to clear the buffer.
In the initialization process, RST # pin will output 100uS width of the low-leve
l pulse, used to notify the external device reset,
CH341EppReadData (// EPP mode read data: WR # = 1, DS # = 0, AS # = 1, D0-D7 = i
nput
PVOID oBuffer, // points to a large enough buffer to hold the read data
PULONG ioLength); // point to the length of the unit, the length of the preparat
ion for the read, after returning the actual read length
Read data continuously in EPP timing, 0 to 4096 bytes in length, for example:
UCHAR buf [1024];
ULONG len = 1024;
CH341EppReadData (0, buf, & len); // Read 1KB of data in EPP mode for 0 # device
s
CH341EppReadAddr (// EPP mode read address: WR # = 1, DS # = 1, AS # = 0, D0-D7
= input
PVOID oBuffer, // points to a large enough buffer to hold the read address data
The address data is read continuously at EPP timing, which is 0 to 4096 bytes in
length and is not normally used in standard EPP timing
CH341EppWriteData (// EPP write data: WR # = 0, DS # = 0, AS # = 1, D0-D7 = outp
ut
PVOID iBuffer, // point to a buffer, place the data ready to write
PULONG ioLength); // point to the length of the unit, the input is ready to writ
e the length of the return to the actual length of the written
Write data continuously in EPP timing, 0 to 4096 bytes in length, for example:
UCHAR buf [1024];
ULONG len = 1024;
Placing data in buf, ready to write in EPP
CH341EppWriteData (0, buf, & len); // Write 1KB of data in EPP for 0 # devices
CH341EppWriteAddr (// EPP write address: WR # = 0, DS # = 1, AS # = 0, D0-D7 = o
utput
PVOID iBuffer, // points to a buffer and places the address data to be written
Write the address data continuously in EPP timing, 0 to 4096 bytes in length, an
d write only one byte in the standard EPP timing
Page 6
6
CH341EppSetAddr (// EPP mode set address: WR # = 0, DS # = 1, AS # = 0, D0-D7 =
output
UCHAR iAddr); // Specify the EPP address
Outputting an address in EPP timing is a simplification of CH341EppWriteAddr
CH # 1, DS # / RD # = 0, AS # / ADDR = 0, D0-D7 = input
PVOID oBuffer, // points to a large enough buffer to hold the data read from add
ress 0
Read data continuously in MEM order, 0 to 4096 bytes in length, ADDR = 0 during
read operation, for example:
UCHAR buf [1024];
ULONG len = 1024;
CH341MemReadAddr0 (0, buf, & len); // Read 1K data from address 0 in MEM for 0 #
device
CH # 1, WR # = 1, DS # / RD # = 0, AS # / ADDR = 1, D0-D7 = input
PVOID oBuffer, // points to a large enough buffer to hold the data read from add
ress 1
Read data continuously in MEM order, 0 to 4096 bytes in length, ADDR = 1 during
read operation
Write the address 0: WR # = 0, DS # / RD # = 1, AS # / ADDR = 0, D0-D7 = output
PVOID iBuffer, // point to a buffer, place the data ready to write to address 0
Write data continuously in MEM order, 0 to 4096 bytes in length, ADDR = 0 during
write operation, for example:
UCHAR buf [1024];
ULONG len = 1024;
Places the data in buf, ready to write in MEM mode
CH341MemWriteAddr0 (0, buf, & len); // Write 1K data to address 0 for MEM in 0 #
CH # 1, WR # = 0, DS # / RD # = 1, AS # / ADDR = 1, D0-D7 = output
PVOID iBuffer, // point to a buffer, place the data ready to write to address 1
Write data continuously in MEM sequence, 0 to 4096 bytes in length, ADDR = 1 dur
ing write operation
3.4. Synchronous serial data transfer API
CH341ReadI2C (// read one byte of data from a two-wire serial port, only for 7-b
it devices
UCHAR iDevice, // lower 7 bits specify the device address
UCHAR iAddr, // Specifies the address of the data unit
PUCHAR oByte); // points to a byte unit that holds the read byte data
CH341WriteI2C (// Write one byte of data to a two-wire serial port, only for 7-b
it devices
UCHAR iDevice, // lower 7 bits specify the device address
UCHAR iAddr, // Specifies the address of the data unit
UCHAR iByte); // the byte data to be written
Page 7
7
CH341WriteRead (// execute the data flow command, first output and then enter
ULONG iWriteLength, // write length, ready to write length
PVOID iWriteBuffer, // points to a buffer and places the data to be written
ULONG iReadStep, // The length of a single block to be read, the total length is
(iReadStep * iReadTimes)
ULONG iReadTimes, // the number of times to read
PULONG oReadLength, // points to the length of the unit, after returning the act
ual read length
PVOID oReadBuffer); // points to a large enough buffer to hold the read data
First output data and then enter the data, the implementation of data flow comma
nd, suitable for synchronous serial port and so on.
CH341SetStream (// set the synchronous serial port flow mode
ULONG iMode); // specify the mode, see the next line
// bit 1 bit 0: I2C speed / SCL frequency, 00 = low speed 20KHz, 01 = standard 1
00KHz, 10 = fast 400KHz, 11 = high speed 750KHz
// bit 2: SPI I / O count / IO pin, 0 = single entry (4 line interface), 1 = dou
ble entry double (5 line interface)
// bit 7: Bit order in SPI byte, 0 = low first, 1 = high first
// other reservations must be 0
CH341StreamI2C (// processing two-wire serial data stream for all two-wire seria
l device
ULONG iWriteLength, // the number of data bytes to be written
PVOID iWriteBuffer, / / point to the buffer, put ready to write the data, the firs
t byte is the device address and read and write bits
ULONG iReadLength, // The number of bytes of data to read
PVOID oReadBuffer); / / point to the buffer, after the return is read into the d
ata
Two-wire serial device operation. For example, 256 bytes of data are read from t
he address starting at 3200H from 24C256:
UCHAR OutBuf [5], InBuf [300]; // write data buffer, read data buffer
OutBuf [0] = 0xA1; OutBuf [1] = 0x32; OutBuf [2] = 0x00; // Write data: Device a
ddress and cell address
CH341StreamI2C (0, 3, OutBuf, 256, InBuf); / / for 0 # device processing two-lin
e serial data stream
CH341ReadEEPROM (// reads the data block from the EEPROM at a speed of approxima
tely 56K bytes
ULONG
IIndex, // Specifies the CH341 device serial number
EEPROM_TYPE iEepromID, // Specify the EEPROM model
ULONG
IAddr, // Specifies the address of the data unit
ULONG
ILength, // the number of bytes of data to read
PUCHAR
OBuffer); // points to a buffer that returns after reading the data
The EEPROM for reading and writing supports various types of EEPROM memory from
24C01 to 24C16 and from 24C32 to 24C4096.
CH341WriteEEPROM (// Write the data block to the EEPROM
ULONG
IIndex, // Specifies the CH341 device serial number
EEPROM_TYPE iEepromID, // Specify the EEPROM model
ULONG
IAddr, // Specifies the address of the data unit
ULONG
ILength, // the number of bytes of data to be written
PUCHAR
IBuffer); // point to a buffer and place the data to be written
CH341StreamSPI4 (// processing SPI data stream, 4-wire interface, speed of about
68K bytes
// SPI timing: DCK clock output, defaults low, DOUT is output before clock risin
g edge, DIN is input after falling edge of clock
ULONG iChipSelect, // chip select control, bit 7 is 0 is ignored chip select con
trol, bit 7 is 1 parameter is valid
ULONG iLength, // The number of data bytes to be transferred
Page 8
8
PVOID ioBuffer); // buffer, place the data to be written from DOUT, and return t
he data read from DIN
For examples of using APIs in the DLL, refer to the source code and examples in
the CH341 evaluation board documentation.
4, parameters
4.1 MEM way timing parameters. (Test conditions: TA = 25 , with reference to the
accompanying drawings first half)
name
Parameter Description
Minimum value
Typical value
The maximum value
unit
TWMEM
Write the active low width of WR #
230
250
100000
NS
TRMEM
Read the active low width of the strobe RD #
300
330
100000
NS
TAS
WR # or RD # is valid before the address setup time
80
NS
TAH
WR # or RD # is valid after the address hold time
230
NS
TDS
WR # Valid before data output setup time
80
NS
TDH
WR # valid data after the output hold time
300
NS
TIS
RD # Invalid data input setup time before
170
NS
TIH
RD # Invalid data input hold time
0
NS
MEM
EPP
4.2 EPP way timing parameters. (Test conditions: TA = 25 , with reference to the
accompanying drawings latter part)
name
Parameter Description
Minimum value
Typical value
The maximum value
unit
TWEPPD
The effective low width of the strobe of the data write operation
220
250
100000
NS
TWEPPA
The active low width of the gating of the address write operation
150
160
10000
NS
TREPPD
The effective low width of the gating of the data read operation
300
330
100000
NS
TREPPA
The active low width of the gating of the address read operation
220
250
10000
NS
TXS
Gating the effective direction before WR # setup time
500
NS
TXH
After the gating is valid, the WR # is held for the time
150
NS
TDS
The data is set up before the gating is valid
80
NS
TDH
Gain the data after the effective output retention time
220
NS
Page 9
9
TIS
The data entry setup time before the stall is invalid
170
NS
TIH
The data entry hold time after the stall is invalid
0
NS
4.3 BUS mode timing parameters (test conditions: TA = 25 , refer to the diagram,
the unit value of nS)
5, application
5.1 Basic connection (below)
P4 is a USB port, USB bus includes a pair of 5V power lines and a pair of data s
ignal lines, usually, +5 V power line is red, then
The ground is black, the D + signal line is green, the D-signal line is white. U
SB bus to provide the maximum supply current can reach 500mA, one
In general, CH341 chip and low-power USB products can be directly used USB bus t
o provide 5V power supply. If the USB product passes
If the standby power supply is provided for other power supply, the CH341 should
also use the standing power supply. If you need to use the USB bus at the same
time
Source, then you can connect the USB bus to the 5V power cord with a 5V standby
power supply for the USB product through a resistor with a resistance of about 1,
and both
The ground wire is directly connected.
Capacitor C18 for CH341 internal power supply node decoupling, C18 is the capaci
ty of 0.01F monolithic or high frequency ceramic capacitors. Capacitance C19
And C20 for external power decoupling, C19 is a capacity of 0.1F monolithic or hi
gh frequency ceramic capacitors. Crystal X4, capacitors C16 and C17
Used for clock oscillation circuit. X4 frequency is 12MHz, C16 and C17 is a capa
city of 15pF ~ 30pF monolithic or high frequency ceramic capacitors.
In the design of printed circuit board PCB, need to pay attention: decoupling ca
pacitors C18 and C19 as close to the CH341 connected pin; so that D +
And D-signal lines close to the parallel wiring, as far as possible on both side
s to provide ground or copper, to reduce the interference from the outside world
; try to shorten the XI
And XO pin-related signal line length, in order to reduce the high-frequency int
erference, can be around the relevant components around the ground or copper.
Figure SDA pin directly grounded, so CH341 work in parallel mode.
Page 10
10
5.2. EPP parallel port mode application (below)
The figure uses non-gate and or gate to decode, produce more control signals, if
the actual application only requires less input and output,
Then you can save these decoding, and directly use AS #, DS # and other control
signals for a simple implementation.
5.3. MEM parallel mode application (below)
The A0 pin (AS # pin) has not been used to implement 8-bit digital signal input
and 8-bit digital signal output. If used
A0 control 74LS139 respectively on -READ and -WRITE address chip select, then CH
341 can connect two groups 74LS244 +74LS273,
To achieve 16-bit digital signal input and 16-bit digital signal output.
Page 11
11
5.4. Two-wire synchronous serial application (below)
2-wire synchronous serial port to support multiple devices address recognition,
the use of data stream read and write data to support a large read and write dat
a block.
CH341's two-wire serial port supports 20KHz / 100KHz / 400KHz / 750KHz speed, wi
th a hardware two-wire serial port device can be connected
To choose a higher speed, and software simulation of two-wire serial microcontro
ller can only choose a lower speed (such as 20KHz).
The resistor R4 is used to force the ACT # pin during the CH341 function configu
ration to low, thus disabling the CH341 configuration when accessing 2
Line synchronization serial port and affect other devices on the bus, if you do
not need LED display, you can save the resistor R3 and LED L2, and
And R4 can be connected to the RST # terminal to GND.
5.5. BUS parallel mode application (below)
Figure A23 control U23 latch to get 7-bit address A0-A6, can be used to drive th
e memory or re-decoding to produce multiple chip select.
5.6. Digital Input Output (bottom)
If you only need less than 8 input and output pins, you can also save a variety
of external 74LS devices, the direct use of CH341
Of the D7 ~ D0 and other pins, by calling the DLL CH341Set_D5_D0 API to achieve
a simple input and output.

CH341 Asd 2

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

CH341 Asd 2

Uploaded by

Copyright:

Available Formats

Page 1 CH341 Chinese Manual (2)

You might also like