ISA Transactions 55 (2015) 175187

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ISA Transactions
journal homepage: www.elsevier.com/locate/isatrans

A frequency response model matching method for PID controller

design for processes with dead-time
Md Nishat Anwar n, Somnath Pan
Department of Electrical Engineering, Indian School of Mines, Dhanbad 826004, India

art ic l e i nf o a b s t r a c t

Article history: In this paper, a PID controller design method for the integrating processes based on frequency response
Received 15 May 2013 matching is presented. Two approaches are proposed for the controller design. In the rst approach, a
Received in revised form double feedback loop conguration is considered where the inner loop is designed with a stabilizing
23 August 2014
gain. In the outer loop, the parameters of the PID controller are obtained by frequency response
Accepted 30 August 2014
Available online 11 November 2014
matching between the closed-loop system with the PID controller and a reference model with desired
This paper was recommended for publica- specications. In the second approach, the design is directly carried out considering a desired load-
tion by Prof. A.B. Rad disturbance rejection model of the system. In both the approaches, two low frequency points are
considered for matching the frequency response, which yield linear algebraic equations, solution of
Keywords: which gives the controller parameters. Several examples are taken from the literature to demonstrate
PID controller
the effectiveness and to compare with some well known design methods.
Integrating process
& 2014 ISA. Published by Elsevier Ltd. All rights reserved.
Dead-time
Frequency response matching
Double feedback loops
Load-disturbance rejection

1. Introduction (IMC-PID) based on the internal model control (IMC) principle in

The proportional-integral-derivative (PID) controller has its
widespread acceptance in the industrial processes due to its
simplicity in understanding and its applicability to a large class
of processes having different dynamics. Numerous PID controller
tuning methods and rules may be found in [1]. The integrating
process is a special class of unstable processes and it attracts
special attention of the researchers resulting a different type of PID
controller design methods. Chidambaram and Sree [2] have pre-
sented an analytical tuning method which is based on nding the
parameters of overall transfer function in a transformed domain to
have desired set-point response. The PID controller design based
on the direct synthesis design (DS) is given by Chen and Seborg
[3]. The tuning rule for PI/PID controllers based on the maximum
resonance specication is proposed by Poulin and Pomerleau [4].
Visioli [5] has proposed a design method based on an error
minimization criteria using the genetic algorithm. Ali and Majhi
[6] has presented a design method based on minimization of
integral square error (ISE) performance criteria with a constraint
on the slope of the Nyquist curve at the gain cross over frequency.
Rivera et al. [7] have provided a PID controller tuning method
n the most accepted PID tuning rule given by Ziegler and Nichols (ZN)
Corresponding author.
E-mail addresses: nishatnith@gmail.com (M.N. Anwar),
somnath_pan@hotmail.com (S. Pan).
which the design parameter is the speed of the closed-loop
response. Skogestad [8] has proposed a simple analytic tuning
rule for model reduction and a PID tuning rule (SIMC) based on the
IMC principle. An extension of the IMC tuning method for the
integrating processes may be found in [9]. Shamsuzzoha and Lee
[10,11], Chia and Lefkowitz [12] have modeled the integrating
processes as stable processes with considerably very large time
constants and applied the IMC principle to design PID controllers
with improved load-disturbance rejection. An analytical method
for PID controller tuning with specied gain and phase margins
has been derived in [13].
The PID controller design methods for the integrating processes
with inverse response and time-delay may be found in [1416]. Gu
et al. [14] have presented a PI/PID controller design method based
on the H1 optimization and the IMC theory. Pai et al. [15] have
proposed a PI/PID controller design method using the direct
synthesis method for disturbance rejection (DS-d) where speed
of the closed-loop response has been optimized via the golden-
section searching technique. Jeng and Lin [16] have designed a
controller in Smith-type conguration which is then converted
into a PID controller in the classical feedback conguration using
the Maclaurin series.
The methods of Luyben [17], Tyrus and Luyben [18] along with
[19] use the frequency response information in tuning the PID
controller. These simple and attractive methods use only the critical

http://dx.doi.org/10.1016/j.isatra.2014.08.020
0019-0578/& 2014 ISA. Published by Elsevier Ltd. All rights reserved.
176 M.N. Anwar, S. Pan / ISA Transactions 55 (2015) 175187

frequency point of the process for tuning the PID controller. However, control the integrating processes.
these methods do not always provide satisfactory controllers for KI
wide variety of processes. Wang and Cluett [20] have presented a C s K P KDs 2
s
method for PID controller design by matching the frequency
where, Kp, K1, and KD are the proportional, the integral and the
response of the desired and actual closed-loop responses at two
derivative constants of the controller that are to be determined. In
specied frequency points. Vijayan and Panda [21] have designed the
Fig. 1, i is the input, y is the process output, r is the output of the
PID controllers for low order processes in double feedback loops to
set-point lter F(S), e is the error, u is the controller output, d is the
achieve stability and improved performance in such a way that the
disturbance, n is the measurement noise and x is the excitation to
inner feedback loop stabilizes the process using the ZN tuning rule
the process. From Fig. 1, the transfer functions from r to y and d to
and the outer loop (tuned by the IMC-PID rule) improves the set-
y may be written as, respectively,
point response. They [22] have also shown reduction of the over-
shoot for various types of processes by using suitable set-point lters. C sGP s
Gr;y s 3
In this paper, a PID controller design technique is proposed for 1 C sGP s
the integrating processes, which is based on frequency response
matching of the actual and the desired closed-loop systems at two GP s
Gd;y s 4
low frequency points. Two approaches are proposed. In the rst 1 C sGP s
approach, with a double feedback loop conguration, the inner The rst step of the design procedure is to choose or construct a
loop contains a stabilizing gain. In the outer loop, the parameters suitable reference model M r;y s which incorporates the desired
of the PID controller are obtained by the frequency response specications of the overall control system from r to y. The
matching of the actual model and a desired reference model at dynamics of the reference model should be such that it can be
two low frequency points. In the second approach, a reference achievable by the process dynamics with an implementable
model is chosen for a desired load-disturbance rejection and then controller. For example, dead-time of a process cannot be elimi-
the frequency response of the control system is matched with that nated in the closed-loop response by any controller. Hence, the
of the reference model to achieve the desired load-disturbance reference model is required to contain the dead-time term of the
rejection. process. Similarly, the inverse response of the process is to be
The desired closed-loop reference model is chosen considering included in the reference model. The proposed method offers the
the design requirement and the process dynamics. The method advantage to consider the industrial specications such as settling
gives a set of linear algebraic equations, solution of which gives the time, peak overshoot, etc. in time domain or gain margin, phase
controller parameters. Though, the frequency response matching margin, band width, etc. in frequency domain or damping factor,
is carried at two low frequency points only, a good set-point undamped natural frequency in complex domain. A good number
response as well as load disturbance rejection are achieved. Both of procedures for choosing a feasible reference transfer function
the proposed approaches are applicable to a wide range of may be found in [23]. However, from such industrial specications,
integrating processes with low or high order that may have we can always analytically construct a reference model of order up
dead-time and/or inverse response dynamics. Effectiveness of to 2 and it works well for the most of the industrial processes.
the proposed method is demonstrated through examples taken The reference model is constructed as
from the literature and favorably compared with some of the
N mr s  Ls
methods prevalent in the literature. M r;y s e 5
Dmr s
The rest of the paper is organized as follows. In Section 2, the
proposed design method is presented in detail. In Section 3, the where, Nmr s=Dmr s is in the form of a rational polynomial. It is
method is demonstrated through examples. Conclusion is shown obvious that M r;y s is required to have a minimum time-delay as
in Section 4. that of the process and the non-minimum phase zero of the
process, if any.
For achieving the desired set-point response of the closed-loop
system, the frequency responses of Gr;y s and M r;y s are matched
and may be written as
2. The design method

C sGP s



Gr;y s M r;y s
s j 6
An integrating process is considered as shown in Fig. 1 with the 1 C sGP s
s j
following transfer function. where, the LHS expression is equivalent with the RHS expression
in terms of frequency response and the unknown parameters of
N p s  Ls
GP s e 1 the controller C(s)are to be evaluated. The relation (6) may be
sDp s written as



M r;y s



where, N p s=sDp s is a rational transfer function and L is the time C sGP s
s j M o s
s j 7
delay of the system. The zeros of Dp(s) are all in the LHS of the 1 M r;y s
s j
s-plane. The PID controller with the following form is used to where, M o s may be called as equivalent open-loop reference
model. Eq. (7) gives
d



M o s

sDp sN mr s


C s
s j
Hs
s j
GP s
s j Dmr s  Nmr se  Ls N p s
s j
e u x y
i
F(s)
r
C(s) GP(s) 8
If H(s) could be implemented ideally, it would give the response
n
of Gr;y s exactly same as that of the desired model M r;y s. But the
term e  Ls in the expression of H(s) is not suitable for practical
implementation. The Pade approximation of e  Ls in terms of a
Fig. 1. Unity negative output feedback conguration. rational polynomial gives rise to a rational expression for H(s),
 M.N. Anwar, S. Pan / ISA Transactions 55 (2015) 175187 177

however, then the increased order of the controller would not be d

preferred for practical implementation. Moreover, a particular
e u y
structure, such as PID, may be sought for controlling the process. i
F(s)
r
C(s) K
x
G (s)
Hence, C(s), a low-order controller with a particular structure is n
required to approximate the behavior of H(s).
However, Eq. (8) may be written as,
C R jC I H R jH I 9

where, Fig. 2. Control system conguration with double feedback loops.

C s
s j C R jC I

where,
Hs
s j
H R jH I 2 3 " # " #
 10 0 KI H I 0
and C R ; C I ; H R and H I are the real functions of . A1 4 5; x1 ; and ; b1 ;
 11 1 KD H I 1
Separating the real and the imaginary parts, Eq. (9) may be written
as: Then, solution of Eq. (16) determines KI and KD. Thus, the
parameters of the PID controller are evaluated.
C R H R and
For the integrating processes, the proposed design method
C I H I 10 gives the integral constant KI 0 leading to a PD controller
In order to force equivalence of two real functions, C R (Appendix B). With this PD controller, the set-point response
and C I with H R and H I , respectively, one may equate an may be good but it fails to reject the load-disturbance. Thus, to
appropriate number of initial terms of the corresponding Taylor design a PID controller for the integrating processes which would
series expansion around 0. Thus, to accomplish matching of achieve good set-point response as well as load-disturbance
the LHS functions in Eq. (10) with the corresponding functions on rejection, the following two approaches are proposed.
the RHS, initial N derivatives of the corresponding functions are
equated at 0 to give 1. Use of double feedback loops as shown in Fig. 2, in which inner


loop stabilizes the system with a simple gain K and then the
k
k

d
d
outer loop is designed by following the proposed design
C 
H 
; k A 0; N 1 11
d k dk
R R


method.
0 0
2. Instead of designing the closed-loop system Gr;y s directly, one



k
k
may design the control system Gd;y s for achieving the desired
d
d

C I 
H I 
; k A 0; N  1 12 load-disturbance rejection. This approach requires a suitable
d k
d k

0 0 reference model M d;y s (from d to y) satisfying the load-
It can be shown by using the divided difference calculus as in [24] disturbance rejection specications.
that the derivative relations in Eq. (11) holds good approximately,
if the functions C R and H R are directly matched at around First approach:
0; i.e., A double feedback loop conguration is considered as shown in


Fig. 2, with K as the stabilizing gain and its range is 0 oK oK u ,
C R
H R

k k 13
where, Ku is the ultimate gain [25] for the integrating process.
where k is the small positive values around 0. Similarly, While designing the outer loop, the parameters of the PID


controller are obtained by following the proposed design method,
C I
H I
14 as discussed in Eq. (5)(16), applied for the system GIN s, where
k k

GIN s is given by:

It is clear from Eqs. (13) and (14) that N values of give 2N
linear algebraic equations with the unknown parameters. For 3 KGP s
GIN s 17
numbers of unknowns of the PID controller N is at least equal 1 KGP s
to 2 and for two frequency points 0 and 1 the following
Second Approach:
expression is obtained as shown in Appendix A.
In this approach, the reference model (from d to y) M d;y s is
Ax b 15 constructed for a desired load-disturbance rejection as follows.

where, Nmd s  Ls
M d;y s e 18
2 3 2 3 Dmd s
1 0 0 2 3 H R 0
60 KP
6  10 0 7
7
6 7
6 H I 0 7 where N md s=Dmd s is a rational transfer function and the
A6 7; x 6
4 K 7
5 ; and ; b 6 7 reference model M d;y s must have one zero at origin so as to
61 0 0 7 I 6 H R 1 7
4 5 KD 4 5 achieve load-disturbance rejection. The numerator of M d;y s is
0  11 1 H I 1
required to contain a minimum time-delay as e  Ls and non-
minimum phase zeros of the process, if any.
Directly from Eq. (15), we get two values of Kp as:
Following the proposed design method, Eq. (6) is to be
K P1 H R 0 ; K P2 H R 1 modied as


It is observed from various examples, that K P1  K P2 and we GP s


Gd;y s
M d;y s
s j 19
may consider the value of Kp as any one of K P1 or K P2 or an average 1 C sGP s
s j
of these.
Then, to evaluate the remaining parameters, KI and KD, Eq. (15) and Eq. (19) may be simplied as
may be simplied as  


1 1

C s
s j 

A1 x1 b1 16 M d;y s GP s
s j
178 M.N. Anwar, S. Pan / ISA Transactions 55 (2015) 175187

 

N p sDmd s  Dp sN md s


3. Simulation results

Hs
s j 20
N p sN md se  Ls s j
Software simulation has been carried for various examples of
The rest of the design procedure is as per Eqs. (9)(16) to the processes taken from the literature. Set-point responses are
determine the values of K P ; K I and K D . shown for unit-step input. Load-disturbance rejections are shown
for unit-step disturbance applied at the process input after the set-
point responses attain the steady-state. Controller outputs are
2.1. Selection of frequency points shown for similar conditions.
The performances in terms of peak overshoot (OS), settling
Generally, the industrial processes show dominantly low-pass time (ts), integral square error (ISE) for the set-point responses;
dynamics in terms of the frequency response. For such cases, the maximum process output (yp), settling time (ts) and ISE for the
low frequency region is more important and frequency response load-disturbance responses; gain margin (GM), phase margin (PM)
matching at -0 ensures the desired steady-state response. As and maximum sensitivity (Ms, which is a measure of the robust-
per Eqs. (13) and (14) the frequency points for matching purpose


ness and is dened as M s max
1 CjGj  1
) are com-
are required to be sufciently small. With this consideration both 0rr1
the frequency points are selected very small values. The theoretical puted. A lower value of the maximum sensitivity is preferred in
range of the frequency for the frequency response is from 0 to 1 the range of 1.22.0 [1].
and it is meaningless to nd a small number with respect to this Further, to show the robustness of the proposed control
innite range. Here, the small values of frequency points are systems 10% changes in the gain and the time-delay of the
proposed to choose with respect to the bandwidth frequency processes are simultaneously considered and the corresponding
(b) of the desired reference model, where the bandwidth may responses for the perturbed processes are shown. To study the
be treated as an indication to the effective range of frequency effect of the measurement noise the Gaussian noise with a
response. This has been further elaborated in the illustration of variance of 0.005 is introduced after the set-point response attains
Example 1 in Section 3. the steady-state and the corresponding responses are plotted.
All the results are compared with some of the methods
prevalent in the literature.
2.2. Set-point lter
3.1. Example 1
In the process industries, load-disturbance rejection is more
important than the set-point tracking and a high load-disturbance An integrating second order plus dead-time (ISOPDT) process is
rejection sometime results into a highly oscillatory set-point taken from Ali and Majhi [6] as given by
response associated with large peak overshoot. In such case, a
set-point lter, F(s) may be incorporated in the control system, as e  4s
GP s
shown in Figs. 1 and 2, to reduce the peak overshoot as well as the ss 1
oscillation in the set-point response. This gives rise to a two- First approach: The gain K is taken as 0.15 with the peak
degree-of-freedom controller, where F(s) works as a set-point overshoot as 23.9% and the settling time as 37.2 s for the inner
weighting without degrading the load-disturbance rejection con- closed-loop response. For the design of the PID controller in the
trol. The most simple structure of the set-point lter may be taken outer loop the reference model M r;y s is chosen as given by
as Fs 1=s 1, where the time constant is to be chosen
e  4s
judiciously. A large value of reduces the peak overshoot and M r;y s
2s 1
oscillation at the cost of the speed of the set-point response. For
the integrating processes, it is observed that improved result The frequency points are chosen as 0 0.01 rad/s and 1
occurs for 0 o o t s =4, where ts is the settling time of the 0.02 rad/s and the proposed design method yields the PID con-
closed-loop control system without the lter. troller C1 as
The peak overshoot (OS) and the settling time (ts) of the closed- 0:1666
loop control system without the lter and of the lter for each C1s 0:6661 3:037s
s
example are shown in Table 1. The value of is adjusted through
The set-point lter has been found as
simulation to have improved set-point response. It is observed
from Table 1 that the values of have been obtained within ts/4 of 1
Fs
the corresponding examples. 2:2s 1
Second approach: For the purpose of design, the reference
Table 1 model M d;y s for load-disturbance rejection is chosen as
Set-point lter selection.
120se  4s
Example Method Set-point response before employing of Filter M d;y s
5s 115s 1
the lter 1/(s 1)
which gives the peak amplitude of the process output as 4.53 and
OS (%) ts (s) ts/4 (s) the settling time as 78.6 s for unit step load-disturbance. The
Example 1 Proposed C1 35 33.7 8.4 2.2
frequency points are chosen as 0 0.01 rad/s and 1 0.02 rad/s
Proposed C2 43.4 59.5 14.9 12 for frequency response matching and the proposed design method
Example 2 Proposed C1 7.3 40.5 10.1 1.5 yields the PID controller C2 as follows.
Proposed C2 89.2 57.8 14.5 11.5
0:0083
Example 3 Proposed C1 34.5 59.5 14.9 2.5 C2s 0:20 0:357s
Proposed C2 74 81.4 20.4 17 s
Example 4 Proposed C1 17.5 11.2 2.8 1.5
The set-point lter has been found as
Proposed C2 63.0 8.5 2.1 2
Example 5 Proposed C1 18.1 14.2 3.6 12 1
Proposed C2 75.9 24.8 6.2 5 Fs
12s 1
 M.N. Anwar, S. Pan / ISA Transactions 55 (2015) 175187 179

1.4 10
Proposed C1
1.2
8 Proposed C2
Ali and Majhi
1
6
SIMC
Proposed C1

Amplitude
Amplitude

0.8
Proposed C2
4
0.6
Ali and Majhi
SIMC
2
0.4

0.2 0

0 -2
0 50 100 150 200
Time (sec) Time (sec)

Fig. 3. Process output for Example 1; (a) Set-point response, (b) Load-disturbance response.

0.3
0.5
Proposed C1
0.25 Proposed C2 Proposed C1
Ali and Majhi Proposed C2
0
0.2 Ali and Majhi
SIMC
SIMC
Amplitude

Amplitude

0.15 -0.5

0.1
-1
0.05
-1.5
0

-0.05 -2
0 50 100 150 200
Time (sec) Time (sec)

Fig. 4. Controller output for Example 1; (a) During set-point response, (b) During load-disturbance response.

10 1.5
Proposed C1
8 Proposed C2
Ali and Majhi
1
6 SIMC
Amplitude

Amplitude

4
0.5
2 Proposed C1
Noise Signal
0
Proposed C2
0
-2
Ali and Majhi
0 50 100 150 200 SIMC
Time
-0.5
0 20 40 60 80 100 120 140
Fig. 5. Process output for perturbed system in Example 1.
Time

Fig. 6. Process output for Example 1 with the measurement noise.

The proposed methods have been compared with the methods
of Ali and Majhi [6] and SIMC [8] and the various simulation
results are shown in Figs. 36 and Table 2.
Proposed controller C1 gives the best set-point as well as
disturbance rejection responses whereas proposed C2 gives the
best controller output. Controller output for proposed C1 is
comparable to the other methods for set-point response. For
perturbed process, C1 gives the best set-point response whereas
C2 gives the best disturbance-rejection response. Overall response
in terms of ISE is the best by C1. The effect of the measurement
noise is found to be negligible in the process output.
3.1.1. Choice of frequency points selected
Various pairs of frequency points are chosen for the design
procedure and the obtained PID controller parameters are tabu-
lated in Table 3. t is observed from this table that as long as the
values of the frequency points are within a small percentage say,
0.110%, of the bandwidth frequency the parameter variation of
the obtained controllers is insignicant, which gives negligible
differences in the responses. With such observation from this
example along with the other examples followed a common pair
180 M.N. Anwar, S. Pan / ISA Transactions 55 (2015) 175187

Table 2
Performance comparison for Example 1.

Method Controller parameters GM (dB) PM (deg) Ms Set-point response Load-disturbance response Set-point lter F(s)

KP KI KD OS (%) ts (s) ISE yp ts (s) ISE

Proposed C1 (double loop) 0.6661 0.1666 3.037 7.05 63.4 1.33 2.6 25.8 6.818 6.25 44.2 196.2 1/(2.2s 1)
Proposed C2 (single loop) 0.20 0.0083 0.357 5.92 41.5 1.40 0.5 43.9 10.35 6.70 102.5 402.4 1/(12s 1)
Ali and Majhi [6] (single loop) 0.19 0.0084 0.53 5.10 51.8 1.43 26 59.8 7.899 6.32 77.2 400.8
SIMC [8] (single loop) 0.13 0.0039 0.126 9.36 46.8 1.26 30 81.5 8.87 8.76 155.5 1214

Table 3
Parameters of the PID controllers designed with various sets of frequency points for Example 1.

First approach b 0:49 rad=s rad/s Second approach b 0:26 rad=s

S. no. 0 1 KP KI KD S. no. 0 1 KP KI KD

1 0.005 0.01 0.6665 0.1667 3.033 1 0.0002 0.0004 0.20 0.0083 0.333
2 0.01 0.02 0.6661 0.1666 3.037 2 0.002 0.004 0.20 0.0083 0.350
3 0.04 0.08 0.6578 0.1667 3.044 3 0.005 0.01 0.20 0.0083 0.366
4 0.1 0.2 0.6528 0.1670 3.079 4 0.01 0.02 0.20 0.0083 0.357
5 0.04 0.08 0.20 0.0084 0.399

1.6
1.5
1.4

1.2 1.4

1 1.3
Amplitude

Amplitude

Proposed C1
0.8 Proposed C2
1.2
Ali and Majhi
0.6 Chidambaram and Sree
Proposed C1 1.1
0.4
Proposed C2
Ali and Majhi 1
0.2
Chidambaram and Sree
0 0.9
0 50 100 150 200
Time (sec) Time (sec)

Fig. 7. Process output for Example 2; (a) Set-point response, (b) Load-disturbance response.

of frequency values, i.e., 0 0.01 rad/s and 1 0.02 rad/s is The set-point lter has been found as
taken for all the examples. This means, 0 is taken in the range 1
of 0.27.2% of the bandwidth frequencies of the corresponding Fs
1:5s 1
reference models. However, in general the choice of frequency
points in the range of 0.110% of the bandwidth frequency has Second approach: The reference model M d;y s for the load-
been observed to give good results for the most of the processes. disturbance rejection is chosen as
4s
M d;y s e  6s
3.2. Example 2 5s 16:3s 1
which gives the peak amplitude of the process output as 0.26 and
An integrating plus dead-time (IPDT) process is considered the settling time as 35.5 s for unit step load-disturbance. The
from the literature [6] as given by design procedure yields the PID controller C2 as
0:0506  6s 0:24
GP s e C2s 4:32 9:46s
s s
First approach: The gain K is taken as 1.5 that gives the peak The set-point lter has been found as
overshoot as 1.5% and the settling time as 24.8 s for the inner
closed-loop system. In order to design the outer loop the reference 1
Fs
model M r;y s with the settling time as 42 s is chosen as 11:5s 1
The proposed methods have been compared with the methods
e  6s
M r;y s of Chidambaram and Sree [2], Ali and Majhi [6] and the various
6s 1
simulation results are shown in Figs. 710 and Table 4.
The obtained PID controller C1 is as given below. The controller C1 gives the best set-point response while C2
0:0833 gives the best load-disturbance response. Controller outputs of C1
C1s 0:7231 2:33s and C2 are equally better than the other methods. The GMPM
s
 M.N. Anwar, S. Pan / ISA Transactions 55 (2015) 175187 181

6
0.5
Proposed C1
Proposed C1
Proposed C2
4 0 Proposed C2
Ali and Majhi
Ali and Majhi
Chidambaram and Sree
Chidambaram and Sree
-0.5
2
Amplitude

Amplitude
-1
0
-1.5

-2
-2

-4 -2.5
0 50 100 150
Time (sec) Time (sec)

Fig. 8. Controller output for Example 2; (a) During set-point response, (b) During load-disturbance response.

2 transfer function as

e  4s
1.5 GP s
s4s 1
Amplitude

1
First approach: The inner loop gain is selected as 0.15 which
gives the peak overshoot as 44.5% and the settling time as 87.4 s
Proposed C1
for the inner closed-loop system. The reference model is chosen as
Proposed C2
0.5
Ali and Majhi
1
Chidambaram and Sree M r;y s e  4s
0:6s 13s 1
0
0 50 100 150 200
The design procedure gives the PID controller C1as
Time
0:132
Fig. 9. Process output for perturbed system in Example 2. C1s 0:457 6:16s
s

The set-point lter has been found as

2
1
Fs
1.5 2:5s 1

Second approach: The reference model for load-disturbance

Amplitude

1
rejection is chosen as

0.5 120s
Proposed C1
M d;y s e  4s
Noise Signla 5s 120s 1
0 Proposed C2
Ali and Majhi The PID controller C2 has been obtained as
Chidambaram and Sree
-0.5 0:0083
0 20 40 60 80 100 120 C2s 0:2348 0:540s
Time
s

Fig. 10. Process output for Example 2 with the measurement noise. The set-point lter has been found as

1
Fs
17s 1

and Ms (the maximum sensitivity) are the best with C1. C2 is giving
the minimum ISE for the load-disturbance response while for set-
point response ISE of C2 is comparable with the others. Distinct
improvement by the controllers C1 and C2 may be observed for
the perturbed process. The effect of measurement noise is reduced
considerably in the process output by the proposed methods as
well as by the other methods in a similar way.
3.3. Example 3
An example of an integrating second order plus dead-time
(ISOPDT) process is taken from [21] where the process has the
The proposed methods have been compared with the methods
of Vijayan and Panda [21] and Shamsuzzoha and Lee [11] and the
various simulation results are shown in Figs. 1114 and Table 5.
The controller C1 gives the GMPM and the Ms comparable
with the others and the minimum ISE for the set-point response.
C2 gives a comparable load-disturbance response. The controller
output by C2 is remarkably good. For the perturbed process, the
performance by C1 and C2 are comparable. Here, the method of
Shamsuzzoha and Lee [10] gives the best load-disturbance
response for the nominal as well as perturbed processes with
the help of a PID controller cascaded with a lead compensator. The
effect of the measurement noise is found to be negligible in the
process output.
182 M.N. Anwar, S. Pan / ISA Transactions 55 (2015) 175187

Table 4
Performance comparison for Example 2.

Method Controller parameters GM (dB) PM (deg) Ms Set-point response Load-disturbance response Set-point lter F(s)

KP KI KD OS (%) ts (s) ISE yp ts (s) ISE

Proposed C1 (double) 0.7231 0.0833 2.33 12.16 68.1 1.44 0 28.5 10.23 1.42 41.35 2.46 1/(1.5s 1)
Proposed C2 (single loop) 4.32 0.24 9.46 2.78 26.4 1.80 5.15 43.3 10.24 1.33 39.5 0.9083 1/(11.5s 1)
Ali and Majhi [6] (single loop) 3.39 0.17 9.96 4.09 42.5 1.53 51 50.6 10.62 1.34 41.4 1.26
Chidambaram and Sree [2] (single loop) 4.06 0.15 10.97 2.72 36.6 1.78 59 69.4 10.02 1.32 64.1 1.15

1.4
8
Proposed C1
1.2
Proposed C2
6
Vijayan and Panda
1
Shamsuzzoha and Lee
Amplitude

Proposed C1

Amplitude
0.8 4
Proposed C2
0.6
Vijayan and Panda
Shamsuzzoha and Lee 2

0.4
0
0.2

0 -2
0 50 100 150 200
Time (sec) Time (sec)
Fig. 11. Process output for Example 3; (a) Set-point response, (b) Load-disturbance response.

0.4
Proposed C1 0.5
Proposed C2 Proposed C1
0.3 Vijayan and Panda Proposed C2
0
Vijayan and Panda
Shamsuzzoha and Lee
Shamsuzzoha and Lee
Amplitude

0.2
Amplitude

-0.5

0.1 -1

0 -1.5

-0.1 -2
0 50 100 150 200
Time (sec) Time (sec)
Fig. 12. Controller output for Example 3; (a) During set-point response, (b) During load-disturbance response.

3.4. Example 4 The design procedure gives the PID controller C1 as

0:9823
An integrating second order plus dead-time (ISOPDT) process C1s 3:128 3:9966s
s
with non-minimum phase zero is taken form [11] as
The set-point lter has been found as
 0:1s
0:547  0:418s 1e 1
GP s Fs
s1:06s 1 1:5s 1
Second approach: The reference model M d;y s for load-
First approach: The inner loop gain K is selected as 0.5 to have disturbance rejection is chosen as
the overshoot as 1.6% and the settling time as 7.3 s. The reference
 0:418s 1s  0:1s
model is chosen as M d;y s e
s 12s 1
 0:418s 1  0:1s which gives the peak amplitude of the process output as 0.24 and
M r;y s e
0:5s 1 the settling time as 10.7 s. The design procedure yields the PID
 M.N. Anwar, S. Pan / ISA Transactions 55 (2015) 175187 183

8 controller C2 as
Proposed C1
1:000
6 Proposed C2 C2s 3:5184 1:950s
s
Vijayan and Panda
Amplitude

4 Shamsuzzoha and Lee The set-point lter has been found as

1
2 Fs
2s 1
0 The proposed methods have been compared with the methods
of Shamsuzzoha and Lee [11], Gu et al. [14] and Luyben [17] and the
-2 various simulation results are shown in Figs. 1518 and Table 6.
0 50 100 150 200
The controller C2 gives the best set-point response while C1
Time gives the best load-disturbance response. With comparable GM,
Fig. 13. Process output for perturbed system in Example 3. PM and Ms the controller C1 generates the best controller output
during load-disturbance. Favorable response may be observed by
the proposed controllers for the perturbed process. The effect of
1.5 measurement noise is reduced considerably in the process output
by the proposed methods as well as by the other methods in a
similar way.
1
Amplitude

0.5 3.5. Example 5

Proposed C1
Noise Signal
An example of a high order integrating plus dead-time process
0 Proposed C2
Vijayan and Panda
with non-minimum phase zero is taken from the literature [16] as
Shamsuzzoha and Lee
0:5  0:5s 1e  0:7s
-0.5 GP s
0 20 40 60 80 100 s0:4s 10:1s 10:5s 1
Time
First approach: The gain K in the inner loop is selected as 0.5
Fig. 14. Process output for Example 3 with the measurement noise. to have the peak overshoot as 7.2% and the settling time as 13.3 s.

Table 5
Performance comparison for Example 3.

Method Controller GM PM Ms Set-point response Load-disturbance Set-point lter F(s)

parameters (dB) (deg) response

KP KI KD OS ts ISE yp ts (s) ISE

(%) (s)

Proposed C1 (double loop) 0.457 0.132 6.160 7.15 62.6 1.33 5.5 49.2 7.794 6.05 95.1 264.5 1/(2.5s 1)
Proposed C2 (single loop) 0.2348 0.0083 0.540 4.91 22.8 1.66 2.4 46.4 12.60 6.8 128.2 542.7 1/(17s 1)
Vijayan and Panda [21] (double loop with 0.49 0.122 4.733 10.52 62.7 1.20 1.01 18.1 7.977 6.8 125.4 414.3 1/(2.1s 1)
K 0.1318)
Shamshuzzoha and Lee [11] (single loop; PID with 0.359 0.029 0.97 3.35 29.1 1.67 1.01 23.2 9.905 4.17 31.5 74.29 1/
lead compensator) (32.81s2 12.13s 1)

1.2 1.6

Proposed C1
1 1.5
Proposed C2
0.8 1.4
Shamsuzzoha and Lee
Gu et al
Amplitude

Luyben
Amplitude

0.6 1.3

0.4 1.2
Proposed C1
Proposed C2
0.2 1.1
Shamsuzzoha and Lee
Gu et al
0 1
Luyben
-0.2 0.9
0 10 20 20 30 40 50
Time (sec) Time (sec)
Fig. 15. Process output for Example 4; (a) Set-point response, (b) Load-disturbance response.
184 M.N. Anwar, S. Pan / ISA Transactions 55 (2015) 175187

2 2
Proposed C1 Proposed C1
1.5
Proposed C2 Proposed C2
1.5 Shamsuzzoha and Lee Shamsuzzoha and Lee
1
Gu et al Gu et al
Luyben 0.5 Luyben
1

Amplitude
Amplitude

0
0.5 -0.5

-1
0
-1.5

-0.5 -2
0 10 20 30
Time (sec) Time (sec)

Fig. 16. Controller output for Example 4; (a) During set-point response, (b) During load-disturbance response.

2 The set-point lter has been found as

1
1.5 Fs
2s 1
Second approach: The reference model M d;y s for load-
Amplitude

1
disturbance rejection is chosen as

0.5 Proposed C1 6  0:5s 1s  0:7s

M d;y s e
Proposed C2 5s 12s 1
Shamsuzzoha and Lee
0 which gives the peak amplitude of the process output as 0.65 and
Gu et al
Luyben the settling time as 26.3 s for unit step load-disturbance. The
-0.5 design procedure yields the PID controller C2 as
0 10 20 30 40 50
0:16
Time C2s 1:36 1:20s
s
Fig. 17. Process output for perturbed system in Example 4.
The set-point lter has been found as
1
Fs
1.2 5s 1

1 The proposed methods have been compared with the methods

of Jeng and Lin [16], Pai et al. [15] and Luyben [17] and the various
0.8
simulation results are shown in Figs. 1922 and Table 7.
The proposed method gives the better set-point and load-
Amplitude

0.6
Proposed C1
0.4 Noise Signal disturbance responses as well as the controller outputs than the
Proposed C2 other methods. The best GMPM and Ms are obtained by C1. The
0.2 Shamsuzzoha and Lee minimum set-point-ISE is given by the method of Luyben [17],
Gu et al
0 however, the response is slow. The proposed methods give an
Luyben
improvement over the other methods for perturbed process. The
-0.2
effect of the measurement noise is found to be negligible in the
-0.4 process output.
0 10 20 30 40 50
Time

Fig. 18. Process output for Example 4 with the measurement noise. 4. Conclusion

A simple frequency domain approximate model matching

method has been proposed for the design of the PID controller
The reference model is chosen as given by, for the integrating processes with time delay. Two approaches
have been proposed and compared favorably with some prevalent
 0:5s 1  0:7s design methods through examples taken from the literature. In the
M r;y s e
1:5s 1 rst approach, a double feedback loop conguration is considered.
It is to be noted that the reference model includes the non- In the second approach, the design is directly carried out con-
minimum phase zero of the process. It has the settling time as sidering the load-disturbance model of the system. The frequency
6.7 s. The obtained PID controller C1 is as given below. response matching in between the reference model and the
control system to be designed is done at two low frequency points
0:370 to arrive at a set of linear algebraic equations, solution of which
C1s 1:118 1:926s
s gives the controller parameters. For the purpose of matching,
 M.N. Anwar, S. Pan / ISA Transactions 55 (2015) 175187 185

Table 6
Performance comparison for Example 4.

Method Controller parameters GM (dB) PM (deg) Ms Set-point response Load-disturbance Set-point lter F(s)
response

KP KI KD OS (%) ts (s) ISE yp ts (s) ISE

Proposed C1 (double loop) 3.128 0.9823 3.996 6.43 59.3 1.33 0 10.1 1.409 1.4 10.8 0.5734 1/(1.5s 1)
Proposed C2 (single loop) 3.5184 1.00 1.95 5.53 24.9 1.54 0 6.45 1.289 1.31 8.5 0.1813 1/(2s 1)
Shamsuzzoha and Lee 2.43 0.667 1.786 7.01 38.9 1.32 0 8.25 1.603 1.42 7.95 0.3794 (1.0963s 1)/(2.7528s2 3.6543s 1)
(single loop)
Gu et al. [14] (single loop) 2.088 0.541 1.436 8.77 38.7 1.27 0 9.2 1.678 1.49 8.2 0.5535 (1.1599s 1)/(2.6597s2 3.8664s 1)
Luyben [17] (single loop) 1.61 0.28 1.8515 7.08 60.8 1.29 0 12.8 2.407 1.51 14.6 1.236 (1.725s 1)/(6.612 s2 5.75 1)

2.5 2.2
Proposed C1
2 2 Proposed C2
Jeng and Lin
1.8 Pai et al
1.5
Luyben

Amplitude
Amplitude

1.6
1
1.4
0.5 Proposed C1
Proposed C2 1.2
Jeng and Lin
0 1
Pai et al
Luyben
-0.5 0.8
0 10 20 30 100 150
Time (sec) Time (sec)
Fig. 19. Process output for Example 5; (a) Set-point response, (b) Load-disturbance response.

2 0.5
Proposed C1 Proposed C1
1.5 Proposed C2
0 Proposed C2
Jeng and Lin
Pai et al Jeng and Lin
1 Pai et al
Luyben
Amplitude

-0.5
Amplitude

Luyben
0.5

-1
0

-1.5
-0.5

-1 -2
0 10 20 100 150
Time (sec) Time (sec)

Fig. 20. Controller output for Example 5; (a) During set-point response, (b) During load-disturbance response.

2
2.5

2 1.5

1.5
Amplitude

1
Amplitude

1 Proposed C1
Proposed C1 0.5 Noise Signal
0.5 Proposed C2 Proposed C2
Jeng and Lin 0 Jeeng and Lin
0 Pai et al Pai et al
Luyben Luyben
-0.5 -0.5
0 10 20 30 40 50 60 0 10 20 30 40 50
Time Time

Fig. 21. Process output for perturbed system in Example 5. Fig. 22. Process output for Example 5 with the measurement noise.
186 M.N. Anwar, S. Pan / ISA Transactions 55 (2015) 175187

Table 7
Performance comparison for Example 5.

Method Controller parameters GM (dB) PM (deg) Ms Set-point response Load-disturbance response Set-point lter F(s)

KP KI KD OS (%) ts (s) ISE yp ts (s) ISE

Proposed C1 (double loop) 1.118 0.370 1.926 6.36 65.5 1.35 0 12.2 3.485 2.14 18.2 4.482 1/(2s 1)
Proposed C2 (single loop) 1.36 0.16 1.20 2.51 26.5 1.87 1.5 11.4 3.826 2.07 55.5 3.62 1/(5s 1)
Jeng and Lin [16] (single loop) 0.950 0.16 1.10 4.87 41.8 1.45 45.4 14.8 3.885 2.136 24.2 5.171 1/(0.057 1)
Pai et al. [15] (single loop) 1.267 0.219 1.171 3.14 28.4 1.73 84.5 19 4.251 2.098 18 3.379
Luyben [17] (single loop) 0.867 0.0361 0.963 5.50 55.2 1.40 14 48.4 3.12 2.195 89.6 17.75

there is no requirement of elaborate frequency response analysis Using the rst order Pade approximation of e  Ls in the
or any mathematically involved optimization technique. Overall, denominator, Eq. (27) may be simplied as
the method is mathematically simple and computational burden is  

very small. The method is applicable to wide range of integrating K D s2 K P s K I N p se  Ls




processes that may be of low order or high order and that may s2 Dp s

s j
have dead-time and non-minimum phase zeros.



Various types of examples of the integrating processes such as n L=2s 2n e  Ls
2

h 
 


i 28
integrating plus dead-time (IPDT) process, integrating second s L=2 s2 2 2
nL
1 s L 2 2
n n

s j
order plus dead-time (ISOPDT) process, ISOPDT process with
non-minimum phase zero, high order integrating plus dead-time In Eq. (28), LHS has two poles at origin (type-2 transfer
process with non-minimum phase zero are taken for design of function) while the RHS has only one pole at origin (type-1
controllers using the proposed method. It is observed from the transfer function). Then, for feasible matching, types of both sides
examples that the proposed rst approach gives better perfor- of Eq. (28) are to be same. This may be obtained by choosing KI 0
mance than the proposed second approach. which makes LHS as type-1. It is observed, as expected, that even
when the Pade approximation is not used in Eq. (27), the proposed
method gives K I  0. In a similar way, it can be shown that for any
Appendix A order of the reference model, KI comes out to be 0.

For the two frequency points 0 and 1, Eqs. (13) and (14) give
the following four equations References

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