OnSemi The TL431 in The Control of Switching Power Supplies PDF

The TL431 in the Control of
Switching Power Supplies

Agenda
Feedback generalities
The TL431 in a compensator
Small-signal analysis of the return chain
A type 1 implementation with the TL431
Design examples
Conclusion
Agenda
Design examples
Conclusion
What is a Regulated Power Supply?
Vout is permanently compared to a reference voltage Vref.
The reference voltage Vref is precise and stable over temperature.
The error, = Vref Vout, is amplified and sent to the control input.
The power stage reacts to reduce as much as it can.
Power stage - H
Vout
Control
variable d
Error amplifier - G
Rupper
+
-
Vin

-
+
Vp
Modulator - GPWM Vref Rlower

How is Regulation Performed?
Text books only describe op amps in compensators
Vout
Verr
The market reality is different: the TL431 rules!

Vout
Im the
law!
Verr
TL431 optocoupler
How do we Stabilize a Converter?
We need a high gain at dc for a low static error
We want a sufficiently high crossover frequency for response speed
Shape the compensator G(s) to build phase and gain margins!
T (s)
fc = 6.5 kHz
0 - 0 dB
T ( s )
-88 GM = 67 dB
m = 92
-180
T ( s ) = 67 dB
10 100 1k 10k 100k 1Meg
How Much Phase Margin to Chose?
a Q factor of 0.5 (critical response) implies a m of 76
a 45 m corresponds to a Q of 1.2: oscillatory response!
10
Q < 0.5 over damping
1.80 Q=5
Q = 0.5 critical damping
Q=1 Q > 0.5 under damping 7.5 Q
1.40
Q = 0.707
Asymptotically stable
1.00 5 m
600m
Q = 0.5 Fast response 2.5 76
and no overshoot!
200m Q = 0.5
Q = 0.1 0
5.00u 15.0u 25.0u 35.0u 45.0u 0 25 50 75 100
phase margin depends on the needed response: fast, no overshoot

good practice is to shoot for 60 and make sure m always > 45
Which Crossover Frequency to Select?
crossover frequency selection depends on several factors:
switching frequency: theoretical limit is Fsw 2
in practice, stay below 1/5 of Fsw for noise concerns
output ripple: if ripple pollutes feedback, tail chasing can occur.
crossover frequency rolloff is mandatory, e.g. in PFC circuits
presence of a Right-Half Plane Zero (RHPZ):
you cannot cross over beyond 30% of the lowest RHPZ position
output undershoot specification:
select crossover frequency based on undershoot specs
I out
Vp
2 f c Cout
Vout(t)
What Compensator Types do we Need?
There are basically 3 compensator types:
type 1, 1 pole at the origin, no phase boost
type 2, 1 pole at the origin, 1 zero, 1 pole. Phase boost up to 90
type 3, 1 pole at the origin, 1 zero pair, 1 pole pair. Boost up to 180
G (s) G (s) G (s)
boost
boost
G ( s ) = 270
270
270
G ( s ) G ( s )
1 2 5 10 20 50 100 200 500 1k 10 100 1k 10k 100k 10 100 1k 10k 100k
Type 1 Type 2 Type 3

Agenda
Design examples
Conclusion
The TL431 Programmable Zener
The TL431 is the most popular choice in nowadays designs
It associates an open-collector op amp and a reference voltage
The internal circuitry is self-supplied from the cathode current
When the R node exceeds 2.5 V, it sinks current from its cathode
K
R
K
TL431A R
A
2.5V
R
A
K
A
The TL431 is a shunt regulator

The TL431 lends itself very well to optocoupler control
Vdd Fast lane Slow lane
Vout
Vout
R pullup RLED R1 RLED
I1
VFB 1V
I LED I bias =
Rbias
Rbias Rbias
V f 1V
C2 C1 I1
TL431 Rlower
Vmin = 2.5 V
dc representation
RLED must leave enough headroom over the TL431: upper limit!
This LED resistor is a design limiting factor in low output voltages:
Vout V f VTL 431,min

RLED ,max R pullup CTR min
Vdd VCE , sat + I bias CTR min R pullup
When the capacitor C1 is a short-circuit, RLED fixes the fast lane gain
Vout ( s )
RLED
Vdd R1 VFB ( s ) = CTR R pullup I1
I1
Vout ( s )
R pullup I1 =
0V RLED
Ic in ac
VFB ( s )
VFB ( s ) R pullup
Rlower = CTR
Vout ( s ) RLED
This resistor plays a role in dc too!

The TL431 the Static Gain Limit
Let us assume the following design:
5 1 2.5
Vout = 5 V RLED ,max 20k 0.3
4.8 0.3 + 1m 0.3 20k
Vf = 1V
VTL 431,min = 2.5 V
Vdd = 4.8 V
VCE , sat = 300 mV RLED ,max 857
I bias = 1 mA
CTR min = 0.3
R pullup = 20 k
R pullup 20
G0 > CTR > 0.3 > 7 or 17 dB
RLED 0.857
In designs where RLED fixes the gain, G0 cannot be below 17 dB

You cannot amplify by less than 17 dB
The TL431 the Static Gain Limit
You must identify the areas where compensation is possible
dB
40.0 180
Not ok
Requires
f c > 500 Hz
H (s)
20.0 90.0
less
than 17 dB
of gain
0 0
-17 dB
arg H ( s )
-20.0 -90.0
Requires
-40.0 -180
ok 17 dB
or more
10 100 500 1k 10k 100k
TL431 Injecting Bias Current
A TL431 must be biased above 1 mA to guaranty its parameters
If not, its open-loop suffers a 10-dB difference can be observed!
> 10-dB difference
Ibias
Easy
Ibias = 1.3 mA solution
Rbias
Ibias = 300 A
1
Rbias = = 1 k
1m
Agenda
Design examples
Conclusion
TL431 Small-Signal Analysis
The TL431 is an open-collector op amp with a reference voltage
Neglecting the LED dynamic resistance, we have:
Vout ( s ) Vout ( s ) Vop ( s )

I1 ( s ) =
RLED
1
RLED R1 sC1 1
Vop ( s ) = Vout ( s ) = Vout ( s )
Rupper sRupper C1
C1
I1
1 1
I1 ( s ) = Vout ( s ) 1 +
0 RLED sRupper C1
We know that: VFB ( s ) = CTR R pullup I1

Rlower
Vop ( s ) VFB ( s ) R pullup CTR 1 + sRupper C1
=
Vout ( s ) RLED sR upper 1
C
In the previous equation we have:
R pullup
9 a static gain G0 = CTR
RLED
1
9 a 0-dB origin pole frequency po =
C1 Rupper
1
9 a zero z = 1
Rupper C1
We are missing a pole for the type 2!
Vdd
Type 2 transfer function
R pullup
Add a cap. from
VFB ( s ) collector to ground
VFB ( s ) R pullup CTR 1 + sRupper C1
=
C2 Vout ( s ) RLED sRupper C1 (1 + sR pullup C2 )
The optocoupler also features a parasitic capacitor
it comes in parallel with C2 and must be accounted for
Vout(s)
Vdd
Rpullup
VFB(s) FB
c
C
Copto
C2 = C || Copto e optocoupler
The optocoupler must be characterized to know where its pole is
Cdc Rled
Ic 10uF 20k
2 5
Rpullup O ( s )
20k
Rbias
VFB 1 3
Vdd
5
O (s)
X1 4 6
SFH615A-4
Vbias Vac
IF
-3 dB
4k
Adjust Vbias to have VFB at 2-3 V to be in linear region, then ac sweep

The pole in this example is found at 4 kHz
1 1 Another design
Copto = = 2 nF
2 R pullup f pole 6.28 20k 4k constraint!
Agenda
Design examples
Conclusion
The TL431 in a Type 1 Compensator
To make a type 1 (origin pole only) neutralize the zero and the pole
VFB ( s ) R pullup CTR 1 + sRupper C1

=
Vout ( s ) RLED sRupper C1 (1 + sR pullup C2 )
R pullup substitute 1
sRupper C1 = sR pullup C2 C1 = C2 po =
Rupper Rupper RLED
C1
CTR CTR R pullup CTR
po = C2 =
C2 RLED 2 f po RLED
Once neutralized, you are left with an integrator
1 f po CTR
G (s) = | G ( f c ) |= f po = G fc f c C2 =
s fc 2 G fc f c RLED
po
TL431 Type 1 Design Example
We want a 5-dB gain at 5 kHz to stabilize the 5-V converter
Vout = 5 V
Vf = 1V
VTL 431,min = 2.5 V Apply 15%
margin
Vdd = 4.8 V
RLED ,max 857 RLED = 728
VCE , sat = 300 mV
I bias = 1 mA
CTR min = 0.3
R pullup = 20 k
5
G fc = 10 20
= 1.77 CTR 0.3
C2 = = 7.4 nF
f c = 10 kHz 2 G fc f c RLED 6.28 1.77 5k 728
Copto = 2 nF
R pullup
C = 7.4n 2n = 5.4 nF C1 = C2 14.7 nF
Rupper
SPICE can simulate the design automate elements calculations
parameters
Vout=5
Vf=1
Vref=2.5
VCEsat=300m
Vdd=4.8 E1
Ibias=1m Vdd -1k
{Vdd} L1
A=Vout-Vf-Vref 4.99V 1k 4.99V 4.99V
B=Vdd-VCEsat+Ibias*CTR*Rpullup 4.80V
err
Rmax=(A/B)*Rpullup*CTR 6 5 7
Rpullup RLED R2 R5 2.50V

Rupper=(Vout-2.5)/250u
fc=5k {Rpullup} {RLED} {Rupper} 100m 9
Gfc=-5 2.50V 4.99V
2.50V
3.97V 2 10
G=10^(-Gfc/20) VFB 4 3
C3 B1
pi=3.14159 Voltage
R6 1k V2
0V V(err)<0 ? 2.5
Fpo=G*fc 1k 0 : V(err)
C1
Rpullup=20k {C1} V3
Cpole 2.96V AC = 1
RLED=Rmax*0.85 {Cpole} 1
C1=Cpole1*Rpullup/Rupper
X2
Cpole1=CTR/(2*pi*Fpo*RLED)
Optocoupler
Cpole=Cpole1-Copto Cpole = Copto X1
R3
10k
Automatic bias
CTR = CTR TL431_G
Fopto=4k
Copto=1/(2*pi*Fopto*Rpullup)
point selection
CTR = 0.3
Hu?
We have a type 1 but 1.3 dB of gain is missing?
dB
20.0
G (s)
10.0
3.7 dB
0
-10.0
-20.0

270 arg G ( s )
180
90.0
-90.0
100 200 500 1k 2k 5k 10k 20k 50k 100k

The 1-k resistor in parallel with the LED is an easy bias
However, as it appears in the loop, does it affect the gain?
Vout(s)
VFB = I c R pullup = I L R pullup CTR
Rbias
RLED I L = I1
ac representation
Rbias + Rd
I1
Vout Rbias
IL =
VFB(s) IL Ib RLED + Rbias || Rd Rbias + Rd
Ic Rd
Rbias R pullup CTR
VFB Rbias
s =0 =
Rpullup
Vf Vout RLED + Rbias || Rd Rbias + Rd
CTR
Both bias and dynamic resistances have a role in the gain expression
A low operating current increases the dynamic resistor
SFH615A-2 -FORWARD CHARACTERISTICS
0.002000
Rpullup = 20 k, IF = 300 A (CTR = 0.3)
Rd = 158
0.001800
0.001600
Rpullup = 1 k, IF = 1 mA (CTR = 1)
Rd = 38
IF Forward Current(A)
0.001400
0.001200
IF = 1 mA IF @ 110C
0.001000
IF @ 70C
0.000800
IF @ 25C
0.000600 IF @ -20C
IF @ -40C
0.000400
IF = 300 A
0.000200
0.000000
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
VF Forward Voltage (Volts)
Make sure you have enough LED current to reduce its resistance
The pullup resistor is 1 k and the target now reaches 5 dB
dB
Yes!
20.0
G (s)
10.0
5 dB
0
-10.0
-20.0

arg G ( s )
270
180
90.0
-90.0
100 200 500 1k 2k 5k 10k 20k 50k 100k
Agenda
Design examples
Conclusion
Our first equation was already a type 2 definition, we are all set!
Vdd
Vout R pullup
R pullup RLED G0 = CTR
R1 RLED
VFB 1
z =
Rbias
1
Rupper C1
C2 C1 1
p =
1
R pullup C2
TL431 Rlower
Just make sure the optocoupler contribution is involved

You need to provide a 15-dB gain at 5 kHz with a 50 boost
f p = tan ( boost ) + tan 2 ( boost ) + 1 f c = 2.74 5k = 13.7 kHz

R pullup
f z = fc 2
f p = 25k 13.7k 1.8 kHz G0 = CTR = 1015 20 = 5.62
RLED
With a 250-A bridge current, the divider resistor is made of:
Rlower = 2.5 250u = 10 k R1 = (12 2.5 ) 250u = 38 k
The pole and zero respectively depend on Rpullup and R1:

C2 = 1 2 f p R pullup = 581 pF C1 = 1 2 f z R1 = 2.3 nF
The LED resistor depends on the needed mid-band gain:

R pullup CTR ok
RLED = = 1.06 k RLED ,max 4.85 k
G0
The optocoupler is still at a 4-kHz frequency:
C pole 2 nF Already above!
Type 2 pole capacitor calculation requires a 581 pF cap.!
The bandwidth cannot be reached, reduce fc!

For noise purposes, we want a minimum of 100 pF for C
With a total capacitance of 2.1 nF, the highest pole can be:
1 1
f pole = = = 3.8 kHz
2 R pullup C 6.28 20k 2.1n
For a 50 phase boost and a 3.8-kHz pole, the crossover must be:
fp
fc = 1.4 kHz
tan ( boost ) + tan ( boost ) + 1
2
The zero is then simply obtained:
fc 2
fz = = 516 Hz
fp
We can re-derive the component values and check they are ok
C2 = 1 2 f p R pullup = 2.1 nF C1 = 1 2 f z R1 = 8.1 nF
Given the 2-nF optocoupler capacitor, we just add 100 pF
In this example, RLED,max is 4.85 k

R pullup 20
G0 > CTR > 0.3 > 1.2 or 1.8 dB
RLED 4.85
You cannot use this type 2 if an attenuation is required at fc!

The 1-dB gain difference is linked to Rd and the bias current
dB
30.0
G (s)
20.0
10.0
0
14 dB @ 1.4 kHz
-10.0

140 arg G ( s )
130
120
50
110
100
10 100 1k 10k 100k
TL431 Suppressing the Fast Lane
The gain limit problem comes from the fast lane presence
Its connection to Vout creates a parallel input
The solution is to hook the LED resistor to a fixed bias
Vdd Vout Vdd Vout
Vbias Vz
Rz
R pullup RLED R1 R pullup RLED R1
Comp. network
VFB changes! VFB
Rbias Rbias
R2
C2 C2
C1 C1
TL431 Rlower TL431

Rlower
The equivalent schematic becomes an open-collector op amp
Vout
Vout ( s )
Vdd Vz
RLED R1
R pullup
G1 ( s )
VFB
C1 R2 G (s)
C2
O (s)
Transmission Rlower
chain O(s) Vref
Compensaton VFB ( s )
chain G1(s)
The small-signal ac representation puts all sources to 0
Vout
R pullup 1
O(s) = CTR
RLED 1+ sR pullup C pole R1
G (s)
O (s) VFB C1 R2
G1 ( s ) =
1+ R 2 C1
sR1C1
IC
C2 IL
RLED Rlower
CTR
R pullup
The op amp can now be wired in any configuration!
Just keep in mind the optocoupler transmission chain
R pullup 1
O(s) = CTR
RLED 1+ sR pullup C pole
Wire the op amp in type 2A version (no high frequency pole)
1+ R 2 C1
G1 ( s ) =
sR1C1
When cascaded, you obtain a type 2 with an extra gain term
R pullup 1+ R2C1
G(s) = CTR
RLED sR1C1 (1+ sR pullup C pole )
G2
TL431 Type 2 Design Example No Fast Lane
We still have a constraint on RLED but only for dc bias purposes
Vz V f VTL 431,min
RLED ,max R pullup CTR min
You need to attenuate by -10-dB at 1.4 kHz with a 50 boost

The poles and zero position are that of the previous design
Vz = 6.2 V
Vf = 1V
VTL 431,min = 2.5 V Apply 15%
margin
Vdd = 4.8 V
RLED ,max 1.5 k RLED = 1.27 k
VCE , sat = 300 mV
I bias = 1 mA
CTR min = 0.3
R pullup = 20 k f z = 516 Hz f p = 3.8 kHz
We need to account for the extra gain term:
R pullup 20k
G2 = CTR = 0.3 = 4.72
RLED 1.27k
The required total mid-band attenuation at 1.4 kHz is -10 dB
G fc = 1010 20 = 0.316
The mid-band gain from the type 2A is therefore:
G0 0.316
G1 = = = 0.067 or 23.5 dB 2
G2 4.72 fc
+ 1
Calculate R2 for this attenuation: fp
R2 = G1 R1 = 2.6 k
2
fz
+1
fc
An automated simulation helps to test the calculation results
parameters
Vout=12
Rupper=(Vout-2.5)/250u
fc=1.4k
Gfc=10
Vf=1 Zener D1
Ibias=1m 1N827A C4
Vref=2.5 value Vdd 0.1u
E1
-1k
VCEsat=300m {Vdd} R5
Vdd=5 5.00V 6.17V 1k 12.0V
Err
6 5
Vz=6.2
12.0V CoL
Rpullup=20k R4 R1 1kF LoL 2.50V
12
Fopto=4k {Rpullup} {RLED} 0V 1kH 9
Rupper 14
Copto=1/(2*pi*Rpullup*Fopto) 12.0V
2.51V 4.32V {Rupper} Vref
CTR=0.3 Vout
13
B1
4 2
2.50V 2.5
G1=Rpullup*CTR/RLED X2 Vac Voltage
11
G2=10^(-Gfc/20) Optocoupler V(err)
Cpole = Copto Rbias
G=G2/G1 1k
CTR = CTR
pi=3.14159 3.31V 2.50V
C2
fz=516 {C2} 1 10
C1 R2
fp=3.8k
{C1} {R2}
C1=1/(2*pi*fz*R2)
Cpole2=1/(2*pi*fp*Rpullup)
C2=Cpole2-Copto Rlower
X1
a=(fz^2+fc^2)*(fp^2+fc^2) 10k
TL431_G
c=(fz^2+fc^2)
R2=(sqrt(a)/c)*G*fc*Rupper/fp
Rmax1=(Vz-Vf-Vref)
Rmax2=(Vdd-VCEsat+Ibias*(Rpullup*CTR))
RLED=(Rmax1/Rmax2)*Rpullup*CTR*0.85
The simulation results confirm the calculations are ok
dB
10.0
G (s)
0
-10.0
-20.0
-30.0 -10 dB @ 1.4 kHz

150 arg G ( s )
130
110 50
90.0
70.0
10 100 1k 10k 100k TL431

Agenda
Design examples
Conclusion
The type 3 with a TL431 is difficult to put in practice
Vdd Vout
1 1
fz1 = f z2 =
R pullup RLED R pz R1 2 R1C1 2 ( RLED + R pz ) C pz
1 1
f p1 = f p2 =
C pz 2 R pz C pz 2 R pullup ( C2 || Copto )
R pullup
G= CTR
Rbias RLED
C2
C1 RLED fixes the gain and
a zero position
Rlower
Suppress the fast lane for an easier implementation! TL431

Once the fast lane is removed, you have a classical configuration
Vdd Vout
Vz
1
fz1 =
Rz 2 R2C1
R pullup RLED R1 R3
1
f z2 =
2 R1C3
C3 1
Rbias f p1 =
2 R3C3
1
C2 f p2 =
C1 R2 2 R pullup ( C2 || Copto )
R pullup
Rlower G= CTR
RLED
TL431
We want to provide a 10-dB attenuation at 1 kHz
The phase boost needs to be of 120
place the double pole at 3.7 kHz and the double zero at 268 Hz
Calculate the maximum LED resistor you can accept, apply margin
Vz V f VTL 431,min X 0.85
RLED ,max R pullup CTR min 1.5 k 1.3 k
We need to account for the extra gain term:

R pullup 20k
G2 = CTR = 0.3 = 4.6
RLED 1.3k
The required total mid-band attenuation at 1 kHz is -10 dB
G fc = 1010 20 = 0.316
TL431
The mid-band gain from the type 3 is therefore:
G0 0.316
G1 = = = 0.068 or 23.3 dB
G2 4.6
Calculate R2 for this attenuation:
2 2
fc fc
1+ 1+
f p f p
G1 R1 f p1 1 2
R2 = = 744
f p1 f z1 2
fc
2
f z1
1+ 1+
fc f z
2
C1 = 800 nF C2 = 148 pF C3 = 14.5 nF Copto = 2 nF
The optocoupler pole limits the upper double pole position
The maximum boost therefore depends on the crossover frequency
The decoupling between Vout and Vbias affects the curves
dB
10.0
G (s) -9.3 dB @ 1 kHz
0
-10.0
-20.0
Isolated 12-V
dc source
-30.0
-10 dB @ 1 kHz

240 arg G ( s )
200
160
135
120
80.0
1 10 100 1k 10k 100k TL431

Agenda
Design examples
Conclusion
Design Example 1 a Single-Stage PFC
The single-stage PFC is often used in LED applications
It combines isolation, current-regulation and power factor correction
Here, a constant on-time BCM controller, the NCL30000, is used
141V
1 19 1 V = 1 s
PWM switch BCM

Fsw (kHz) duty-cycle
598mV
vc
a
Dc 2
68.4V X2 Vout
XFMR
Fsw 5
3.09V -210V
RATIO = -250m
52.5V
Iout = 2.4 A
8.74V
7 8
Ip
V1
p
Ip
6
c
{Vrms*1.414} 154mV
3
R2 R7
X1
GAIN
R1 X5 50m 65k
PWMBCMVM 100m K = Gpwm D4
L=L GAIN 52.5V 26.9V 50 V
1N965
0V
9 11 2 A string
4
1.57V
22 C5
B1 C1
L1 2.2mF 0.1uF
Voltage Rsense
{L}
V(errac)-0.6 0.5 1.24V
23
Vsense
parameters Vdd
15.1V
{Vdd} 1.25 V ILED
1.24V
Vrms=100
5.00V
14
R5
{RLED}
10
R4
Ac out
L=400u {Rupper}
18
VFB R6
Ct=1.5n
LoL {Rpullup}
Icharge=270u errac 1k 2.17V 2.17V 12.2V
Gpwm=(Ct/Icharge)*1Meg 2.17V 29 17 16
X4
Optocoupler
On-time CoL
1k C2 11.1V
Cpole = Copto
CTR = CTR
C4
{C1}
R9
{R2}
0V
selection 20
AC = 1
{C2} 13
1.24V
28
ac in V3
15
X3
TLV431
1.24V
Average simulation
Once the converter elements are known, ac-sweep the circuit
Select a crossover low enough to reject the ripple, e.g. 20 Hz
dB 0
H (s)
8.00
-2.5 dB
4.00
20 Hz
0
-4.00
-8.00

80.0
40.0
arg H ( s ) -11
0
-40.0
-80.0
1 2 5 10 20 50 100 200 500 1k

Given the low phase lag, a type 1 can be chosen
Use the type 2 with fast lane removal where fp and fz are coincident
dB
2
20.0
1
10.0
13
fc = 19 Hz
0
15 V 0.5 -10.0
T (s)
3
-20.0
5V 10
6.1 k 10 k
11
180
ton
generation 20 k 90.0
7 6 m = 90
0
586 nF 13.6 k
395 nF 4 12 -90.0
argT ( s )
5
-180
G (s) 1 2 5 10 20 50 100 200 500 1k
A transient simulation helps to test the system stability
6.00
4.00
2.00
2.2 A
I LED ( t )
0
-2.00
VFB ( t )
5.00
4.60
4.20
3.80
3.40
4.00
2.00
I in ( t )
-2.00
-4.00
20.0m 60.0m 100m 140m 180m Vin = 100 V rms

Design Example 2: a DCM Flyback Converter
We want to stabilize a 20 W DCM adapter
Vin = 85 to 265 V rms, Vout = 12 V/1.7 A
Fsw = 65 kHz, Rpullup = 20 k
Optocoupler is SFH-615A, pole is at 6 kHz
Cross over target is 1 kHz
Selected controller: NCP1216
1. Obtain a power stage open-loop Bode plot, H(s)
2. Look for gain and phase values at cross over
3. Compensate gain and build phase at cross over, G(s)
4. Run a loop gain analysis to check for margins, T(s)
5. Test transient responses in various conditions
Capture a SPICE schematic with an averaged model
839mV
vc
a
PWM switch CM
389mV
duty-cycle
DC 6
X2x
XFMR D1A
RATIO = -166m mbr20200ctp vout
90.0V 12.0V
vout
2 3 4
Vin p -76.1V 12.6V
c
90
AC = 0 R10
0V
13 20m
X9
Rload
PWMCM L1 12.0V
V(errP)/3 > 1 ? 1 7.2
L = Lp {Lp}
Fs = 65k 1 : V(errP)/3 C5
8
Ri = 0.7 3mF
Se = Se B1
Voltage
Coming from FB
Look for the bias points values: Vout = 12 V, ok

Observe the open-loop Bode plot and select fc: 1 kHz
H (s)
dB
40.0 180
20.0 90.0
Phase at 1 kHz
-70
0 0
arg H ( s )
-20.0 -90.0
-40.0 -180
Magnitude at 1 kHz
-23 dB
10 100 1k 10k 100k
Apply k factor or other method, get fz and fp
fz = 3.5 kHz fp = 4.5 kHz
Vout(s)
Vdd 2 k 38 k
20 k
VFB(s) 10 nF
k factor FB
gave
2.5 nF
C = 3.8 nF 10 k
install Copto = 1.3 nF
C2 = 3.8n 1.3n 2.5 nF
Check loop gain and watch phase margin at fc
4
dB
180 80.0 T (s)
90.0 40.0 argT ( s )
m = 60
0 0
-90.0 -40.0
Crossover
1 kHz
-180 -80.0
10 100 1k 10k 100k

Sweep ESR values and check margins again
12.04 Vout(t)
Hi
12.00 line
Excellent!
11.96
11.92 100 Low

mV
line
11.88
200 mA to 2 A in 1 A/s
3.00m 9.00m 15.0m 21.0m 27.0m
Use an Automated Design Tool
To speed-up your design studies, use the right tool!
1. 2.
Enter Show power
calculated stage gain
values and phase
3. 4.
Compute See final
pole/zero values on
check open TL431
loop gain
www.onsemi.com
NCP1200, design tools
Conclusion
Classical loop control theory describes op amps in compensators
Engineers cannot apply their knowledge to the TL431
Examples show that the TL431 with an optocoupler have limits
Once these limits are understood, the TL431 is simple to use
All three compensator types have been covered
Design examples showed the power of averaged models
Use them to extensively reproduce parameter dispersions
Applying these recipes is key to design success!
Merci !
Thank you!
Xi-xie!
For More Information
View the extensive portfolio of power management products from ON

Semiconductor at www.onsemi.com
View reference designs, design notes, and other material supporting

the design of highly efficient power supplies at
www.onsemi.com/powersupplies

OnSemi The TL431 in The Control of Switching Power Supplies PDF

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OnSemi The TL431 in The Control of Switching Power Supplies PDF

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The TL431 in the Control of

Switching Power Supplies

Modulator - GPWM Vref Rlower

The market reality is different: the TL431 rules!

phase margin depends on the needed response: fast, no overshoot

G (s) G (s) G (s)

Type 1 Type 2 Type 3

The TL431 is a shunt regulator

Vout V f VTL 431,min

This resistor plays a role in dc too!

In designs where RLED fixes the gain, G0 cannot be below 17 dB

> 10-dB difference

Vout ( s ) Vout ( s ) Vop ( s )

We know that: VFB ( s ) = CTR R pullup I1

Adjust Vbias to have VFB at 2-3 V to be in linear region, then ac sweep

VFB ( s ) R pullup CTR 1 + sRupper C1

Once neutralized, you are left with an integrator

Rpullup RLED R2 R5 2.50V

100 200 500 1k 2k 5k 10k 20k 50k 100k

SFH615A-2 -FORWARD CHARACTERISTICS

Just make sure the optocoupler contribution is involved

The pole and zero respectively depend on Rpullup and R1:

The LED resistor depends on the needed mid-band gain:

The bandwidth cannot be reached, reduce fc!

Given the 2-nF optocoupler capacitor, we just add 100 pF

In this example, RLED,max is 4.85 k

You cannot use this type 2 if an attenuation is required at fc!

TL431 Rlower TL431

You need to attenuate by -10-dB at 1.4 kHz with a 50 boost

-30.0 -10 dB @ 1.4 kHz

10 100 1k 10k 100k TL431

Suppress the fast lane for an easier implementation! TL431

We need to account for the extra gain term:

1 10 100 1k 10k 100k TL431

PWM switch BCM

1 2 5 10 20 50 100 200 500 1k

20.0m 60.0m 100m 140m 180m Vin = 100 V rms

Look for the bias points values: Vout = 12 V, ok

90.0 40.0 argT ( s )

10 100 1k 10k 100k

11.92 100 Low

View the extensive portfolio of power management products from ON

View reference designs, design notes, and other material supporting

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