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5/22/2017

ASI, JAYSON R.
ALMAREZ, KATHLYN S
BOTARDO, JOSEPH JEREMY B.

ECE 3201

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// //
; = 150.2283

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Now:
//
//1.3K
=23.5061
*fmin was set to 300Hz ( )( . )
.

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Now,

Where ICQ IEQ = 12 1 4.7 + 1.3

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The main difference is that RE was


split into two (RE1 + RE2). This
procedure is called as swamping.

=1.5V
We initially set the Rc of the 2nd
stage to be 1k.

Were now solving for =

For RE = VE/IE
1.5 V/4.5mA = 333.333
330 (standard)

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We set R2= 1k Where 1k < 3.3k


by the
condition (from
rule of thumb)

R2 < 10(Rc)
1k < 3.3K
I2 = 2.2 mA

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2nd STAGE

Principle of
swamping
(splitting RE).

RE2= 320
RE1= set to
8.2

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Since, we desire to bypass RE2 for reduction and


stability of voltage gain.
( )

( ) ( )( . )

( )
( )

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VBB = VTH =

. . RB = RTH =
.
.
.

Now,
= 12 4.2199 1 + 328.2

Where ICQ IEQ

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; rl = Rc//RL
.

= 6.3951 V +

4.2199 mA (500)
=8.505 V
= 17.0101 mA

Vpk = ICQ x rL
= 4.2199 mA x 500
= 2.10995 V

V(pk pk)
= 2.10995 x 2
= 4.2199 V

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Analysis Technique:
We set the desired frequency for
the coupling capacitors to be 10%
of the minimum cut off frequency.
The largest cut off frequencies is
determined by one of the by-pass
capacitors

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=
1
=
2 (30) 3197.2790 + 580.4799
10% 300 = 30 = 1.4043 2.2
2.2 (Standard)

1
=
1 2 (30)
= 1
2 (30) 2662.1298 =
= 1.9928 2.2 2 (30) 689.6552
= 2.2 ( ) = 7.6924 10uF

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IB = Ic/

% Difference from Simulation

/
|

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ro = VA / IC
= 10 V / 1mA

Impedances:

; 10k // 4.7k

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Gain ( )

2nd Stage

IB = Ic/

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% Difference from Simulation


/
|

Small Signal of 2nd Stage


ro = Va/Ic
2222.2222

= 10 / 4.5 mA
= 2222.2222

170.1961(5.7441) + (170.1961 + 1)(5.7441)

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Impedances:

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TWO PORT MODEL

. .

. 580.4799

Gain

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Total Gain:

553.1241

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% Difference from Simulation


|

|
= 3.01%

FREQUENCY RESPONSE

. .

. 580.4799

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= 22.8780 Hz 23 Hz

= 9.4194 Hz
9 Hz
= 19.1497 Hz 19 Hz

Bypass capacitor cut off frequencies (dominant)

=
.
307.7633 Hz (dominant)
308 Hz

=294.0779 Hz
)( . )( )

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HIGH CUT OFF FREQUENCY

= 18.8360
341. 1426

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;
;rL = Rc//RL ; RL = 1K
=
= 2.53 mW

x 100

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Vo(swing)
=
(1.9720+2.3876=
4.3596)

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Designing a simple class A transistor


amplifier requires a lot of considerations. To
effectively bias a single stage, load line analysis
should be implied. In order to stabilize beta
fluctuations, voltage divider biasing technique
should be used. Since a single stage would not
provide much gain, another stage should be
coupled.
To effectively reduce the voltage gain, the
principle of swamping can be used. The splitting
of the emitter resistance has driven the amplifier
linearly.

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. It reduces the variability of voltage


gain from one circuit to another.
Thus, stabilizing the voltage gain.

There are always sacrifices to be able


to reach a desired specification.
Further analysis and careful action
plans should be implied at all costs.

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