1 1

MTG_HOLE10 MH11 MTG_HOLE2 MH3

1
MTG_HOLE18 MH17 MTG_HOLE4 MH5
1
MTG_HOLE6 MH12 MTG_HOLE1 MH1
MTG_HOLE17 MH15 MTG_HOLE3 MH2 NC_FD_1
1
FD1
MTG_HOLE9 MH13 MTG_HOLE5 MH6
1
MTG_HOLE14 MH16 MTG_HOLE7 MH4 NC_FD_2
1
FD5
1 1
MTG_HOLE12 MH14 MTG_HOLE16 MH19 1
1 1
FD2
MTG_HOLE20 MH20 TL4 NC_FD_3
1 1
TL3 NC_FD_4 FD501
1
TL1 NC_FD_5
1
FD504
1 1
MTG_HOLE44 MH23 TL2 1
1 FD500
MTG_HOLE45 MH24 NC_FD_6
1
NC_FD_7 FD4
1
NC_FD_8 FD3
1
MTG_HOLE11 MH7 NC_FD_9
1
FD503
1
MTG_HOLE13 MH8 1
1 1 FD502
MTG_HOLE15 MH9 MH22 NC_FD_10
1
MTG_HOLE8 MH10
 RP502
DDR3_ADDR[14:0] DDR3_ADDR[0] 4 5

RP503
DDR3_ADDR[1] 2 7

RP502
DDR3_ADDR[2] 3 6 1 C120
DDR3_DQ[31:0]

RP501 2
DDR3_ADDR[3] 2 7

RP504
DDR3_ADDR[4] 3 6

RP501
DDR3_ADDR[5] 3 6

RP504
DDR3_ADDR[6] 2 7 1 C121
U26 U24
DDR3_ADDR[0] N3 E3 DDR3_DQ[0] DDR3_ADDR[0] N3 E3 DDR3_DQ[16]
A0 DQ0 A0 DQ0
DDR3_ADDR[1] P7 F7 DDR3_DQ[1] DDR3_ADDR[1] P7 F7 DDR3_DQ[17] RP501 2
A1 DQ1 A1 DQ1 DDR3_ADDR[7] 4 5
DDR3_ADDR[2] P3 F2 DDR3_DQ[2] DDR3_ADDR[2] P3 F2 DDR3_DQ[18]
A2 DQ2 A2 DQ2
DDR3_ADDR[3] N2 F8 DDR3_DQ[3] DDR3_ADDR[3] N2 F8 DDR3_DQ[19]
A3 DQ3 A3 DQ3
DDR3_ADDR[4] P8 H3 DDR3_DQ[4] DDR3_ADDR[4] P8 H3 DDR3_DQ[20] RP504
A4 DQ4 A4 DQ4 DDR3_ADDR[8] 1 8
DDR3_ADDR[5] P2 H8 DDR3_DQ[5] DDR3_ADDR[5] P2 H8 DDR3_DQ[21]
A5 DQ5 A5 DQ5
DDR3_ADDR[6] R8 G2 DDR3_DQ[6] DDR3_ADDR[6] R8 G2 DDR3_DQ[22]
A6 DQ6 A6 DQ6
DDR3_ADDR[7] R2 H7 DDR3_DQ[7] DDR3_ADDR[7] R2 H7 DDR3_DQ[23] RP502
A7 DQ7 A7 DQ7 DDR3_ADDR[9] 2 7
DDR3_ADDR[8] T8 D7 DDR3_DQ[8] DDR3_ADDR[8] T8 D7 DDR3_DQ[24]
A8 DQ8 A8 DQ8
DDR3_ADDR[9] R3 C3 DDR3_DQ[9] DDR3_ADDR[9] R3 C3 DDR3_DQ[25]
A9 DQ9 A9 DQ9
DDR3_ADDR[10] L7 C8 DDR3_DQ[10] DDR3_ADDR[10] L7 C8 DDR3_DQ[26]
A10/AP DQ10 A10/AP DQ10 RP506 1 C131
DDR3_ADDR[11] R7 C2 DDR3_DQ[11] DDR3_ADDR[11] R7 C2 DDR3_DQ[27] DDR3_ADDR[10] 1 8
A11 DQ11 A11 DQ11
DDR3_ADDR[12] N7 A7 DDR3_DQ[12] DDR3_ADDR[12] N7 A7 DDR3_DQ[28]
A12/~B~C DQ12 A12/~B~C DQ12
DDR3_ADDR[13] T3 A2 DDR3_DQ[13] DDR3_ADDR[13] T3 A2 DDR3_DQ[29] 2
A13 DQ13 A13 DQ13 RP503
DDR3_ADDR[14] T7 B8 DDR3_DQ[14] DDR3_ADDR[14] T7 B8 DDR3_DQ[30] DDR3_ADDR[11] 3 6
A14 DQ14 A14 DQ14
A3 DDR3_DQ[15] A3 DDR3_DQ[31]
DQ15 DQ15
RP503
B2 B2 DDR3_ADDR[12] 1 8
VDD1 VDD1
D9 D9
VDD2 VDD2
H1 G7 H1 G7
0V75_VTT_REF VRefDQ VDD3 0V75_VTT_REF VRefDQ VDD3 RP502
M8 K2 M8 K2 DDR3_ADDR[13] 1 8
VRefCA VDD4 VRefCA VDD4
K8 K8
VDD5 VDD5
N1 N1
VDD6 VDD6 RP503
T2 N9 T2 N9 DDR3_ADDR[14] 4 5 1 C132
DDR3_RESET~ RST~ VDD7 DDR3_RESET~ RST~ VDD7
R612 R1 R609 R1
1 2 L8 VDD8 1 2 L8 VDD8
ZQ R9 ZQ R9
VDD9 VDD9 2
A1 A1 RP501
VDDQ1 VDDQ1 1 8
K1 A8 K1 A8 DDR3_BA[0]
DDR3_ODT ODT VDDQ2 DDR3_ODT ODT VDDQ2
L2 C1 L2 C1
DDR3_CS~ CS~ VDDQ3 DDR3_CS~ CS~ VDDQ3
C9 C9 RP504
VDDQ4 VDDQ4 4 5
M2 D2 M2 D2 DDR3_BA[1]
DDR3_BA[0] BA0 VDDQ5 DDR3_BA[0] BA0 VDDQ5
N8 E9 N8 E9
DDR3_BA[1] BA1 VDDQ6 DDR3_BA[1] BA1 VDDQ6
M3 F1 M3 F1 RP507
DDR3_BA[2] BA2 VDDQ7 DDR3_BA[2] BA2 VDDQ7 1 8 1 C125
H2 H2 DDR3_BA[2]
F3 VDDQ8 F3 VDDQ8
DDR3_DQS_p[0] LDQS H9 DDR3_DQS_p[2] LDQS H9
G3 VDDQ9 G3 VDDQ9
DDR3_DQS_n[0] LDQS~ DDR3_DQS_n[2] LDQS~ RP505 2
C7 A9 C7 A9 2 7
DDR3_DQS_p[1] UDQS VSS1 DDR3_DQS_p[3] UDQS VSS1
B7 B3 B7 B3
DDR3_DQS_n[1] UDQS~ VSS2 DDR3_DQS_n[3] UDQS~ VSS2
E1 E1
E7 VSS3 E7 VSS3 RP505
DDR3_DM[0] LDM G8 DDR3_DM[2] LDM G8 1 8
D3 VSS4 D3 VSS4
DDR3_DM[1] UDM J2 DDR3_DM[3] UDM J2
VSS5 VSS5
J3 J8 J3 J8
DDR3_RAS~ RAS~ VSS6 DDR3_RAS~ RAS~ VSS6 RP505
K3 M1 K3 M1 3 6
DDR3_CAS~ CAS~ VSS7 DDR3_CAS~ CAS~ VSS7 DDR3_ODT
L3 M9 L3 M9
DDR3_WE~ WE~ VSS8 DDR3_WE~ WE~ VSS8
P1 P1
VSS9 VSS9
P9 P9 RP505
VSS10 VSS10 4 5
J7 T1 J7 T1 DDR3_CS~
DDR3_CK_p CK VSS11 DDR3_CK_p CK VSS11
K7 T9 K7 T9
DDR3_CK_n CK~ VSS12 DDR3_CK_n CK~ VSS12
K9 K9 RP507
DDR3_CKE CKE B1 DDR3_CKE CKE B1 4 5 1 C127
VSSQ1 VSSQ1 DDR3_RAS~
B9 B9
VSSQ2 VSSQ2
J1 D1 J1 D1
NC_ODT1A_P2 NC1/ODT1 VSSQ3 NC_ODT1B_P2 NC1/ODT1 VSSQ3 RP507 2
J9 D8 J9 D8 3 6
NC_CKE1A_P2 NC2/CKE1 VSSQ4 NC_CKE1B_P2 NC2/CKE1 VSSQ4 DDR3_CAS~
L1 E2 L1 E2
NC_CS1A_P2 NC3/~C~S~1 VSSQ5 NC_CS1B_P2 NC3/~C~S~1 VSSQ5
L9 E8 L9 E8
NC_ZQ1A_P2 NC4/ZQ1 VSSQ6 NC_ZQ1B_P2 NC4/ZQ1 VSSQ6 RP507
M7 F9 M7 F9 2 7
NC_A15A_P2 NC5/A15 VSSQ7 NC_A15B_P2 NC5/A15 VSSQ7 DDR3_WE~
G1 G1
VSSQ8 VSSQ8
G9 G9
VSSQ9 VSSQ9 RP506
DDR3_CKE 2 7 1 C105

DDR3_RESET~
1
R597
RP506
4 5
DDR3_CK_p
2 C769
1 C770 1 2

2 RP506
3 6
DDR3_CK_n

1 C744 1 C768 1 C773 1 C726 1 C664 1 C748 1 C723 1 C661 1 C745 1 C724

2 2 2 2 2 2 2 2 2 2

0V75_VTT_REF

1 C746 1 C772 1 C663 1 C687

2 2 2 2
 1 C69 1 C652 1 C641 1 C650 1 C651 1 C673 1 C669 1 C79 1 C648 1 C665 1 C639 1 C647 1 C649 1 C638 1 C640

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

DDR3_DQ[31:0]

1 R598 U23 U23

AA9 AD10 1 R594 AH8 AF4
VCCO_33_0 VCCO_33_3 VCCO_34_0 VCCO_34_4
Y12 AK12 AE7 AG1
VCCO_33_1 VCCO_33_4 VCCO_34_1 VCCO_34_5
AG11 AC13 AC3 AJ5
2 VCCO_33_2 VCCO_33_5 VCCO_34_2 VCCO_34_6
AK2
2 VCCO_34_3
DDR3_ADDR[14:0] Y13 AG10
IO_0_VRN_33 IO_L13P_T2_MRCC_33 NC_AG10_P3
DDR3_ADDR[14] AA12 AH10 AC6 AH4
IO_L1P_T0_33 IO_L13N_T2_MRCC_33 NC_AH10_P3 IO_0_VRN_34 IO_L13P_T2_MRCC_34 DDR3_DM[2]
DDR3_ADDR[13] AB12 AE10 AD4 AJ4 DDR3_DQ[16]
IO_L1N_T0_33 IO_L14P_T2_SRCC_33 DDR3_SYS_CLK DDR3_DM[0] IO_L1P_T0_34 IO_L13N_T2_MRCC_34
DDR3_ADDR[12] AA8 AF10 DDR3_DQ[0] AD3 AH6 DDR3_DQ[17]
IO_L2P_T0_33 IO_L14N_T2_SRCC_33 NC_AF10_P3 IO_L1N_T0_34 IO_L14P_T2_SRCC_34
DDR3_ADDR[11] AB8 AJ9 DDR3_DQ[1] AC2 AH5 DDR3_DQ[18]
IO_L2N_T0_33 IO_L15P_T2_DQS_33 DDR3_CKE IO_L2P_T0_34 IO_L14N_T2_SRCC_34
AB9 AK9 DDR3_DQ[2] AC1 AG2
DDR3_CK_p IO_L3P_T0_DQS_33 IO_L15N_T2_DQS_33 DDR3_ODT IO_L2N_T0_34 IO_L15P_T2_DQS_34 DDR3_DQS_p[2]
AC9 AG9 AD2 AH1
DDR3_CK_n IO_L3N_T0_DQS_33 IO_L16P_T2_33 NC_AG9_P3 DDR3_DQS_p[0] IO_L3P_T0_DQS_34 IO_L15N_T2_DQS_34 DDR3_DQS_n[2]
DDR3_ADDR[10] Y11 AH9 AD1 AH2 DDR3_DQ[19]
IO_L4P_T0_33 IO_L16N_T2_33 NC_AH9_P3 DDR3_DQS_n[0] IO_L3N_T0_DQS_34 IO_L16P_T2_34
DDR3_ADDR[9] Y10 AK11 DDR3_DQ[3] AC5 AJ2 DDR3_DQ[20]
IO_L4N_T0_33 IO_L17P_T2_33 NC_AK11_P3 IO_L4P_T0_34 IO_L16N_T2_34
DDR3_ADDR[8] AA11 AK10 DDR3_DQ[4] AC4 AJ1 DDR3_DQ[21]
IO_L5P_T0_33 IO_L17N_T2_33 NC_AK10_P3 IO_L4N_T0_34 IO_L17P_T2_34
DDR3_ADDR[7] AA10 AH11 DDR3_DQ[5] AD6 AK1 DDR3_DQ[22]
IO_L5N_T0_33 IO_L18P_T2_33 NC_AH11_P3 IO_L5P_T0_34 IO_L17N_T2_34
DDR3_ADDR[6] AA13 AJ11 DDR3_DQ[6] AE6 AJ3 DDR3_DQ[23]
IO_L6P_T0_33 IO_L18N_T2_33 NC_AJ11_P3 IO_L5N_T0_34 IO_L18P_T2_34
DDR3_ADDR[5] AB13 AE13 DDR3_DQ[7] AC7 AK3
IO_L6N_T0_VREF_33 IO_L19P_T3_33 NC_AE13_P3 IO_L6P_T0_34 IO_L18N_T2_34 NC_AK3_P3
DDR3_ADDR[4] AB10 AF13 AD7 AF8
IO_L7P_T1_33 IO_L19N_T3_VREF_33 NC_AF13_P3 0V75_VTT_REF IO_L6N_T0_VREF_34 IO_L19P_T3_34 DDR3_DM[3]
DDR3_ADDR[3] AC10 AK14 AF3 AG8
IO_L7N_T1_33 IO_L20P_T3_33 NC_AK14_P3 DDR3_DM[1] IO_L7P_T1_34 IO_L19N_T3_VREF_34 0V75_VTT_REF
DDR3_ADDR[2] AD8 AK13 DDR3_DQ[8] AF2 AF7 DDR3_DQ[24]
IO_L8P_T1_33 IO_L20N_T3_33 NC_AK13_P3 IO_L7N_T1_34 IO_L20P_T3_34
DDR3_ADDR[1] AE8 AH14 DDR3_DQ[9] AE1 AG7 DDR3_DQ[25]
IO_L8N_T1_33 IO_L21P_T3_DQS_33 NC_AH14_P3 IO_L8P_T1_34 IO_L20N_T3_34
DDR3_ADDR[0] AC12 AJ14 DDR3_DQ[10] AF1 AH7
IO_L9P_T1_DQS_33 IO_L21N_T3_DQS_33 NC_AJ14_P3 IO_L8N_T1_34 IO_L21P_T3_DQS_34 DDR3_DQS_p[3]
AC11 AJ13 AG4 AJ7
DDR3_BA[2] IO_L9N_T1_DQS_33 IO_L22P_T3_33 NC_AJ13_P3 DDR3_DQS_p[1] IO_L9P_T1_DQS_34 IO_L21N_T3_DQS_34 DDR3_DQS_n[3]
AD9 AJ12 AG3 AJ6 DDR3_DQ[26]
DDR3_BA[1] IO_L10P_T1_33 IO_L22N_T3_33 NC_AJ12_P3 DDR3_DQS_n[1] IO_L9N_T1_DQS_34 IO_L22P_T3_34
AE9 AF12 DDR3_DQ[11] AE4 AK6 DDR3_DQ[27]
DDR3_BA[0] IO_L10N_T1_33 IO_L23P_T3_33 NC_AF12_P3 IO_L10P_T1_34 IO_L22N_T3_34
AE11 AG12 DDR3_DQ[12] AE3 AJ8 DDR3_DQ[28]
DDR3_RAS~ IO_L11P_T1_SRCC_33 IO_L23N_T3_33 NC_AG12_P3 IO_L10N_T1_34 IO_L23P_T3_34
AF11 AG13 DDR3_DQ[13] AE5 AK8 DDR3_DQ[29]
DDR3_CAS~ IO_L11N_T1_SRCC_33 IO_L24P_T3_33 NC_AG13_P3 IO_L11P_T1_SRCC_34 IO_L23N_T3_34
AD12 AH12 DDR3_DQ[14] AF5 AK5 DDR3_DQ[30]
DDR3_WE~ IO_L12P_T1_MRCC_33 IO_L24N_T3_33 NC_AH12_P3 IO_L11N_T1_SRCC_34 IO_L24P_T3_34
AD11 AD13 DDR3_DQ[15] AF6 AK4 DDR3_DQ[31]
DDR3_CS~ IO_L12N_T1_MRCC_33 IO_25_VRP_33 IO_L12P_T1_MRCC_34 IO_L24N_T3_34
AG5 AB7
1 R595 DDR3_RESET~ IO_L12N_T1_MRCC_34 IO_25_VRP_34
1 R600

2
2

0V75_VTT_REF
L13
1 2

1 C635 1 C636 1 C747 1 C771 1 C662 1 C725

2 2 2 2 2 2

U16
1 4
NC1511_P3 OE VCC
2 3 2 R54 1
GND OUT DDR3_SYS_CLK

2
R55

1
 C58 C59
2 1 1 2
AVDD_RX0 AVDD_TX0

J3 U504 U13 J4
1 2 8 1 1 8 1 2
VDD DOUT DB0_RX_LSADC_MISO DB0_TX_LSADC_MISO DOUT VDD
3 4 DB0_RX_IO[15:0] 7 2 2 7 DB0_TX_IO[15:0] 3 4
+6V_RX0 GND CS~ DB0_RX_LSADC_SEN DB0_TX_LSADC_SEN CS~ GND +6V_TX0
5 6 DB0_RX_IO[15] 6 3 3 6 DB0_TX_IO[15] 5 6
DB0_RX_LSADC_VINA VIN0 SCLK DB0_SCLK DB0_SCLK SCLK VIN0 DB0_TX_LSADC_VINA
7 8 DB0_RX_IO[14] 5 4 4 5 DB0_TX_IO[14] 7 8
DVDD_RX0 DB0_RX_LSADC_VINB VIN1 DIN DB0_MOSI DB0_MOSI DIN VIN1 DB0_TX_LSADC_VINB DVDD_TX0
9 10 DB0_RX_IO[13] DB0_TX_IO[13] 9 10
11 12 DB0_RX_IO[12] DB0_TX_IO[12] 11 12
DB0_RX_CLK DB0_TX_CLK
13 14 DB0_RX_IO[11] AVDD_RX0 AVDD_TX0 DB0_TX_IO[11] 13 14
L504 L6
15 16 DB0_RX_IO[10] 1 2 1 2 DB0_TX_IO[10] 15 16
DB_SCL DB_SCL
17 18 DB0_RX_IO[9] DB0_TX_IO[9] 17 18
DB_SDA DB_SDA
19 20 DB0_RX_IO[8] DB0_TX_IO[8] 19 20
DB0_RX_ADR0 DB0_TX_ADR0
21 22 DB0_RX_IO[7] DB0_TX_IO[7] 21 22
DB0_RX_ADR1 DB0_TX_ADR1
23 24 DB0_RX_IO[6] 1 C33 1 C32 1 C47 1 C46 DB0_TX_IO[6] 23 24
25 26 DB0_RX_IO[5] DB0_TX_IO[5] 25 26
27 28 DB0_RX_IO[4] DB0_TX_IO[4] 27 28
U503 2 2 2 2 U7
29 30 DB0_RX_IO[3] DB0_TX_IO[3] 29 30
DB0_SCLK 1 10 10 1 DB0_SCLK
31 32 DB0_RX_IO[2] DB0_RX_LSDAC_VOUTA DB0_TX_LSDAC_VOUTA DB0_TX_IO[2] 31 32
DB0_RX_MISO 2 VREFIN/OUT 9 9 VREFIN/OUT 2 DB0_TX_MISO
33 34 DB0_RX_IO[1] DB0_RX_LSDAC_VOUTB VOUTA VOUTA DB0_TX_LSDAC_VOUTB DB0_TX_IO[1] 33 34
DB0_MOSI VDD 8 8 VDD DB0_MOSI
35 36 DB0_RX_IO[0] 4 VOUTB DB0_MOSI DB0_MOSI VOUTB 4 DB0_TX_IO[0] 35 36
DB0_RX_SEN DIN 7 7 DIN DB0_TX_SEN
37 38 5 LDAC~ DB0_SCLK DB0_SCLK LDAC~ 5 37 38
AVDD_RX0 SCLK 6 6 SCLK AVDD_TX0
39 40 CLR~ DB0_RX_LSDAC_SEN DB0_TX_LSDAC_SEN CLR~ 3 39 40
3 SYNC~ SYNC~ NC_TXA_39
41 42 41 42
43 44 GND GND 43 44
AVDD_RX0 AVDD_RX0 AVDD_TX0 AVDD_TX0
45 46 45 46
L4 L5
47 48 1 2 1 2 47 48
DVDD_RX0 DVDD_TX0
49 50 49 50
DB0_RX_LSDAC_VOUTA DB0_RX_VINB_P DB0_TX_INB_P DB0_TX_LSDAC_VOUTA
51 52 51 52
DB0_RX_VINB_N 1 C27 1 C28 DB0_TX_INB_N
53 54 L501 L502 U3 U5 L3 L2 53 54
DB0_RX_LSDAC_VOUTB R521 R8 DB0_TX_LSDAC_VOUTB
55 56 1 2 1 2 1 2 5 1 1 5 2 1 2 1 2 1 55 56
DB0_RX_CLK DB0_TX_CLK NC_TXA_55
57 58 VCC 2 2 VCC 57 58
ROUT 2 2 ROUT
59 60 DVDD_RX0 DVDD_TX0 59 60
DB0_RX_LSADC_VINA DB0_RX_VINA_P 1 C21 DB0_TX_INA_N DB0_TX_LSADC_VINA
61 62 1 C524 4 GND 3 3 GND 4 61 62
DB0_RX_LSADC_VINB DB0_RX_VINA_N RIN- RIN+ RIN+ RIN- DB0_TX_INA_P DB0_TX_LSADC_VINB
63 64 63 64
2
2 2 2 2
1 R522 R519 R20 R19
R15 R14 2 1 2 1 2 1 2 1 R18 R17

2
1 1 1
1 R520 1 R21
DB0_RX_ADR1 1 C525 1 C29 DB0_TX_ADR1
DB0_RX_ADR0 DB0_TX_ADR0
2
1 1 1
R24 R13 2 2 R25 R16
2 2

2 2 2
1

DB0_RX_REFCLK_N DB0_RX_REFCLK_P DB0_TX_REFCLK_P DB0_TX_REFCLK_N

C202 C207
2 1 1 2
AVDD_RX1 AVDD_TX1

J14 U512 U37 J15

1 2 8 1 1 8 1 2
VDD DOUT DB1_RX_LSADC_MISO DB1_TX_LSADC_MISO DOUT VDD
3 4 DB1_RX_IO[15:0] 7 2 2 7 DB1_TX_IO[15:0] 3 4
+6V_RX1 GND CS~ DB1_RX_LSADC_SEN DB1_TX_LSADC_SEN CS~ GND +6V_TX1
5 6 DB1_RX_IO[15] 6 3 3 6 DB1_TX_IO[15] 5 6
DB1_RX_LSADC_VINA VIN0 SCLK DB1_SCLK DB1_SCLK SCLK VIN0 DB1_TX_LSADC_VINA
7 8 DB1_RX_IO[14] 5 4 4 5 DB1_TX_IO[14] 7 8
DVDD_RX1 DB1_RX_LSADC_VINB VIN1 DIN DB1_MOSI DB1_MOSI DIN VIN1 DB1_TX_LSADC_VINB DVDD_TX1
9 10 DB1_RX_IO[13] DB1_TX_IO[13] 9 10
11 12 DB1_RX_IO[12] DB1_TX_IO[12] 11 12
DB1_RX_CLK DB1_TX_CLK
13 14 DB1_RX_IO[11] DB1_TX_IO[11] 13 14
L513 L30
15 16 DB1_RX_IO[10] 1 2 1 2 DB1_TX_IO[10] 15 16
DB_SCL AVDD_RX1 AVDD_TX1 DB_SCL
17 18 DB1_RX_IO[9] DB1_TX_IO[9] 17 18
DB_SDA DB_SDA
19 20 DB1_RX_IO[8] DB1_TX_IO[8] 19 20
DB1_RX_ADR0 DB1_TX_ADR0
21 22 DB1_RX_IO[7] DB1_TX_IO[7] 21 22
DB1_RX_ADR1 DB1_TX_ADR1
23 24 DB1_RX_IO[6] 1 C175 1 C174 1 C190 1 C189 DB1_TX_IO[6] 23 24
25 26 DB1_RX_IO[5] DB1_TX_IO[5] 25 26
27 28 DB1_RX_IO[4] DB1_TX_IO[4] 27 28
U511 2 2 2 2 U34
29 30 DB1_RX_IO[3] DB1_TX_IO[3] 29 30
DB1_SCLK 1 10 10 1 DB1_SCLK
31 32 DB1_RX_IO[2] DB1_RX_LSDAC_VOUTA DB1_TX_LSDAC_VOUTA DB1_TX_IO[2] 31 32
DB1_RX_MISO 2 VREFIN/OUT 9 9 VREFIN/OUT 2 DB1_TX_MISO
33 34 DB1_RX_IO[1] DB1_RX_LSDAC_VOUTB VOUTA VOUTA DB1_TX_LSDAC_VOUTB DB1_TX_IO[1] 33 34
DB1_MOSI VDD 8 8 VDD DB1_MOSI
35 36 DB1_RX_IO[0] 4 VOUTB DB1_MOSI DB1_MOSI VOUTB 4 DB1_TX_IO[0] 35 36
DB1_RX_SEN DIN 7 7 DIN DB1_TX_SEN
37 38 5 LDAC~ DB1_SCLK DB1_SCLK LDAC~ 5 37 38
AVDD_RX1 SCLK 6 6 SCLK AVDD_TX1
39 40 CLR~ DB1_RX_LSDAC_SEN DB1_TX_LSDAC_SEN CLR~ 3 39 40
3 SYNC~ SYNC~
41 42 41 42
43 44 GND GND 43 44
AVDD_RX1 AVDD_RX1 AVDD_TX1 AVDD_TX1
45 46 45 46
L28 L29
47 48 1 2 1 2 47 48
DVDD_RX1 DVDD_TX1
49 50 49 50
DB1_RX_LSDAC_VOUTA DB1_RX_VINB_P DB1_TX_INB_P DB1_TX_LSDAC_VOUTA
51 52 51 52
DB1_RX_VINB_N 1 C170 1 C172 DB1_TX_INB_N
53 54 L511 L512 U31 U32 L27 L26 53 54
DB1_RX_LSDAC_VOUTB R627 R124 DB1_TX_LSDAC_VOUTB
55 56 1 2 1 2 1 2 5 1 1 5 2 1 2 1 2 1 55 56
DB1_RX_CLK DB1_TX_CLK
57 58 VCC 2 2 VCC 57 58
ROUT 2 2 ROUT
59 60 59 60
DB1_RX_LSADC_VINA DB1_RX_VINA_P GND GND DB1_TX_INA_N DB1_TX_LSADC_VINA
61 62 DVDD_RX1 1 C818 4 3 3 4 1 C171 DVDD_TX1 61 62
DB1_RX_LSADC_VINB DB1_RX_VINA_N RIN- RIN+ RIN+ RIN- DB1_TX_INA_P DB1_TX_LSADC_VINB
63 64 63 64

2 2
2
1 1 R628 R625 R133 R132 1
R126 R128 2 1 2 1 2 1 2 1 R131 R130

2 2 2
1
1 R626 1 R134
DB1_RX_ADR1 1 C817 1 C173 DB1_TX_ADR1
DB1_RX_ADR0 DB1_TX_ADR0
2 2 2
1
R138 R127 2 2 R139 R129
2 2

2
1 1 1

DB1_RX_REFCLK_N DB1_RX_REFCLK_P DB1_TX_REFCLK_P DB1_TX_REFCLK_N

 1 C130 1 C719 1 C760 1 C739 1 C763 1 C737 1 C762

2 2 2 2 2 2 2

1 C78 1 C765 1 C735 1 C756 1 C736 1 C778 1 C766 1 C757

2 2 2 2 2 2 2 2

U23
P20 L29
VCCO_15_0 VCCO_15_3
J25 M26
VCCO_15_1 VCCO_15_4
K22 N23
VCCO_15_2 VCCO_15_5
U23 M19 K28
IO_0_15 IO_L13P_T2_MRCC_15 DB0_ADC_DA1_P
H28 E27 J23 K29
VCCO_16_0 VCCO_16_4 DB0_ADC_DA4_P IO_L1P_T0_AD0P_15 IO_L13N_T2_MRCC_15 DB0_ADC_DA1_N
A29 F24 J24 M28
VCCO_16_1 VCCO_16_5 DB0_ADC_DA4_N IO_L1N_T0_AD0N_15 IO_L14P_T2_SRCC_15 DB0_ADC_DA2_P
C23 B26 L22 L28
VCCO_16_2 VCCO_16_6 DB0_ADC_DA5_P IO_L2P_T0_AD8P_15 IO_L14N_T2_SRCC_15 DB0_ADC_DA2_N
D30 L23 M29
1 1 VCCO_16_3 DB0_ADC_DA5_N IO_L2N_T0_AD8N_15 IO_L15P_T2_DQS_15 DB0_DAC_D0_P
R103 R614 K23 M30
DB0_ADC_DA6_P IO_L3P_T0_DQS_AD1P_15 IO_L15N_T2_DQS_ADV_B_15 DB0_DAC_D0_N
F23 D27 K24 N27
DB0_TX_LSDAC_SEN IO_0_16 IO_L13P_T2_MRCC_16 DB0_RX_LSDAC_SEN DB0_ADC_DA6_N IO_L3N_T0_DQS_AD1N_15 IO_L16P_T2_A28_15 DB0_DAC_D1_P
B23 C27 DB0_ADC_DA3_P L21 M27
DB0_TX_LSADC_MISO IO_L1P_T0_16 IO_L13N_T2_MRCC_16 DB0_RX_LSADC_MISO DB0_ADC_DB0_P IO_L4P_T0_AD9P_15 IO_L16N_T2_A27_15 DB0_DAC_D1_N
2 2 A23 E28 2 K21 N29
DB0_TX_LSADC_SEN IO_L1N_T0_16 IO_L14P_T2_SRCC_16 DB0_RX_LSADC_SEN DB0_ADC_DB0_N IO_L4N_T0_AD9N_15 IO_L17P_T2_A26_15 DB0_DAC_D2_P
E23 D28 R673 J21 N30
DB0_TX_MISO IO_L2P_T0_16 IO_L14N_T2_SRCC_16 DB0_RX_SEN DB0_ADC_DB1_P IO_L5P_T0_AD2P_15 IO_L17N_T2_A25_15 DB0_DAC_D2_N
D23 C29 J22 N25
DB0_TX_SEN IO_L2N_T0_16 IO_L15P_T2_DQS_16 DB0_RX_MISO DB0_ADC_DB1_N IO_L5N_T0_AD2N_15 IO_L18P_T2_A24_15 DB0_DAC_D3_P
F25 B29 M20 N26
DB_SCL IO_L3P_T0_DQS_16 IO_L15N_T2_DQS_16 DB0_ADC_SEN DB0_ADC_DB2_P IO_L6P_T0_15 IO_L18N_T2_A23_15 DB0_DAC_D3_N
E25 D29 L20 N19
DB_SDA IO_L3N_T0_DQS_16 IO_L16P_T2_16 1 DB0_ADC_DB2_N IO_L6N_T0_VREF_15 IO_L19P_T3_A22_15 DB0_DAC_D4_P
E24 C30 J29 N20
DB0_MOSI IO_L4P_T0_16 IO_L16N_T2_16 DB0_ADC_DA3_N DB0_ADC_DB3_P IO_L7P_T1_AD10P_15 IO_L19N_T3_A21_VREF_15 DB0_DAC_D4_N
DB0_TX_IO[15:0] DB0_SCLK_FPGA D24 B30 H29 N21
IO_L4N_T0_16 IO_L17P_T2_16 DB_ADC_RESET DB0_ADC_DB3_N IO_L7N_T1_AD10N_15 IO_L20P_T3_A20_15 DB0_DAC_D5_P
DB0_TX_IO[15] F26 A30 DB0_RX_IO[15] DB0_RX_IO[15:0] J27 N22
IO_L5P_T0_16 IO_L17N_T2_16 DB0_ADC_DB4_P IO_L8P_T1_AD3P_15 IO_L20N_T3_A19_15 DB0_DAC_D5_N
DB0_TX_IO[14] E26 E29 DB0_RX_IO[14] J28 P23
IO_L5N_T0_16 IO_L18P_T2_16 DB0_ADC_DB4_N IO_L8N_T1_AD3N_15 IO_L21P_T3_DQS_15 DB0_DAC_D6_P
DB0_TX_IO[13] G23 E30 DB0_RX_IO[13] L30 N24
IO_L6P_T0_16 IO_L18N_T2_16 DB0_ADC_DB5_P IO_L9P_T1_DQS_AD11P_15 IO_L21N_T3_DQS_A18_15 DB0_DAC_D6_N
DB0_TX_IO[12] G24 H24 DB0_RX_IO[12] K30 P21
IO_L6N_T0_VREF_16 IO_L19P_T3_16 DB0_ADC_DB5_N IO_L9N_T1_DQS_AD11N_15 IO_L22P_T3_A17_15 DB0_DAC_D7_P
DB0_TX_IO[11] B27 H25 DB0_RX_IO[11] K26 P22
IO_L7P_T1_16 IO_L19N_T3_VREF_16 DB0_ADC_DB6_P IO_L10P_T1_AD4P_15 IO_L22N_T3_A16_15 DB0_DAC_D7_N
DB0_TX_IO[10] A27 G28 DB0_RX_IO[10] J26 M24
IO_L7N_T1_16 IO_L20P_T3_16 DB0_ADC_DB6_N IO_L10N_T1_AD4N_15 IO_L23P_T3_FOE_B_15 DB0_DAC_FRAME_P
DB0_TX_IO[9] C24 F28 DB0_RX_IO[9] L26 M25
IO_L8P_T1_16 IO_L20N_T3_16 DB0_ADC_DA0_P IO_L11P_T1_SRCC_AD12P_15 IO_L23N_T3_FWE_B_15 DB0_DAC_FRAME_N
DB0_TX_IO[8] B24 G27 DB0_RX_IO[8] L27 M22
IO_L8N_T1_16 IO_L21P_T3_DQS_16 DB0_ADC_DA0_N IO_L11N_T1_SRCC_AD12N_15 IO_L24P_T3_RS1_15 DB0_DAC_DCI_P
DB0_TX_IO[7] B28 F27 DB0_RX_IO[7] L25 M23
IO_L9P_T1_DQS_16 IO_L21N_T3_DQS_16 DB0_ADC_DCLK_P IO_L12P_T1_MRCC_AD5P_15 IO_L24N_T3_RS0_15 DB0_DAC_DCI_N
DB0_TX_IO[6] A28 G29 DB0_RX_IO[6] K25 P19
IO_L9N_T1_DQS_16 IO_L22P_T3_16 DB0_ADC_DCLK_N IO_L12N_T1_MRCC_AD5N_15 IO_25_15
DB0_TX_IO[5] A25 F30 DB0_RX_IO[5]
IO_L10P_T1_16 IO_L22N_T3_16
DB0_TX_IO[4] A26 H26 DB0_RX_IO[4]
IO_L10N_T1_16 IO_L23P_T3_16
DB0_TX_IO[3] D26 H27 DB0_RX_IO[3]
IO_L11P_T1_SRCC_16 IO_L23N_T3_16
DB0_TX_IO[2] C26 H30 DB0_RX_IO[2]
IO_L11N_T1_SRCC_16 IO_L24P_T3_16
DB0_TX_IO[1] C25 G30 DB0_RX_IO[1]
IO_L12P_T1_MRCC_16 IO_L24N_T3_16
DB0_TX_IO[0] B25 G25 DB0_RX_IO[0]
IO_L12N_T1_MRCC_16 IO_25_16

R750 1
1 2 R740
DB0_SCLK

1 C77 1 C761 1 C777 1 C717 1 C738 1 C740 1 C741 1 C743

2 2 2 2 2 2 2 2

1 C143 1 C758 1 C764 1 C767 1 C759 1 C742 1 C779

U23
2 2 2 2 2 2 2
L19 G21
VCCO_17_0 VCCO_17_4
A19 H18
VCCO_17_1 VCCO_17_5
B16 E17
VCCO_17_2 VCCO_17_6
D20
VCCO_17_3

G19 D17
IO_0_17 IO_L13P_T2_MRCC_17 DB1_ADC_DA0_P
K18 D18
DB1_ADC_DB0_P IO_L1P_T0_17 IO_L13N_T2_MRCC_17 DB1_ADC_DA0_N
J18 E19
DB1_ADC_DB0_N IO_L1N_T0_17 IO_L14P_T2_SRCC_17 DB1_ADC_DA1_P
H20 D19
U23 DB1_ADC_DB4_P IO_L2P_T0_17 IO_L14N_T2_SRCC_17 DB1_ADC_DA1_N
G20 D16
R751 F14
VCCO_18_0 VCCO_18_3
D10 DB1_ADC_DB4_N
J17
IO_L2N_T0_17 IO_L15P_T2_DQS_17
C16
DB1_DAC_FRAME_P
1 2 J15 C13 DB1_ADC_DA4_P IO_L3P_T0_DQS_17 IO_L15N_T2_DQS_17 DB1_DAC_FRAME_N
DB1_SCLK VCCO_18_1 VCCO_18_4 H17 G18
G11 K12 DB1_ADC_DA4_N IO_L3N_T0_DQS_17 IO_L16P_T2_17 DB1_ADC_DA5_P
VCCO_18_2 VCCO_18_5 J19 F18
DB1_ADC_DA6_P IO_L4P_T0_17 IO_L16N_T2_17 DB1_ADC_DA5_N
H19 C17
G12 D12 DB1_ADC_DA6_N IO_L4N_T0_17 IO_L17P_T2_17 DB1_DAC_D0_P
DB1_ADC_DA3_P DB1_TX_LSDAC_SEN IO_0_18 IO_L13P_T2_MRCC_18 DB1_RX_LSDAC_SEN L17 B17
L16 D13 DB1_ADC_DA2_P IO_L5P_T0_17 IO_L17N_T2_17 DB1_DAC_D0_N
2 DB1_TX_LSADC_MISO IO_L1P_T0_18 IO_L13N_T2_MRCC_18 DB1_RX_LSADC_MISO L18 G17
K16 F12 DB1_ADC_DA2_N IO_L5N_T0_17 IO_L18P_T2_17 DB1_DAC_D1_P
R674 DB1_TX_LSADC_SEN IO_L1N_T0_18 IO_L14P_T2_SRCC_18 DB1_RX_LSADC_SEN K19 F17
L15 E13 DB1_ADC_DB2_P IO_L6P_T0_17 IO_L18N_T2_17 DB1_DAC_D1_N
DB1_TX_MISO IO_L2P_T0_18 IO_L14N_T2_SRCC_18 DB1_RX_SEN K20 C20
K15 C12 DB1_ADC_DB2_N IO_L6N_T0_VREF_17 IO_L19P_T3_17 DB1_DAC_D5_P
DB1_TX_SEN IO_L2N_T0_18 IO_L15P_T2_DQS_18 DB1_RX_MISO H21 B20
L12 B12 DB1_ADC_DB6_P IO_L7P_T1_17 IO_L19N_T3_VREF_17 DB1_DAC_D5_N
DB1_MOSI IO_L3P_T0_DQS_18 IO_L15N_T2_DQS_18 DB1_ADC_SEN H22 A16
1 L13 F11 DB1_ADC_DB6_N IO_L7N_T1_17 IO_L20P_T3_17 DB1_DAC_D2_P
IO_L3N_T0_DQS_18 IO_L16P_T2_18 GPSDO_PWR_ENA D21 A17
DB1_ADC_DA3_N DB1_SCLK_FPGA K13 E11 DB1_ADC_DB1_P IO_L8P_T1_17 IO_L20N_T3_17 DB1_DAC_D2_N
IO_L4P_T0_18 IO_L16N_T2_18 TCXO_ENA C21 A20
J13 A11 DB1_ADC_DB1_N IO_L8N_T1_17 IO_L21P_T3_DQS_17 DB1_DAC_D4_P
DB1_TX_IO[15:0] IO_L4N_T0_18 IO_L17P_T2_18 G22 A21
DB1_TX_IO[15] K14 A12 DB1_RX_IO[15] DB1_RX_IO[15:0] DB1_ADC_DB3_P IO_L9P_T1_DQS_17 IO_L21N_T3_DQS_17 DB1_DAC_D4_N
IO_L5P_T0_18 IO_L17N_T2_18 F22 B18
DB1_TX_IO[14] J14 D11 DB1_RX_IO[14] DB1_ADC_DB3_N IO_L9N_T1_DQS_17 IO_L22P_T3_17 DB1_DAC_D3_P
IO_L5N_T0_18 IO_L18P_T2_18 D22 A18
DB1_TX_IO[13] L11 C11 DB1_RX_IO[13] DB1_ADC_DB5_P IO_L10P_T1_17 IO_L22N_T3_17 DB1_DAC_D3_N
IO_L6P_T0_18 IO_L18N_T2_18 C22 B22
DB1_TX_IO[12] K11 F15 DB1_RX_IO[12] DB1_ADC_DB5_N IO_L10N_T1_17 IO_L23P_T3_17 DB1_DAC_D6_P
IO_L6N_T0_VREF_18 IO_L19P_T3_18 F21 A22
DB1_TX_IO[11] H15 E16 DB1_RX_IO[11] DB1_DAC_DCI_P IO_L11P_T1_SRCC_17 IO_L23N_T3_17 DB1_DAC_D6_N
IO_L7P_T1_18 IO_L19N_T3_VREF_18 E21 C19
DB1_TX_IO[10] G15 E14 DB1_RX_IO[10] DB1_DAC_DCI_N IO_L11N_T1_SRCC_17 IO_L24P_T3_17 DB1_DAC_D7_P
IO_L7N_T1_18 IO_L20P_T3_18 F20 B19
DB1_TX_IO[9] J11 E15 DB1_RX_IO[9] DB1_ADC_DCLK_P IO_L12P_T1_MRCC_17 IO_L24N_T3_17 DB1_DAC_D7_N
IO_L8P_T1_18 IO_L20N_T3_18 E20 E18
DB1_TX_IO[8] J12 D14 DB1_RX_IO[8] DB1_ADC_DCLK_N IO_L12N_T1_MRCC_17 IO_25_17
IO_L8N_T1_18 IO_L21P_T3_DQS_18
DB1_TX_IO[7] J16 C14 DB1_RX_IO[7]
IO_L9P_T1_DQS_18 IO_L21N_T3_DQS_18
DB1_TX_IO[6] H16 B13 DB1_RX_IO[6]
IO_L9N_T1_DQS_18 IO_L22P_T3_18
DB1_TX_IO[5] H11 A13 DB1_RX_IO[5]
IO_L10P_T1_18 IO_L22N_T3_18
DB1_TX_IO[4] H12 C15 DB1_RX_IO[4]
IO_L10N_T1_18 IO_L23P_T3_18
DB1_TX_IO[3] H14 B15 DB1_RX_IO[3]
IO_L11P_T1_SRCC_18 IO_L23N_T3_18
DB1_TX_IO[2] G14 B14 DB1_RX_IO[2]
IO_L11N_T1_SRCC_18 IO_L24P_T3_18
DB1_TX_IO[1] G13 A15 DB1_RX_IO[1]
IO_L12P_T1_MRCC_18 IO_L24N_T3_18
DB1_TX_IO[0] F13 F16 DB1_RX_IO[0]
IO_L12N_T1_MRCC_18 IO_25_18
C891
1 2

U518
1 8
A0 Vcc
2 7
A1 WP
3 6
A2 SCL
4 5
Vss SDA DB_SCL
DB_SDA
 DVDD_RX0

1 1
1
R47 R46 R45

2
2 2

1
1 1
R48 R555 R44

R40 U11
1 2
DB0_RX_VINA_P
2 2
1 C571 2 12 57
DB_ADC_RESET RESET CLKOUTP DB0_ADC_DCLK_P
13 56
DB0_SCLK SCLK CLKOUTM DB0_ADC_DCLK_N
15
R41 2 DB0_ADC_SEN SEN 40
1 2 14 DA0 DB0_ADC_DA0_P
DB0_RX_VINA_N DB0_MOSI SDATA 41
35 DA1 DB0_ADC_DA0_N
CTRL1 42
36 DA2 DB0_ADC_DA1_P
CTRL2 43
37 DA3 DB0_ADC_DA1_N
CTRL3 44
DB0_ADC_REFCLK_P DA4 DB0_ADC_DA2_P
DB0_RX_VINA_FILT_P 29 45
DB0_ADC_REFCLK_N INP_A DA5 DB0_ADC_DA2_N
DB0_RX_VINA_FILT_N 30 46
INM_A DA6 DB0_ADC_DA3_P
25 47
CLKP DA7 DB0_ADC_DA3_N
26 50
R42 R43 R35 CLKM DA8 DB0_ADC_DA4_P
2 1 2 1 1 2 DB0_RX_VINB_FILT_P 19 51
DB0_RX_VINB_P INP_B DA9 DB0_ADC_DA4_N
DB0_RX_VINB_FILT_N 20 52
1 C561 INM_B DA10 DB0_ADC_DA5_P
AVDD_RX0 23 53
C570 VCM DA11 DB0_ADC_DA5_N
2 1 54
16 DA12 DB0_ADC_DA6_P
1 R543 R36 2 AVDD0 55
1 C572 1 2 33 DA13 DB0_ADC_DA6_N
DB0_RX_VINB_N L506 AVDD1
1 2 34 60
AVDD2 DB0 DB0_ADC_DB0_P
1 61
2 1 C549 1 C594 1 C593 1 C560 1 C592 DRVDD0 DB1 DB0_ADC_DB0_N
2 38 62
DRVDD1 DB2 DB0_ADC_DB1_P
48 63
DRVDD2 DB3 DB0_ADC_DB1_N
2 2 2 2 2 58 2
DRVDD3 DB4 DB0_ADC_DB2_P
3
17 DB5 DB0_ADC_DB2_N
DVDD_RX0 AGND0 4
18 DB6 DB0_ADC_DB3_P
L12 AGND1 5
1 2 21 DB7 DB0_ADC_DB3_N
AGND2 6
24 DB8 DB0_ADC_DB4_P
1 C60 1 C569 1 C590 1 C591 1 C559 AGND3 7
27 DB9 DB0_ADC_DB4_N
AGND4 8
28 DB10 DB0_ADC_DB5_P
AGND5 9
2 2 2 2 2 31 DB11 DB0_ADC_DB5_N
AGND6 10
32 DB12 DB0_ADC_DB6_P
AGND7 11
39 DB13 DB0_ADC_DB6_N
DRGND0
49
DRGND1
59
DRGND2
22
NC
64
SDOUT
65
PAD
1
1
R737
DVDD_RX1 R736

2
2

1 1
1
R160 R159 R158

2
2 2

1
1 1
R161 R650 R157

R150 U35
1 2
DB1_RX_VINA_P
2 2
1 C838 2 12 57
DB_ADC_RESET RESET CLKOUTP DB1_ADC_DCLK_P
13 56
DB1_SCLK SCLK CLKOUTM DB1_ADC_DCLK_N
15
R151 2 DB1_ADC_SEN SEN 40
1 2 14 DA0 DB1_ADC_DA0_P
DB1_RX_VINA_N DB1_MOSI SDATA 41
35 DA1 DB1_ADC_DA0_N
CTRL1 42
36 DA2 DB1_ADC_DA1_P
CTRL2 43
37 DA3 DB1_ADC_DA1_N
CTRL3 44
DB1_ADC_REFCLK_P DA4 DB1_ADC_DA2_P
DB1_RX_VINA_FILT_P 29 45
DB1_ADC_REFCLK_N INP_A DA5 DB1_ADC_DA2_N
DB1_RX_VINA_FILT_N 30 46
INM_A DA6 DB1_ADC_DA3_P
25 47
CLKP DA7 DB1_ADC_DA3_N
26 50
R152 R153 R143 CLKM DA8 DB1_ADC_DA4_P
2 1 2 1 1 2 DB1_RX_VINB_FILT_P 19 51
DB1_RX_VINB_P INP_B DA9 DB1_ADC_DA4_N
DB1_RX_VINB_FILT_N 20 52
1 C831 INM_B DA10 DB1_ADC_DA5_P
AVDD_RX1 23 53
C837 VCM DA11 DB1_ADC_DA5_N
2 1 54
16 DA12 DB1_ADC_DA6_P
1 R639 R144 2 AVDD0 55
1 C839 1 2 33 DA13 DB1_ADC_DA6_N
DB1_RX_VINB_N L516 AVDD1
1 2 34 60
AVDD2 DB0 DB1_ADC_DB0_P
1 61
2 1 C819 1 C853 1 C852 1 C830 1 C851 DRVDD0 DB1 DB1_ADC_DB0_N
2 38 62
DRVDD1 DB2 DB1_ADC_DB1_P
48 63
DRVDD2 DB3 DB1_ADC_DB1_N
2 2 2 2 2 58 2
DRVDD3 DB4 DB1_ADC_DB2_P
3
17 DB5 DB1_ADC_DB2_N
DVDD_RX1 AGND0 4
18 DB6 DB1_ADC_DB3_P
L38 AGND1 5
1 2 21 DB7 DB1_ADC_DB3_N
AGND2 6
24 DB8 DB1_ADC_DB4_P
1 C211 1 C836 1 C849 1 C850 1 C829 AGND3 7
27 DB9 DB1_ADC_DB4_N
AGND4 8
28 DB10 DB1_ADC_DB5_P
AGND5 9
2 2 2 2 2 31 DB11 DB1_ADC_DB5_N
AGND6 10
32 DB12 DB1_ADC_DB6_P
AGND7 11
39 DB13 DB1_ADC_DB6_N
DRGND0
49
DRGND1
59
DRGND2
22
NC
64
SDOUT
1 65
1 PAD
R738
R739

2
2
 U12

31 27
DB_DAC_MOSI SDIO D0P DB0_DAC_D0_P
32 28
DB0_DAC_SCLK SCLK D0N DB0_DAC_D0_N
33 25
DB0_DAC_SEN ~C~S D1P DB0_DAC_D1_P
34 26
~I~R~O D1N DB0_DAC_D1_N
36 23
DB_DAC_RESET ~R~E~S~E~T D2P DB0_DAC_D2_P
30 24
DB0_DAC_ENABLE TXENABLE D2N DB0_DAC_D2_N
21
D3P DB0_DAC_D3_P
22
3 D3N DB0_DAC_D3_N
DACCLKP 15
4 D4P DB0_DAC_D4_P
AVDD_TX0 DACCLKN 16
D4N DB0_DAC_D4_N
6 13
DB0_DAC_REFCLK_P REFCLKP D5P DB0_DAC_D5_P
7 14
DB0_DAC_REFCLK_N REFCLKN D5N DB0_DAC_D5_N
1 11
R38 R37 D6P DB0_DAC_D6_P
L10 2 1 2 1 12
D6N DB0_DAC_D6_N
47 9
DB0_TX_INB_P IOUT1P D7P DB0_DAC_D7_P
2 46 10
1 DB0_TX_INB_N IOUT1N D7N DB0_DAC_D7_N
19
L9 1 R30 38 FRAMEP DB0_DAC_FRAME_P
1 C555 1 C57 1 C44 1 C43 DB0_TX_INA_P IOUT2P 20
39 FRAMEN DB0_DAC_FRAME_N
U12 DB0_TX_INA_N IOUT2N
17
2 DCIP DB0_DAC_DCI_P
2 2 2 1 2 18
CVDD18 2 DCIN DB0_DAC_DCI_N
2 42
CVDD18_2 REFIO
43
FSADJ
8
DVDD18 1
29
1 C41 1 C42 1 C558 1 C567 1 C568 DVDD18_2 1 C564
35 R542
DVDD18_3

1 2 2 2 2 2 37 5 2
AVDD33 CVSS
L505 40 41 2
AVDD33_2 AVSS1
45 44
AVDD33_3 AVSS2
2 48 49
AVDD33_4 EPAD
1 C554 1 C557 1 C565 1 C566 1 C556

2 2 2 2 2

AVDD_TX1

1
L32

1 2

L31
1 C826 1 C200 1 C199
U36
U36
2
31 27
2 2 2 1 DB_DAC_MOSI SDIO D0P DB1_DAC_D0_P
CVDD18 32 28
2 DB_DAC_SCLK SCLK D0N DB1_DAC_D0_N
CVDD18_2 33 25
DB1_DAC_SEN ~C~S D1P DB1_DAC_D1_P
34 26
8 ~I~R~O D1N DB1_DAC_D1_N
DVDD18 36 23
29 DB_DAC_RESET ~R~E~S~E~T D2P DB1_DAC_D2_P
1 C186 1 C198 1 C833 1 C834 1 C828 DVDD18_2 30 24
35 DB1_DAC_ENABLE TXENABLE D2N DB1_DAC_D2_N
DVDD18_3 21
D3P DB1_DAC_D3_P
22
1 2 2 2 2 2 37 5 3 D3N DB1_DAC_D3_N
AVDD33 CVSS DACCLKP 15
L515 40 41 4 D4P DB1_DAC_D4_P
AVDD33_2 AVSS1 DACCLKN 16
45 44 D4N DB1_DAC_D4_N
AVDD33_3 AVSS2 6 13
2 48 49 DB1_DAC_REFCLK_P REFCLKP D5P DB1_DAC_D5_P
AVDD33_4 EPAD 7 14
DB1_DAC_REFCLK_N REFCLKN D5N DB1_DAC_D5_N
1 C825 1 C832 1 C204 1 C846 1 C827 11
D6P DB1_DAC_D6_P
R146 R145 12
2 1 2 1 D6N DB1_DAC_D6_N
47 9
2 2 2 2 2 DB1_TX_INB_P IOUT1P D7P DB1_DAC_D7_P
46 10
DB1_TX_INB_N IOUT1N D7N DB1_DAC_D7_N
19
38 FRAMEP DB1_DAC_FRAME_P
1 R142 DB1_TX_INA_P IOUT2P 20
1 C187 39 FRAMEN DB1_DAC_FRAME_N
DB1_TX_INA_N IOUT2N
17
DCIP DB1_DAC_DCI_P
18
2 DCIN DB1_DAC_DCI_N
2 42
REFIO
43
FSADJ
1
1 C203
R638

2
2
 1 R705 1 C916

2 U520
1 C119 1 C722 1 C682 1 C720 1 C721 1 C684 1 C718
2 2
VCC
3
GND
2 2 2 2 2 2 2 1
SIGNAL

U23
U21 T24
VCCO_14_0 VCCO_14_3 1 R701
P30 R27
VCCO_14_1 VCCO_14_4
W25 V28
VCCO_14_2 VCCO_14_5

R19 U27 2
1 IO_0_14 IO_L13P_T2_MRCC_14 2 4
P24 U28 R765 FPGA_RESETn
FlashData[0] IO_L1P_T0_D00_MOSI_14 IO_L13N_T2_MRCC_14
R608 R25 T25 1 2 1 3
FlashData[1] IO_L1N_T0_D01_DIN_14 IO_L14P_T2_SRCC_14 PPS_OUT
R20 U25 1 C892
FlashData[2] IO_L2P_T0_D02_14 IO_L14N_T2_SRCC_14 SW3
R21 U29 RDWR_B
FlashData[3] IO_L2N_T0_D03_14 IO_L15P_T2_DQS_RDWR_B_14
2 FPGA_PUDC R23 U30
IO_L3P_T0_DQS_PUDC_B_14 IO_L15N_T2_DQS_DOUT_CSO_B_14 LED_GPS_LOCK 2
1 R24 V26 CSI_B
IO_L3N_T0_DQS_EMCCLK_14 IO_L16P_T2_CSI_B_14
R607 T20 V27
FlashData[4] IO_L4P_T0_D04_14 IO_L16N_T2_A15_D31_14 LED_LINK_STAT
T21 V29
FlashData[5] IO_L4N_T0_D05_14 IO_L17P_T2_A14_D30_14 LED_LINK_ACT
T22 V30
FlashData[6] IO_L5P_T0_D06_14 IO_L17N_T2_A13_D29_14 SFPP2_TxFault
T23 V25 1 R690 1 R689
2 FlashData[7] IO_L5N_T0_D07_14 IO_L18P_T2_A12_D28_14 SFPP2_TxDisable
U19 W26
CLK_CE IO_L6P_T0_FCS_B_14 IO_L18N_T2_A11_D27_14 SFPP2_SDA
U20 V19
FlashData[8] IO_L6N_T0_D08_VREF_14 IO_L19P_T3_A10_D26_14 SFPP2_SCL
P29 V20
FlashData[9] IO_L7P_T1_D09_14 IO_L19N_T3_A09_D25_VREF_14 SFPP2_ModAbs 2 2
R29 W23
FlashData[10] IO_L7N_T1_D10_14 IO_L20P_T3_A08_D24_14 SFPP2_RxLOS
P27 W24
FlashData[11] IO_L8P_T1_D11_14 IO_L20N_T3_A07_D23_14 SFPP2_RS0
P28 U22
FlashData[12] IO_L8N_T1_D12_14 IO_L21P_T3_DQS_14 SFPP2_RS1
R30 U23
FlashData[13] IO_L9P_T1_DQS_14 IO_L21N_T3_DQS_A06_D22_14 SFPP1_TxFault
T30 V21
FlashData[14] IO_L9N_T1_DQS_D13_14 IO_L22P_T3_A05_D21_14 SFPP1_TxDisable
P26 V22
FlashData[15] IO_L10P_T1_D14_14 IO_L22N_T3_A04_D20_14 SFPP1_SDA
J7 R766 R26
IO_L10N_T1_D15_14 IO_L23P_T3_A03_D19_14
U24
SFPP1_SCL
1 2 DEBUG_UART_TX 1 2 R28 V24
IO_L11P_T1_SRCC_14 IO_L23N_T3_A02_D18_14 SFPP1_ModAbs
3 4 DEBUG_UART_RX T28 W21
IO_L11N_T1_SRCC_14 IO_L24P_T3_A01_D17_14 SFPP1_RxLOS
5 6 DEBUG_UART_WAT T26 W22
IO_L12P_T1_MRCC_14 IO_L24N_T3_A00_D16_14 SFPP1_RS0
T27 W19
CLK_SYNC IO_L12N_T1_MRCC_14 IO_25_14 SFPP1_RS1
R767
1 2
R768
1 2

U23 U23
G8 C8
MGTREFCLK0P_117 MGTREFCLK0P_118
G7 C7
MGTREFCLK0N_117 MGTREFCLK0N_118
J8 E8
MGTREFCLK1P_117 MGTREFCLK1P_118
J7 E7
MGTREFCLK1N_117 MGTREFCLK1N_118

K2 H2 D2 B2
MGTXTXP0_117 MGTXTXP2_117 MGTXTXP0_118 MGTXTXP2_118
K1 H1 D1 B1
MGTXTXN0_117 MGTXTXN2_117 MGTXTXN0_118 MGTXTXN2_118
K6 G4 E4 B6
MGTXRXP0_117 MGTXRXP2_117 MGTXRXP0_118 MGTXRXP2_118
K5 G3 E3 B5
MGTXRXN0_117 MGTXRXN2_117 MGTXRXN0_118 MGTXRXN2_118

J4 F2 C4 A4
MGTXTXP1_117 MGTXTXP3_117 MGTXTXP1_118 MGTXTXP3_118
J3 F1 C3 A3
MGTXTXN1_117 MGTXTXN3_117 MGTXTXN1_118 MGTXTXN3_118
H6 F6 D6 A8
MGTXRXP1_117 MGTXRXP3_117 MGTXRXP1_118 MGTXRXP3_118
H5 F5 D5 A7
MGTXRXN1_117 MGTXRXN3_117 MGTXRXN1_118 MGTXRXN3_118
 VccMgt1v2

U23
2 R601 1 W7 H3
MGTAVTTRCAL_115 MGTAVTT_00
P3
MGTAVTT_01
M3 1 C728 1 C729 1 C749 1 C774 1 C690 1 C727
MGTAVTT_02
N5
W8 MGTAVTT_03
MGTRREF_115 J5
MGTAVTT_04 2 2 2 2 2 2
R5
VccMgt1v8 MGTAVTT_05
T3
MGTAVTT_06
T7 U5
1 C668 1 C694 1 C692 1 C667 MGTVCCAUX_00 MGTAVTT_07
V7 L5 1 C666 1 C750 1 C689 1 C688 1 C751 1 C752
MGTVCCAUX_01 MGTAVTT_08
W5
MGTAVTT_09
2 2 2 2 VccMgt1v0 K3
MGTAVTT_10 2 2 2 2 2 2
P7 B3
MGTAVCC_00 MGTAVTT_11
H7 C5
MGTAVCC_01 MGTAVTT_12
1 C731 1 C753 1 C734 1 C754 1 C755 1 C733 K7 D3
MGTAVCC_02 MGTAVTT_13
M7 E5
U23 MGTAVCC_03 MGTAVTT_14
D7 F3
V8 K4 2 2 2 2 2 2 MGTAVCC_04 MGTAVTT_15
GND_000 GND_087 F7 G5
Y7 AK7 MGTAVCC_05 MGTAVTT_16
GND_001 GND_088 B7 V3
K8 K9 MGTAVCC_06 MGTAVTT_17
GND_002 GND_089
T8 B11 1 C691 1 C730 1 C732 1 C775 1 C776 1 C693
GND_003 GND_090
P9 L14
GND_004 GND_091
M12 B21
GND_005 GND_092 2 2 2 2 2 2
A1 L24
GND_006 GND_093
N9 B4
GND_007 GND_094
A14 L9
GND_008 GND_095
R9 B8
GND_009 GND_096
A2 M14
GND_010 GND_097
U9 B9
GND_011 GND_098
A24 M18
GND_012 GND_099
W20 C1
GND_013 GND_100
A5 M4
GND_014 GND_101
J9 C18
GND_015 GND_102
A6 M9
GND_016 GND_103
L2 C2
GND_017 GND_104 1 C672 1 C671 1 C670 U23
A9 N11
GND_018 GND_105 W12 N18 1 C700 1 C696 1 C705 1 C708 1 C711
M21 C28 VCCAUX_IO_G0_0 VCCINT_00
GND_019 GND_106 V11 P11
AA1 N15 2 2 2 VCCAUX_IO_G0_1 VCCINT_01
GND_020 GND_107 W10 P17
N17 C6 VCCAUX_IO_G0_2 VCCINT_02 2 2 2 2 2
GND_021 GND_108 R10
AA14 N2 VCCINT_03
GND_022 GND_109 R12
P18 C9 VCCINT_04
GND_023 GND_110 R18
AA2 N6 VCCINT_05
GND_024 GND_111 T11
R17 D15 T13 VCCINT_06
GND_025 GND_112 VCCAUX_0 T17
AA24 P10 1 C706 1 C704 1 C676 1 C674 1 C675 V15 VCCINT_07
GND_026 GND_113 VCCAUX_1 U10 1 C698 1 C703 1 C699 1 C714 1 C716
T18 D25 P13 VCCINT_08
GND_027 GND_114 VCCAUX_2 U12
AA5 P16 W14 VCCINT_09
GND_028 GND_115 2 2 2 2 2 VCCAUX_3 U18
U17 D4 V13 VCCINT_10 2 2 2 2 2
GND_029 GND_116 VCCAUX_4 V17
AA6 P25 VCCINT_11
GND_030 GND_117 W18
V16 D8 VCCINT_12
GND_031 GND_118 M13
AA7 P8 VCCINT_13
GND_032 GND_119 M15 1 C63
W13 D9 VCCINT_14
GND_033 GND_120 M17
AB11 R1 VCCINT_15
GND_034 GND_121 U16 N10
Y17 E1 1 C713 1 C707 1 C702 1 C678 1 C697 1 C67 VCCBRAM_0 VCCINT_16 2
GND_035 GND_122 N16 N12
AB21 R13 VCCBRAM_1 VCCINT_17
GND_036 GND_123 W16 N14
J30 E12 VCCBRAM_2 VCCINT_18
GND_037 GND_124 2 2 2 2 2 2 R16 M11
AB3 R2 VCCBRAM_3 VCCINT_19
GND_038 GND_125
K27 E2
GND_039 GND_126
AB4 R6
GND_040 GND_127
L1 E22
GND_041 GND_128
AC18 T10
GND_042 GND_129
L6 E6 1 C715 1 C712 1 C679 1 C701 1 C695
GND_043 GND_130
AC28 T16
GND_044 GND_131
M16 E9
GND_045 GND_132 2 2 2 2 2
AC8 T19
GND_046 GND_133
M8 F19
GND_047 GND_134
AD15 T4
GND_048 GND_135
N13 F29
GND_049 GND_136
AD25 U1
GND_050 GND_137
N28 F4
GND_051 GND_138
AD5 U13
GND_052 GND_139
P12 F8
GND_053 GND_140
AE12 U2
GND_054 GND_141
P4 F9
GND_055 GND_142
AE2 U6
GND_056 GND_143
R11 G1
GND_057 GND_144
AE22 V10
GND_058 GND_145
R22 G16
GND_059 GND_146
AF19 V14
GND_060 GND_147
T12 G2
GND_061 GND_148
AF29 V18
GND_062 GND_149
T29 G26 1 R584 1
GND_063 GND_150 1 1
AF9 V4 U23
GND_064 GND_151 R583 R104 R613
U11 G6 T9
GND_065 GND_152 VCCO_0_0
AG16 V9 AB6
GND_066 GND_153 2 VCCO_0_1
U26 G9 2 2
GND_067 GND_154 2 C10 R15
AG26 W11 VCCBATT_0 VP_0
GND_068 GND_155 T14
V12 H13 VN_0
GND_069 GND_156
AG6 W15
GND_070 GND_157 B10 U15
V23 H23 aCp1_Clock CCLK_0 DXP_0
GND_071 GND_158 A10 U14
AH13 W2 aCp1_Init_n INIT_B_0 DXN_0
GND_072 GND_159 K10
W1 H4 aCp1_Prog_n PROGRAM_B_0
GND_073 GND_160 M10
AH23 W30 aCp1_Done DONE_0
GND_074 GND_161 L10
W17 H8 CFGBVS_0
GND_075 GND_162
AH3 W9 E10 1
GND_076 GND_163 TCK_0 FPGA_TCK 1 R67 1 R70
W6 H9 H10 R599
GND_077 GND_164 TDI_0 FPGA_TDI
AJ10 Y27 L508 G10
GND_078 GND_165 1 2 P15 TDO_0 FPGA_TDO
Y3 J1 VCCADC_0 F10
GND_079 GND_166 P14 TMS_0 FPGA_TMS
AJ20 Y4 1 C710 1 C709 GNDADC_0 2 2
GND_080 GND_167 2
Y9 J10 AB5
GND_081 GND_168 M0_0
AJ30 Y8 T15 AB2
GND_082 GND_169 2 2 VREFP_0 M1_0
J6 J2 R14 AB1
GND_083 GND_170 VREFN_0 M2_0
AK17 J20
GND_084 GND_171 1 1
K17 N1 1 R69
GND_085 GND_172 R68 R71
AK27
GND_086

2
2 2
 1 C89 1 C645 1 C685 1 C660 1 C683 1 C646 1 C659

2 2 2 2 2 2 2

U23
AJ25 AD30
VCCO_13_0 VCCO_13_3
AA29 AE27
VCCO_13_1 VCCO_13_4
AB26 AH28
VCCO_13_2 VCCO_13_5 R590
Y25 AG29 1 2
FrontPanelGpio[0] IO_0_13 IO_L13P_T2_MRCC_13
Y26 AH29
CLK_STAT0 IO_L1P_T0_13 IO_L13N_T2_MRCC_13
AA26 AE28
CLK_STAT1 IO_L1N_T0_13 IO_L14P_T2_SRCC_13
W27 AF28
CLK_HOLDOVER IO_L2P_T0_13 IO_L14N_T2_SRCC_13
W28 AK29
CLK_LOCK IO_L2N_T0_13 IO_L15P_T2_DQS_13
Y28 AK30
CLK_MOSI IO_L3P_T0_DQS_13 IO_L15N_T2_DQS_13
AA28 AE30
CLK_SCLK IO_L3N_T0_DQS_13 IO_L16P_T2_13 R592
W29 AF30
FPGA_ClockRefSelect0_Buf IO_L4P_T0_13 IO_L16N_T2_13 1 2
Y29 AJ28
FPGA_ClockRefSelect1_Buf IO_L4N_T0_13 IO_L17P_T2_13
AA27 AJ29
GPS_PPS_OUT IO_L5P_T0_13 IO_L17N_T2_13
AB28 AG30
GPS_LOCK_OK IO_L5N_T0_13 IO_L18P_T2_13
AA25 AH30
GPS_NMEA_TX IO_L6P_T0_13 IO_L18N_T2_13 PCIE_LINK_STATUS
AB25 AC26
GPS_SER_IN IO_L6N_T0_VREF_13 IO_L19P_T3_13 HOST_PRESENT
AC29 AD26
GPS_SER_OUT IO_L7P_T1_13 IO_L19N_T3_VREF_13 FrontPanelGpio[3]
AC30 AJ27
EXT_PPS_IN_buf IO_L7N_T1_13 IO_L20P_T3_13 FrontPanelGpio[4]
Y30 AK28
LED_TXRX1_TX IO_L8P_T1_13 IO_L20N_T3_13 FrontPanelGpio[5]
AA30 AG27
LED_TXRX1_RX IO_L8N_T1_13 IO_L21P_T3_DQS_13 FrontPanelGpio[6]
AD29 AG28
LED_RX1_RX IO_L9P_T1_DQS_13 IO_L21N_T3_DQS_13 FrontPanelGpio[7]
AE29 AH26
LED_TXRX2_TX IO_L9N_T1_DQS_13 IO_L22P_T3_13 FrontPanelGpio[8]
AB29 AH27
LED_TXRX2_RX IO_L10P_T1_13 IO_L22N_T3_13 FrontPanelGpio[9]
AB30 AF26
LED_RX2_RX IO_L10N_T1_13 IO_L23P_T3_13 FrontPanelGpio[10]
AD27 AF27
FrontPanelGpio[1] IO_L11P_T1_SRCC_13 IO_L23N_T3_13 FrontPanelGpio[11]
AD28 AJ26
FrontPanelGpio[2] IO_L11N_T1_SRCC_13 IO_L24P_T3_13 LED_REFLOCK
AB27 AK26
FPGA_125MHz_CLK IO_L12P_T1_MRCC_13 IO_L24N_T3_13 LED_PPS
AC27 AE26
IO_L12N_T1_MRCC_13 IO_25_13 LED_LINK1
LED_ACT1
LED_LINK2
LED_ACT2

2 2
R745 R747

1 1

2 2
R746 R748

1 1
 L549 LMK_VCC6
2 1
R770 C972
1 2 1 2 C971
1 2
1 C72 1 C73 1 C74 1 C75 1 C76
L540 L548 LMK_VCC8
1 2 VCC_LMK_PLL 2 1
2 2 2 2 2
C970
1 2

L15 VCC_LMK_CLK L542

1 2 2 1
C114
1 R769 1 2

U531
L543
2 1 LMK_VCC3 10
2 VCC1
C85 LMK_VCC2 17 5
VCC2 NC2
1 C71 1 2 18 7
VCC3 NC3
24 8
VCC4 NC4
L544 30 9
2 2 1 LMK_VCC10 VCC5 NC5
35
C113 VCC6
38
1 2 VCC7
41
VCC8
43
L545 VCC9
2 1 LMK_VCC11 47
VCC10
C96 52
VCC11
1 2 57
VCC12
64
VCC13
L546 LMK_VCC12
2 1 11
LDOBYP1
C94 12
LDOBYP2 R753
1 2 1 2
1 C932 1 C919
23
L547 GND
2 1 LMK_VCC13 65
2 2 PAD T14
C83 C941 C943 J26
1 2 1 2 6 1 1 2 1 2
OSCOUT_p
3
2
C942
1 2 4 3
OSCOUT_n

R726
1 2
CLK_STAT0
R722 R754
1 2 1 2
R725 U531 CLK_MOSI
1 2
CLK_STAT1 62 46
Stat_CLKIN0 DATA R90
63 45 1 2
R724 Stat_CLKIN1 SCLK CLK_SCLK
1 2 6 44
1 CLK_SYNC SYNC/Stat_CLKIN2 LE
R92 R755
L20 1 2 1 2
R723 27 CLK_CE
1 2 HOLDOVER
CLK_HOLDOVER 33
2 LD
R88 T15
1 2 C944 C946 J27
1 C109 1 C123 CLK_LOCK
1 2 6 1 1 2 1 2
CLKOUT11_p
3
2 2 2
4 C945
U25 1 2 4 3
C111 U531 CLKOUT11_n
Vdd R85
1 3 2 1 1 2 INT_120MHZ_AC_IN1_p 36 39
Volt Cntrl. Out OSCIN_p OSCOUT_p OSCOUT_p
INT_120MHZ_AC_IN1_n 37 40
GND 1 OSCIN_n OSCOUT_n OSCOUT_n

C97 C966 R756

2 R86 2 1 2
1 2 TPS104 1 28 1
10MEG_REF_p CLKIN0_p CLKOUT0_p FPGA_CLK_p
R596 TPS105 1 29 2
2 1 CLKIN0_n CLKOUT0_n FPGA_CLK_n
1
2
C967 25 4
FBCLK_p/Fin_p/CLKIN1_p CLKOUT1_p CPRI_CLK_CLEAN_p
1 2 26 3
10MEG_REF_n FBCLK_n/Fin_n/CLKIN1_n CLKOUT1_n CPRI_CLK_CLEAN_n

C968 31 13
CPRI_CLKOUT_p CLKIN2_p CLKOUT2_p DB0_RX_REFCLK_P
2 1 2 32 14
R719 CLKIN2_n CLKOUT2_n DB0_RX_REFCLK_N
2 1
R102 16
C969 CLKOUT3_p DB1_RX_REFCLK_P
1 2 34 15
CPRI_CLKOUT_n CPOUT1 CLKOUT3_n DB1_RX_REFCLK_N
1
R728 R727
VCXO_VTUNE 1 2 1 2 19
CLKOUT4_p DB1_TX_REFCLK_P
TPS106 1 42 20
CPOUT2 CLKOUT4_n DB1_TX_REFCLK_N
2 1 1 C128
R100
1

R101 22
CLKOUT5_p DB0_TX_REFCLK_P
21
2 R735 CLKOUT5_n DB0_TX_REFCLK_N
1 2
48
CLKOUT6_p DB0_DAC_REFCLK_P 1
2

49
1 C935 1 C934 1 C936 1 C138 CLKOUT6_n DB0_DAC_REFCLK_N
1 C938 1 C937 L550
51
CLKOUT7_p DB1_DAC_REFCLK_P
2 2 2 2 50
CLKOUT7_n DB1_DAC_REFCLK_N
2 2
2
53
CLKOUT8_p DB0_ADC_REFCLK_P
54
CLKOUT8_n DB0_ADC_REFCLK_N

1
3

2
56
CLKOUT9_p DB1_ADC_REFCLK_P

GND

VCC
55 1 1

RIN+
C124 C117
CLKOUT9_n DB1_ADC_REFCLK_N 2 REFCLK_OUT_p

58 R749

U530
CLKOUT10_p 2 2

TPS107
59
CLKOUT10_n

ROUT
TPS108

RIN-
61 1 REFCLK_OUT_n
CLKOUT11_p CLKOUT11_p
60
CLKOUT11_n CLKOUT11_n
J23

5
1
R734
1 2 REFCLK_OUT 1 2
3
4
5
 L555
2 1

1
C637
1 R586

2
2

J2 EXT_REF_IN C26 T7
2 1 1 2 6 1
3
3 1 R593
4 2
5
CR502
4 3
2 1 2

R585
U506

2 EXT_REF_IN_n 2 ~I~N~0 10
Q 10MEG_REF_p
11
3 VT0 Q~ 10MEG_REF_n
L17
EXT_REF_IN_p 1 VCC_10MEGMUX 2 1
4 IN0 VCC0
5
R763 32 IN1 VCC1
1 R759 1 2 8
1 2 VCC2
L14 VCC_10MEGMUX 31 VT1 17
VCC3 1 C93 1 C955 1 C956 1 C957 1 C958 1 C959 1 C960 1 C81
1 2 3 U17 20
C80 30 IN1~ VCC4
2 NC1 NC2 NC3 R65 24
9 5 10MHZ_OSC_OUT 1 2 2 1 INT_10MHZ_IN_SE 27 IN2 VCC5
VCC OUT 28 2 2 2 2 2 2 2 2
VCC6
1 C70 1 C64 8 4 26 VT2 29
EN GND VCC7
NC4 NC5 NC6 25 IN2~ 7
GND0
2 2 10 7 6 23 IN3 9
L554 R76 GPS_10Mhz GND1
2 1 1 2 1 12
22 VT3 GND2
3 13
GND3
1 C92 2 21 IN3~ 16
GND4
L541 R764 18
2 1 1 2 6 GND5
TCXO_ENA CR5 SEL0
2 19 33
1 SEL1 PAD

~Q~1
Q1
C961
14 15
2
R605
1 2
R56
1 2
10MEG_R_p FPGA_ClockRefSelect0_buf FPGA_ClockRefSelect0

R66 10MEG_R_n
2 1
R604
L553 R606 1 2
2 1 1 2 1 FPGA_ClockRefSelect1_Buf FPGA_ClockRefSelect1
3
1 C686 2

2
CR6

L552
2 1 SEL0_10MEG
FPGA_ClockRefSelect0
SEL1_10MEG
U6
J5 1 5
L551 R28 NC_WAT_P18 NC VCC
2 1 2 1 EXT_PPS_IN 1 2 2
FPGA_ClockRefSelect1 A 1 C878
3 3 4
1 R29 GND Y
4
1 R27
5 2

2
2
CR2 EXT_PPS_IN_buf
1 C54
1 6
I/O1 I/O2
R4 2 5
2 1 Vcc Gnd
GPS_SER_OUT 2 3 4
I/O3 I/O4

R512 R511 R7
2 1 2 1 2 1
GPS_10Mhz GPS_SER_IN

1
R500

2 4 1 C877

2 1 3
U4 2
1 15 SW1
GND1 SER_OUTPUT
2 14
R513 10MHz_OUT SER_INPUT
1 2 3 13
GPS_LOCK_OK LOCK_OK ENTER_ISP# R11
4 12 2 1
1PPS_OUTPUT NMEA_TXD GPS_NMEA_TX
5 11
1PPS_INPUT GND4
R514 6 10
2 1 GPS_5V 5V_OUTPUT ANT_INPUT
GPS_PPS_OUT 7 9
GND2 GND3
8 J1
3.3V_VDO_IN EXT_GPS_ANT_IN 1 2
3
1 C917
4
5
L503
2 1 GPS_5V 2 U519
VCC_GPSDO
CR507 5 1
1 VCC NC
PPS_OUT_BUF
J22 R713 2
1 R692 1 R691 1 R515 A PPS_OUT
1 C528 1 C527 1 C526 2 1 1 2 4 3
3 Y GND
3 R714
1 2
4
2 2 2 2
2 2 2 5
 L514 L34
2 1 2 1

1 C820 1 C195

1 C821 1 C822 2 1 C196 1 C201 2

1 R633 1 R635
1 R629 1 R631
2 2 2 2

2 2
2 1 R630 2 1 R632 1 R634 1 R636

J19

2 2 2 2 20
1 VeeTx_3
VeeTx_1 19
2 TxD- SFP1_TX_n
SFPP1_TxFault TxFault 18
3 TxD+ SFP1_TX_p
SFPP1_TxDisable TxDisable 17
4 VeeTx_2
SFPP1_SDA SDA 16
5 VccTx
SFPP1_SCL SCL 15
6 VccRx
SFPP1_ModAbs Present~ 14
7 VeeRx_4
SFPP1_RS0 RateSelect 13
8 RxD+ SFP1_RX_p
SFPP1_RxLOS LOS 12
9 RxD- SFP1_RX_n
SFPP1_RS1 VeeRx_1 11
10 VeeRx_3
VeeRx_2

DS7

R105
2 1 2 1 SH1
LED_LINK1
1 2
GND1 GND2
3 4
GND3 GND4
5 6
GND5 GND6
7 8
GND7 GND8
DS8 9 10
GND9 GND10
11 12
R111 GND11 GND12
2 1 2 1 13 14 L538 L539
LED_ACT1 GND13 GND14
15 16 2 1 2 1
GND15 GND16
17 18
GND17 GND18
19 20
GND19 GND20
21 22
GND21 GND22
23 24 1 C898 1 C896
GND23 GND24
25
GND25
DS20 1 C930 1 C897 2 1 C929 1 C895 2
1 R695 1 R697
1 R698 1 R699
R717
2 1 2 1
LED_LINK2 2 2 2 2

2 2
2 1 R693 2 1 R694 1 R696 1 R700

J21
DS19
2 2 2 2 20
R718 1 VeeTx_3
2 1 2 1 VeeTx_1 19
LED_ACT2 2 TxD- SFP2_TX_n
SFPP2_TxFault TxFault 18
3 TxD+ SFP2_TX_p
SFPP2_TxDisable TxDisable 17
4 VeeTx_2
SFPP2_SDA SDA 16
5 VccTx
SFPP2_SCL SCL 15
6 VccRx
SFPP2_ModAbs Present~ 14
7 VeeRx_4
SFPP2_RS0 RateSelect 13
8 RxD+ SFP2_RX_p
SFPP2_RxLOS LOS 12
9 RxD- SFP2_RX_n
SFPP2_RS1 VeeRx_1 11
10 VeeRx_3
VeeRx_2

1
R744
L509 C894
1 2 2 1
2
U509
C811 U521
2 1 6 1 L537
1 C810 4 6 1 2
1 C809 C893
VDD OE 2 1 5 OUT 2
5 2 VCC
3 OUT~ NC 1
CLK~ FSEL 2
C812 2 GND OE 1 C918
2 1 4 3 1 1 1 C931
R720 R721
CLK GND
2
2
2 2

C939 U23 U23

2 1
10G_CLK_AC_p R8 1G_CLK_AC_p L8
MGTREFCLK0P_115 MGTREFCLK0P_116
10G_CLK_AC_n R7 1G_CLK_AC_n L7
CPRI_CLK_CLEAN_p MGTREFCLK0N_115 MGTREFCLK0N_116
CPRI_CLK_CLEAN_n CPRI_CLK_AC_p U8 N8
C940 MGTREFCLK1P_115 MGTREFCLK1P_116
2 1 CPRI_CLK_AC_n U7 N7
MGTREFCLK1N_115 MGTREFCLK1N_116

Y2 U4 P2 M2
SFP1_TX_p MGTXTXP0_115 MGTXTXP2_115 SFP2_TX_p MGTXTXP0_116 MGTXTXP2_116
Y1 U3 P1 M1
SFP1_TX_n MGTXTXN0_115 MGTXTXN2_115 SFP2_TX_n MGTXTXN0_116 MGTXTXN2_116
AA4 W4 T6 P6
SFP1_RX_p MGTXRXP0_115 MGTXRXP2_115 SFP2_RX_p MGTXRXP0_116 MGTXRXP2_116
AA3 W3 T5 P5
SFP1_RX_n MGTXRXN0_115 MGTXRXN2_115 SFP2_RX_n MGTXRXN0_116 MGTXRXN2_116

V2 T2 N4 L4
MGTXTXP1_115 MGTXTXP3_115 MGTXTXP1_116 MGTXTXP3_116
V1 T1 N3 L3
MGTXTXN1_115 MGTXTXN3_115 MGTXTXN1_116 MGTXTXN3_116
Y6 V6 R4 M6
MGTXRXP1_115 MGTXRXP3_115 MGTXRXP1_116 MGTXRXP3_116
Y5 V5 R3 M5
MGTXRXN1_115 MGTXRXN3_115 MGTXRXN1_116 MGTXRXN3_116
 VGPIO_CLAMP

VGPIO_CLAMP
CR8
6 1 R74
FrontPanelGpio[1] FrontPanelGpio[8]
5 2 R97 L532
Vcc GND J24 2 1 1 2
4 3 L525 FrontPanelGpio[7]
FrontPanelGpio[7] FrontPanelGpio[0] 1 2 1 2
CR9 FrontPanelGpio[0] R73
R96 1 L533
2 1 1 2
L526 9 FrontPanelGpio[8]
1 2 CR7 1 2 1 2 2
VGPIO_CLAMP FrontPanelGpio[1] R72
6 1 10
3 FrontPanelGpio[3] FrontPanelGpio[10] R95 3 L534
1 C133 1 C126 5 2 2 1 1 2
Vcc GND L527 11 FrontPanelGpio[9]
4 3 1 2 1 2 4
FrontPanelGpio[9] FrontPanelGpio[2] FrontPanelGpio[2] R62
12
2 1 2 R94 5 L535
4 2 1 1 2
L528 13 FrontPanelGpio[10]
5 2 1 2 1 2 6
CR4 FrontPanelGpio[3] R61
Q7 Q7 14
2 6 1 R82 7 L536
3 6 4 FrontPanelGpio[6] FrontPanelGpio[5] 2 1 1 2
5 2 L529 15 FrontPanelGpio[11]
Vcc GND 1 2 1 2 8
1 4 3 FrontPanelGpio[4]
Q8 FrontPanelGpio[11] FrontPanelGpio[4]
R81
1 1 3
R106 L530 16 17
R98 1 2 1 2
FrontPanelGpio[5]
R80
2 2 L531
VGPIO_CLAMP 1 2 1 2
FrontPanelGpio[6]

1 C122 1 C106 1 C90

2 2 2

DS2
F501
R23 12V_IN 1 2
2 1 1 2
LED_TXRX1_TX

3 4
R12
1 2
LED_TXRX1_RX

1
DS3 1 R172

W2

W3
R39
A C 1 2
LED_RX1_RX

J20 2

2
DC1 DC2

5
1 2

6
3

5
4
SW2
3 4
J20
DC3 DC4
5
DS10 GND_1
6

K1
R137 GND_2
2 1 1 2 7
LED_TXRX2_TX GND_3
8
GND_4

1
9
3 4 GND_5
R125
1 2

1
1
LED_TXRX2_RX
CR503 Q12 CR10
DS11 A C 3 2 C A
A C R149
1 2
1

1
LED_RX2_RX
C228 1
W4

W5

1 2

1
1 R168
R167
2

Q13
DS5
2
R50 2 3 2
A C 1 2
LED_PPS
1
R664
1 2

1
DS4
R171
A C R49
1 2
LED_REFLOCK

C
CR11

DS6
R52 A
A C 2 1
LED_GPS_LOCK

DS21 R710
2 1
LED_LINK_ACT
2 1

2 R708 1
3 4
LED_LINK_STAT
 R173
1 2

L43 R170
1 2 1 2
1 C240 1 C235 2
1 C216 1 C217 1 C237 C219
L42
1 2
1 C218
2 2 1
2 2 2

2
Vcc3v8raw
1 C215 1 C236

L519
2 2 U515 1 2
4 13
PVIN_1 BOOT
5 L36
PVIN_2 L520
6 12 1 2 1 2
VIN PH_2
11
PH_1
R659 1 C858 1 C859 2 C860 1 C208 1 C205 2 C206
1 2 Vcc3v8_Enable 10
EN
14
PWRGD 7 ILTC2
1 VSENSE 1 1
2 2 2 2
9 2 1
R657 SS/TR
1 2
RT/CLK GND_1 1
Vcc3v8raw 8 3
COMP GND_2
1 15 C234
2 POWERPAD 1
C862 1 R656 R169
2
1 R166 1
2 2
2
R668
1 C861
2
2
2 1
1 C872
1
1 R658 R669
DS13 2

2
2
2

U27
L22
2 4 1 2
Vcc3v8raw IN OUT

1 C144 1 C135 1 C136 1 C137

1 R107 6 5 1 C134
GND2 SENSE

2 2 2 2
1 3 2
SHDN~ GND1
2

U28
L23
15 1 1 2
Vcc3v8raw IN1 OUT1
16 20
R688 IN2 OUT2
1 2 13 3 C139 2 C140 2 C951 1 C141 1 C142
1 C145 EN SENSE 2
12 14
0P1V NR
11 7
0P2V GND 2 2
2 10 1 1 1
0P4V
9 2 C948
0P8V NC1 2
8 17
1P6V NC2
6 18
3P2V NC3
5 19 1
6P4V1 NC4
4 21
6P4V2 THERM

U532
15 1
Vcc3v8raw IN1 OUT1 VCC_GPSDO
16 20
GPSDO_PWR_ENA IN2 OUT2
13 3 C947 2 C952 2 C953
1 C950 EN SENSE 2
12 14
0P1V NR
11 7
0P2V GND
2 10 1 1 1
2 R757 0P4V
9 2 C949
0P8V NC1 2
8 17
1P6V NC2
6 18
3P2V NC3
1 5 19 1
6P4V1 NC4
4 21
6P4V2 THERM
 CR500
C A

L500
1 2

2 C513 2 C518 2 C512 2 C508 2 C515 2 C514 2 C506 2 C505 2 C507

1
R528
1 1 1 1 1 1 1 1 1
R1 +12V_R_CORE
1 2
Q2 5
5 Q1 D1
D1
2 2
C510
POWER_GOOD_1V
4G
G 4 1

S1 S2 S3
S3 S2 S1
1 2 3
3 2 1
L8
L7 PSC1p0_VCC 1 2
1 2
BOOST2_CORE 1 C546 1 C545 1 C543 1 C534 1 C539 1 C544 1 C535 1 C542
5 3 C511 5
CR1 2
D D
Q3 Q4
2 2 2 2 2 2 2 2
G4 4G 2 C502
1 2 R505

S 1 2 S
2 C17
3 2 1 1 2 3 1
1
BOOST2_CORE 1
2 R6
2 C16 2 R5

1 1 C519 1 C532 1 C540 1 C541 1 C517 1 C533

1
1
NC367
2 2
2 R676 2 2 2 2 2 2
R9 2 R677 R10
11 18 12 19
U2
PGOOD
INVTVCC

VIN
EXTVCC

1 14 22 1
1
1 15 TG2 21 TG1
2 13 BOOST2 BOOST1 23
R2 2 17 SW2 SW1 20
C3 2
16 BG2 BG1 24 2
25 10 C4 R3
1 1 PGND MODE/PLLIN
8 FREQ/PPLFLTR ILIM 27
9 1
SENSE2+ SENSE1+ 26 1
7 RUN2 RUN1 28
4 SENSE2- SENSE1- 3
CORE_VFB
5 VFB2 VFB1 2
CORE_ITH
ITH2 ITH1
CORE_VFB
TK/SS2 SGND TK/SS1
CORE_ITH
6 29 1 2 R506

2 R504
2 C503 1
2 R509 2
1
1 C501

1 2 C500
1

1 1
R501
PSC1p0_VCC

2
2

R507

1
2

R510 2
R508

R502 1
1 2 1

2 3

U1
2 R503 4
C509
5
1 1
 1

IntVcc1v8
3 CR506
2 C882 2 C881 1 C885 1 C883

1 1 2 2 2

2 1 3
U517

INTVCC
PVIN_1
PVIN_2
1 R683 R682
10 1 2
RUN BOOST 20
R681
2 1 6 2 C879
RT SW_4 19
2 5 SW_3 18
PGOOD
SW_2 17 1 L522
11
C890 R679 TRACK/SS SW_1 16 1 2
1 2 1 2 7

SYNC/MODE
1 1 C886 1 C887 1 C884

THERMAL
ITH

PGND_4
PGND_1

PGND_2

PGND_3
2 C880

SGND
R678

VFB
2 2 2
1 C889 4 8 9 12 13 14 15 21
1 2
2

R684
ILTC503
1 2 1 2

1
IntVcc1v8
R685
C888
1 2
1 R716 2

2
PG_1.8_FPGA

DS16

U30 1 1 C168 1 C169

R121
6 13
Vcc3v8raw IN_1 OUT_1
7 14
IN_2 OUT_2 2 2
2

5 16
EN~ PG

1 C167 1 C166
15
FB/NC1 17
4 NC4
2 2 NC2 18
8 NC5
NC3

21 3
THERMAL GND
1 20
GND/HSINK1 GND/HSINK5
2 19
GND/HSINK2 GND/HSINK6
9 12
GND/HSINK3 GND/HSINK7
10 11
GND/HSINK4 GND/HSINK8

U33
L33
2 4 1 2
Vcc3v8raw IN OUT
1 R136 1 C181 1 C192 1 C180 1 C191
6 5 1 C182
GND2 SENSE

2 2 2 2
2 1 3 2
SHDN~ GND1
 L24
1 2

2 C148 2 C147

Q9 5
D1 1 1

1 1 C146
R117
1 2 4G
R615
2
1 C783
S1 S2 S3
1 2 3 2
2 C789
2 1

L25
1 2
R622
1 2
1 C781 1 C780 1 C787
1 C782 24 23 22 21 20 19

Q10 5

DRVL
VBST
VLDOIN

DRVH

LL
VTT
2 D1 2 2
2
R616
1 2 R118
1 2 4G

S1 S2 S3
1 18
VTTGND PGND 1 2 3
R620
2 17 1 2
VTTSNS CS_GND R116
1 2
3 16
GND U29 CS
4 15 5V_DDR_AUX U507
MODE V5IN
0V75_VTT_REF 5 1
5 14 C788
VTTREF V5FILT 1 OUT IN 3 2
R624
6 13 1 2 R623 4 2
1 C784 5V_DDR_AUX COMP PGOOD EN
ADJ GND 1
1 C159 2 C790
2 25
TPad 2 R621
VDDQSNS

VDDQSET

2 1 1 2
NC_1

NC_2
S3

S5

7 8 9 10 11 12
R112
1 2

1
R114 R115
2 1

2
R113
2 1
 1

3 CR501
2 C25 2 C24 1 C31 1 C516

1 1 1 2 2 2
R516
2 1 3
U500
2

INTVCC
PVIN_1
PVIN_2
10 R517
RUN BOOST 20 1 2
2 R523 1 6
RT SW_4 19 2 C504
5 SW_3 18
PGOOD
SW_2 17
1 L1
11
TRACK/SS SW_1 16 1 2
C529 R524
7

SYNC/MODE
1 2 1 2

THERMAL
ITH
1 C23 1 C22 1 C30

PGND_2

PGND_3

PGND_4
PGND_1
SGND
1

VFB
R31
2 2 2
C530 4 8 9 12 13 14 15 21
1 R22 1 2
2

ILTC500
2 1 R526 2 1 2
1 R518 1
1
R525
C531
1 2
DS1 2
2

2 1

R527
3
1
2
Q500

2
 L40
1 2

L41 R660
1 2 1 2
1 C238 1 C230 2
1 C232 1 C231 1 C213 C863
L39
1 2
1 C864
2 2 1
2 2 2

2
DB_6V
1 C229 1 C212

L518
2 2 U516 1 2
4 13
PVIN_1 BOOT
5 L35
PVIN_2 L517
6 12 1 2 1 2
VIN PH_2
11
PH_1
1 DB6V_EN 10 1 C848 1 C847 2 C835 1 C214 1 C233 2 C239
TPS101
EN
DB6VPG 14
PWRGD 7
VSENSE 1 1
ILTC1 2 2 2 2
9 2 1
SS/TR
1 2
RT/CLK GND_1 1
8 3
COMP GND_2
1 15 C873
POWERPAD 1
1 C865 R661 R670
2
1
2 2
2
R671
DB_6V
1 C867

2
2 1
1 R165 C866

1 R663 1 R662
2
2

2 2
1

DS12

1 2 1 2 1 2
DB_6V +6V_RX0 AVDD_RX0 DVDD_RX0
T1 T5 T3
1 C1 2 C2 2 C5 1 C18 1 C6
1 C34 C35 C38 1 C8 C7 C522
2 2 1 C39 1 C40 2 2 1 C523 1 C19
2 1 1 2 2

2 2
1 1 2 2 1 1 2 2
1 2
+6V_TX0
T2
1 C14 2 C15 2 C11 1 C12 1 C13 1 2 1 2
AVDD_TX0 DVDD_TX0
T6 T4

2 1 1 2 2
1 C36 C37 C548 1 C9 C10 C520
2 2 1 C547 1 C45 2 2 1 C521 1 C20

2 2
1 1 2 2 1 1 2 2
1 2
DB_6V +6V_RX1
T9
1 C151 2 C152 2 C160 1 C161 1 C153

1 2 1 2
2 1 1 2 2 AVDD_RX1 DVDD_RX1
T12 T10

1 2 2 C184 1 C197 1 C185 2 C815 1 C816 1 C162

+6V_TX1 1 C176 2 C177 1 C154 2 C155
T8
1 C150 2 C149 2 C164 1 C165 1 C158
1 2 2 1 2 2
2 1 2 1

2 1 1 2 2
1 2 1 2
AVDD_TX1 DVDD_TX1
T13 T11

2 C823 1 C824 1 C188 2 C813 1 C814 1 C163

1 C178 2 C179 1 C156 2 C157

1 2 2 1 2 2
2 1 2 1
 1

IntVccMgt1v0

C220 2 C221
3 CR505
2
1 R163 1 C857

1 1
2 2
2 1
2 1 3
R653 U514

INTVCC
PVIN_1
PVIN_2
10 R654
2 RUN BOOST 20 1 2
2 R649 1 VccMgt1v0
6
RT SW_4 19 2 C856
VccMgtPG 5 SW_3 18
1 PGOOD
SW_2 17
1 L44
11
C845 R648 TRACK/SS SW_1 16 1 2
1 2 1 2 7

SYNC/MODE
DS14

THERMAL
ITH

PGND_4
PGND_2

PGND_3
PGND_1
2 1 C222 1 C223 1 C209

SGND
R645 1

VFB
R147
2 C844 4 8 9 12 13 14 15 21 2 2 2
1 2
2
1

1 R646 2
ILTC502
1 2
IntVccMgt1v0
2 R647

C843
1 2
1

IntVccMgt1v2
3 CR504
1 2 C224 2 C225 1 C855
R164

VccMgt1v0
1 1 2 2
2
1
2 1 3
R651 U513
INTVCC
PVIN_1
PVIN_2

10 R652
VccMgtAuxPG 2 RUN BOOST 20 1 2
R644 VccMgt1v2
2 1 6
RT SW_4 19 2 C854
1
5 SW_3 18
PGOOD
SW_2 17
1 L45
11
DS15 C842 R643 TRACK/SS SW_1 16 1 2
1 2 1 2 7
SYNC/MODE

THERMAL

ITH
C226 1 C227 1 C210
PGND_4
PGND_1

PGND_2

PGND_3

1 1
SGND

2 R148
VFB

2 R640
C841 2 2
4 8 9 12 13 14 15 21 2
1 2
2

1 R641 2
ILTC501
1 2

1
IntVccMgt1v2
R642
C840
1 2
2

Vcc3v8raw

1 R140 1 C183
U510
1 5
2 IN OUT VccMgt1v8
3
2 EN
2 4 1 C193
VccMgtAuxPG GND NR
1 C194

2
2
 J12
14 13
NC_141 12 11
NC_140 10 9
FPGA_TDI
8 7
FPGA_TDO
6 5
FPGA_TCK 4 3
FPGA_TMS 2 1

VUSBCORE
1 R733

1 C922 1 C902 1 C903

NC7SZ126,SM,A0 1 R618 1 R617 1 R619
2
1
2 2 2 U529
50 16 USB_JTAG_TCK 2
VREGIN ADBUS0 2 2 2
17
ADBUS1
18 5 4
49 ADBUS2 VCC FPGA_TCK
VREGOUT 19 3
ADBUS3 1 C912 GND
21
ADBUS4 U524
22
1 ADBUS5
VBUS 23 2
2 USB_JTAG_DM 7 ADBUS6
D- DM 24 USB_JTAG_OE
3 USB_JTAG_DP 8 ADBUS7
D+ DP
4
GND 26
ACBUS0 NC7SZ126,SM,A0
R731 R732 27
5 1 2 1 2 ACBUS1 1
SHLD1 2 1 14 28
6 RESETn ACBUS2
SHLD2 D- D+ 29
ACBUS3 USB_JTAG_TDI 2
6 30
J25 REF ACBUS4
R730 32
C993 1 2 ACBUS5 5 4
1 2 3 33 VCC FPGA_TDI
ACBUS6 3
GND 34 1 C913 GND
ACBUS7
U525
U528 38
8 1 USB_JTAG_EECS 63 BDBUS0 2 1 C914
EECS 39
7 VCC 3 USB_JTAG_EECLK 62 BDBUS1
CS EECLK 40
4 TEST DI 6 USB_JTAG_EEDATA 61 BDBUS2
EEDATA 41 U522 2
5 DO ORG 2 BDBUS3
43 USB_JTAG_TDO 6 5
GND CLOCK BDBUS4
44 4 Y1 VCC 1
U527 BDBUS5 FPGA_TDO
45 2 3
2 R729 1 BDBUS6 Y2 A1
46 GND A2
BDBUS7

48
2 BCBUS0
R686 OSCI 52 NC7SZ126,SM,A0
2 1 3 BCBUS1
OSCO 53 1
BCBUS2
54
R706 BCBUS3
1 2 60 55 USB_JTAG_TMS 2
PWRENn BCBUS4
36 57
SUSPENDn BCBUS5
58 5 4
BCBUS6 1 VCC FPGA_TMS
1 C924 1 C915 U523 13 59 1 1 1 3
R707 TEST BCBUS7 R702 R703 R704 1 C911 GND
1 2 R687
1 4 U526
E/D VCC
2 2
2 3 2
GND OUT 2 2 2
2

1 1
L523 L524

2 2

1 C920 1 C925 1 C900 1 C921 1 C926 1 C901

2 2 2 2 2 2

U529
4 10
VPHY AGND
9 1
VPLL GND1
5
GND2
12 11
VCORE1 GND3
37 15
VCORE2 GND4
64 25
VCORE3 GND5
VUSBCORE 35
GND6
20 47
VCCIO1 GND7
31 51
VCCIO2 GND8
42 65
VCCIO3 PAD
1 C923 1 C927 1 C904 1 C905 1 C906 1 C907 1 C928 1 C908 1 C909 1 C910 56
VCCIO4

2 2 2 2 2 2 2 2 2 2