PES INSTITUTE OF TECHNOLOGY AND MANAGEMENT, SHIVAMOGGA

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

INTERNAL ASSESSMENT TEST I
Subject & Code: Digital Electronics( 15EC33 ) Max. Marks: 20
Semester : III Semester (A and B Sections) Date: 15 /09/2016
Course Instructors : Mr. Praveen Shirur and Mr. Shashank S Bhagwat Timings: 11:00 am to 12 pm

Note: Answer 1 full question from each part

Part A
1. a) Define Minterm and Maxterm . Simplify the following functions using K-map.
(i) f(a,b,c,d) = (0,1,2,5,6,7,8,9,10,13,14,15)
(ii) f(A,B,C,D) = (0,3,4,7,8,10,12,14) + D(2,6) 5 Marks
b) Design a logic circuit that has 4 inputs, the output will be only high, when the majority of the inputs are
high, use K-map to simplify. 5 Marks
OR
2. a) Minimize the expression:
Y=B + BD + AB + ABD +ACD + C 4 Marks
b) Simplify using the Quine McCluskey minimization technique. Implement the simplified expression using basic gates
V = f(A,B,C,D) = (2,3,4,5,13,15) + D(8,9,10,11) 6 Marks
Part B
3. a) Define 3:8 decoder and Implement a full subtractor using a suitable decoder. 5 Marks
b) Design a 2-bit magnitude comparator. 5 Marks
OR
4. a) Draw the pin diagram for IC74138 decoder. Implement the following function pairs using IC74138 decoder.
F1(a,b,c) = (0,2,4) ; F2 (a,b,c) = (1,2,4,5) 5 Marks
b) Design a combinational circuit to find the 9s compliment of a single digit BCD number. Realize the circuit
using logic gates. 5 Marks

PES INSTITUTE OF TECHNOLOGY AND MANAGEMENT, SHIVAMOGGA

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
INTERNAL ASSESSMENT TEST I
Subject & Code: Digital Electronics( 15EC33 ) Max. Marks: 20
Semester : III Semester (A and B Sections) Date: 15 /09/2016
Course Instructors : Mr. Praveen Shirur and Mr. Shashank S Bhagwat Timings: 11:00 am to 12 pm

Note: Answer 1 full question from each part

Part A
1. a) Define Minterm and Maxterm . Simplify the following functions using K-map.
(i) f(a,b,c,d) = (0,1,2,5,6,7,8,9,10,13,14,15)
(ii) f(A,B,C,D) = (0,3,4,7,8,10,12,14) + D(2,6) 5 Marks
b) Design a logic circuit that has 4 inputs, the output will be only high, when the majority of the inputs are
high, use K-map to simplify. 5 Marks
OR
2. a) Minimize the expression:
Y=B + BD + AB + ABD +ACD + C 4 Marks
b) Simplify using the Quine McCluskey minimization technique. Implement the simplified expression using basic gates
V = f(A,B,C,D) = (2,3,4,5,13,15) + D(8,9,10,11) 6 Marks
Part B
3. a) Define 3:8 decoder and Implement a full subtractor using a suitable decoder. 5 Marks
b) Design a 2-bit magnitude comparator. 5 Marks
OR
4. a) Draw the pin diagram for IC74138 decoder. Implement the following function pairs using IC74138 decoder.
F1(a,b,c) = (0,2,4) ; F2 (a,b,c) = (1,2,4,5) 5 Marks
b) Design a combinational circuit to find the 9s compliment of a single digit BCD number. Realize the circuit
using logic gates. 5 Marks