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Dept of EEE VFSTR University

UNIT- 3
TRANSISTORS
BJT: Formation of PNP and NPN transistors, transistor current components,
transistor as an amplifier, CB, CE and CC configurations with their parameters,
comparison;
FET: working principles and characteristics of JFET, MOSFET; Characteristics
and applications of UJT and SCR.
OBJECTIVES
To familiarize the students about the different types of transistors.
To familiarize the students about the working of transistor as amplifier.
OUTCOMES
After the completion of the unit the students will be able to
Identify different types of transistors depending on the characteristics.
Design an amplifier using transistor.
TEXTBOOKS
1. J.Millman and CC Halkias, Electronic Devices and Circuits, 2nd ed.,
Tata McGraw-Hill, , 2007.
2. S.Salivahanan, Electronic Devices and Circuits , 5th ed.,Tata McGraw-
Hill, 2010.
REFERENCES
1. R.L.Boylestad and Lovis Nashelsky, Electronic Devices and Circuits
Theory, 10th ed., Pearson Education, 2010.
2. N.N.Bhargava, Basic Electronics and Linear Circuits, 1st ed.,Tata
McGraw-Hill, 2009.

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Transistor means transfer resistor. (It transfer the current from low resistance to
high resistance).

The classification of transistors:

BJTs: - Here currents are due to both polarity at change carriers i.e. electrons and
holes. Thats why it is called Bipolar Junction Transistor.

There are 2 types of BJTs.

1. npn transistor
2. pnp transistor

If P-type material is sandwiched between two n-type materials, then npn


transistor will be formed. Similarly we can get pnp transistor by sandwiching n-
type material between two p-type materials.

In any type of transistors, we observe two PN junctions.

Structure:
n P n P n P

Symbol:

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It has 3 terminals E, B & C and 2 junctions.

E----> Emitter JE ----> E-B junction

B----> Base JC ----> C-B junction

C----> Collector

Transistor Biasing:-

For a PN junction diode, there are 2 possibilities of biasing i.e. forward bias to
reverse bias. In transistor, we have two junctions, so there will be 4 probabilities of
biasing.

1) Both E-B & C-B junctions are forward biased:-


This type of biasing is called Saturation. Here both junctions conduct more
current and acts like ON switch. Application: ON switch.
2) Both E-B & C-B junctions are reverse biased:-
If we operate the transistor in this biasing condition then it is said to be under cut-
off region, since both diodes wont conduct. Application: OFF switch.
3) E-B junction is forward biased & C-B junction is reverse biased: - If we
operate the transistor in this biasing condition, then it is solid to be under active
region. It has so many applications. Applications Amplifiers, oscillators, Aircrafts.
4) E-B junction is reverse biased & C-B junction is forward biased: - If we
operate the transistor in this biasing condition, then it is said to be under
REVERSE ACTIVE region. It doesnt find any applications.

Operation of PNP Transistor:-

. . .
. . .
. .

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As Emitter-Base junction is forward biased, majority carriers from E to B & B to E


will be diffused. The resulting current consists of holes travelling from E to B i.e.
IPE and electrons from B to E i.e. InE .

[IPE = Emitter current due to holes &

InE =Emitter current due to electrons.]

The holes which are crossing from emitter to base participate in few
recombinations with electrons in the base and the remaining holes reach collector
due to attraction of VCC and result in IPE , collector current due to holes.

As collector-Base junction is reverse biased the minority carriers in base and


collector diffuse and reach collector and base respectively. i.e. holes from collector
to base and constitutes reverse current IC 0 .

Now from figure, IC = IC 0 + IPC is the output current and most of IC is due to IPC ,
since IC 0 is due to minority carriers.

IPC is more of IPE is more and IPE IPC is less (i.e. recombinations in base) and
IPE is more if emitter is heavily doped. Recombinations in base can be reduced by
taking lightly doped and small size base. So to get more output current emitter
should be heavily doped and base should be lightly doped and by maintaining
small size for base.

In collector the majority carriers are holes. In addition to these holes it has to
accommodate holes coming from emitter. So collector should be large in size,
otherwise more heat will be dispatched from the collector.

Therefore, the doping order is

E > C >B and Size order is C > E > B

From figure.

IE = IPE + InE

IE = IB + IC

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=> If emitter is open then IPC =0 and IC = IC 0 , called reverse saturation current.

For every recombination in the base VEE supplies an electron to the base and results
n base current IB .

Operation of NPN transistor:-

o o

The operation npn is similar to pnp except for charge carriers (electrons and holes),
directions and battery polarities.

Here IE = IB + IC , IC = In C + IC 0 and IE = IPE + InE

Current Parameters:-

(1.) Emitter efficiency ():- It is the ratio of current of injected carriers at


emitter-base junction to total emitter current.
Current of injected carriers at J E
=
Total emitter current
I PE I PE
For pnp transistor, = =
I PE +I nE IE
(2.) Transistor Factor ():- It is the ratio of injected carrier current reaching at
collector-base junction JC to injected carrier current emitter-base junction JE .
I PC
For pnp transistor =
I PE
(3.) Large signal current gain ( ):- It is the ratio of current due to injected
carriers IPC to the total emitter current IE .
I PC I
For pnp transistor, dc = = PC
I PE +I nE IE

=> The relation among , and is =


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Transistor as an amplifier:-

Let us consider common base configuration using npn transistor. The transistor
acts as amplifier in active region so it should be operated in active region. i.e. E-B
junction is forward biased by VEE and C-B junction is reverse biased by VCC . A
signal source VS is connected in the input circuit. An output voltage V0 is
developed across this resistor (R L ).

When the signal VS is superimposed on the d.c voltage VEE , the E-B voltage VEB
varies with time. As a result IE also varies with time. As IC IE , IC also changes
with time.
V0 = IC R L , so V0 changes with time.
The output signal V0 is many times greater than input signal VS . To understand how
the signal voltage is amplified, let us consider how the transistor responds to a.c
signal. Since the E-B junction is forward biased, it offers very low impedance to
VS ;of the order of 20 to 100.

The output junctions being reverse biased offers high resistance in the order of
100K to 1M. Assume VS =20mv. Using an average value of 40 for the input
resistance, we get an effective emitter current variation as
2010 3
Ie = =0.5mA, Since IC IE , IC 0.5mA
40

As output resistance is very high (say 500K) and load resistance is low (5K),
almost all collector current IC passes through R L .

V0 = IC R L = 0.5 103 5 103 = 2.5V

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The ratio of output voltage (V0 ) to input voltage (VS ) is known as voltage gain or
voltage amplification AV .
V0 2.5
Here AV = = =125
VS 2010 3

The transistors amplifying action is basically due to capability of transferring its


signal current from low resistance to high resistance.

Transistor Configuration: - Transistor has 3 terminals so it can be configured in


3 ways.

Common Base Configuration: - The circuit diagram for finding static


characteristics of transistor in common base configuration is shown below.

In any configuration of transistor input current and output voltage are independent
parameters. So while doing input characteristics output voltage should be kept
constant and for output characteristics input current should be kept constant.

Input Characteristics: - First kept VCB at 0 V with the help of R 2 (Potentiometer)


in VCC . Now vary IE with the help of R1 in VEE and note down corresponding VEB .
As Emitter-Base junction is forward biased, we get the IE versus VEB characteristics
similar to diode characteristics under forward bias.

S.No Configuration Input Common Output


1. Common base Emitter Base Collector
2. Common emitter Base Emitter Collector
3. Common collector Base Collector Emitter

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Next Kept VCB at some other constant say 2V. Again repeat the same procedure
i.e. note down VEB for various values of IE .

The characteristics curves will be as shown below.


VEB
Ri = |
IE V CB constant
V EB 1
=
I E 1

V CB
AV = | IE Constant
V EB

V CB 2 V CB 1
=
V EB 2

vEB (v)
IE constant

vCB 1 = 0v

vCB 2 = 2v
0.6
0.5 IE (mA)
0

To understand the change in input characteristics for change in VCB , we have to


learn base width modulation.

Base Width Modulation:-


E B C

n p n

JE JC

vEE vCC

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If we increase VCC then depletion width of Collector-Base junction (JC ) increases.


As base is lightly doped compared to collector, the depletion layer penetrates more
into base which results in reduction of effective base width. Depletion layer is
electrically neutral i.e. it contains equal number of positive and negative immobile
ions. As base is lightly doped, the separation between immobile ions is more and
for depletion layer to cover equal number of immobile ions on both sides it should
move more towards base. This is called Base Width Modulation or Early
Effect.
B(p) C(n)

Consequences: -

(1) Reduces the chance of recombination in the base, which results in reduction of
base current.

(2) Concentration of charge is increased in base, due to reduction of its width in


more emitter current. (As high concentration charge of B attracts more electrons
from emitter).

(3) For extremely large values of VCC , the effective base width may be reduced to
zero. This phenomenon is called Punch Through.

(4) value increases ( IB decreases and IE increases, we have IE = IB + IC i.e.


output current IC increases and large signal current gain increases)

For example, changes from 0.98 to 0.985, there is a very small positive slope in
the CB output characteristics and hence output admittance is not zero.

Output Characteristics: - To find the output characteristics the emitter current IE


should be kept constant with the help of VEE and R1 and note down the values of
IC for various values of VCB . With the help of VCC and R 2 . To understand the role of

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IE in output characteristics, repeat the experiment for at least 2 different values


of IE .
VCB
R0 = |
IC IE Constant
V CB 1
= (from figure)
I C 1

IC
AI = |
IE V CB constant
I C 2
= 1
I E 2 I E 1

IC (mA)
Active region
Saturation
Region

IE 2 = 2mA
I
C1 IE 1 = 1mA
IC 0 IC 0
0 Cut off region vCB (v)
CB 1
Av

Cut Off region: - If input current IE 0 then it is said to be under cut off region.
Because it happens only when E-B junctions is reverse biased (already we apply
reverse bias to C-B junction).

Active Region: - If E-B junction is forward biased and C-B junction is reverse
biased then it is said to be under active region. IE is above 0mA means E-B is
forward biased. In this region IC is approximately equal toIE . And transistor works
as an amplifier.

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Saturation Region: - If both junctions are forward biased it is said to be under


saturation region. Actually we apply reverse bias to C-B junction. But negative of
reverse bias is nothing but forward bias. Here IC does not much depend upon IE .
In the above output characteristics, the left of VCB =0V region is saturation region.
In this region IC increases exponentially as VCB increases to zero.

How IC flows when VCC is forward biased?

The electrons of emitter cross JE and they become minority carriers of base. The
potential barrier of C-B junction helps the electrons in base to cross the C-B
junction and results in IC .
IC
Current gain= AIb =dc or =
I E

For a.c signals, we are interested to take small changes in the voltages and currents
rather than their absolute (d.c) values. i.e.
i c
or hfb = |
i E V CB =constant

Common Emitter Configuration: -

Input Characteristics: - To find the input characteristics output voltage VCE


should be kept constant with the help of VCC and R1 note down the
corresponding VBE . This should be repeated at least once for another constant of
VCE . when VCE = 0 characteristics are similar to PN diode forward bias
characteristics.

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V BE
Ri = |V CE =cons tant
I B

V BE 1
=
I B 1

V CE
AV = |IB Constant
V BE

V CE 2 NV CE 1
=
V BE 2

When VCE is increased IB is decreased according to base width modulation. To get


same value of IB for increased VCE , VBE should be increased. So the chars move
upwards slightly since IB is in A.

Output Characteristics: - To determine the output characteristics, input current IB


should be kept at some constant with the help of VEE and R1 and by varying VCC
and with the help of VCC and R 2 . Curves of IC versus VCE are plotted for different
constant values of IB .
I C I C 1
AIE = |V CE =constant =
I B I B 2 IB 1

VCE
R0 = |
IC IB Constant
V CE 1
=
I C 2

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Saturation Region: - The region to the left of OA is called saturation region. In


this region both junctions are forward biased and an increase in base current does
not cause a corresponding large change in IC .

( In this region VCC VBB is negative.)

Cut-Off region: - The region below IB = 0A is called cut-off region; since


IB < 0 foe input junction under reverse bias. IC 0 and is ICEO i.e. reverse
leakage current of CE.

Active Region: - Here IC increases slowly as VCE increases. The slope of these
curves is somewhat greater than CB output characteristics. Here small IB produces
large IC . Here IB > 0 means E-B junction is forward biased and VCC VEE is the
amount of reverse bias applied to C-B junction.

Current relations in CE configuration: -

IC =IE + ICBO

= (IB + IC )+ ICBO
1
IC 1 = IB + ICBO , IC = IB + I
1 1 CBO


Let = => Current gains of transistor in CE configuration.
1

IC =IB + (1 + ) ICBO

IC =IB +ICEO

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Where ICEO = (1+ ) ICBO => reverse saturation or leakage current of collector in
CE configuration.

The current gain of CE configuration () is very high compared to that of CB


configuration ().

Common Collector Configuration: -

Input Characteristics: - To determine the input characteristics, VEC is kept at a


suitable fixed value. By changing VBB to get fixed increments of IB and note down
the corresponding values of VBC . This process is repeated for different values of
VEC .

Output Characteristics: - IE and IC are nearby same. Output characteristics are


drawn for VEC versus IE which is same as VCE versus IC at constant IB .

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Current Relation: - IE = IC + IB

=IE +ICBO +IB

IE 1 = ICBO + IB
1 1
IE = . IB + . ICBO
1 1

Let =Current gain of CC configuration


1
=
1

IE = IB + ICBO .


(CB current gain) (CE current gain) (CC current gain)
1+ 1
(or) (or) 1 (or) 1+
1+ 1 1

Comparison: -

Property CB CE CC
Input Resistance Low(about 100) Moderate(about High(about
750) 750K)
Output Resistance High(about 450K Moderate(about Low(about
) 45K ) 25 )
Current gain 1 High High
Voltage gain About 150 About 500 <1
Phase shift 0 or 360 180 0 or 360
between input and
output
Input Current IE IB IB
Output Current IC IC IE
Input Voltage VEB VBE VBC
Output voltage VCB VCE VEC
Current IC IC IE
dc = dc = dc =
Amplification IE IB IB
Factor

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Why CE configuration is preferred over CB and CC: -

(1.) In CE only we observe both voltage gain and current gain are high.
Power gain is the product of voltage gain and current gain. As CE offers
more power gain it is preferred.
(2.) As the ratio of R 0 to R i is ranging from 10 to 100. This makes this
configuration an ideal for coupling between various stages.

Breakdowns in Transistor: -

There is a possibility of voltage breakdown in the transistor at high voltages even


though the rated dissipation of the transistor is not exceeded. Therefore, there is an
upper limit to the maximum allowable collector junction voltage. There are 2 types
of breakdown.

1. Avalanche multiplication or Avalanche breakdown.


2. Reach through or Punch through

Avalanche Breakdown: - For a diode there is a limit on voltage that can be


applied in reverse bias i.e. below PIV rating of the diode. Similarly for a transistor,
there is a limit on reverse voltage applied to collector-Base junction i.e. BVCBO
where BVCBO is the maximum reverse bias voltage that can be applied to collector-
Base junction when emitter is open.

Under Avalanche breakdown the minority carriers crossing the C-B junction gets
multiplied and IC 0 becomes MIC 0 . This multiplication arises due to bombardment
of the carriers with immobile ions and generates few more carriers and this process
repeats under heavy fields of the order of 106 V/m.
1
M= V CB
n
1
B V CBO

N is material constant and n=4 for n-type silicon

=2 for p-type silicon

IC becomes IE . M and AIB increases beyond unity and emitter circuit display
negative resistance, which can lead to undesirable instabilities.

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For CE configuration,

n 1
BVCEO = BVCBO .
h FE

BVCEO is 40 to 50% of BVCBO . This is the upper limit of VCE that can be placed
across the transistor without damaging it.

Reach through or Punch through: -According to early effect, when VCB is


increased then depletion region of C-B junction increases and hence base width
decreases. At certain VCB , base width becomes zero. This is called reach through or
punch through. After this, the output characteristics no longer be horizontal but
take on a positive slope indicating that the device has a finite output impedance.

It is possible to raise the punch through voltage by increasing the doping


concentration in the base, but this automatically reduces the emitter efficiency.

Punch through takes place at a fixed voltage between collector and base and is not
depend on circuit configuration. Therefore, the voltage limit of a particular
transistor is determined by either of the two types of breakdown, whichever occurs
at lower voltage.

Important Formulae: -

1. IE = IB + IC (For all configurations and for both types of transistors)


2. IC =IE + ICBO ; ICO = ICBO
=>

3. = Current gain of CB configuration =1

4. = 1+
5. IC = IE + IC O (CB configuartion)
6. IC = IB +(1 + )IC O (CE Configuration)
7. hFE = & hFB =

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Sample Problems: -
1. In a CB configuration, IE=10mA, IC=9.8mA. Find IB
IB= IE - IC=10mA-9.8mA=0.2mA

2. In CB configuration, IE=6.28mA, IC=6.2mA. Find CB current gain.


I 6.2mA
= C= = 0.987
I E 6.28mA
3. In CB, = 0.967, IE=10mA. IB=?
IC
= => 0.967 10 = 9.67
IE
IB= IE - IC =0.33mA
4. The transistor has IE=10mA & = 0.98.Find IC and IB
IC= IE =0.98*10mA=9.8mA
IB= IE - IC=0.2mA
5. If a transistor has = 0.97, Find . If = 200, find
0.97
= = = 32.33
1 0.03
200
= = = 0.995
1+ 201
6. A transistor has = 100. If IC=40mA find IE
100
= = = 0.99
1+ 101
IC IC 40mA
= => IE = = = 40.4mA
IE 0.99
7. A transistor has = 150. Find the collector and base currents if IE=10mA.
IC= IE = IB
150
= = = 0.9933
1+ 1+150
IC= IE =9.933mA
IB= IE - IC=0.067mA

8. Find the values of IB and IE for the transistor circuit if IC=80mA and = 170.
IC I 80mA
= => IB = C = = 0.47mA
IB 170
IE=IC + IB =80.47mA.
9. Determine the values of IC and IE if = 200 and IB = 0.125mA

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IC
= => IC = IB = 25mA
IB

IE = IB + IC =25.125mA

10. Determine the values of IC and IB for the transistor circuit if

IE=12mA and = 100.


100
= = = 0.99
1+ 101
IC= IE = 11.88mA

IB = IE IC = 0.12mA

11 . A transistor has IB = 100A and IC=2mA. Find (a) (b) (c) IE (d) If IB
changes by +25 A and IC changes by +0.6mA find new values of .
I
(a.) = C =20
IB
(b.) IE = IB + IE =2.1mA
(c.) IE=2.1mA
(d.) IB new = 100A + 25A = 125A
IC new = 2mA + 0.6mA = 2.6mA
I C new
new = = 20.8
I B new

12. For a transistor circuit having = 0.98, ICBO = 5A and IB = 100A.


Find IC and IE .

IC= IB + (1 + )ICBO = = 49
1

IC
=49*100 A+50*5 A =
IB

=5.15mA

IE= IB + IC =5.25mA

13. Calculate the values of IC and IE for a transistor with dc = 0.99 and
ICBO = 5A. IB is measured as 20 A.

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= = 99; IC= IB + 1 + ICBO = 2.48mA
1

IE= IB + IC = 2.5mA

14. If dc = 0.99 and ICBO = 50A find IE. Assume IB = 1mA.


dc
dc = = 99
1 dc

IC= IB + (1 + )ICBO =104mA

IE= IB + IC =105mA

15. A Germanium transistor used in complementary symmetry amplifier


has ICBO = 10A at 27 and hFE = 50.

(a.) Find IC when IB =0.25mA and (b.) Assuming hFE does not increase with
temperature, find the value of new collector current, if the transistors temperature
raises to 50.

hFE =

(a.) IC= IB + (1 + )ICBO

=50*025mA+51*10 A=13.01mA
T 2 T 1
(b.) IC= IB + 1 + . 2 10 . 10A
5027
=50*0.25mA+51. 2 10 . 10A

=15.01mA

16. When the emitter current of a transistor is changed by 1mA, there is change in
current by 0.99mA. Find the current gain of the transistor.
I C 0.99
= = =0.99
I E 1

17. The d.c current gain of transistor in CE mode is 100. Determine its d.c current
gain in CB mode.

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100
= 100, = = = 0.99
1+ 101

18. When IE of a transistor is changed by 1mA, its IC changes by 0.995mA. Find its
common base current gain , and common emitter gain .
IC 0.995
= = = 0.995
IE 1

IE= IB + IC => IB = 0.005mA


IC 0.995
= = = 199
IB 0.005

19. The current gain of a transistor in CE mode is 49. Calculate its common base
current gain. Find the base current when the emitter current is 3mA.

= 49 =? IB =? If IE=3mA
49
= = =0.98
1+ 50

IC= IE =2.94mA

IB = IE IC =0.06mA

20. Determine IC, IE and for a transistor circuit having IB = 15A and = 150.
150
= = =0.993
1+ 151

IC= IB =2.25mA

IE= IB + IC =2.265mA

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21. Find IB , IC, IE and VCE for circuit shown.

Given = 200, VBE (ON ) = 0.7V

vcc = 10v

IC R C = 2K

R B = 200K
vBB = 4v
IB

Applying KVL to input loop,

VBB = IB R B + VBE (ON ) (VBB =4V so VBE is ON)


40.7
IB = =16.5A
20010 3

IC= IB =3.3mA

IE= IB + IC =3.3165mA

VCE = VCC IC R C =10-3.3*10-3*2*103

=3.4V

22. The reverse leakage current of the transistor when connected in CB


configuration is 0.2 A and it is 18 A when the same BJT is connected in CE
configuration. Calculate dc and dc of BJT.

ICBO =0.2 A, ICEO = 18A= (1+)ICBO


18A
=>1+= =90=> = 89
0.2A
89
= = = 0.98
1+ 90

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Field effect Transistors: - (FETs)

In this device current flow is controlled by the electric field set up in the device by
an externally applied voltage between gate and source terminals. Hence it is
named as FET.

N-channel JFET: -

Construction: - Take an N-type silicon bar diffuse heavily doped p-regions on


both sides of the N-type silicon bar by which PN junctions are formed. These
layers are joined together and called as Gate (G). Ohmic contacts are made at
other two sides of the base called source (s) and Drain (D). So like BJT, FET also
has 3 terminals.

Gate: - Controlling terminal

Source: - The terminal from which majority carriers enter bar.

Drain: - The terminal from which majority carriers leave bar.

The N-type region between drain and source is called channel. Majority carriers of
the bar move from source to drain when VDS is applied between source and drain.
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Operation of N-channel JFET: -

1. When = and = : - No current flows in the channel and depletion


regions of PN junctions will be uniform as shown below.

2. When = and decreases from zero: - In this case the PN junctions


are reverse biased and hence the thickness of depletion region increases. If we go
on decreasing VGS , at certain point both PN junctions depletion regions make
contact with each other. In this condition, the channel is said to be cut-off. The
value of VGS for which channel is cut-off is called cut-off voltage VC .

D
N

P+ P+
vDS = 0
G

vGS
S

3. When = and is increased from zero: - Now majority carriers (e)


flow from source to drain. Conventional current flows from drain to source. This
current increases with increase in VDS . The magnitude of current depends on (1)
No. of majority carriers (2) Length of channel (3) Cross sectional area of channel
(4.)VDS .
l
So channel acts as resistance and R=
A

V DS V DS .A
And ID = =
R Pl
The drop along this channel resistance acts as reverse bias to the PN junctions and
drop at A will be greater compared to drop at B. So the depletion region wont
increase uniformly and results in wedge shape as shown.

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vDS

vGS = 0

As VDS is increased, the cross sectional area of the channel will be reduced. At a
certain value VP of VDS , the cross sectional area at B becomes minimum. At this
voltage, the channel is said to be pinched off and the drain voltage VP is
called Pinch-off voltage. But channel width cant be zero in this case. If we assume
channel width as zero then no current ID, no drop across channel resistance and no
reverse bias and no depletion region, which is meaningless after the pinch-off
voltage, ID is constant even we increase VDS . If we go on increasing VDS ,
avalanche breakdown takes place for PN junctions and results in very high
currents.

Output characteristics: - ID (mA)

vGS = 0v

vGS = 2v

Ohmic Pinch-off Breakdown


Region region Region

Ohmic Region: - This is useful as voltage variable resistors (VVR) or voltage


dependent resistor (VDR).

Pinch-off Region: - In this region channel is narrow and ID is constant.

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Breakdown Region: - Because of avalanche breakdown heavy currents flow in this


region. Here current is due to only majority carriers so this device is an unipolar
one.

Transfer Characteristics: - It is drawn for VGS Vs ID .

ID
IDSS

vGS vC 0

Characteristic parameters of the JFET: -


(1.) Mutual Conductance or Trans Conductance: -(g m )
It is the slope of the transfer characteristics and is defined by
I D
gm = and measured in mhos.
V gs
V DS constant
(2.) Drain Resistance (rd ): - It is the reciprocal of the slope of drain
V ds
characteristics and is defined as rd = and measured in ohms.
I D V GS constant
rd at VGS = 0 is called drain-source ON resistance and represent as R DS or
R DS (ON).
=>The reciprocal of rd is drain conductance it is denoted by g d or g os .
V DS
(3.) Amplification factor (): - It is defined as = |ID constant
V GS
Negative sign shows that when VGS is increased, VDS must be decreased
for ID to remain constant.

*Relationship among FET parameters: -

= g m . rd

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*Expression for saturation drain current: - The transfer characteristics are


drawn for constant value of VDS . The constant VDS should be greater than VP .
The shape of the transfer characteristics is nearly parabola.
ID

vGS

vP vP 0
2

V GS 2
IDS = IDSS 1 -----------> (1)
VP

Where IDS =Saturation drain current


IDSS =Value of for VGS = 0 and
VP = Pinch off Voltage

Differentiating eq (1) W.R.T VGS , we get


I DS V GS 1
= IDSS 2 1
V GS VP VP

I DS
We know g m = |
V GS V DS constant

2I DSS V GS
g m = 1 ---------------> (2)
VP VP

From eq(1)

V GS I DS
1 = --------------> (3)
VP I DSS

Substituting (3) in (2) we get

2I DSS I DS I DS I DSS
gm = . =-2 -----------> (4)
VP I DSS VP

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2I DSS
Suppose g m = g m o when VGS = 0; g m o = ---> (5)
VP
[from eq (2)]

From (2) and (5)


V GS
g m = g m o . 1
VP

Eq (4) shows that g m varies as the square root of the


saturation drain current IDS and is inversely varies with increase of VGS .

Slope of the transfer characteristic at : -

From eq (4), we have

I DS I DSS
g m = 2
VP

I DS I DS I DSS
Or = 2
V GS VP

Substituting IDS = IDSS ,


I DS 2I DSS I DSS
= = V P
V GS VP
2

This equation shows that the tangent to the curve at IDS = IDSS , VGS =0 will
V P
have an intercept at on the axis of VGS as shown in above figure.
2

FET small signal model: -

We know IDS depends on both VDS and VGS as related below.


I DS . V I DS . V
IDS = V DS GS
const + V GS DS
const
V GS V DS

values represent change in values are a.c values, so we can represent with small
V ds
letters. ids = g m . Vgs +
rd

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Now a small signal model of FET in common-source configuration can be drawn


satisfying the above equation.

Comparison of JFETs with BJTs

S.no Parameter BJT JFET


1. Type of device Bipolar (Conduction Unipolar(Conduction is
is due to both electrons due to electrons or holes,
and holes) which are majority
carriers)
2. Noise More, since carriers Less, since carriers wont
pass through PN cross PN junctions.
junctions.
3. Input impedance Very high, since Vgs is Very low, since emitter
reverse biases the gate base junction is forward
and source. biased.
4. Controlling Parameter Current Voltage
5. Fabrication Not easy Easy
6. Size Moderate Small
7. Performance Degraded by radiation, Good, since no minority
since the reduction in carriers participate in
life times of minority conduction.
carriers.
8. Switching speeds Low ( minority High
carrier storage effects)
9. Temperature effect Has the temperature It has negative
coefficients and leads temperature coefficients,
to the thermal break which prevents FETs
down at high currents from breakdowns.
10. Gain Band width High Low
product
11. Cost Cheap Moderate cost

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Applications of JFETs: -

(1.) It is used buffer in measuring instruments and receivers as it


has high input impedance and low output impedance.
(2.) Since the input capacitance is low, FETs are used in
cascade amplifiers, in measuring and test equipments.
(3.) Since the device is voltage controlled, it is used as voltage
variable resistor in OP-amps and tone controls.
(4.) It is used in oscillators, because frequency drift is low.
(5.) FETs are used in digital circuits like computers, LSD and
memory circuits because of its small size.

Comparison of CE, CB and CC configurations.

S.no Parameter CB CE CC
1. Input Resistance Low (about Moderate(about High (about
100) 750) 750K)
2. Output Resistance High (about Moderate (about Low (about
450K) 45K) 25)
3. Current gain 1 High High
4. Voltage gain About 150 About 500 1
5. Phase shift between 0 or 360 180 0 or 360
input and output
6. Applications For high For audio For impedance
frequency frequency circuits matching
circuits
7. Input current IE IB IB
8. Output current IC IC IE
9. Input Voltage VEB VBE VBC
10. Output Voltage VC VC V
11. Current IC IC IE
dc = dc = dc =
Amplification factor IE IB IB
* Relation among 1
= = =
current amplification 1+ 1 1
factors = 1 =1+
=
1+

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MOSFETs or IGFETs: -

MOSFET Metal oxide semi-conductor field effect transistor.

IGFET Insulated gate field effect transistor.

n-channel enhancement MOSFET: -

vGG

S D Symbol:-
Aluminum G Sio2

N+ N+
Induced
n-channel

P-type substrate ID

vDD

Take a lightly doped P-type material as substrate, diffuse two heavily doped N
regions into it. Form a thin layer of SiO2 on the whole structure. Take metal
contacts from those two heavily doped N regions (N+s) to get source and drain
terminals. Then Aluminium is overload on the oxide covering the entire channel
region. The contact to the Aluminium over the channel area is gate terminal SiO 2 is
insulating material and hence the device is called insulated gate field effect
transistor. This layer results in extremely high input resistance (1010 to 1015) for
MOSFETs.

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Operation of n-channel enhancement MOSFET: -

Case 1: - If VGS = 0 and VDS 0

No current flows from drain to source as there is no conducting path from drain to
source.

Case 2: - If VGS 0 and VDS = 0

The positive terminal of VGS attracts electrons of P-region. So there electrons are
deposited between drain and source and acts like channel. But no current flows
from drain to source as the potential difference VDS = 0.

Case 3: - If VGS 0 and VDS 0

The current flows from drain to source and it increase greatly w.r.t VGS and VDS .

Output or drain characteristics: - (Volt-ampere characteristics)

ID (mA)

6v

4v
vGS = 2v

0 vDS (v)

Transfer Characteristics: -
ID (mA)

0 vgs (volts)

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N-channel depletion MOSFET: - The only constructional difference between


enhancement and depletion MOSFETs is inbuilt channel, which was absent in
enhancement type.
S vGS
G D

N
N+ N+

P-type Substrate
vDS

Operation:-

Case 1: - If VGS = 0 and VDS 0

Current flows from drain to source as there is inbuilt channel from drain to source.

Case 2: - If VGS > 0 and VDS = 0

Channel width increases by depositing some more electrons on inbuilt channel due
to positive VGS . No current flows as there is no potential difference between drain
and source.

Case 3: - If VGS < 0 and VDS = 0

Channel width decreases by depositing holes in inbuilt channel due to VGS and
current is zero as VDS = 0. The channel width decreases more at drain compared
source, same as in JFETs.

Case 4: - If VDS 0

Current flows from drain to source even for VGS = 0. If VGS is increasing in
negative direction then at certain point, total channel will be cut-off. That
particular value of VGS is called VC .

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Output or drain Characteristics: -

In enhancement MOSFET, we observe only enhancement mode and in


depletion MOSFET, we observe both enhancement and depletion modes.
ID (mA)

vGS = 8v
Enhancement
mode
vGS = 4v

vGS = 0v
vGS = 3v Depletion
-5v mode
vDS (v)

Transfer Characteristics: -
ID (mA)

vC vGS (v)

Comparison of MOSFETs with JFETs: -

S.no Parameter MOSFETs JFETs


1. Channel Control The transverse electric The transverse of
field induced across an electric field across the
insulating layer deposited reverse biased PN
on the semi conductor junction controls the
material controls the conductivity of
channel. channel.
2. Gate leakage Current 10-12A 10-9A
3. Input resistance 1010 to 1015 108
4. Drain resistance 1 to 50 k 0.1 to 1m
5. Operating mode Both depletion and Only depletion mode
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enhancement MOSFETs
6. Fabrication Easy Not easy as MOSFETs
7. Handling Should be careful Need not be careful.
8. CMOSFETs are available
which involve near zero
power dissipation and are
popular in digital VLSI
circuits.

Comparison of N with P-channel JFETs: -

S.no Parameter N-channel JFET P-channel JFET


1. Current carriers electrons Holes
2. Mobility of carriers more less
3. Input noise less more
4. Trans-conductance larger smaller

Comparison of N-with P-channel MOSFETs: -

S.no Parameter N-channel MOSFET P-channel MOSFET


1. Fabrication Easy and Cheap Easier and cheaper
2. Size small Large
3. Mobility of carriers more Less by 2.5 times
4. Drain resistance less 3 times the R D of n-channel
MOSFET
5. Package density high small

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