PD -97363

IRLB3034PbF
HEXFET Power MOSFET
Applications
l DC Motor Drive D VDSS 40V
l High Efficiency Synchronous Rectification in SMPS
RDS(on) typ. 1.4m:
1.7m:
l Uninterruptible Power Supply
max.
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
G
ID (Silicon Limited) 343A c
S ID (Package Limited) 195A
Benefits
l Optimized for Logic Level Drive
l Very Low RDS(ON) at 4.5V VGS
l Superior R*Q at 4.5V VGS
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l Fully Characterized Capacitance and Avalanche
TO-220AB
SOA
IRLB3034PbF
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free

G D S
Gate Drain Source
Absolute Maximum Ratings
Symbol Parameter Max. Units
ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) 343 c
ID @ TC = 100C Continuous Drain Current, VGS @ 10V (Silicon Limited) 243 c A
ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Package Limited) 195
IDM Pulsed Drain Current d 1372
PD @TC = 25C Maximum Power Dissipation 375 W
Linear Derating Factor 2.5 W/C
VGS Gate-to-Source Voltage 20 V
dv/dt Peak Diode Recovery f 4.6 V/ns
TJ Operating Junction and
-55 to + 175
TSTG Storage Temperature Range
C
Soldering Temperature, for 10 seconds
300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw x x
10lbf in (1.1N m)
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy e 255 mJ
IAR Avalanche Current d A
EAR Repetitive Avalanche Energy d See Fig. 14, 15, 22a, 22b,
mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case j 0.4
RCS Case-to-Sink, Flat, Greased Surface 0.5 C/W
RJA Junction-to-Ambient 62

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IRLB3034PbF
Static @ TJ = 25C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 V VGS = 0V, ID = 250A
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient 0.04 V/C Reference to 25C, ID = 5mA d
1.4 1.7 VGS = 10V, ID = 195A g
RDS(on) Static Drain-to-Source On-Resistance
1.6 2.0
m
VGS = 4.5V, ID = 172A g
VGS(th) Gate Threshold Voltage 1.0 2.5 V VDS = VGS, ID = 250A
IDSS Drain-to-Source Leakage Current 20 VDS = 40V, VGS = 0V
A
250 VDS = 40V, VGS = 0V, TJ = 125C
IGSS Gate-to-Source Forward Leakage 100 VGS = 20V
nA
Gate-to-Source Reverse Leakage -100 VGS = -20V
RG(int) Internal Gate Resistance 2.1
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 286 S VDS = 10V, ID = 195A
Qg Total Gate Charge 108 162 ID = 185A
Qgs Gate-to-Source Charge 29 VDS = 20V
Qgd Gate-to-Drain ("Miller") Charge 54
nC
VGS = 4.5V g
Qsync Total Gate Charge Sync. (Qg - Qgd) 54 ID = 185A, VDS =0V, VGS = 4.5V
td(on) Turn-On Delay Time 65 VDD = 26V
tr Rise Time 827 ID = 195A
ns
td(off) Turn-Off Delay Time 97 RG = 2.1
tf Fall Time 355 VGS = 4.5V g
Ciss Input Capacitance 10315 VGS = 0V
Coss Output Capacitance 1980 VDS = 25V
Crss Reverse Transfer Capacitance 935 pF = 1.0MHz
Coss eff. (ER) Effective Output Capacitance (Energy Related) i 2378 VGS = 0V, VDS = 0V to 32V i
Coss eff. (TR) Effective Output Capacitance (Time Related) h 2986 VGS = 0V, VDS = 0V to 32V h
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current
c MOSFET symbol D

343
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

(Body Diode) d 1372

p-n junction diode. S

VSD Diode Forward Voltage 1.3 V TJ = 25C, IS = 195A, VGS = 0V g

trr Reverse Recovery Time 39 TJ = 25C VR = 34V,
ns
41 T = 125C I F = 195A
g
J
Qrr Reverse Recovery Charge 39 TJ = 25C di/dt = 100A/s
nC
46 TJ = 125C
IRRM Reverse Recovery Current 1.7 A TJ = 25C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
Calcuted continuous current based on maximum allowable junction Pulse width 400s; duty cycle 2%.
temperature Bond wire current limit is 195A. Note that current Coss eff. (TR) is a fixed capacitance that gives the same charging time
limitation arising from heating of the device leds may occur with as Coss while VDS is rising from 0 to 80% VDSS .
some lead mounting arrangements. Coss eff. (ER) is a fixed capacitance that gives the same energy as
Repetitive rating; pulse width limited by max. junction Coss while VDS is rising from 0 to 80% VDSS.
temperature. R is measured at TJ approximately 90C
Limited by TJmax, starting TJ = 25C, L = 0.013mH
RG = 25, IAS = 195A, VGS =10V. Part not recommended for use
above this value .
ISD 195A, di/dt 841A/s, VDD V(BR)DSS, TJ 175C.

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 IRLB3034PbF
100000 100000
VGS VGS
TOP 15V 60s PULSE WIDTH TOP 15V 60s PULSE WIDTH
10V 10V Tj = 175C
8.0V Tj = 25C 8.0V
10000
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

4.5V 4.5V
3.5V 10000 3.5V
3.0V 3.0V
2.7V 2.7V
BOTTOM 2.5V BOTTOM 2.5V
1000

1000
100

100
10
2.5V 2.5V

1 10
0.1 1 10 100 0.1 1 10 100
V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

10000 2.0

RDS(on) , Drain-to-Source On Resistance

ID = 195A
VGS = 10V
ID, Drain-to-Source Current (A)

1000

T J = 175C 1.5
T J = 25C
100
(Normalized)

10
1.0

1
VDS = 25V
60s PULSE WIDTH
0.1 0.5
1 2 3 4 5 -60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (C)
VGS, Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

100000 5.0
VGS = 0V, f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED ID= 185A VDS= 32V
4.5
C rss = C gd VDS= 20V
VGS, Gate-to-Source Voltage (V)

C oss = C ds + C gd 4.0
Ciss 3.5
C, Capacitance (pF)

10000
Coss 3.0

2.5
Crss
2.0
1000
1.5

1.0

0.5
100 0.0
1 10 100 0 20 40 60 80 100 120 140
VDS, Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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IRLB3034PbF
10000 10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)

ID, Drain-to-Source Current (A)

1000
ISD, Reverse Drain Current (A)

1000
100sec

100 1msec
T J = 175C
100 LIMITED BY PACKAGE
10msec
10
TJ = 25C
DC
10
1 Tc = 25C
Tj = 175C
VGS = 0V Single Pulse
1.0 0.1
0.0 0.5 1.0 1.5 2.0 2.5 0.1 1 10 100
VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area
Forward Voltage

V(BR)DSS , Drain-to-Source Breakdown Voltage (V)

350 50
Id = 5mA
Limited By Package
300
48
250
ID, Drain Current (A)

46
200

150
44

100
42
50

0 40
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100120140160180
T C , Case Temperature (C) T J , Temperature ( C )
Fig 9. Maximum Drain Current vs. Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
2.5 1200
EAS , Single Pulse Avalanche Energy (mJ)

ID

1000 TOP 38.9A

2.0 65.3A
BOTTOM 195A
800
1.5
Energy (J)

600
1.0
400

0.5
200

0.0 0
0 5 10 15 20 25 30 35 40 45 25 50 75 100 125 150 175

VDS, Drain-to-Source Voltage (V) Starting T J , Junction Temperature (C)

Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy vs. DrainCurrent
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 IRLB3034PbF
1
Thermal Response ( Z thJC ) C/W

D = 0.50

0.1 0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
R4
R4
Ri (C/W) i (sec)
J C 0.02477 0.000025
0.02 J
1 0.08004 0.000077
0.01 2 3 4
0.01 1 2 3 4 0.19057 0.001656
Ci= i/Ri 0.10481 0.008408
Ci i/Ri
SINGLE PULSE Notes:
( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000
Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150C and
Tstart =25C (Single Pulse)
Avalanche Current (A)

100 0.01

0.05
0.10

10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming j = 25C and
Tstart = 150C.
1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
300 Notes on Repetitive Avalanche Curves , Figures 14, 15:
TOP Single Pulse
(For further info, see AN-1005 at www.irf.com)
BOTTOM 1.0% Duty Cycle 1. Avalanche failures assumption:
250 ID = 195A Purely a thermal phenomenon and failure occurs at a temperature far in
EAR , Avalanche Energy (mJ)

excess of Tjmax. This is validated for every part type.

200 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
150 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
100 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25C in Figure 14, 15).
tav = Average time in avalanche.
50 D = Duty cycle in avalanche = tav f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3BVIav) = DT/ ZthJC
25 50 75 100 125 150 175
Iav = 2DT/ [1.3BVZth]
Starting T J , Junction Temperature (C) EAS (AR) = PD (ave)tav

Fig 15. Maximum Avalanche Energy vs. Temperature

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IRLB3034PbF
3.0 14
IF = 78A
VGS(th) , Gate threshold Voltage (V)

2.5 12 V R = 34V
TJ = 25C
10 TJ = 125C
2.0

IRRM (A)
8
1.5
6
ID = 250A
1.0
ID = 1.0mA
4
ID = 1.0A
0.5
2

0.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 0 100 200 300 400 500
T J , Temperature ( C ) diF /dt (A/s)

Fig 16. Threshold Voltage vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt

14 400
IF = 117A IF = 78A
12 V R = 34V V R = 34V
TJ = 25C TJ = 25C
300
10 TJ = 125C TJ = 125C
IRRM (A)

8
QRR (A)

200
6

4
100

0 0
0 100 200 300 400 500 0 100 200 300 400 500
diF /dt (A/s) diF /dt (A/s)
Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt

400
IF = 117A
V R = 34V

300 TJ = 25C
TJ = 125C
QRR (A)

200

100

0
0 100 200 300 400 500
diF /dt (A/s)

Fig. 20 - Typical Stored Charge vs. dif/dt

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 IRLB3034PbF
Driver Gate Drive
P.W.
D.U.T P.W.
Period D=
Period
+

VGS=10V *
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
- Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
Recovery Body Diode Forward
-
+ Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

RG dv/dt controlled by RG VDD Re-Applied

Driver same type as D.U.T. + Voltage Body Diode Forward Drop
I SD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
D.U.T. - Device Under Test

Ripple 5% ISD

* VGS = 5V for Logic Level Devices

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01
I AS

Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms
RD
VDS VDS

VGS
90%
D.U.T.
RG
+
- VDD

V10V
GS 10%
Pulse Width 1 s VGS
Duty Factor 0.1 %
td(on) tr t d(off) tf

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Current Regulator Id
Same Type as D.U.T. Vds

Vgs
50K

12V .2F
.3F

+
V
D.U.T. - DS
Vgs(th)
VGS

3mA

IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr

Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
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IRLB3034PbF

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

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TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IRs Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 01/09
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