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Typical Application
+5 V
8
1 VCC
IP+
7 VOUT
2 CBYP
IP+ VIOUT
0.1 F
IP ACS714
3 6
IP FILTER CF
4
IP 5 1 nF
GND
ACS714-DS, Rev. 6
ACS714 Automotive Grade, Fully Integrated, Hall Effect-Based Linear Current Sensor IC
with 2.1 kVRMS Voltage Isolation and a Low-Resistance Current Conductor
Description (continued)
the conductive path are electrically isolated from the signal leads The leadframe is plated with 100% matte tin, which is compatible
(pins 5 through 8). This allows the ACS714 to be used in applications with standard lead (Pb) free printed circuit board assembly processes.
requiring electrical isolation without the use of opto-isolators or Internally, the device is Pb-free, except for flip-chip high-temperature
other costly isolation techniques. Pb-based solder balls, currently exempt from RoHS. The device is
The ACS714 is provided in a small, surface mount SOIC8 package. fully calibrated prior to shipment from the factory.
Selection Guide
Optimized Range, IP Sensitivity, Sens TA
Part Number Packing*
(A) (Typ) (mV/A) (C)
ACS714ELCTR-05B-T 5 185
ACS714ELCTR-20A-T 20 100 40 to 85
ACS714ELCTR-30A-T 30 66
Tape and reel, 3000 pieces/reel
ACS714LLCTR-05B-T 5 185
ACS714LLCTR-20A-T 20 100 40 to 150
ACS714LLCTR-30A-T 30 66
*Contact Allegro for additional packing options.
Parameter Specification
TV America
Certificate Number: CAN/CSA-C22.2 No. 60950-1-03
U8V 06 05 54214 010 Fire and Electric Shock UL 60950-1:2003
EN 60950-1:2001
+5 V
VCC
(Pin 8)
Hall Current
Drive
(Pin 2)
Cancellation
Signal VIOUT
Recovery (Pin 7)
RF(INT)
IP
(Pin 3)
Sense
Trim
IP
(Pin 4) 0 Ampere
Offset Adjust
GND FILTER
(Pin 5) (Pin 6)
Pin-out Diagram
IP+ 1 8 VCC
IP+ 2 7 VIOUT
IP 3 6 FILTER
IP 4 5 GND
COMMON OPERATING CHARACTERISTICS1 over full range of TA , CF = 1 nF, and VCC = 5 V, unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Units
ELECTRICAL CHARACTERISTICS
Supply Voltage VCC 4.5 5.0 5.5 V
Supply Current ICC VCC = 5.0 V, output open 10 13 mA
Output Capacitance Load CLOAD VIOUT to GND 10 nF
Output Resistive Load RLOAD VIOUT to GND 4.7 k
Primary Conductor Resistance RPRIMARY TA = 25C 1.2 m
Rise Time tr IP = IP(max), TA = 25C, COUT = open 5 s
Frequency Bandwidth f 3 dB, TA = 25C; IP is 10 A peak-to-peak 80 kHz
Nonlinearity ELIN Over full range of IP 1.5 %
Symmetry ESYM Over full range of IP 98 100 102 %
VCC
Zero Current Output Voltage VIOUT(Q) Bidirectional; IP = 0 A, TA = 25C V
0.5
Output reaches 90% of steady-state level, TJ = 25C, 20 A present
Power-On Time tPO 35 s
on leadframe
Magnetic Coupling2 12 G/A
Internal Filter Resistance3 RF(INT) 1.7 k
1Device may be operated at higher primary current levels, IP, and ambient, TA , and internal leadframe temperatures, TA , provided that the Maximum
Junction Temperature, TJ(max), is not exceeded.
21G = 0.1 mT.
3R
F(INT) forms an RC circuit via the FILTER pin.
x05B PERFORMANCE CHARACTERISTICS1 over Range E: TA = 40C to 85C, CF = 1 nF, and VCC = 5 V, unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Optimized Accuracy Range IP 5 5 A
Sensitivity Sens Over full range of IP, TA = 25C 180 185 190 mV/A
Peak-to-peak, TA = 25C, 185 mV/A programmed Sensitivity,
Noise VNOISE(PP) 21 mV
CF = 47 nF, COUT = open, 2 kHz bandwidth
TA = 40C to 25C 0.26 mV/C
Zero Current Output Slope IOUT(Q)
TA = 25C to 150C 0.08 mV/C
TA = 40C to 25C 0.054 mV/A/C
Sensitivity Slope Sens
TA = 25C to 150C 0.008 mV/A/C
Electrical Output Voltage VOE IP = 0 A 40 40 mV
Total Output Error2 ETOT IP =5 A, TA = 25C 1.5 %
1Device may be operated at higher primary current levels, IP, and ambient temperatures, TA, provided that the Maximum Junction Temperature, TJ(max),
is not exceeded.
2Percentage of I , with I = 5 A. Output filtered.
P P
x05B PERFORMANCE CHARACTERISTICS1 over Range L: TA = 40C to 150C, CF = 1 nF, and VCC = 5 V, unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Optimized Accuracy Range IP 5 5 A
Sensitivity Sens Over full range of IP, TA = 25C 185 mV/A
Peak-to-peak, TA = 25C, 185 mV/A programmed Sensitivity,
Noise VNOISE(PP) 21 mV
CF = 47 nF, COUT = open, 2 kHz bandwidth
TA = 40C to 25C 0.26 mV/C
Zero Current Output Slope IOUT(Q)
TA = 25C to 150C 0.08 mV/C
TA = 40C to 25C 0.054 mV/A/C
Sensitivity Slope Sens
TA = 25C to 150C 0.008 mV/A/C
Electrical Output Voltage VOE IP = 0 A 60 60 mV
IP =5 A, TA = 25C 1.5 %
Total Output Error2 ETOT
IP =5 A, TA = 40C to 150C 7 7 %
1Device may be operated at higher primary current levels, IP, and ambient temperatures, TA, provided that the Maximum Junction Temperature, TJ(max),
is not exceeded.
2Percentage of I , with I = 5 A. Output filtered.
P P
x20A PERFORMANCE CHARACTERISTICS over Range E: TA = 40C to 85C1, CF = 1 nF, and VCC = 5 V, unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Optimized Accuracy Range IP 20 20 A
Sensitivity Sens Over full range of IP, TA = 25C 96 100 104 mV/A
Peak-to-peak, TA = 25C, 100 mV/A programmed Sensitivity,
Noise VNOISE(PP) 11 mV
CF = 47 nF, COUT = open, 2 kHz bandwidth
TA = 40C to 25C 0.34 mV/C
Zero Current Output Slope IOUT(Q)
TA = 25C to 150C 0.07 mV/C
TA = 40C to 25C 0.017 mV/A/C
Sensitivity Slope Sens
TA = 25C to 150C 0.004 mV/A/C
Electrical Output Voltage VOE IP = 0 A 30 30 mV
Total Output Error2 ETOT IP = 20 A, TA = 25C 1.5 %
1Device may be operated at higher primary current levels, IP, and ambient temperatures, TA, provided that the Maximum Junction Temperature,
TJ(max), is not exceeded.
2Percentage of I , with I = 20 A. Output filtered.
P P
x20A PERFORMANCE CHARACTERISTICS over Range L: TA = 40C to 150C1, CF = 1 nF, and VCC = 5 V, unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Optimized Accuracy Range IP 20 20 A
Over full range of IP, TA = 25C 100 mV/A
Sensitivity Sens
Over full range of IP, TA = 40C to 150C 94 104 mV/A
Peak-to-peak, TA = 25C, 100 mV/A programmed Sensitivity,
Noise VNOISE(PP) 11 mV
CF = 47 nF, COUT = out, 2 kHz bandwidth
TA = 40C to 25C 0.34 mV/C
Zero Current Output Slope IOUT(Q)
TA = 25C to 150C 0.07 mV/C
TA = 40C to 25C 0.017 mV/A/C
Sensitivity Slope Sens
TA = 25C to 150C 0.004 mV/A/C
Electrical Output Voltage VOE IP = 0 A 40 40 mV
IP = 20 A, TA = 25C 1.5 %
Total Output Error2 ETOT
IP = 20 A, TA = 40C to 150C 5 5 %
1Device may be operated at higher primary current levels, IP, and ambient temperatures, TA, provided that the Maximum Junction Temperature,
TJ(max), is not exceeded.
2Percentage of I , with I = 20 A. Output filtered.
P P
x30A PERFORMANCE CHARACTERISTICS over Range E: TA = 40C to 85C1, CF = 1 nF, and VCC = 5 V, unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Optimized Accuracy Range IP 30 30 A
Sensitivity Sens Over full range of IP, TA = 25C 64 66 68 mV/A
Peak-to-peak, TA = 25C, 66 mV/A programmed Sensitivity,
Noise VNOISE(PP) 7 mV
CF = 47 nF, COUT = open, 2 kHz bandwidth
TA = 40C to 25C 0.35 mV/C
Zero Current Output Slope IOUT(Q)
TA = 25C to 150C 0.08 mV/C
TA = 40C to 25C 0.007 mV/A/C
Sensitivity Slope Sens
TA = 25C to 150C 0.002 mV/A/C
Electrical Output Voltage VOE IP = 0 A 30 30 mV
Total Output Error2 ETOT IP = 30 A , TA = 25C 1.5 %
1Device may be operated at higher primary current levels, IP, and ambient temperatures, TA, provided that the Maximum Junction Temperature,
TJ(max), is not exceeded.
2Percentage of I , with I = 30 A. Output filtered.
P P
x30A PERFORMANCE CHARACTERISTICS over Range L: TA = 40C to 150C1, CF = 1 nF, and VCC = 5 V, unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Optimized Accuracy Range IP 30 30 A
Over full range of IP, TA = 25C 66 mV/A
Sensitivity Sens
Over full range of IP, TA = 40C to 150C 63 69 mV/A
Peak-to-peak, TA = 25C, 66 mV/A programmed Sensitivity,
Noise VNOISE(PP) 7 mV
CF = 47 nF, COUT = open, 2 kHz bandwidth
TA = 40C to 25C 0.35 mV/C
Zero Current Output Slope IOUT(Q)
TA = 25C to 150C 0.08 mV/C
TA = 40C to 25C 0.007 mV/A/C
Sensitivity Slope Sens
TA = 25C to 150C 0.002 mV/A/C
Electrical Output Voltage VOE IP = 0 A 40 40 mV
IP = 30 A , TA = 25C 1.5 %
Total Output Error2 ETOT
IP = 30 A , TA = 40C to 150C 5 5 %
1Device may be operated at higher primary current levels, IP, and ambient temperatures, TA, provided that the Maximum Junction Temperature,
TJ(max), is not exceeded.
2Percentage of I , with I = 30 A. Output filtered.
P P
Characteristic Performance
IP = 5 A, unless otherwise specified
Mean Supply Current versus Ambient Temperature Supply Current versus Supply Voltage
10.30 10.9
10.25 10.8
10.20
10.7
10.15
ICC (mA)
10.10 10.6
Mean ICC (mA)
1.5 VCC = 5 V
0.4
ELIN (%)
IOM (mA)
2.0
VCC = 5 V; IP = 0 A,
2.5 0.3
After excursion to 20 A
3.0
3.5 0.2
4.0
0.1
4.5
5.0 0
-50 -25 0 25 50 75 100 125 150 50 25 0 25 50 75 100 125 150
TA (C) TA (C)
Mean Total Output Error versus Ambient Temperature Sensitivity versus Ambient Temperature
8 186.5
6 186.0
185.5
Sens (mV/A)
4 185.0
ETOT (%)
2 184.5
184.0
0
183.5
2 183.0
4 182.5
182.0
6 181.5
8 181.0
50 25 0 25 50 75 100 125 150 50 25 0 25 50 75 100 125 150
TA (C) TA (C)
3.0
170.00
VIOUT (V)
0 A Output Voltage versus Ambient Temperature 0 A Output Voltage Current versus Ambient Temperature
2520 0.20
2515 0.15
2510 IP = 0 A 0.10 IP = 0 A
VIOUT(Q) (mV)
IOUT(Q) (A)
2505 0.05
2500 0
2495 0.05
2490 0.10
2485 0.15
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
TA (C) TA (C)
Characteristic Performance
IP = 20 A, unless otherwise specified
Mean Supply Current versus Ambient Temperature Supply Current versus Supply Voltage
9.7 10.4
9.6 10.2
10.0 VCC = 5 V
9.5
Mean ICC (mA)
ICC (mA)
9.8
9.4 VCC = 5 V
9.6
9.3
9.4
9.2 9.2
9.1 9.0
-50 -25 0 25 50 75 100 125 150 4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5
TA (C) VCC (V)
ELIN (%)
2.0 0.20
IOM (mA)
2.5 VCC = 5 V; IP = 0 A,
After excursion to 20 A 0.15
3.0
3.5 0.10
4.0
0.05
4.5
5.0 0
-50 -25 0 25 50 75 100 125 150 50 25 0 25 50 75 100 125 150
TA (C) TA (C)
Mean Total Output Error versus Ambient Temperature Sensitivity versus Ambient Temperature
8 100.8
6 100.6
4 100.4
100.2
Sens (mV/A)
2
ETOT (%)
100.0
0
99.8
2
99.6
4 99.4
6 99.2
8 99.0
50 25 0 25 50 75 100 125 150 50 25 0 25 50 75 100 125 150
TA (C) TA (C)
Output Voltage versus Sensed Current Sensitivity versus Sensed Current
5.0 110.00
4.5 108.00 TA (C)
40
4.0 106.00
25
3.5 VCC = 5 V 104.00 85
Sens (mV/A)
0 A Output Voltage versus Ambient Temperature 0 A Output Voltage Current versus Ambient Temperature
2525 0.25
2520 0.20
2515 0.15
VIOUT(Q) (mV)
IOUT(Q) (A)
2510 IP = 0 A 0.10 IP = 0 A
2505 0.05
2500 0
2495 0.05
2490 0.10
2485 0.15
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
TA (C) TA (C)
Characteristic Performance
IP = 30 A, unless otherwise specified
Mean Supply Current versus Ambient Temperature Supply Current versus Supply Voltage
9.6 10.2
9.5 10.0
9.4
9.8
ICC (mA)
VCC = 5 V
Mean ICC (mA)
9.3 VCC = 5 V
9.6
9.2
9.4
9.1
9.0 9.2
8.9 9.0
-50 -25 0 25 50 75 100 125 150 4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5
TA (C) VCC (V)
ELIN (%)
IOM (mA)
2.0
0.25
2.5 VCC = 5 V; IP = 0 A,
0.20
3.0 After excursion to 20 A
0.15
3.5
4.0 0.10
4.5 0.05
5.0 0
-50 -25 0 25 50 75 100 125 150 50 25 0 25 50 75 100 125 150
TA (C) TA (C)
Mean Total Output Error versus Ambient Temperature Sensitivity versus Ambient Temperature
8 66.6
6 66.5
66.4
Sens (mV/A)
4
ETOT (%)
66.3
2
66.2
0
66.1
2
66.0
4 65.9
6 65.8
8 65.7
50 25 0 25 50 75 100 125 150 50 25 0 25 50 75 100 125 150
TA (C) TA (C)
3.0 66.00
2.5 TA (C) 65.00
40 64.00 TA (C)
2.0
20 40
1.5 25 63.00
25
1.0 85 62.00 85
0.5 125 61.00 150
0 60.00
30 20 10 0 10 20 30 30 20 10 0 10 20 30
Ip (A)
IP (A)
0 A Output Voltage versus Ambient Temperature 0 A Output Voltage Current versus Ambient Temperature
2535 0.35
2530 0.30
2525 0.25
2520 0.20
VIOUT(Q) (mV)
IP = 0 A IP = 0 A
IOUT(Q) (A)
2515 0.15
2510 0.10
2505 0.05
2500 0
2495 0.05
2490 0.10
2485 0.15
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
TA (C) TA (C)
Noise (VNOISE). The product of the linear IC amplifier gain Full-scale current at 25C. Accuracy at the the full-scale current
(mV/G) and the noise floor for the Allegro Hall effect linear IC at 25C, without the effects of temperature.
(1 G). The noise floor is derived from the thermal and shot Full-scale current over temperature. Accuracy at the full-
noise observed in Hall elements. Dividing the noise (mV) by the scale current flow including temperature effects.
sensitivity (mV/A) provides the smallest current that the device is
Ratiometry. The ratiometric feature means that its 0 A output,
able to resolve.
VIOUT(Q), (nominally equal to VCC/2) and sensitivity, Sens, are
Linearity (ELIN). The degree to which the voltage output from proportional to its supply voltage, VCC . The following formula is
the IC varies in direct proportion to the primary current through
used to derive the ratiometric change in 0 A output voltage,
its full-scale amplitude. Nonlinearity in the output can be attrib-
uted to the saturation of the flux concentrator approaching the VIOUT(Q)RAT (%).
full-scale current. The following equation is used to derive the VIOUT(Q)VCC / VIOUT(Q)5V
linearity: 100
VCC / 5 V
{ [
100 1
gain % sat ( VIOUT_full-scale amperes VIOUT(Q) )
2 (VIOUT_half-scale amperes VIOUT(Q) ) [{ The ratiometric change in sensitivity, SensRAT (%), is defined as:
SensVCC / Sens5V
where VIOUT_full-scale amperes = the output voltage (V) when the 100
sampled current approximates full-scale IP . VCC / 5 V
Symmetry (ESYM). The degree to which the absolute voltage
output from the IC varies in proportion to either a positive or Output Voltage versus Sampled Current
Accuracy at 0 A and at Full-Scale Current
negative full-scale primary current. The following formula is
used to derive symmetry: Increasing VIOUT(V)
Accuracy
VIOUT_+ full-scale amperes VIOUT(Q) Over $Temp erature
100
VIOUT(Q) VIOUT_full-scale amperes Accuracy
25C Only
Electrical offset voltage (VOE). The deviation of the device out- IP (A) +IP (A)
put from its ideal quiescent value of VCC / 2 due to nonmagnetic Full Scale
IP(max)
causes. To convert this voltage to amperes, divide by the device
sensitivity, Sens. 0A
Decreasing VIOUT(V)
Rise time (tr). The time interval between a) when the device I (%) Primary Current
reaches 10% of its full scale value, and b) when it reaches 90% 90
of its full scale value. The rise time to a step response is used to
derive the bandwidth of the device, in which (3 dB) = 0.35 / tr.
Transducer Output
Both tr and tRESPONSE are detrimentally affected by eddy current 10
losses observed in the conductive IC ground plane. 0
t
Rise Time, tr
IP = 0 A
100
80
60
40
20
0 Output (mV)
0 10 20 30 40 50
CF (nF)
Noise vs. Filter Cap
10000
Noise versus External Filter Capacitance 15 A
Excitation Signal
1000
Noise(p-p) (mA)
100
10
1
0.01 0.1 1 10 100 1000
CF (nF)
Rise Time versus External Filter Capacitance Rise Time versus External Filter Capacitance
1200 CF (nF) tr (s)
400
1000 0 6.6 350
1 7.7 300
800 4.7 17.4
250
tr(s)
tr(s)
10 32.1
600 22 68.2 200
47 88.2 150
400
200
0
} Expanded in chart at right
100
220
470
291.3
623.0
1120.0
100
50
0
0 100 200 300 400 500 0 25 50 75 100 125 150
CF (nF) CF (nF)
Chopper Stabilization is an innovative circuit technique that is This technique is made possible through the use of a BiCMOS
used to minimize the offset voltage of a Hall element and an asso- process that allows the use of low-offset and low-noise amplifiers
ciated on-chip amplifier. Allegro patented a Chopper Stabiliza- in combination with high-density logic integration and sample
tion technique that nearly eliminates Hall IC output drift induced and hold circuits.
by temperature or package stress effects. This offset reduction
Regulator
technique is based on a signal modulation-demodulation process.
Modulation is used to separate the undesired DC offset signal
from the magnetically induced signal in the frequency domain. Clock/Logic
Then, using a low-pass filter, the modulated DC offset is sup- Hall Element
Low-Pass
Filter
pressed while the magnetically induced signal passes through
Sample and
the filter. As a result of this chopper stabilization approach, the
Hold
Amp
output voltage from the Hall IC is desensitized to the effects
of temperature and mechanical stress. This technique produces
devices that have an extremely stable Electrical Offset Voltage,
are immune to thermal stress, and have precise recoverability
after temperature cycling.
Concept of Chopper Stabilization Technique
Typical Applications
+5 V
+5 V
VPEAK
CBYP
CBYP R1
C2 0.1 F 100 k
0.1 F 0.1 F VRESET
R4 Q1
10 k 2N7002 R2
8 COUT 100 k LM321
1 VCC 0.1 F 8 1 + 5
IP+ 1 4 VOUT
7 VOUT + IP+ VCC
2
IP+ VIOUT 2 7 3
RF IP+ VIOUT 2
IP ACS714 10 k
RF
R1 U1 D1 C1
6 LT1178 1N914 IP ACS714 1 k
3 1 M 1000 pF
IP FILTER CF 3 6 R3
4 1 nF IP FILTER CF
3.3 k
IP 5 4
GND IP 5 0.01 F
R3 C1 GND
R2 0.1 F
33 k 330 k
Application 4. Rectified Output. 3.3 V scaling and rectification application Application 5. 10 A Overcurrent Fault Latch. Fault threshold set by R1 and
for A-to-D converters. Replaces current transformer solutions with simpler R2. This circuit latches an overcurrent fault and holds it until the 5 V rail is
ACS circuit. C1 is a function of the load resistance and filtering desired. powered down.
R1 can be omitted if the full range is desired.
In low-frequency sensing applications, it is often advantageous temperature. Therefore, signal attenuation will vary as a function
to add a simple RC filter to the output of the device. Such a low- of temperature. Note that, in many cases, the input impedance,
pass filter improves the signal-to-noise ratio, and therefore the RINTFC , of a typical analog-to-digital converter (ADC) can be as
resolution, of the device output signal. However, the addition of low as 10 k.
an RC filter to the output of a sensor IC can result in undesirable
device output attenuation even for DC signals. The ACS714 contains an internal resistor, a FILTER pin connec-
tion to the printed circuit board, and an internal buffer amplifier.
Signal attenuation, VATT , is a result of the resistive divider
With this circuit architecture, users can implement a simple
effect between the resistance of the external filter, RF (see
Application 6), and the input impedance and resistance of the RC filter via the addition of a capacitor, CF (see Application 7)
customer interface circuit, RINTFC. The transfer function of this from the FILTER pin to ground. The buffer amplifier inside of
resistive divider is given by: the ACS714 (located after the internal resistor and FILTER pin
RINTFC connection) eliminates the attenuation caused by the resistive
VATT = VIOUT .
RF + RINTFC divider effect described in the equation for VATT. Therefore, the
ACS714 device is ideal for use in high-accuracy applications
Even if RF and RINTFC are designed to match, the two individual that cannot afford the signal attenuation associated with the use
resistance values will most likely drift by different amounts over of an external RC low-pass filter.
+5 V
Allegro ACS706
Application 6. When a low pass filter is constructed
externally to a standard Hall effect device, a resistive Voltage
Regulator
divider may exist between the filter resistor, RF, and To all subcircuits
the resistance of the customer interface circuit, RINTFC.
VIOUT Resistive Divider
This resistive divider will cause excessive attenuation, Pin 7
Dynamic Offset
Input
Cancellation
Temperature
Gain Offset CF
Coefficient
1 nF RINTFC
Trim Control
+5 V
VCC
Pin 8
Allegro ACS714
Application 7. Using the FILTER pin
provided on the ACS714 eliminates the Hall Current
Drive
attenuation effects of the resistor divider
between RF and RINTFC, shown in Appli- IP+
Pin 1 Sense Temperature
Coefficient Trim
cation 6. IP+ Buffer Amplifier
Dynamic Offset
Signal VIOUT
Recovery Pin 7
Input
IP Application
Pin 3 Interface
Sense
Trim Circuit
IP
Pin 4 0 Ampere
Offset Adjust
RINTFC
GND FILTER
Pin 5 Pin 6 CF
1 nF
4.90 0.10
8
0 8 1.27
0.65
8
1.75
0.25
0.17
1 2 1 2
1.27
0.40
For Reference Only; not for tooling use (reference MS-012AA) N = Device part number
Dimensions in millimeters P = Package Designator
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions T = Device temperature range
Exact case and lead configuration at supplier discretion within limits shown A = Amperage
L = Lot number
A Terminal #1 mark area Belly Brand = Country of Origin
B Branding scale and appearance at supplier discretion
C Reference land pattern layout (reference IPC7351
D SOIC127P600X175-8M); all pads a minimum of 0.20 mm from all
adjacent pads; adjust as necessary to meet application process
requirements and PCB layout tolerances