Proceedings of the 8th IEEE GCC Conference and Exhibition, Muscat, Oman, 1-4 February, 2015
A Grid-Connected HVDC Shunt Tap Based on
Series-Input Parallel-Output DC-AC Multi-Module
2-Level Voltage Source Converters
Ahmed Elserougi1,2,* Ahmed M. Massoud1, 3
1
Dept. of Electrical Engineering, Alexandria University, Alexandria, Egypt
2
Dept. of Electrical and Computer Engineering, Texas A&M University, Doha, Qatar
3
Dept. of Electrical Engineering, Qatar University, Doha, Qatar
*
ahmed.abbas@spiretronic.com
Abstract Tapping-off a small amount of power from an
HVDC transmission line to a three-phase local grid can be
achieved by using shunt or series HVDC taps. This paper
proposes a new grid-connected HVDC shunt tap. The proposed
tap uses series-input, parallel-output multi-module 2-level
voltage source converters (VSCs) as an alternative to the
conventional single DC-to-AC voltage source converter (VSC)
followed by a step down transformer. In the conventional
system, semiconductor devices should be connected in series, in
order to meet the high-voltage requirements in the HVDC
systems. Hence, careful design to ensure dynamic voltage
sharing between switches is necessary. The proposed technique
is not limited by this constraint, as series connection of
semiconductor switches can be avoided by employing a large
number of VSC modules. The controller of the proposed system
should keep equal DC input voltages, and equal output current
sharing. Detailed illustration for the proposed controller is
presented in this work. A Simulation study is carried out to show
the effectiveness of the proposed architecture and to validate the
proposed controller.
Index Terms Current sharing, HVDC, Multi-module, VSC,
Voltage sharing, and Tap.
I. INTRODUCTION
H IGH Voltage Direct Current (HVDC) systems enable
transmitting bulk electric power over long distances. In
point-to-point HVDC applications, tapping-off a small
amount of power from HVDC line is possible for local use
[1]. The small tapping station should satisfy the following
conditions [2]: (i) it should have a low cost, and (ii) it should
have negligible impact on the main HVDC system (effect of
fault in the tap side should not propagate to the main HVDC
circuit side, and clashes between controllers should be
avoided).
The power can be tapped from the HVDC line by using the
parallel tapped inverter [3-5] or the series tapped inverter [1-
2]. The shunt tap has to withstand the full DC voltage.
Although the shunt tap is more expensive than the series tap,
using of shunt taps is more recommended [6].
Conventionally, single DC-to-AC voltage source converter
(VSC) followed by a step down transformer can be used as a
shunt tap. In this system, the semiconductor devices should be
connected in series, in order to meet the high-voltage
requirements in the HVDC systems. Hence, careful design to
ensure dynamic voltage sharing between switches is
978-4799-8422-0/15/$31.002015 IEEE
Ayman S. Abdel-Khalik1 Shehab Ahmed2
necessary [7] to avoid the effect of mismatches between the
devices connected in the string. Moreover, a transformer with
a high basic insulation level is needed to withstand the high
induced dv/dt stresses due to converter output.
In this paper, grid-connected HVDC shunt tap system
along with its controller are presented as an alternative for the
aforementioned conventional solution. The proposed tap is
based on multi-module 2-level voltage-source converters. The
converters inputs are connected in series (i.e. input voltage
sharing), while their transformed outputs are connected in
parallel (i.e. output current sharing). The presented work is an
extension of an earlier work [8]. In [8], the tap was feeding a
constant impedance load, but in this work, the tap is feeding a
local grid. The corresponding new controller will be different
and must simultaneously guarantee the following: (i) injecting
desired amounts of active and reactive powers to the grid, (ii)
keeping equal DC input voltages, and (iii) keeping equal
output current sharing. A detailed illustration for the proposed
controller is presented to show how it will be able to handle
all of the aforementioned tasks.
A simulation model has been built for the proposed
architecture and used to verify the proposed controller.
Different case studies are carried out to show the
effectiveness of the proposed system.
II. PROPOSED GRID-CONNECTED HVDC SHUNT TAP
The proposed grid-connected HVDC shunt tap system is
shown in Fig. 1. The converters inputs are connected in
series, while their transformed outputs are connected in
parallel to feed a local three-phase grid. The controller of
proposed tap should ensure balanced input DC voltages as
well as equal output current modules. A detailed illustration
for the proposed controller will be given in the next section.
Based on Fig. 1, the total DC voltage of the HVDC line, Vdc,
is applied across, generally, n series connected 2-level VSCs,
and the DC voltages are distributed among the converters.
Ideally, the DC voltage across each converter should be Vdc/n.
Due to any mismatch in the system, the voltages may be
unequally divided between capacitors, which may add over
voltage stresses on some of the semiconductor devices. The
employed controller should ensure even distribution of the
DC input voltages across the series connected 2-level voltage
source converters irrespective of the injected grid power.
 Proceedings of the 8th IEEE GCC Conference and Exhibition, Muscat, Oman, 1-4 February, 2015
Fig. 1. Proposed grid-connected HVDC shunt tap.
The output voltages of different converters are fed to their
own step-down transformers to reduce their magnitudes to
meet the grid voltage requirements. Finally, all transformer
outputs are connected in parallel to share the output load
current, as shown in Fig. 1.
The proposed architecture provides some advantages over
the aforementioned conventional one such as: (i) avoiding
series connection of semiconductor devices, (ii) operating at
lower dv/dt, (iii) employment of set of transformers with
lower primary voltage and current ratings instead of using one
bulky high-voltage high-current transformer.
The proposed tap can be used in VSC-based HVDC as well
as line-commutated converter-based (LCC) HVDC links. In
the latter type, the power is reversed in the main circuit by
reversing the polarity of DC voltage, not by reversing the DC
current as in VSCs. Therefore, an additional H-bridge must be
used with the proposed tap in case of LCC-HVDC, as shown
in Fig. 2, to be able to operate successfully when the DC
voltage polarity is reversed.
III. PROPOSED CONTROLLER
The suggested controller for the proposed grid-connected
HVDC tap is shown in Fig. 3, which is completely
independent of the main HVDC circuit controller. The
proposed tap controller is divided into four subsections as
follows:
A. Synchronization
Synchronization section is needed to assure operating in
synchronism with the tap grid.
B. Active and reactive power controller
The active and reactive power controller is a common
block for all tap converters. Based on the grid voltage and the
desired active/reactive power to be injected into the tap grid,
the direct and quadrature components of grid current can be
extracted easily from power equations. The current
components should be fed to saturation blocks to avoid over
current condition during sag/faulty conditions. Then, the
current components are divided by the number of converters
(n) to get the reference direct and quadrature current
components for the three-phase secondary currents of each
converter.
C. Current controller
The current controller is used to control the three-phase
secondary currents of each converter to guarantee equal
output current sharing among the different transformers. The
actual direct component is compared with the reference one,
and the error is fed to a PI controller to extract the additional
voltage which should be added to the grid voltage magnitude
to get the suitable reference voltage magnitude for the
involved converter. On the other hand, the quadrature
component controller is used to extract the suitable voltage
phase for the involved converter. Based on the extracted
reference voltage magnitude/phase and with the known grid
voltage orientation (g), the three-phase reference voltages for
the involved converter can be easily generated (Vj ref).
D. DC voltage equalization controller
Generally, the input voltages equalization can be classified
into hardware and software based balancing techniques [9]. In
the first method, balancing of any two successive DC-link
capacitors can be achieved using two semiconductor switches
and an inductor connected between the mid-point of the
switches and the mid-point of the two successive capacitors
[10]. The main disadvantage of the hardware-based method
is the additional power loss due to the added switches and the
added switches cost. In this paper, a simple software-based
voltage equalization technique (DC voltage controller) is
proposed without any added hardware cost.
The proposed DC voltage controller is responsible for
maintaining the DC input voltage of the involved converter at
its desired voltage level (Vdc/n). This can be simply done by
comparing the actual DC link voltage of the involved
converter with Vdc/n, and the voltage error is fed to a PI
 Proceedings of the 8th IEEE GCC Conference and Exhibition, Muscat, Oman, 1-4 February, 2015

controller to extract a suitable correction factor (j). The constant voltage (30kV), i.e. operating under voltage control
correction factor is used to update the magnitude of converter mode. While the voltage receiving end is controlled to
reference voltages obtained from the output of the current regulate the receiving DC-link current, IR, at 1000A using a
controller [i.e. 1 ] to ensure that, the DC input simple PI controller, as shown in Fig.4.
voltage of the involved converter is within the desired level. +ve -ve
The updated reference voltages are used to generate suitable
PWM pulses as shown in Fig. 3. By applying this controller on off off on
to all employed converters, the voltage will be distributed
equally among DC link capacitors, which ensures equal active + -
+ - Tap
power contribution from converters to the tap irrespective of Tap

off on
any system mismatches. Each converter will contribute with on off
an equal share of active power.

IV. SIMULATION -ve +ve

A Matlab/Simulink simulation discrete model, with (a) (b)
sampling time of 1s, has been built for the proposed shunt Fig. 2. Employment of proposed shunt-tap with LCC-based
tap. The tap is connected to a 30kV, 30MW, LCC-HVDC HVDC links
system to feed a three-phase AC grid at 3kV peak, as shown
in Fig. 4. The sending end of the LCC- HVDC is kept at

Synchronization
Active and reactive DC voltage equalization controller
Vgd PLL
..

Gate pulses of
power controller g

converter #j
0.5
g
I*gd 1/n I*d Vdcj
+
PI j x
+ V*j x
PWM
Gen.
P*tap Vg abc/dq
Calculator I*gq I*q - + Modulating
Vdc/n
Q*tap Signals
1/n
Vgd
+ Carrier
+
I*d PI
Vj + Vj
Signal
- Vj ref
g g
Reference
Ijd Voltage
Current controller Generation
I*q +
j
Ij abc/dq PI
-
Ijq

Fig. 3. Proposed controller for one of the voltage source converters (converter #j)

IR ref
1000 A
- +
PI
r1 L1 IR L2 r2
0.1 1mH Itap 1mH 0.1
Iin1 Ig Zi
+ + V1 TR1 Vo
IS Vdc1 VSC1
-
1+j3 Grid
Iin2 I1 3 kV Peak
+ V2 TR2
Vdc2 VSC2
Vdc - VR
VS I2
Iin3
30kV + V3 TR3
Vdc3 VSC3
-
- I3

Fig. 4. Schematic diagram of the simulated system

 Proceedings of the 8th IEEE GCC Conference and Exhibition, Muscat, Oman, 1-4 February, 2015

TABLE I The simulation results are shown in Fig. 5. Fig. 5a shows

SIMULATION PARAMETERS that with transformer impedances mismatch, the DC-link
Parameter Value voltages are perfectly equalized, which means that the load
DC-link voltage 30kV power is equally shared between the converters, as depicted
Receiving DC current (IR) 1kA
Tap reference powers
by Fig. 5c. To keep these voltages equal, the PI controllers
For 0 < t <0.2s: 1.0 MW, 0.0 MVAr
For 0.2 < t <0.4s: 0.5 MW, 0.0 MVAr generate suitable correction factors (1, 2, and 3) shown in
For t > 0.4s : 0.5 MW, 0.1 MVAr Fig. 5b. The correction factors are used to obtain
VSC switching frequency 2kHz corresponding suitable AC reference voltage for each
Number of modules 3 converter to ensure equal DC-link voltages. The active and
Grid voltage Three-phase grid, 3kV peak, 50Hz reactive power injected into the grid follow their reference
Interfacing impedance 1+j3 per phase
DC-link capacitors 1000F (initial 10kV per each)
values, as shown in Fig. 5d. The corresponding grid current is
Effective series resistance=0.05 shown in Fig.5e. The current is sinusoidal with acceptable
Transformers 3phase, YY, 350kVA, 50Hz, 1:1 total harmonic distortion (less than 5%). The secondary
R () X () currents (Phase A) of different transformers are shown in Fig.
TR1 1.5 10 5f. It is clear that the currents are identical, i.e. the output
TR2 1.25 9
current is well shared, and there is no circulating current
TR3 1 10.5
Sending end voltage 30kV between transformers (with the existence of transformers
r1, r2 0.1 mismatch). The sending and receiving DC currents for the
L1 , L2 1mH main HVDC circuits are shown in Fig. 5g. The sending end
current is higher that the receiving one by the tap current.
Different transformer impedances are used in the simulation Eventually, the tap current is shown in Fig. 5h. The tap
model to emulate possible mismatches in the system current is continuous and its level is a reflection of the active
components. The system parameters are given in Table I. power demand of the grid connected to the tap AC terminal.
10000 0.1
Vdc1 V dc2 Vdc3 1 2 3
9980
0.05
DC voltages, Volt

Correction factors

9960
0
9940

-0.05
9920

9900 -0.1
0.1 0.2 0.3 0.4 0.5 0.6 0.1 0.2 0.3 0.4 0.5 0.6
time, s time, s
(a) (b)
1500
Input Power for each converter, kW

400
Converter 1 kW
350 Converter 2 kVAr
1000
Converter 3
Grid powers

300
500
250
0
200

-500
150 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
0.1 0.2 0.3 0.4 0.5 0.6
time, s
time, s
(c) (d)
Phase A
300
Secondary current per converter , A

100
Converter 1 Converter 2 Converter 3
Grid current (Phase A), A

200
50
100

0 0

-100
-50
-200

-300 -100
0.1 0.2 0.3 0.4 0.5 0.6 0.1 0.2 0.3 0.4 0.5 0.6
time, s time, s
(e) (f)
 Proceedings of the 8th IEEE GCC Conference and Exhibition, Muscat, Oman, 1-4 February, 2015

1200 60
Currents of main HVDC circuit, A

Sending
1100 Receiving
40

Tap current, A
1000
20
900

0
800

700 -20
0 0.1 0.2 0.3 0.4 0.5 0.6 0.1 0.2 0.3 0.4 0.5 0.6
time, s time, s
(g) (h)
Fig. 5 Simulation results versus time (a) DC voltages, (b) factors before DC voltage equalizing deactivation, (c) converters input DC powers, (d) active and
reactive power injected to the grid, (e) grid current , (f) phase A secondary current of each converter, (g) main HVDC circuit currents, and (h) tap DC input
current.

To show the effectiveness of the proposed DC voltage
equalization controller, the effect of its deactivation at t=0.3s
on the DC input voltages is shown in Fig. 6, assuming that the
injected active power to the grid is 0.5 MW at unity power
factor (it has to be noted that, the deactivation is done by
forcing all correction factors to be equal zero, i.e.
1=2=3=0).
Based on Fig. 6, the DC voltages start in diverting after
deactivating the equalizing technique, i.e. some of DC voltage
will be higher. As the result, some of semiconductor devices
will suffer a high over voltage (electrical stresses).
9980 Vdc1
9975
DC voltages, Volt
ACKNOWLEDGEMENTS
This publication was made possible by NPRP grant (NPRP 4-
250-2-080) from the Qatar National Research Fund (a
member of Qatar Foundation). The statements made herein
are solely the responsibility of the authors.
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9955
9950
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V. CONCLUSION
This paper presents a DC-AC multi-module based grid-
connected HVDC shunt-tap. The proposed architecture
consists of series-input, parallel-output 2-level voltage source
converters. The proposed system provides some advantages
such as: (i) avoiding series connection of semiconductor
devices, (ii) operating with lower dv/dt, and (iii) employment
of transformers with relatively low voltage and current ratings
(the voltage is shared at the input of the tap, and the current is
shared at the output of the tap). A simulation study for the
proposed system has been carried out to investigate its
validity. The simulation results show that the employed
controller ensure equal power sharing (i.e. equal DC input
voltages) as well as equal load current sharing between the
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