Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

(Experiment 3)

Electronics Lab
Advanced Electrical Engineering Lab Course II
Spring 2006

Operational Amplifiers
Instructor: H. Elgala, Dr. D. Knipp

The experiment has been carried out by

Date:

Group number:

Ta

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

Lab Guidelines

Safety
Read the safety instructions before attending the lab.
Attendance
Absence of a group member will be accepted only after providing a medical
certificate.
Preparations
Each group has to be prepared before attending the lab. All group members
have to be familiar with the subject, the objectives of the experiment and have to
be able to answer questions related to the experiment handout and prelab.
If a member of the group or the whole group is not prepared, the student or the
group will be excluded from the lab for this specific experiment.
The prelab has to be prepared in a written form by the group and has to be
presented in before attending the Lab.
Supplies
All equipment, cabling and component you need should be in your work area. If
you can’t find it, ask your lab instructor or teaching assistant, don’t take it from
another group. Before leaving the lab, put everything back, where you found it!
Please bring your notebook so that you can readout the oscilloscope via the
RS232 interface.
Prelab and Lab Report
A lab report has to be prepared after each lab. The lab report has to be written
in such a form that the instructors and the teaching assistants can follow it. The
lab report includes the experimental data taken during the lab, the analysis of
the data, a discussion of the results and answer of all questions. You should
also include your PSpice netlists/schematics and all required plots, sketches
and hardcopies. All group members are in charge of preparing and finalizing the
Lab report. Please divide the workload amongst the group members.
The lab report and the prelab have be submitted one week after the experiment.
This is a hard deadline. If you miss the deadline, the experiment will be
downgraded by 10% (1 point) each day (excluding the weekends).
Grading
Each experiment will count for 10% of the overall grade. All members of a group
will get the same grade for an experiment (prelab + lab report).
The final exam will count for 30% of the overall grade. The final exam will be
graded on an individual bases. You have to get at least 50% in the final exam in
order to pass the lab course.

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

3rd edition (February 2006)

The handout “Operational Amplifiers” is part of the Electronics Lab, Advanced

Electrical Engineering Lab Course II. The lab course is mandatory for all 2nd
year Electrical Engineering and Computer Science students at the International
University Bremen.

Do not hesitate to contact the instructors of the course to make suggestions and
provide feedback on how the experiment can be improved.

Bremen, February 2006

H. Elgala and D. Knipp

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

Objectives of the Experiment

The objective of experiment 3 of the Electronics Lab (Advanced Electrical
Engineering Lab Course II) is to become familiar with the basic operation of
differential amplifiers and operational amplifiers.
In the following, differential amplifier will be introduced and the device
characteristics will be examined. The different modes of the input signals will be
introduced. Furthermore, the performance of differential amplifiers will be
analyzed in respect to mode of operation and noise suppression.
Operational amplifier (Op-Amp) parameters like the input bias current, offset
voltage, slew rate and bandwidth will be explained and examined. Finally, a
number of applications for the operational amplifier as an inverting amplifier, a
non-inverting amplifier, an adder and an integrator will be investigated.
Introduction
The differential amplifiers have several advantages over single-stage amplifiers
based on bipolar junction transistors (BJTs).
In order to amplify ac signals single-stage amplifiers require ac coupling
capacitors on the input and output side (to insure stable biasing point). As a
consequence the low-end frequency response is reduce and the amplifier
becomes unusable as a dc amplifier.
Another limiting factor is the trade-off between gain and bias stability with
variations in operating temperature (e.g. the added emitter resistor RE to insure
the bias stability against temperature increases the input resistance but reduces
the gain).
In contrast, the differential amplifier solves many of these problems. The main
characteristics that make differential amplifiers so useful are their large gain,
ability to reject noise and the fact that they amplify the difference between two
signals. For these reasons, the differential amplifier is used in most of the
analog (discrete and integrated) circuits. Also, the dc coupled differential
amplifier design eliminates large coupling capacitors used in single-stage
amplifier configuration.
The Op-Amp is one of the most widely used components in analog electronics.
Every Op-Amp has a differential amplifier as its core. Although the Op-Amp’s
basic characteristics are simple, it can be used for a wide range of functions by
adding external components.
Theoretical Background
The Differential Amplifier Circuit
The differential amplifier can be implemented using bipolar junction transistors
(BJTs) or metal oxide semiconductor field effect transistor (MOSFETs). The
basic differential amplifier circuit using BJTs is shown in figure 3.1. The circuit
consists of two common-emitter amplifiers sharing an emitter resistor. The
symbol of the differential amplifier (Fig. 3.2) shows that it is a two-input / two-
output device. The two inputs are the base terminal of transistors Q1 and Q2 and
the two outputs are taken from the collector terminals of the transistors.

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

1 _ 1
Q1 Q2
Inputs Outputs
2 + 2

Fig. 3.1: Basic Differential Amplifier Fig. 3.2: Circuit symbol

Differential Amplifier Operation

In the following, the operation of differential amplifiers will be discussed based
on the BJT differential amplifier shown in figure 3.1. Initially, we must ensure
that Q1 and Q2 are in the active mode of operation (forward-biased base-emitter
junction and reverse biased base-collector junction). So, when designing our
amplifier, we must make sure that our transistors are not in saturation. Usually
RC and IC are chosen so that the collector potential of the two transistors is
VC≈VCC/2 to allow for the maximum required output voltage swing.
When inputs of the differential amplifier are grounded (Vi1=Vi2=0V), the emitters
of the two BJTs are applied to a potential of -0.7V (VE ≈ -0.7V). It is assumed
that the transistors are identically matched by careful process control during
manufacturing so that their dc emitter currents are the same when there is no
input signal. Thus,
IE1 = IE2 (3.1)
Since both emitter currents flow through Re
IE1=IE2=IRe/2 (3.2)
Where,
IRe = (VE - VEE)/Re (3.3)
Since IC ≈ IE,
IC1 = IC2 ≈ IRe/2 (3.4)
Since both collector currents and both collector resistors are equal (when the
input voltage is zero)
VC1 = VC2 = VCC - IC1Rc1 = VCC - IC2Rc2 (3.5)
When a positive bias voltage is applied to input Vi1 while input Vi2 is still
grounded, the positive voltage on the base of Q1 increases IC1 and raises the
emitter voltage. This action reduces the forward bias VBE of Q2 because its base

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

is grounded, thus causing IC2 to decrease. The net result is that the increase in
IC1 causes a decrease in VC1, and the decrease in IC2 causes an increase in
VC2.
If the positive bias voltage is applied to input Vi2 instead of input Vi1 while input
Vi1 is grounded, the result is that the increase in IC2 causes a decrease in VC2,
and the decrease in IC1 causes an increase in VC1.
Note: Symmetry is an important aspect of the differential amplifier design.
Differences between the transistors or between the other components of the
differential leads to incorrect output signals.
Differential Amplifier Output Signals
There are two possibilities for taking the output of the differential amplifier.
A. Single-Ended Output
In this case, the output is measured between one of the output terminals
(either Vo1 or Vo2) and the ground. This is the most common case.

Vo = Vo1 or Vo = Vo2 (3.6)

B. Differential Output
In this case, the output is measured between the two output terminals
Vo1 and Vo2.

Vo = Vo2 - Vo1 (3.7)

Differential Amplifier Modes of Operation

The mode of operation of the differential amplifier can be distinguished in terms
of the input signal.
A. Single-Ended Input:
In this mode, one input is grounded and the signal voltage is applied only to the
other input.
B. Differential Input:
In this mode, two signals of opposite polarity (out of phase) are applied to the
inputs.
C. Common-mode Input:
In this mode, two signals of the same phase, frequency and amplitude are
applied to the two inputs.
Common-mode signals generally are the result of noise. The noise can be
picked-up by radiated energy on the input lines, from the adjacent lines, or the
50HZ power line, or other sources. Those unwanted signals appear with the
same polarity on both input lines (Common-Mode Input). Desired signals
appear on only one input (Single-Ended Input) or with opposite polarities on
both input lines (Differential Input).

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

Ideally, differential amplifiers provide a very high gain for desired signals, and
zero gain for common-mode signals (the output signal for common-mode input
should be zero). However this is not the case. Practical differential amplifiers
exhibit a very small common mode gain (less than 1), while providing a high
differential voltage gain (several thousands).
Common-Mode Rejection Ratio (CMRR)
The ratio of the differential voltage gain Avdiff = Vod/Vid to the common mode gain
Avcm=Voc/Vic is called the Common-Mode Rejection Ratio (CMRR), which
provides a convenient measure of a differential amplifiers performance in
rejecting unwanted common-mode signals (unwanted signals will not appear on
the outputs to distort the desired signal). The higher the CMRR, the better the
performance of the differential amplifier.
CMRR = Avdiff / Avcm = (Re / re) (for Re >> re) (3.8)
The CMRR is often expressed in decibels (dB) as
CMRR = 20 log (Avdiff / Avcm) = 20 log (Re / re) dB (for Re >> re) (3.9)
Where,
Vid = differential input voltage = Vi1-Vi2
Vic = common-mode input voltage =(Vi1+Vi2)/2
Vod = differential output voltage
Voc = common-mode output voltage
Vi1 and Vi2 are expressed in terms of Vid and Vic by
Vi1 = Vic + (Vid/2) & Vi2 = Vic - (Vid/2)
re is the small-signal input resistance between the base terminal and the emitter
terminal, looking into the emitter.
For example, a CMRR of 10,000 means that the desired input signal
(differential) is amplified 10,000 times more than the unwanted noise (common-
mode). So, if the amplitudes of the differential input signal and the common-
mode noise are equal, the desired signal will appear on the out side 10,000
times large in amplitude than the noise. Thus, the noise on the output side has
been drastically reduced.
Differential Amplifier Improvement
As seen from the calculation for the CMRR, a large value of Re is desirable to
increase the amplification quality of a differential amplifier. Another way to
increase the CMRR is to replace Re by a constant current source.
By definition, an ideal current source has an infinite output resistance
(∆v/∆i = ∆v/0 = ∞). Replacing Re with a current source as shown in figure 3.3
would greatly improve the differential amplifier's performance. A simple current
source consists of an npn BJT and a biasing scheme similar to the common-
emitter amplifier. The resistance Re is chosen for the specified biasing current
and insures that the transistor Q3 stays in the active mode of operation.
The large effective impedance of the current source when used in the emitter
circuit of the differential input amplifier stage substantially reduces the common
mode gain and thus increases the common mode rejection ratio (CMRR).

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

Q1 Q2

Q3

Fig. 3.3: Differential Amplifier using a transistor current source

Op-Amp Building Blocks

We are now moving from the differential amplifier to the operational amplifier.
Figure 3.4 shows the building blocks of an Op-Amp. The Op-Amp has three
stages. The first stage is a differential input differential output amplifier. The
differential outputs of the first stage are fed into a differential input single-ended
output differential amplifier. The output of the second stage drives an emitter
follower to achieve low output impedance. The first stage serves to increase the
input impedance. The first and second stages provide a high voltage gain. All
stages are biased through current sources.
+
Vin
Vout
Vin
- Diff-Amp Diff-Amp Emitter
Follower

Current Sources

Fig. 3.4: Op-Amp building blocks

Op-Amp Symbol and Terminals

The circuit symbol of an Op-Amp is shown in figure 3.5. The Op-Amp usually
has five connections: two for the power supply (Vs+ and Vs-) which are often not
shown in circuit diagrams for simplicity, an inverting input (Vin-), a non-inverting
input (Vin+) and an output (Vout).
An Op-Amp is basically a differential amplifier that amplifies the voltage
difference at its two inputs. The Op-Amp, therefore like differential amplifiers,
has two inputs marked (-) and (+). The (-) terminal is the inverting input. A signal
applied to the (-) terminal will be shifted in phase by 180o at the output. The (+)

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

input is the non-inverting input. A signal applied to the (+) terminal will appear in
phase with the input signal.

Fig. 3.5: Operational amplifier symbol

Op-Amp Applications
A. Inverting and Non-Inverting Amplifier
Figure 3.6 shows a basic Op-Amp circuit, including a negative feedback loop.
Note that the output is fed back to the inverting input terminal in order to provide
negative feedback for the amplifier. The input signal is applied to the inverting
input. As a result, the output signal will be out of phase by 180o (inverted signal).
Such an amplifier is called an inverting amplifier. If we assume the Op-Amp to
be ideal, the output of the amplifier is given by the equation
RF
Vout = − Vin (3.10)
RR
Note: The minus sign indicates that the sign of the output is inverted as
compared to the input.
Thus the gain of this inverting amplifier is given by
Vout R F
Gain = = (3.11)
Vin R R

Fig. 3.6: Negative feed loop for inverting amplifier.

It is possible to operate Op-Amps as non-inverting amplifiers by applying the
signal to the non-inverting (+) input, as shown in figure 3.7. Note that the
feedback is still connected to the inverting input. If we assume the Op-Amp to be
ideal, the output voltage for a non-inverting amplifier is given by

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

R 
Vout =  F + 1Vin (3.12)
 RR 

and the corresponding gain is

Vout R F
Gain = = +1 (3.13)
Vin R R

Fig. 3.7: Non-inverting amplifier

In this case, the input and the output are in phase.

B. Adder and Subtractor
By adding additional input resistors to the basic inverting circuit in Figure 3.6, we
can realize an adder as shown in Figure 3.8. If we assume the Op-Amp to be
again ideal, the output voltage is given by

V1 V2 V3
Vout = −R F ( + + ) (3.14)
R1 R 2 R 3

If R 1 = R 2 = R 3 = R F

Vout = −(V1 + V2 + V3 ) (3.15)

Fig. 3.8: Adder Amplifier

A useful feature of this circuit is that there is no interaction between inputs.

Therefore, the different inputs of the adder do not affect each other. This is
possible due to the virtual ground at the summing connection (check the
practical hints for more information regarding the virtual ground).

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

A subtractor circuit is shown in figure 3.9 .The output signal can be calculated by
RF R
Vout = − V1 + F V2 (3.16)
R1 R2

Fig. 3.9: Adder/Subtractor Amplifier Configuration

C. Integrator and Differentiator

Integrators are widely used in practice because their frequency response has
low-pass characteristics. Therefore, integrators can be used as filters, which
filter out the high frequency components of a signal (e.g. noise).
Figure 3.10 shows the Op-Amp configuration of an Integrator. Assuming that the
capacitor is uncharged at t = 0, the output voltage of the integrator is given by
t
1
RC ∫0
Vout ( t ) = − Vin ( t )dt (3.17)

Fig. 3.10: Integrator Amplifier Configuration

Integrators have the disadvantage that dc component of the input voltage are
integrated as well. If the input voltage has a non-zero average value (dc term),
the output signal of the integrator becomes a linear ramp, which over time will
saturate the Op-Amp. The same is true for small dc voltages and currents
present at the inputs of the Op-Amp (known as input offset voltages and
currents). The dc signals will get integrated and they could over time saturate
the Op-Amp.
By reversing the resistor and the capacitor the integrator, we have a
differentiator as shown in figure 3.11. The output voltage is given by

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

dVin ( t )
Vout ( t ) = −RC (3.18)
dt

Fig. 3.11: Differentiator Amplifier Configuration

Differentiators have high-pass filter characteristics and may have excessive gain
at high frequencies where noise may be present. For this reason modifications
may by used to roll-off the gain beyond the corner frequency.

References

1. Floyd, Electronics Fundamentals, Prentice-Hall, Fifth edition, 2001.

2. Sedra / Smith, Microelectronic Circuits, Saunders College Publishing (1991),
Third edition.
3. P. Horowitz, W. Hill, The Art of Electronics, Cambridge University Press
(1989).

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

Practical Background
741 Op-Amp Identification
The LM741 operational amplifier in an 8-pin dual inline package (DIP) is shown
in figure 3.12.

Fig. 3.12: 741 Op-Amp 8-pin DIP package Fig. 3.13: 741 Op-Amp pins numbering
If you look closely at the package, you will find a notch at one end or a dot in
one corner. This tells us how to find Pin 1: the dot is located next to Pin 1 and
the notch is located between Pins 1 and 8. The rest of the pins are numbered as
shown in figure 3.13.
Pin 1(Offset Null): Used to control the offset voltage so as to minimize offset.
Pin 2(Inverted Input): All input signals at this pin will be inverted at output pin 6.
Pin 3 (Non-Inverted Input): All input signals at this pin will be processed
without inversion at output pin 6.
Pin 4 (-V): The V- pin is the negative supply voltage terminal.
Pin 5 (Offset Null): Used to control the offset voltage so as to minimize offset.
Pin 6 (Output): Output pin.
Pin 7 (posV): The V+ pin is the positive supply voltage terminal.
Pin 8 (N/C): The 'N/C' stands for 'Not Connected'. Nothing is connected to this
pin; it is just to make a standard 8-pin package.
Op-Amp Characteristics
The ideal Op-Amp has infinite voltage gain, infinite bandwidth, infinite input
impedance and zero output impedance. The practical Op-Amp has voltage and
current limitations. Peak-to-peak output voltage, for example, is usually limited
to slightly less than the two supply voltages. Output current is also limited by
internal restrictions such as power dissipation and component ratings.
Therefore, the practical Op-Amp characteristics are high voltage gain, wide
bandwidth, high input impedance and low output impedance.
A. Input Bias Current
In order to determine the input bias current of an Op-Amp, the inputs (inverting
and non-inverting) are grounded through equal resistances RB (Fig. 3.14). The
input current flowing into the two bases may not be the same. The slightly
unequal base currents flowing through the external resistance produce small
differential input voltage; this represents a false input signal. When amplified,

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

this small input produces the offset in the output voltage. The input bias current
shown on data sheets is the average of the two input currents. It corresponds
approximately to the values of the currents into the two bases. The smaller the
input bias current, the smaller the possible unbalance.

Fig 3.14: Input bias current

B. Input offset Voltage

Ideally, the Op-Amp output is 0V if the voltage between the inverting and non-
inverting inputs is 0V. In reality, the output voltage has a small dc voltage offset
when no differential input is applied. This output voltage is caused by internal
mismatches (between the base-emitter voltages of the differential input stage,
which causes a small difference in the collector currents that results in a
nonzero value of the output voltage), tolerances and so on. In other words, even
if the inverting and non-inverting input are shorted to eliminate the effect of input
bias, as shown in figure 3.15, the output may have a slight offset. Therefore, the
input offset voltage can be defined as the differential dc voltage required
between the inputs to force the differential output to zero volts. Typical values of
input offset voltage are in the range of 2 mV or less.

Fig. 3.15: Output offset

C. Slew Rate
Slew rate is one of most important characteristics of an Op-Amp as it places a
severe limit on large-signal operation. It is defined as the maximum rate of
change of the output voltage in response to a step input voltage. The LM741
Op-Amp, for instance, has a typical slew rate of 0.5 V/µs. This is the ultimate
speed of a typical LM741; its output voltage cannot change faster than that. If
we drive a LM741 with a large step input, the output slew (rises linearly) as
shown in figure 3.16. A certain time interval (20 µs) is required for the output to
change from 0 to 10 volts.

Fig. 3.16: Overdrive produces slew-rate limiting

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Electronics Lab, Advanced Electrical Engineering Lab course II, Spring 2006, International University Bremen

D. Bandwidth
The slew rate distortion of a sine wave starts at the point where the initial slope
of the sine wave equals the slew rate of the Op-Amp. The maximum frequency
at which the Op-Amp can be operated without distortion is
SR
f max = (3.19)
2πVP

Where, f max : Highest undistorted frequency,

SR : Slew rate of Op-Amp, and
VP : Peak voltage of the output sine wave.
Circuit Analysis
In practice, there are assumptions for analysis and design of Op-Amp circuits
where the Op-Amp can be considered to be ideal. These are:
+ - + -
1. The current flowing into the Vin and Vin inputs is negligible (Iin = Iin = 0).
+ -
The currents Iin and Iin are the input currents of the Op-Amp.
2. The open loop gain of the amplifier is assumed to be A = ∞. The open loop
gain (the output to input voltage ratio of the Op-Amp without external
feedback) is very large, and is effectively infinity.
3. For the inverting closed loop configuration, as the open loop gain (A)
- + + - +
approaches infinity, the voltage V approaches V (V ≈ V ). As V is
+ -
connected to ground; thus V =0 and V ≈ 0.That is why this situation is
called the virtual ground.

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Prelab
Problem 1:
1.1 Using PSpice, determine the dc quiescent values for VBE, VC , IC , IE and
IRe for the differential amplifier shown in figure 3.1, where
RC1=RC2=Re=1KΩ, Vcc=+9V and Vee =-9V.
1.2 Perform a transient analysis for two periods of the input waveform to
measure the differential mode and common mode behavior.
1.3 Repeat step 1.2 for the differential amplifier shown in figure 3.3, where
RC1=RC2=Re=1KΩ, Rb1=Rb2=10KΩ, Vcc=+9V and Vee =-9V.
1.4 Is the current source perfectly designed to make the biasing current
identical to the first case with the fixed emitter resistor? Explain.
Problem 2:
Determine the following LM741C Op-Amp specifications from the datasheet:
Input Offset Voltage, Input Bias Current, Input Offset Current, Slew Rate
Problem 3:
3.1 Design a non-Inverting amplifier that has the following specifications:
VS+=+10V, VS-=-10V and Voltage Gain (Av) = 8.Show all general equations
and design steps.
3.2 Using PSpice, simulate the result of your design using an input of 1V
amplitude, 1KHz sinusoidal wave.
3.3 Repeat for 3V amplitude. Comment on the output signal.
3.4 Plot the gain as a function of frequency.
Problem 4:
Using PSpice, determine the voltage gain of the circuit shown in figure 3.17
using a µA741 Op-Amp.

Fig. 3.17: Gain calculation

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