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Abstract: This paper proposes a new on-line fault detection Venturini (AV) [11] and two-stage Space Vector Modulation
method to detect open-switch faults in a Matrix Converter (SVM). Although the proposed method in [8] is independent
(MC). The proposed fault detection method is based on a two- of modulation strategy, it requires accurate measurement of
step algorithm. The first step identifies the occurrence of the the currents at a very high sampling rate.
fault by monitoring the measured load currents. The second This paper proposes a fast and general current-based sensing
step locates the faulty switch by measuring the response of fault diagnosis method to locate an open-switch fault in an MC
the MC to a set of predefined switching states. The proposed independent of the modulation strategy. Upon the detection
method allows fast detection and isolation of a faulty switch, of a fault in an MC, a remedial action needs to be taken
independent of the modulation strategy, the voltage transfer to maintain the system operation as close as possible to
ratio, or the output frequency, and without any requirement of normal either by the modification and reconfiguration of the
additional voltage sensors. The paper also presents a Model converter topology or by adopting a dierent control strategy.
Predictive Control (MPC)-based post-fault strategy that en- Most of the existing reconfiguration methods are based on
ables the MC to continue its operation during faulty conditions. adding auxiliary devices to the converter topology which add
Time-domain simulation studies are performed in the MAT- to the system cost, complexity, and volume and may not be
LAB/SIMULINK environment to evaluate the performance of applicable when the source/load neutral point is not accessible
the proposed fault detection method and the eectiveness of [10], [12][14]. The alternative post-fault strategies use the
the MPC as a post-fault control strategy. remaining eight (out of nine) healthy switches to operate the
MC with a modified AV or a SVM switching strategy and to
I. Introduction maintain balanced and sinusoidal load currents [6], [15].
A direct Matrix Converter (MC) is a promising topology This paper proposes a Model Predictive Control (MPC)-
for AC-AC conversion applications and as a replacement for based post-fault strategy to operate the MC subsequent to an
the conventional AC-DC-AC converter. Due to the absence of open-switch fault. An MPC strategy is a promising control
the storage element/electrolytic capacitor, an MC provides a strategy to control power-electronic converter systems due to
more compact design with reduced weight/volume [1]. its fast dynamic response, flexibility to include constrains and
One of the main technical challenges in the development nonlinearities of the system, and ease in digital implementation
of the MC is to improve its reliability and fault-tolerant [16][18]. This paper takes the advantages of the features
capability. In the technical literature, fault diagnosis and of an MPC strategy and develops a discrete-time predictive
reliable operation of the MC, specifically for open-switch model of an MC system. Based on the developed model, an
failures, have been investigated and various algorithms and MPC strategy is proposed which provides promising post-
remedial measures have been proposed [2][9]. The existing fault operation of an MC. Performance of the proposed fault
fault detection methods are mainly based on sensing either detection method and the post-fault strategy for a 3x3 MC
the load voltages or the load currents [2][5], [10]. Voltage- is evaluated based on time-domain simulation studies in the
based sensing methods are reliable in identifying an open- MATLAB/SIMULINK software environment.
switch faults. However, their main drawback is the installation
of additional hardware besides the ones already installed II. Matrix Converter System
for control purposes, i.e., voltage transducers on the load-
side, which adds to the system cost. Current-based sensing The MC system of Fig. 1 consists of nine bi-directional
methods provide a more cost-eective solution as they rely switches, an input filter, and a clamp circuit. The input filter
on the existing current transducers on the load-side and do is designed to attenuate the switching frequency harmonics of
not need any extra hardware. Among the proposed current- the grid current. The clamp circuit protects the MC circuit and
based sensing fault detection methods, the methods in [6], [7] switching devices against high voltage and current stresses.
are developed for a specific modulation strategy, i.e., Alesina The bi-directional switches of the MC system can be realized
by series connection of two IGBTs with their parallel diodes, A will be equal to viq vclamp where q {a, b, c} and q is
as shown in Fig. 1. determined based on the circuit operating conditions.
The input and output voltages of the MC of Fig. 1 under The input and output voltages of the MC of Fig. 1, when
normal operating conditions are correlated by the following the switch S Aa is faulty, are correlated as:
equation:
vA 0 mAb mAc via
vA S Aa S Ab S Ac via vB = mBa mBb mBc vib
vB = S Ba S Bb S Bc vib (1) vC mCa mCb mCc vic
vC S Ca S Cb S Cc vic mAa 0 0 viq vclamp
+ 0 0 0 0 (4)
Assuming that the switching frequency of the converter is
much higher than the input and output frequencies, an average 0 0 0 0
model of the MC is expressed by As equation (4) shows, under faulty conditions, the output
voltages of the MC system are no longer the same as their
vA mAa mAb mAc via
vB = mBa mBb mBc vib
desired/expected values.
(2)
vC mCa mCb mCc vic III. Fault Detection
m pq for p {A, B, C}, q {a, b, c}, represents the duty ratio of Based on the discussion in the previous section, under faulty
the switch S pq and is conditions the load currents are not equal to their reference
t pq values and the current flowing through the clamp capacitor
m pq = (3) is equal to the current of the faulty phase. Furthermore,
Ts
under healthy operating conditions, no energy is transferred
where t pq is the on-duration time of the switch S pq within the to the clamp circuit. Based on these observations, this section
switching period T s . proposes a fault detection algorithm which follows a two-
To obtain the relationship between the input and output step approach to identify the fault. The first step detects the
voltages of the MC during an open-circuit fault condition, occurrence of the fault in MC system and the second step
consider a case when the MC is feeding an inductive load and locates the faulty switch.
an open-circuit fault happens in the switch S Aa . Under this
condition, the path of the non-zero inductive load current in A. Step 1: Detection of Fault
phase A, i.e., iA , when the faulty switch S Aa is switched on, is The proposed fault detection method monitors the three-
highlighted in Fig. 1. As shown in Fig. 1, under the described phase load currents and evaluates the percentage of the error
faulty condition, the current flowing through the clamp circuit between the measured values and their reference values. A
capacitor iclamp is equal to iA . The voltage at the output phase fault is detected when the percentage of the error is greater
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Fig. 3. Flowchart of the proposed algorithm to identify a faulty switch.
Fig. 2. Flowchart of the proposed fault detection algorithm.
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TABLE I TABLE II
The FDSs for various fault coefficient combinations Simulation parameters
Fault coecients FDS for FDS for FDS for Parameter Value
Group1 Group2 Group3 Vin 120V
fA = 1, fB = 1 baa abb acc fin 60Hz
fB = 1, fC = 1 aba bab cac fsw 10KHz
fC = 1, fA = 1 aab bba cca Lf 1mH
Cf 4.7F
Rd 15
Cclamp 100F
S Aa , otherwise, S Ba is faulty. With a similar procedure and by RL 14
LL 43mH
using the zero switching states bbb and ccc, a faulty switch
in Group2 and Group3 is identified. The corresponding FDSs
used for locating the faulty switch in Group2 and Group3 are between predicted current and the reference current, a cost
listed in Table I. The procedure to implement the proposed function associated with the current error is defined as
identification strategy is summarized in the diagram of Fig. 3. g = iq,re f iq (k + 1) + id,re f id (k + 1) (11)
where iq (k + 1) and id (k + 1) are the predicted values of the q
IV. An MPC-Based Post-Fault Strategy and d components of current and are calculated based on (10).
The switching state which provide the minimum value for the
Under normal operating conditions, an MC has 27 permitted cost function g is the optimum switching state and applied to
switching states. With a faulty switch, the number of permitted the MC in next switching cycle.
switching states is reduced to 18. For example, if switch
S Aa is faulty, the switching state abc is no longer permitted. V. Performance Evaluation
The objective of a post-fault strategy is to regulate the load This section evaluates performance and eectiveness of
currents at their reference values with the remaining 18 avail- the proposed fault detection method and also the post-fault
able switching states under an open-fault switch condition. control strategy, based on time-domain simulations in the
Therefore, assuming a sampling period of T s , the discrete- MATLAB/SIMULINK environment. The parameters of the
time model of the MC load-side current, with an Euler simulated system of Fig. 1 are listed in Table II.
approximation of the current derivative, is deduced as
A. Fault Detection
This section evaluates the performance of the proposed
iq (k + 1) iA (k)
R T
fault detection method in terms of the required time taken
)A T s B K iB (k)
l s
id (k + 1) = (1 to identify fault. As mentioned before, the proposed fault
Ll
i0 (k + 1) iC (k)
detection method is independent of the modulation strategy.
via (k) However, the required time to detect the fault depends on
Ts
+ S K vib (k) (10) the modulation strategy, operating condition and sampling
Ll
vic (k) rate. Table III provides a quantitative comparison between
where the required time to detect the fault for the SVM and AV
modulation strategies, for three operating conditions and with
1 0 0 0 1 0 a sampling rate of 100s.
A = 0 1 0 , B = 1 0 0 , The next case study is to evaluate the performance of the
0 0 1 0 0 0 fault detection algorithm during system transients. The MC
S Aa S Ab S Ac system is operating in a steady state condition with iqre f = 7A
S = S Ba S Bb S Bc , and idre f = 0A. At t = 0.1s, iqre f is stepped down from 7A to
S Ca S Cb S Cc 3A and no fault is imposed on the MC system. Fig. 4 shows
the response of the system to step change. Based on Fig. 4(d),
cos() cos( 2
3 ) cos( 4
3 )
K = sin() sin( 2
3 ) sin( 4
3 ) ,
subsequent to step change in iqre f , the error coecients Error1
and Error2 exceed the threshold value of 10%. However, the
1 1 1
the filtered clamp current iclamp, f remains at zero. Therefore,
and no fault is detected in the system and the fault detection signal
stays at zero as shown in Fig. 4(f).
= o dt
B. Identification of the Open Circuit Switch
Matrix S represents the permitted switching state matrix. The In this section, capability of the proposed fault location
element S i j in matrix S, for i {A, B, C}, j {a, b, c} is equal method described in Section III is evaluated. Two dierent
to one if, the corresponding switch is on, otherwise, it is zero. test cases are considered to illustrate the eectiveness of the
To achieve reference current tracking and to reduce the error proposed fault location method.
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TABLE III
Fault detection time measurement for SVM and AV strategies
8
0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14
(a) 8 i i i
A B C
(A)
10
ABC
i i 0
iqref & iq (A)
i
5 8
0.067045 0.06705 0.067055 0.06706 0.067065
0
0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14
(a)
4
(b)
(A)
2
clamp
4
idref id
&i (A)
i
2
d
2
(c)
1
6
0
(A)
4
clamp,f
2
0.067045 0.06705 0.067055 0.06706 0.067065
0
i
(c)
0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14
Time(s)
(d) Fig. 5. Response of the MC system of Fig. 1 to a faulty switch in Group1:
200 (a) three-phase load currents, (b) clamp circuit current, and (c) Fault Locate
2
Error & Error
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10 Normal Operation Fault Tolerant Operation iA iB iC
(A)
iA iB iC
(A)
8 0
ABC
Zero State Zero State Zero State FDS State
ABC
i
0 aaa bbb ccc cca 10 Fault Detection
i
iclamp(A)
4
(A)
2
clamp
0
0
i
10 1
5 0
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