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Lecture 04
Instructor: Dr. Khurram Bhatti
Assistant Professor
khurram.bhatti@itu.edu.pk
Dr. M. Khurram Bhatti Embedded Systems, Fall 2017, ITU, Lahore www.itu.edu.pk
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Real-time Embedded Systems
Resource
o A resource is any software structure or hardware that can be used
by a process (task) to advance its execution
o Typical Resource: A data structure, A set of variables, A main
memory area, A file, A set of registers of a peripheral device
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Real-time Embedded Systems
Resource
Critical Sections
Any task that needs to enter a critical section must wait until no
other task is holding the resource Mutual Exclusion!
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Real-time Embedded Systems
Resource Access Protocols
o When concurrent tasks use shared resources in
exclusive mode, blocking issues appear!
o Such protocols are designed
o To avoid blocking
o Bound the maximum blocking time of each task.
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Real-time Embedded Systems
Resource Access Protocols
Priority Inversion: Example
Critical Critical
Section Section
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Real-time Embedded Systems
Resource Access Protocols
Priority Inversion: Example
The maximum blocking time that T1 may experience is equal to
the time needed by T2 to execute its critical section
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Real-time Embedded Systems
Resource Access Protocols
Priority Inversion: Example
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Real-time Embedded Systems
Resource Access Protocols
(Un-controlled) Priority Inversion is a Problem!!
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Real-time Embedded Systems
Resource Access Protocols
Non-Preemptive Protocol (NPP)
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Real-time Embedded Systems
Resource Access Protocols
Non-Preemptive Protocol (NPP)
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Real-time Embedded Systems
Resource Access Protocols
Non-Preemptive Protocol (NPP)
Pros:
No preemption => No intermediate priority tasks can
run
Useful for short critical sections
Cons :
All tasks are waiting (even those who are not
sharing the protected resource)
21 Dr. M. Khurram Bhatti Embedded Systems, Fall 2017, ITU, Lahore
Possible deadlocks!
Simple inheritance (of higher priority level) is not able to solve the
deadlock situation
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Real-time Embedded Systems
Resource Access Protocols
Multiple Resource Sharing Deadlock situation
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Real-time Embedded Systems
Resource Access Protocols
Priority Ceiling based protocols
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Real-time Embedded Systems
Resource Access Protocols
Highest Lock/Immediate Ceiling Priority Protocol
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Real-time Embedded Systems
Resource Access Protocols
Highest Lock/Immediate Ceiling Priority Protocol (ICPP)
Exercise: determine Ceilings and draw schedule with
Highest Lock priorities
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Real-time Embedded Systems
Resource Access Protocols
Highest Lock/Immediate Ceiling Priority Protocol (ICPP)
Limitation
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Real-time Embedded Systems
Resource Access Protocols
Priority Ceiling Protocol (PCP) How?
If task Ti is unable to enter its critical section for this reason, the task
that holds the lock on the semaphore with the highest priority ceiling is
said to be blocking Ti and hence inherits the priority of Ti.
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Real-time Embedded Systems
Resource Access Protocols
Priority Ceiling Protocol (PCP) Example
Priority
evolution of
T3
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Real-time Embedded Systems
Resource Access Protocols
Priority Ceiling Protocol (PCP) Example
At time t0, T3 is activated, and since it is the only task ready to run, it starts executing and later locks semaphore SC.
At time t1, T2 becomes ready and preempts T3.
At time t2, T2 attempts to lock SC, but it is blocked by the protocol because P2 is not greater than C(SC). Then, T3
inherits the priority of T2 and resumes its execution.
At time t3, T3 successfully enters its nested critical section by locking SB. Note that T3 is allowed to lock SB because no
semaphores are locked by other tasks
At time t4, while T3 is executing at a priority P3 = P2, T1 becomes ready and preempts T3 because P1 > P2 > P3.
At time t5, T1 attempts to lock SA, which is not locked by any task. However, T1 is blocked by the protocol because its
priority is not higher than C(SB), which is the highest ceiling among all semaphores currently locked by the other tasks.
Since SB is locked by T3, T3 inherits the priority of T1 and resumes its execution.
At time t6, T3 exits its nested critical section, unlocks SB, and, T3 returns to priority P3 = P2. since P1 > C(SC) and P1 >
P3, T1 preempts T3 and executes until completion.
At time t7, T1 is completed, and T3 resumes its execution at a priority P3 = P2.
At time t8, T3 exits its outer critical section, unlocks SC, and, since T2 is blocked, T3 returns to its nominal priority P3. At
this point, T2 preempts T3 and executes until completion.
At time t9, T2 is completed; thus, T3 resumes its execution.
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