ELECTRONICS

L T P C
3 0 2 4
Objectives
To provide a solid foundation for students who intend to continue to study advancements in the areas of
circuit and device design.
Expected Outcome
After completion of this course, student able to understand the physical models of the operation of
semiconductor devices and also able to observe of the design and operation of important circuits that
utilize these devices.
Electronic properties of materials: Solid-state materials; Electrons and holes; Doping, acceptors and
donors; p- and n-type material; Conductivity and resistivity; Drift and diffusion currents, mobility and
diffusivity
Diodes and diode circuits : Diode operation and i-v characteristics; Regions of operation, models, and
limitations; Schottky, Zener, variable capacitance diodes; Single diode circuits, the load line; Multi-diode
circuits; Rectifiers; dc/dc converters; Diode logic: AND and OR functions
MOS transistors and biasing: NMOS field-effect transistor operation; i-v characteristics; Regions of
operation, models, and limitations; Enhancement and depletion-mode devices ; PMOS devices; Transfer
characteristic of FET with load resistor; Biasing for logic and amplifier applications
MOS logic families : Logic level definitions; NMOS logic design: Inverter, NOR, NAND, SOP, POS,
complex gates; PMOS logic; CMOS logic: Inverter, NOR, NAND, SOP, POS, complex gates; Dynamic
logic; CVS logic; Cascade buffers; NMOS and CMOS power/delay scaling;
Bipolar transistors and logic families: npn and pnp transistor operation; i-v characteristics; Regions of
operation, models, and limitation; Transfer characteristic of BJT with load resistor; Biasing for logic and
amplifier applications; Logic level definitions; The differential pair as a current switch; Transistor-transistor
logic inverters, NAND, other functions; Emitter-coupled logic OR/NOR gate, other functions; Low
voltage bipolar logic families
Design parameters and issues: Switching energy, power-delay product comparison; Propagation delay,
rise time, fall time; Fan-in and fan-out; Power dissipation, noise margin; Power supply distribution; Sources
of signal coupling and degradation; Transmission line effects; passive, active, dc and ac termination;
Element tolerances; Worst-case analysis of circuits; Monte Carlo analysis; Monte Carlo analysis in SPICE;
Six-sigma design

Storage elements : Latches, Flip-flops, Static RAM cells, Dynamic RAM cells, Sense amplifiers

Interfacing logic families and standard buses: Terminal characteristics of various logic families, Standard
interface characteristics, Level translations: TTL/CMOS, TTL/ECL, CMOS/ECL; Single-ended to
differential and differential to single-ended conversion, Transmission line characteristics, reflections, Bus
termination: Passive, active, dc, ac, 4-20 mA current interfaces, RS-XXX buses, IEEE-XXXX buses, Low-
level differential signaling, RAMBUS, DDR
Operational amplifiers: Ideal op-amps and circuit analysis; Ideal op-amp circuits: Inverting and non-
inverting amplifiers, summing amplifier, difference amplifier, integrator, low pass filter; Non-ideal op-amps:
dc errors, CMRR, input and output resistances, frequency response, output voltage and current limitations;
Circuits with non-ideal amplifiers; Multi-stage op-amp circuits

Circuit modeling and simulation: DC analysis, AC analysis, Transient analysis, Simulation control
options, Built-in solid-state device models, Device parameter control, Libraries, Mixed-mode simulation

Text / Reference Books

1. A. S. Sedra and K. C. Smith, Microelectronic Circuits, Third Edition, Saunders College Publishing,
Harcourt Brace College Publishers, 1991.
2. H. Taub and D. Schilling, Digital Integrated Electronics, McGraw-Hill, 1977.
Mode of Evaluation : Written examinations, seminar, assignments, surprise tests and quizzes

Proceedings of the 16th Academic Council held on 25.11.2008