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These states behave acceptor-like or donor-like, depending on the position of the Fermi level at the surface and
the amount of band bending, and these are referred to as fast states, since they capture and release the carriers
at a fast rate.
When the surface potential changes, the charges in the surface states change as well, and leads to a shift in VT
and a change in the C-V characteristics.
Fig.4.13 The experimental C-V characteristics showing the difference between them due to the presence of fast surface
states.
There is a shift of the C-V curve towards the left due to the fast surface states, which changes the flatband
voltage.
In the equivalent circuit of an MIS structure, the fast surface states can be represented by an additional series
combination of an equivalent capacitance Css of the surface states, and an additional resistance Rss, with the
time constant RssCss representing the time response of the surface states.
Fig.4.14 The overall high-frequency equivalent circuit for a two-terminal MIS structure showing the additional components
Css-Rss to account for the effects of fast surface states.
Measurements of frequency-dependent MIS capacitance and conductance give information about the density of
the surface states.
The initial C-V characteristic is marked by (1), while those observed after 30 minutes at 127 C with VG = +10 V
applied is marked by (2), and after heating the device for 30 minutes at the same temperature with the
gate shorted to the substrate yields characteristic marked by (3)- this experimental procedure is known as the
bias-temperature stress test.
Fig.4.16 Charge distribution during the various stages of the bias-temperature stress test and post annealing.
Initially, all the positive ionic charges are located at the metal-SiO2 interface, exerting no influence on Si; after
positive gate bias at high temperature, all these ionic charges cluster near the Si-SiO2 interface and induce all the
image charges in Si; finally after recovery, the ions create an arbitrary distribution (x) within the oxide, inducing
image charges in both the gate and the semiconductor.
For any arbitrary distribution of the oxide charges (x), the shift in the flatband voltage
can be given by
The menace created by mobile ions is reduced to a large extent in today's technology due to the improvements in
the fabrication process.
EXAMPLE 4.4: In a two-terminal MIS structure having 40 nm thick oxide, the shift in the flatband voltage after a bias-
temperature stress test was found to be 10 mV. Determine the mobile ionic contamination per unit area in the oxide in
numbers per unit area.
SOLUTION: The oxide capacitance per unit area
The shift in the flatband voltage due to the mobile ionic contamination after bias-temperature stress test is given by
Thus, the mobile ionic contamination per unit area in the oxide
4.5.3 Radiation-Induced Space Charge
A positive space charge is seen to build up in SiO2 films when it is irradiated by ionizing radiation of various kinds,
e.g., X-ray, gamma ray, low- and high-energy electron irradiation, etc. (potential danger during ion implantation).
The physical origin of this charge is completely different from the ionic contamination.
Due to irradiation, EHPs will be generated within the SiO2.
In the absence of any electric field within the oxide, these carriers will immediately recombine; however, under a
positive applied gate bias, due to the electric field within the SiO2, the generated electrons and holes would
separate, with the electron moving towards the metal-SiO2 interface, and the hole moving towards the SiO2-Si
interface.
Thus, a space charge layer starts to build up within the oxide due to these charges, thus creating an electric field
within the oxide, which is opposite to that of the applied field => changes VFB, and, thus, VT.
These charges can be eliminated by thermal annealing.
The ratio o f in (111), (110), and (100) Si are in the ratio 3:2:1, and is a strong function of the oxidation
condition.
Popular theory: originates from the excess ionic Si in the oxide, which moves into the growing SiO2 layer
during the oxidation process.
can be reduced by a large extent by H2 heat treatment
where where m is the metal work function and is the semiconductor work function; is
the oxide charges lumped at the Si-SiO2 interface, and is any arbitrary distribution of charges within the
oxide.
Note: in general, is dependent on VGT, and at low substrate doping levels, is close to unity near threshold
where the gate depletion width is large (corresponding to Cdep << Ci).
Usually, Cdep can be estimated as follows:
1 2 3 4 5