Asymmetric CMOS

* SPICE export by: S-Edit 14.11

* Export time: Thu Aug 11 14:24:45 2016

* Design: Inverter

* Cell: cmos

* View: view0

* Export as: top-level cell

* Export mode: hierarchical

* Exclude empty cells: yes

* Exclude .model: no

* Exclude .end: no

* Expand paths: yes

* Wrap lines: no

* Root path: E:\mtech\1661022001\Inverter

* Exclude global pins: no

* Control property name: SPICE

********* Simulation Settings - General section *********

********* Simulation Settings - Parameters and SPICE Options *********

*-------- Devices: SPICE.ORDER > 0 --------

.include "C:\Users\Student\Documents\model files\model_file035.md"

V1 Vdd GND 5

V2 Vin GND BIT ({0011})

 .dc lin source V2 0 5 0.5

.print dc v(Vin) v(Vout)

.tran 1n 100n

.print tran v(Vout) v(Vin)

MNMOS_1 Vout Vin Gnd Gnd NMOS W=2.5u L=250n AS=2.25p PS=6.8u AD=2.25p PD=6.8u

MPMOS_1 Vout Vin Vdd Vdd PMOS W=6.25u L=250n AS=2.25p PS=6.8u AD=2.25p PD=6.8u

********* Simulation Settings - Analysis section *********

********* Simulation Settings - Additional SPICE commands *********

.end

5.5
cmos v(Vout)
v(Vin)

5.0

4.5

4.0

3.5
Voltage (V)

3.0

2.5

2.0

1.5

1.0

0.5

0.0

-0.5
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V2 (V)
 cmos
5.0 v(Vin)

4.5
4.0
3.5
3.0
Voltage (V)

2.5
2.0
1.5
1.0
0.5
0.0
0 10 20 30 40 50 60 70 80 90 100
Time (ns)

cmos
5.0 v(Vout )

4.5
4.0
3.5
3.0
Voltage (V)

2.5
2.0
1.5
1.0
0.5
0.0
0 10 20 30 40 50
Time (ns)
60 70 80 90 100
 Symmetric

* SPICE export by: S-Edit 14.11

* Export time: Thu Aug 11 14:24:45 2016

* Design: Inverter

* Cell: cmos

* View: view0

* Export as: top-level cell

* Export mode: hierarchical

* Exclude empty cells: yes

* Exclude .model: no

* Exclude .end: no

* Expand paths: yes

* Wrap lines: no

* Root path: E:\mtech\1661022001\Inverter

* Exclude global pins: no

* Control property name: SPICE

********* Simulation Settings - General section *********

********* Simulation Settings - Parameters and SPICE Options *********

*-------- Devices: SPICE.ORDER > 0 --------

.include "C:\Users\Student\Documents\model files\model_file035.md"

V1 Vdd GND 5

V2 Vin GND BIT ({0011})

.dc lin source V2 0 5 0.5

.print dc v(Vin) v(Vout)

.tran 1n 100n

.print tran v(Vout) v(Vin)

MNMOS_1 Vout Vin Gnd Gnd NMOS W=2.5u L=250n AS=2.25p PS=6.8u AD=2.25p PD=6.8u

MPMOS_1 Vout Vin Vdd Vdd PMOS W=2.5u L=250n AS=2.25p PS=6.8u AD=2.25p PD=6.8u

********* Simulation Settings - Analysis section *********

********* Simulation Settings - Additional SPICE commands *********

.end