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KKKL2173

Analogue Electronics

Chp. 10:
Operational Amplifiers (Op-Amp)

Rosmina Jaafar
Introduction

Input 1

Output
Input 2

Functionality: Change voltage amplitude and polarity.


Characteristics: High gain (∞), high input impedance (∞), low output
impedance (0).
Applications: Oscillator, filter, regulator, comparator, and many more…
Op-Amp Schematic Diagram
Op-Amp – Symbol and Package
Single-Ended Input

Amplified output with the Amplified output with the


same polarity as the input opposite polarity as the
signal. input signal.
Vout
Solve for the gain
Vin

Vout = AO (V+ − V− ) V− Is grounded (0V)

= AO (Vin − 0 )

= AOVin
Vout
Gain = = AO
Vin
Vout
Solve for the gain
Vin

Vout = AO (V+ − V− ) V+ Is grounded (0V)

= AO ( 0 − Vin )

= − AOVin
Gain =
Vout
= − AO
Vin
Common-Mode Operation

• Same input signals at


both inputs.
• Both of the input signals
are equally amplified
but in opposite polarity.
• These signals cancel
out, making the output =
0 V.
• However, in practice, a
very small output will be
produced.
Differential and Common-Mode Operation
• For an op-amp with arbitrary input voltages, V1 and V2.

Differential input signal, vd = V1 − V2

V1 + V2
Common input signal, vc =
2

The output of the op-amp, vo = Ad vd + Ac vc

Ad
Common-mode rejection ratio (CMRR), CMRR =
Ac
Ad
CMRR ( log ) = 20 log10
Ac
Common-Mode Rejection Ratio

The output voltage of the op-amp,

vo = Ad vd + Ac vc
 Ac vc 
= Ad vd  1 + 
 Ad vd 
 1 vc 
= Ad vd  1 + 
 CMRR vd 

When CMRR is large, the output voltage will be influenced mostly


by the difference signal, while the effect of the common-mode
component is greatly reduced.
Common-Mode Rejection Ratio
• An op-amp has input voltages of Vi1 = 150 µ V and
. = 140 µ V
Vi2

• The differential gain of the amplifier is Ad = 4000


• Compare the output voltage with the component
of differential input signals when the CMRR of
the op-amp is
– 100.
– 105.
Common-Mode Rejection Ratio
• CMRR indicates the op-amp’s ability to reject a
signal applied simultaneously to both input.
• Higher CMRR, better op-amp.
• Typically, CMRR ≈ 80-120 dB.
• CMRR decreases when frequency increases.
AC Equivalent of Op-Amp Circuit

• The input signal applied


between input terminals
sees an input impedance Ri
(typically very high)
•The output voltage is
shown to be the amplifier
gain times the input signal
(a) Practical
taken through the output
impedance Ro (typically
very low).
• An ideal op-amp circuit
would have infinite input
impedance, zero output
impedance and infinite
voltage gain.
(b) Ideal
Op-amp gain

• Open-loop
– configuration where there is no feedback from output
back to the input.
– In the open-loop configuration the gain can exceed
10,000.

• Closed-loop
– configuration reduces the gain.
– In order to control the gain of an op-amp it must have
feedback.
– This feedback is a negative feedback.
– A negative feedback reduces the gain and improves
many characteristics of the op-amp.
How to use op-amp

• We would like op-amp to amplify input signal by


a factor of any arbitrary value.
• However, the open-loop gain is fixed and too
large.
• We need to make the amplification system as
close-loop using some external circuits.
• There are two configuration of using the external
circuits:
– Noninverting
– Inverting.
Inverting close-loop configuration

Basic op-amp
connection

Op-amp ac equivalent
circuit
AOL = open loop gain for the op-amp
Ri = input impedance
Ro = output impedance

Vo = AOLVi

Vo
Since AOL is large (∞), Vi = ≈0
AOL

We also know that Vi = V+ − V−

Because V+ is grounded, therefore V+ = V− = 0

It means that V− is also grounded.

This concept is called the virtual ground.


Using KCL

V1 − Vi Vi Vi − Vo
− =
R1 Ri Rf

V1 −Vo
Because Vi = 0, therefore =
R1 R f

Vo Rf Rf
and =− . Voltage gain is Av = −
V1 R1 R1

Circuit provides a voltage gain with an 180° phase inversion from


the input signal

* You may use superposition theorem to derive the voltage


gain (as explained in the Boylestad & Nashelsky).
The Golden Rules

1. Voltage difference between the inputs is zero.


2. The inputs draw no current.
Common Op-Amp Circuits

Inverting amplifier
Noninverting amplifier
Summing amplifier
Unity follower
Integrator
Differentiator
Inverting Amplifier

Rf
Vo = − V1
R1

• Input signal is at the inverting (–) input.


• Non-inverting (+) input terminal is grounded.
• Feedback resistor, Rf is placed between the output and
inverting input.
Non-inverting amplifier

Equivalent circuit for


Non-inverting amplifier non-inverting amplifier

Using voltage divider

R1 Rearrange
Vo R1 + R f Rf
V1 = Vo = =1+
R1 + R f V1 R1 R1

The circuit’s output is in phase with its input signal


Unity Follower

Vo
Gain = =1
V1

• No amplification, and the output only follows its input.


• This circuit is useful for circuit-isolation applications (also called Buffer).
Use of buffer amplifier

• An input signal can be


provided to two
separate outputs.

• The advantage of this


connection is that the
load connected across
one output has no (or
little) effect on the other
output.
• In effect, the outputs are
buffered or isolated from
each other.
Summing Amplifier

Summing amplifier Virtual ground equivalent circuit

Because the op-amp has a high input impedance, the multiple inputs
are treated as separate inputs.
Summing Amplifier

V1 V2 V3
I1 = , I 2 = , I3 =
R1 R2 R3

I f = I1 + I 2 + I 3

Vo = − I f R f

 Rf Rf Rf  Each input adds a voltage to


Vo = −  V1 + V2 + V3  the output multiplied by its
 R1 R2 R3  separate constant-gain
multiplier.
Integrator

Since V+ = 0 grounded.

Therefore V− = V+ = 0

No current enters the input of op-amp.


Therefore

Vin − V− Vin − 0 Vin


IR = = =
R R R

dV d (Vout − V− ) d (Vout − 0 ) dVout


IC = C =C =C =C
dt dt dt dt
Integrator

IC + I R = 0

dVout Vin
C + =0
dt R
1
dVout =− Vin dt
RC
t
1
Vout ( t ) = − ∫
RC 0
Vin ( t ) dt + Vout ( 0 )

•The input signal is integrated at the output.


• Used in low-pass filter circuits and sensor conditioning circuits.
Integrator

Integration operation is one


of summation, summing the
area under a waveform or
curve over a period of time.
Integrator

• At DC, capacitor becomes open


circuit (no feedback).

• The output voltage saturates.

• To provide closed-loop gain at DC,


an additional resistor is connected
parallel to the capacitor.

• R2 > R
Summing integrator

 1 1 1 
vo (t ) = − 
 R1C
∫ v1 (t ) +
R2C ∫ v2 (t ) +
R3C ∫ v3 (t )

Differentiator

V+ = 0 Grounded

V− = V+ = 0

No current enters the input of op-amp.


Therefore

dV d (Vin − V− ) d (Vin − 0 ) dVin


IC = C =C =C =C
dt dt dt dt

Vout − V− Vout − 0 Vout


IR = = =
R R R
Differentiator

IC + I R = 0

dVin
Vout = − RC
dt

•The input signal is differentiated at the output.


• Sensitive to noise due to the op-amp’s high ac gain.
• Used in high-pass filter circuits.
Multiple-Stage Gains

A = A1 A2 A3

Rf Rf Rf
A1 = 1 + A2 = − A3 = −
where R1 R2 R3
Multiple-Stage Gains

Rf
A1 = −
R1

Rf
A2 = −
R2

Rf
A3 = −
R3
Ideal vs. Real Op-Amp

Parameter Ideal Op-Amp Real Op-Amp


Voltage gain Infinity 105-109
Input impedance Infinity 106 Ω (BJT)
109-1012 Ω
(FET)
Output impedance 0 100 – 1000 Ω
Common mode voltage 0 10-5
gain

* The characteristics of the ideal op-amp are independent


of temperature and supply changes.
DC-Offset Parameters
• For an ideal op-amp, when both inputs are zero, the output
voltage should be zero.
• However, for a real op-amp, there is small voltage (DC) at
the output.
• This scenario is called offset.

Voltage offset occurs due to:


• Input bias current (IIB)
• Input offset voltage (VIO )
• Input offset current ( IIO )
Input Bias Current (IIB)

• Theoretically, an op-amp should have an infinite input impedance and


therefore no input current.
• In reality, however, small currents (DC) flowing at the input terminals.
• The average of the two input currents is called input bias current (IIB).
• Input bias current is related to input offset current, IIO.
• Two separate input bias currents are :
− IIO and + IIO
I = IIB −
IB I = IIB +
IB
2 2
The total input bias current is the average of the
two: IIB may cause a voltage drop across the resistor of the
feedback network, bias network, or source impedance.
− +
I +I
IB IB
Typically, input bias current in FET-type op-amps
IIB = (several pAmp) is lower than that of BJT-type op-amps
2 (several nAmp).
Input Offset Voltage (VIO)
The op-amp output should be zero when
the input is zero. But this is only in an
ideal situation. In reality, the input
stages of the op-amp is not balanced.

Vo = A (V+ − V− )
R1
V+ = VIO and V− = Vo R1R1++RRf f
R1 + R f V = V=IOVIO
o (offset)
Vo(offset)
RR11
 R1 
Vo = A  VIO − Vo 
 R1 + R f
  * The VIO is the amount of
voltage that must be
A A applied to one of the inputs
Vo = VIO ≈ VIO
 R1   R1  to zero the output
1+ A  A 
R +R 
 1 f   R1 + R f 
Input Offset Voltage (VIO)
The op-amp output should be zero when
the input is zero. But this is only in an
ideal situation. In reality, the input
stages of the op-amp is not balanced.

Vo = A (V+ − V− )
R1
V+ = VIO and V− = Vo R1R1++RRf f
R1 + R f V = V=IOVIO
o (offset)
Vo(offset)
RR11
 R1 
Vo = A  VIO − Vo 
 R1 + R f
  * The VIO is the amount of
voltage that must be
A A applied to one of the inputs
Vo = VIO ≈ VIO
 R1   R1  to zero the output
1+ A  A 
R +R 
 1 f   R1 + R f 
Example 10.8
Calculate the output offset voltage of the circuit below. The op-amp
spec lists VIO = 1.2 mV

R1 + R f
Vo (offset) = VIO =
R1
 2kΩ + 150kΩ 
(1.2mV)   = 91.2mV
 2kΩ 
Reducing output offset voltage
Output Offset Voltage Due to Input Offset Current (IIO)

• If there is a difference between the DC bias currents both


input, then this also causes an output offset voltage.
• The input offset Current (IIO) is specified in the specifications
for the op-amp.
Output Offset Voltage Due to Input Offset Current (IIO)

+ +  Rf 
V = I RC 1 +
o IB 
 R1 

− −  Rf 
V = I R1  −
o IB 
 R1 

 Rf  −  Rf 
Vo ( offset due to I +
IB and I −
IB ) = I RC 1 + R
+
IB  − I IB R1  
 1   R1 
Output Offset Voltage Due to Input Offset Current (IIO)

Define the input offset


current as:
I IO = I IB+ - I IB−
Assume R1 = RC and Rf >> R1,
then

Vo (offset) = I IB+ ( R1 + R f ) − I IB− R f


= I IB+ R f − I IB− R f = R f ( I IB+ − I IB− )

Vo ( offset due to I IO ) = I IO R f
Total Offset due to VIO and IIO

Op-amps may have an output offset voltage due to


both factors VIO and IIO. The total output offset
voltage will be the sum of the effects of both:

•Vo(offset) = Vo(offset due to VIO) + Vo(offset due to IIO)


Op-Amp Specifications – Frequency Parameters

• An op-amp is a high-gain,
wide-bandwidth amplifier.
• This operation tend to be
unstable (oscillate) due to
positive feedback.
• To ensure stable operation,
op-amps are built with internal
compensation circuitry, which • In most op-amps, roll-
causes the very high open- off occurs at a rate of
loop gain to diminish with 20 dB per decade or 6
increasing frequency. This dB per octave.
gain reduction is referred to
as roll-off.
Op-Amp Specifications – Frequency Parameters

• The specification of an open-loop voltage gain, AVD (voltage


differential gain) of an op-amp is given by manufacturer.
• To reduce the voltage gain, feedback resistors are connected to
the op-amp. The gain can be called as closed-loop voltage gain,
ACL.
• Unlike the open-loop op-amp configuration, the addition of the
feedback resistor to the op-amp improves the op-amp circuits,
by means of:
• improving the stability of the op-amp voltage gain,
• increasing the input impedance,
• reducing the output impedance, and
• improving the frequency response.
Gain vs. Bandwidth

For open loop gain (AVD),

• Frequency of input signal


-3dB
increased, the AVD drops off until
Slope =
it reaches 1 (unity-gain
-20dB/decade
bandwidth, B1) at the unity gain
frequency (f1).

• At this point, AVD=1.

• No more gain will be produced


beyond the f1.
How can you relate this plot
• For op-amp 741, the B1 is about with closed-loop amplifier
circuit (e.g. inverting op-amp)?
1MHz.
Gain vs. Bandwidth

• Another frequency of interest is at which the gain


drop by 3 dB (or to 0.707AVD). This is the cut-off
frequency fc

• The unity-gain frequency and cutoff frequency are


related by f1 = A VD f c
Slew Rate

• Slew rate = maximum rate at which op-amp output can change in volts
per microsecond (V/µs).
∆Vo
SR = (in V/µs)
∆t
• If the rate of voltage change > slew rate, the output would not be able
to change fast enough and would not vary over the full range expected,
resulting in signal distortion and clipping

• Low power op-amps have SR less than 1 V/µs (e.g. SR for 741 = 0.5
V/µs).

• High speed op-amps have SR about 100 V/µs (e.g. SR for LM6165 =
300 V/µs )

The SR rating is listed in the specification sheets as the V/µs rating.


Maximum Signal Frequency

• Maximum signal frequency is determined by the bandwidth


and slew rate of op-amp.
• Let say we have a sinusoidal signal, vo = K sin(2π ft )
• The signal maximum rate of change = 2π fK V s
• To prevent distortion at the output, the rate of change must be
less than the slew rate
2π fK ≤ SR
SRSR
f ≤f ≤ Hz
2π2πV
K p

• The maximum frequency, f, is also limited by the unity gain


bandwidth.
Example 10.14
Determine the maximum frequency that may be used.
(Given op-amp slew rate is SR = 0.5 V/µs)

SR
ω≤
Vp

SR 0.5V / µs
ω≤ = = 1.1 × 106 rad / s
Rf 240kΩ Vp 0.48V
A= = = 24
R1 10kΩ

V po = AVi = 24(0.02V ) = 0.48V


General Op-Amp Specifications
• Other ratings for op-amp found on specification
sheets are:

– Absolute Ratings
– Electrical Characteristics
– Performance
Absolute Ratings

These are
common
maximum ratings
for the op-amp.
Electrical Characteristics

Note: These ratings are for specific circuit conditions, and they often
include minimum, maximum and typical values.
Op-Amp Performance

The specification sheets


will also include graphs
that indicate the
performance of the op-
amp over a wide range of
conditions.

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