1a319 Compal La-7741p r0.1

A B C D E
COMPAL CONFIDENTIAL
MODEL NAME : QAL70
1 1
PCB NO : LA-7741P(DAB00000800)
BOM P/N : 4619EO31L01 TPM ;4519EO31L02 TPM/TAA
GPIO MAP: Rev0.9
2
Dalmore 13 UMA 2
@ Ivy Bridge + Panther POINT
2011-06-23
REV : 0.1 (X00)
@ : Nopop Component
CONN@ : Connector Component
3 3
MB Type BOM P/N
TPM EN/ TCM DIS 1@ 3@
TPM DIS/ TCM EN 2@ 4@
TPM DIS/ TCM DIS 2@ 3@
TAA @TAA
SPI ON BOARD @SPI
4 4
MB PCB DELL CONFIDENTIAL/PROPRIETARY

Part Number Description
DA80000I700 PCB 0FH LA-6562P REV0 M/B UMA Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Cover Sheet
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-7741
Date: Thursday, June 23, 2011 Sheet 1 of 56
A B C D E
A B C D E
Block Diagram
Memory BUS (DDR3) DDRIII-DIMM X2
1333/1600 MHz BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
1 1
Ivy Bridge
On IO board
BGA 2C 1023P
CRT CONN VGA For MB/DOCK
Video Switch BT 4.0
VGA PI3V713-AZLEX
FDI DMI2 Camera Trough Cable
Lane x 8 Lane x 4
VGA
HDMI CONN DPB SATA Repeater
INTEL USB SATA
PS8511B E-SATA
DPC
DPD Panther POINT-M USB 2.0 Port
DOCKING PORT
USB3.0
BGA 989P USB3.0/2.0
DAI
LVDS CONN LVDS
2 2
USB3.0
USB2.0 [3,8] USB3.0
PS8710B USB3.0
SATA5
Repeater USB3.0/2.0+PS
DOCK LAN PI5USB1457A USB
USB3.0 [4] SDXC/MMC Card Reader PCIE x1 Power Share
Intel Lewisville
OZ600FJ0LN PCI Express BUS 100MHz 82579LM
HD Audio I/F
PCI Express BUS 100MHz
Option
SPI S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
PCIE3 PCIE5 PCIE2 PCIE1
DOCK LAN
LAN SWITCH
EXPRESS 1/2 Mini Card 1/2 Mini Card Full Mini Card China TCM1.2 LPC BUS SATA PI3L720
33MHz INT.Speaker
Card PP WLAN/WiFi WWAN SSX44B HDA Codec
W25Q64BVSSIG SATA Repeater 92HD90B3
USB10 USB6 USB4 USB5 64M 4K sector Parade PS8520B
3
Combo Jack RJ45 3
USH W25Q32BVSSIG
Smart Card TDA8034HN HDD
BCM5882 16M 4K sector on IO board
CPU XDP Port
DAI
To Docking side
RFID Fingerprint FFS LNG3DM
PCH XDP Port FP_USB USB7
CONN Dig.
USH Module
MIC
WiFi ON/OFF PCIE4 E-Module Trough LVDS Cable
SMSC SIO
DC/DC Interface BC BUS
ECE5048
LED SMSC KBC
BC BUS
4
PWM FAN MEC5055 Discrete TPM
4
SMSC
AT97SC3204
4021 DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
UMA Block Diagram
TP CONN KB CONN Size Document Number Rev
0.1
LA-7741
A B C D E
5 4 3 2 1
POWER STATES
USB PORT# DESTINATION
Signal SLP SLP SLP SLP ALWAYS M SUS RUN CLOCKS
State S3# S4# S5# A# PLANE PLANE PLANE PLANE
0 JUSB1 (Right side )
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH ON ON ON ON ON
1 JUSB2 (Rear Left side)
D D
S3 (Suspend to RAM) / M3 LOW HIGH HIGH HIGH ON ON ON OFF OFF
2 NA
S4 (Suspend to DISK) / M3 LOW LOW HIGH HIGH ON ON OFF OFF OFF
3 MLK DOCK
S5 (SOFT OFF) / M3 LOW LOW LOW HIGH ON ON OFF OFF OFF
4 WLAN
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH LOW ON OFF ON OFF OFF
5 WWAN
S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW ON OFF OFF OFF OFF
PCH
6 JMINI3(PP)
S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW ON OFF OFF OFF OFF
7 USH->BIO
8 DOCKING
PM TABLE
9 JESATA1 ( right side)
+15V_ALW +3.3V_SUS +5V_RUN +3.3V_M +3.3V_M
C
SATA DESTINATION C
+5V_ALW +1.5V_MEM +3.3V_RUN +1.05V_M +1.05V_M
10 Express card
+3.3V_ALW_PCH +1.8V_RUN (M-OFF)
power SATA 0 HDD
+3.3V_RTC_LDO +1.5V_RUN
plane 11 Bluetooth
+0.75V_DDR_VTT
SATA 1 ODD/ E3 Module Bay
+VCC_CORE
12 Camera
+1.05V_RUN_VTT
SATA 2 NA
+1.05V_RUN
State 13 NA
SATA 3 NA
S0 ON ON ON ON ON SATA 4 ESATA 0 BIO

USH
S3 ON ON OFF ON OFF SATA 5 Dock 1 NA
S5 S4/AC ON OFF OFF ON OFF
B
S5 S4/AC don't exist OFF OFF OFF OFF OFF PCI EXPRESS DESTINATION B
need to update Power Status and PM Lane 1 MINI CARD-1 WWAN

Table
Lane 2 MINI CARD-2 WLAN
Lane 3 Express card
Lane 4 E3 Module Bay (USB3)
UMA DP/HDMI Port Connetion Lane 5 1/2vMINI CARD-3 PCIE
Port B MB HDMI Conn Lane 6 MMI
Port C Dock DP port 2 Lane 7 10/100/1G LOM
A
Port D Dock DP port 1 Lane 8 None A
DELL CONFIDENTIAL/PROPRIETARY
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Index and Config.
5 4 3 2 1
5 4 3 2 1
MODC_EN
HDDC_EN
EN_INVPWR FDC654P
+BL_PWR_SRC
Q21
D D
ADAPTER
SI3456BDV SI3456BDV
(Q27) (Q30)
+PWR_SRC 1.05V_VTTPWRGD
BATTERY TPS51461RGER +VCC_SA +5V_HDD +5V_MOD
(PU13)
ALWON
+15V_ALW
C RT8205LZQW C
CHARGER +5V_ALW RUN_ON
(PU2)
TPS22966DPUR
+3.3V_ALW (U78)
AUX_EN_WOWL
PCH_ALW_ON
+5V_RUN
AUX_ON
SUS_ON
RUN_ON
M_ON
TPS51212DSCR
SN1003055
MAX17511 RT8207MZQW RT8207MZQW SY8033BDBC
TPS22966DPUR
(PU9) (PU16) (PU16) (PU15) (PU7) (PU17) SI3456 SI3456 S13456 SI3456 SI3456
(U78)
B (Q38) (Q49) (Q54) (Q34) (Q58) B
0.75V_DDR_VTT_ON
1.05V_0.8V_PWROK
CPU_VTT_ON
SIO_SLP_A#
DDR_ON
RUN_ON
+3.3V_WLAN +3.3V_ALW_PCH +3.3V_SUS +3.3V_LAN +3.3V_RUN +3.3V_M
+VCC_CORE +1.5V_MEM +0.75V_DDR_VTT +1.8V_RUN +1.05V_RUN_VTT +1.05V_M
Pop option
RUN_ON
CPU1.5V_S3_GATE RUN_ON
Pop option
+1.0V_LAN +3.3V_M
AO4728 NTGS4141N SI4164

A (QC3) (Q59) (Q63) A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
+1.05V_RUN BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Rail
+1.5V_CPU_VDDQ +1.5V_RUN NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-7741
5 4 3 2 1
5 4 3 2 1
@ 2.2K
SMBUS Address [0x9a]
@ 2.2K
+3.3V_ALW_PCH
H14 MEM_SMBCLK 202
2N7002
C9 MEM_SMBDATA 200 DIMMA SMBUS Address [A0]
2N7002
2.2K
202
PCH
D
2.2K
+3.3V_LAN 200 DIMMB
SMBUS Address [A4] D
C8 LAN_SMBCLK 28
G12 LAN_SMBDATA 31 LOM SMBUS Address [C8]

M16 E14 53
XDP1 SMBUS Address [TBD]
2.2K 51
SML1_SMBDATA
SML1_SMBCLK
+3.3V_ALW_PCH
2.2K 53
51 XDP2
A5 B6 2.2K SMBUS Address [TBD]
3A 3A
2.2K +3.3V_ALW SMBUS Address
2.2K
APR_EC: 0x48
B4 DOCK_SMB_CLK 127
1A SPR_EC: 0x70
129 MSLICE_EC: 0x72 2.2K
+3.3V_RUN
1A A3 DOCK_SMB_DAT DOCKING
USB: 0x59
AUDIO: 0x34 14
SLICE_BATTERY: 0x17 13 G Sensor
2.2K SMBUS Address [3B]
SLICE_CHARGER: 0x13
C
+3.3V_ALW C
2.2K
B5 LCD_SMBCLK 30
1B WWAN
A4 LCD_SMBDAT 32 SMBUS Address [TBD]
1B
2.2K
KBC 2.2K
+3.3V_ALW
100 ohm 7
1C A56 PBAT_SMBCLK
6 BATTERY SMBUS Address [0x16]
1C B59 PBAT_SMBDAT 100 ohm
CONN
2.2K
+3.3V_ALW
2.2K
A50 M9
1E USH_SMBCLK
B53 L9 USH SMBUS Address [0xa4]
1E USH_SMBDAT
B B
2.2K
+3.3V_SUS
2.2K
MEC 5065 7
2B A49 CARD_SMBCLK
8 Express card SMBUS Address [TBD]
2B B52 CARD_SMBDAT
2.2K
+3.3V_ALW
2.2K
B50 10
1G CHARGER_SMBCLK
A47 9 Charger
1G CHARGER_SMBDAT SMBUS Address [0x12]
2.2K
+3.3V_ALW
2.2K
B7 BAY_SMBDAT 29
2D
30 E3 Module Bay
A A7 BAY_SMBCLK SMBUS Address [0xd2] A
2D

Title
SMBUS TOPOLOGY
Size Document Number Rev
0.1
LA-7741
5 4 3 2 1
5 4 3 2 1
(1)PEG_RCOMPO (G4) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2. U1I
(2)PEG_ICOMPO use 12mil connect to RC2
BG17 VSS[181] VSS[250] M4

BG21 VSS[182] VSS[251] M58
+1.05V_RUN_VTT BG24 M6
VSS[183] VSS[252]
BG28 VSS[184] VSS[253] N1
BG37 VSS[185] VSS[254] N17
1
BG41 N21
RC2 VSS[186] VSS[255]
BG45 N25
VSS[187] VSS[256]
24.9_0402_1%~D BG49 N28
D VSS[188] VSS[257] D
BG53 N33
U1A VSS[189] VSS[258]
BG9 N36
2
PEG_COMP VSS[190] VSS[259]
G3 C29 N40
PEG_ICOMPI VSS[191] VSS[260]
G1 C35 N43
DMI_CRX_PTX_N0 PEG_ICOMPO VSS[192] VSS[261]
<16> DMI_CRX_PTX_N0 M2 G4 C40 N47
DMI_CRX_PTX_N1 DMI_RX#[0] PEG_RCOMPO VSS[193] VSS[262]
<16> DMI_CRX_PTX_N1 P6
DMI_RX#[1] PEG Compensation D10
VSS[194] VSS[263]
N48
DMI_CRX_PTX_N2 P1 D14 N51
<16> DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI_RX#[2] VSS[195] VSS[264]
<16> DMI_CRX_PTX_N3 P10 H22 D18 N52
DMI_RX#[3] PEG_RX#[0] VSS[196] VSS[265]
J21 D22 N56
DMI_CRX_PTX_P0 PEG_RX#[1] VSS[197] VSS[266]
<16> DMI_CRX_PTX_P0 N3 B22 D26 N61
DMI_CRX_PTX_P1 DMI_RX[0] PEG_RX#[2] PEG_ICOMPI and RCOMPO signals should be shorted and routed VSS[198] VSS[267]
<16> DMI_CRX_PTX_P1 P7 D21 D29 P14
DMI_RX[1] PEG_RX#[3] VSS[199] VSS[268]
DMI
DMI_CRX_PTX_P2 P3 A19 with - max length = 500 mils - typical impedance = 43 mohms D35 P16
<16> DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 DMI_RX[2] PEG_RX#[4] VSS[200] VSS[269]
<16> DMI_CRX_PTX_P3 P11 DMI_RX[3] PEG_RX#[5] D17 PEG_ICOMPO signals should be routed with - max length = 500 mils D4 VSS[201] VSS[270] P18
PEG_RX#[6] B14 - typical impedance = 14.5 mohms D40 VSS[202] VSS[271] P21
DMI_CTX_PRX_N0 K1 D13 D43 P58
<16>
<16>
<16>
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
M8
N4
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
A11
B10
D46
D50
VSS[203]
VSS[204]
VSS[205]
VSS VSS[272]
VSS[273]
VSS[274]
P59
P9
<16> DMI_CTX_PRX_N3 DMI_CTX_PRX_N3 R2 G8 D54 R17
DMI_TX#[3] PEG_RX#[10] VSS[206] VSS[275]
PEG_RX#[11] A8 D58 VSS[207] VSS[276] R20
<16> DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 K3 B6 D6 R4
DMI_CTX_PRX_P1 DMI_TX[0] PEG_RX#[12] VSS[208] VSS[277]
<16> DMI_CTX_PRX_P1 M7 DMI_TX[1] PEG_RX#[13] H8 E25 VSS[209] VSS[278] R46
<16> DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 P4 E5 E29 T1
DMI_CTX_PRX_P3 DMI_TX[2] PEG_RX#[14] VSS[210] VSS[279]
<16> DMI_CTX_PRX_P3 T3 DMI_TX[3] PEG_RX#[15] K7 E3 VSS[211] VSS[280] T47
E35 VSS[212] VSS[281] T50
PEG_RX[0] K22 E40 VSS[213] VSS[282] T51
PEG_RX[1] K19 F13 VSS[214] VSS[283] T52
PEG_RX[2] C21 F15 VSS[215] VSS[284] T53
<16> FDI_CTX_PRX_N0 FDI_CTX_PRX_N0 U7 D19 F19 T55
FDI_CTX_PRX_N1 FDI0_TX#[0] PEG_RX[3] VSS[216] VSS[285]
<16> FDI_CTX_PRX_N1 W11 FDI0_TX#[1] PEG_RX[4] C19 F29 VSS[217] VSS[286] T56
<16> FDI_CTX_PRX_N2 FDI_CTX_PRX_N2 W1 D16 F35 U13
<16> FDI_CTX_PRX_N3 AA6 FDI0_TX#[3] PEG_RX[6] C13 F40 VSS[219] VSS[288] U8
<16> FDI_CTX_PRX_N4 FDI_CTX_PRX_N4 W6 D12 F55 V20
C FDI_CTX_PRX_N5 FDI1_TX#[0] PEG_RX[7] VSS[220] VSS[289] C
<16> FDI_CTX_PRX_N5 V4 FDI1_TX#[1] PEG_RX[8] C11 G51 VSS[221] VSS[290] V61
PCI EXPRESS -- GRAPHICS

<16> FDI_CTX_PRX_N6 FDI_CTX_PRX_N6 Y2 C9 G6 W13
<16> FDI_CTX_PRX_N7 AC9 FDI1_TX#[3] PEG_RX[10] F8 G61 VSS[223] VSS[292] W15
Intel(R) FDI
PEG_RX[11] C8 H10 VSS[224] VSS[293] W18
PEG_RX[12] C5 H14 VSS[225] VSS[294] W21
<16> FDI_CTX_PRX_P0 FDI_CTX_PRX_P0 U6 H6 H17 W46
FDI_CTX_PRX_P1 FDI0_TX[0] PEG_RX[13] VSS[226] VSS[295]
<16> FDI_CTX_PRX_P1 W10 FDI0_TX[1] PEG_RX[14] F6 H21 VSS[227] VSS[296] W8
FDI_CTX_PRX_P2 T23 @
<16> FDI_CTX_PRX_P2 W3 K6 H4 Y4
FDI_CTX_PRX_P3 FDI0_TX[2] PEG_RX[15] VSS[228] VSS[297] PAD~D
<16> FDI_CTX_PRX_P3 AA7 H53 Y47
FDI_CTX_PRX_P4 FDI0_TX[3] VSS[229] VSS[298]
<16> FDI_CTX_PRX_P4 W7 G22 H58 Y58
FDI_CTX_PRX_P5 FDI1_TX[0] PEG_TX#[0] VSS[230] VSS[299]
<16> FDI_CTX_PRX_P5 T4 C23 J1 Y59
<16> FDI_CTX_PRX_P6 AA3 D23 J49 G48 TP_G48
<16> FDI_CTX_PRX_P7 AC8 F21 J55
FDI1_TX[3] PEG_TX#[3] VSS[233]
H19 K11
FDI_FSYNC0 PEG_TX#[4] VSS[234]
<16> FDI_FSYNC0 AA11 C17 K21
FDI_FSYNC1 FDI0_FSYNC PEG_TX#[5] VSS[235]
<16> FDI_FSYNC1 AC12 K15 K51
FDI1_FSYNC PEG_TX#[6] VSS[236]
F17 K8 A5
FDI_INT PEG_TX#[7] VSS[237] VSS_NCTF_1
<16> FDI_INT U11 F14 L16 A57
FDI_INT PEG_TX#[8] VSS[238] VSS_NCTF_2
A15 L20 BC61
FDI_LSYNC0 PEG_TX#[9] VSS[239] VSS_NCTF_3
<16> FDI_LSYNC0 AA10 J14 L22 BD3
FDI_LSYNC1 FDI0_LSYNC PEG_TX#[10] VSS[240] VSS_NCTF_4
<16> FDI_LSYNC1 AG8 H13 L26 BD59
FDI1_LSYNC PEG_TX#[11] VSS[241] VSS_NCTF_5
M10 L30 BE4
NCTF
PEG_TX#[12] VSS[242] VSS_NCTF_6
(1) EDP_COMPIO use 4mil trace to RC1 PEG_TX#[13]
F10 L34
VSS[243] VSS_NCTF_7
BE58
D9 L38 BG5
(2) EDP_ICOMPO use 12mil to RC1 PEG_TX#[14] VSS[244] VSS_NCTF_8
J4 L43 BG57
EDP_COMP PEG_TX#[15] VSS[245] VSS_NCTF_9
AF3 L48 C3
eDP_COMPIO VSS[246] VSS_NCTF_10
AD2 F22 L61 C58
eDP_ICOMPO PEG_TX[0] VSS[247] VSS_NCTF_11
AG11 A23 M11 D59
eDP_HPD# PEG_TX[1] VSS[248] VSS_NCTF_12
D24 M15 E1
PEG_TX[2] VSS[249] VSS_NCTF_13
E21 E61
PEG_TX[3] VSS_NCTF_14
AG4 G19
eDP_AUX# PEG_TX[4]
AF4 B18
B eDP_AUX PEG_TX[5] B
K17
PEG_TX[6]
eDP
G17
PEG_TX[7]
AC3 E14
eDP_TX#[0] PEG_TX[8] IVY-BRIDGE_BGA1023~D
AC4 C15
eDP_TX#[1] PEG_TX[9]
AE11 K13
AE7 G13
K10
PEG_TX[12]
AC1 G10
eDP_TX[0] PEG_TX[13]
AA4 D8
AE10 K4
AE6
eDP_TX[3]
IVY-BRIDGE_BGA1023~D
eDP Compensation
+1.05V_RUN_VTT
1
RC1
24.9_0402_1%~D
A A
2
EDP_COMP
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Sandy Bridge (1/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
0.1
5 4 3 2 1
5 4 3 2 1
+1.05V_RUN_VTT +1.05V_RUN_VTT
+1.5V_CPU_VDDQ +3.3V_ALW_PCH
0.1U_0402_25V6K~D
+3.3V_ALW_PCH
1
CC156 0.1U_0402_25V6K~D 1
1
1 2 RC12 JXDP1 @
CC65
200_0402_1%~D XDP_PREQ# 1 OBSFN_A0
5
UC2 @ RC124 XDP_PRDY# 2
1K_0402_1%~D 2 OBSFN_A1
1 B 3
P
<39,40> RUNPWROK
2
RUNPWROK_AND GND
4 1 2 PM_DRAM_PWRGD_CPU 4
2
O RC28 130_0402_1%~D OBSDATA_A[0]
+3.3V_ALW_PCH 1 2 2 5
A OBSDATA_A[1]
2
RC18 200_0402_1%~D SYS_PWROK_XDP 6
74AHC1G09GW_TSSOP5~D RC64 @ GND
<16> PM_DRAM_PWRGD Place near JXDP1 7
3
39_0402_5%~D OBSDATA_A[2]
8
D OBSDATA_A[3] D
9
H_CPUPWRGD H_CPUPWRGD_XDP GND
1 2 10
1 1
HOOK0
<14,16> SIO_PWRBTN#_R
RC51 2 1K_0402_1%~D CFD_PWRBTN#_XDP 11
HOOK1
D
<9> CFG0
RC61 2 0_0402_5%~D XDP_HOOK2 12
HOOK2
<11,42> RUN_ON_CPU1.5VS3# 2 QC1 @
<16,39> SYS_PWROK
RC71 2 1K_0402_1%~D SYS_PWROK_XDP 13
G SSM3K7002FU_SC70-3~D @RC9
@ RC9 0_0402_5%~D CLK_XDP HOOK3
14
CLK_XDP# HOOK4
S 15
3
HOOK5
16
VCCOBS_AB
<17> PLTRST_XDP#
RC8 1 2 1K_0402_5%~D XDP_RST#_R 17
HOOK6
XDP_DBRESET# 18
HOOK7
19
XDP_TDO GND
20 TDO
INTEL suggest RC64 and QC1 NO stuff by default XDP_TRST# 21
XDP_TDI TRSTn
22 TDI
XDP_TMS 23 TMS
24 TCK1 GND 27
+1.05V_RUN_VTT 25 28
XDP_TCLK GND GND
26 TCK0
1 2 H_THERMTRIP# MOLEX_52435-2671
@ RC126 56_0402_5%~D
1 2 H_CATERR#
@ RC128 49.9_0402_1%~D
1 2 H_PROCHOT#
RC44 62_0402_5%~D U1B
J3 CPU_DMI 1 2
BCLK CPU_DMI# CLK_CPU_DMI <15>
H2 RC13 1 2 0_0402_5%~D
BCLK# CLK_CPU_DMI# <15>
MISC
Follow check list 0.5 RC15 0_0402_5%~D
CLOCKS
<18> H_SNB_IVB# F49 PROC_SELECT#
AG3 CPU_DPLL 1 2
DPLL_REF_CLK CPU_DPLL# RC16 1
DPLL_REF_CLK# AG1 2 1K_0402_5%~D
C RC17 1K_0402_5%~D C
<39> CPU_DETECT# C57 PROC_DETECT#
N59 CLK_XDP_ITP
BCLK_ITP CLK_XDP_ITP#
BCLK_ITP# N58 +1.05V_RUN_VTT
1 2 CLK_XDP 1 2
H_CATERR# CLK_CPU_ITP <15>
C49 @ RC48
@RC48 0_0402_5%~D RH107 0_0402_5%~D
CATERR# CLK_XDP#
THERMAL 1 2 CLK_CPU_ITP# <15>
RH106 0_0402_5%~D
D
A48 AT30 DDR3_DRAMRST#_CPU 3 1
<40> PECI_EC PECI SM_DRAMRST# DDR3_DRAMRST# <12>
VR1 TOPOLOGY Max 500mils QC2

SM_RCOMP0 BSS138W-7-F_SOT323-3~D CLK_XDP_ITP
G
BF44 1 2
2
SM_RCOMP[0]
1
DDR3
<40,51,53> H_PROCHOT# 1 2 H_PROCHOT#_R C45
PROCHOT#
MISC SM_RCOMP[1]
BE43 SM_RCOMP1
SM_RCOMP2 CLK_XDP_ITP#
@ RH109 0_0402_5%~D
RC57 56_0402_5%~D BG43 RC50 1 2
SM_RCOMP[2] DDR_HVREF_RST
place RC57 near CPU 300mils ~1530mils 4.99K_0402_1%~D @ RH108 0_0402_5%~D
SM_RCOMP2 --> 15mil
<22> H_THERMTRIP# 1 2 H_THERMTRIP#_R D45 1
2
RC129 0_0402_5%~D THERMTRIP# SM_RCOMP1/0 --> 20mil
CC177
place RC129 near CPU 250mils~2530 mils N53 XDP_PRDY# 0.047U_0402_16V4Z~D
PRDY# XDP_PREQ# 2
N55
PREQ#
L56 XDP_TCLK
TCK XDP_TMS
L55
TMS
PWR MANAGEMENT
J58 XDP_TRST# 1 2
TRST# <15> DDR_HVREF_RST_PCH
RC46 0_0402_5%~D
JTAG & BPM
H_PM_SYNC C48 M60 XDP_TDI_R 1 2

<16> H_PM_SYNC PM_SYNC TDI XDP_TDO_R <40> DDR_HVREF_RST_GATE DDR_HVREF_RST <12>
L59 @RC47
@ RC47 0_0402_5%~D
TDO
M3 control
<18> H_CPUPWRGD 1 2 VCCPWRGOOD_0_R B46
B RC25 0_0402_5%~D UNCOREPWRGOOD XDP_DBRESET#_R XDP_DBRESET# B
K58 2 1 XDP_DBRESET# <14,16>
DBR# RC26 0_0402_5%~D
PM_DRAM_PWRGD_CPUBE45 G58 @ T128 PAD~D

SM_DRAMPWROK BPM#[0] @ T131 PAD~D
E55
BPM#[1] @ T129 PAD~D
E59
BPM#[2] XDP_TDI_R XDP_TDI
BPM#[3]
G55 @ T130 PAD~D @ T133 PAD~D 1 2 PU/PD for JTAG signals
G59 @ T125 PAD~D RC23 0_0402_5%~D
PCH_PLTRST#_R BPM#[4] @ T126 PAD~D @ T134 PAD~D +3.3V_RUN
D44 H60
RESET# BPM#[5] BPM#6 @ T107 PAD~D
J59
BPM#[6] BPM#7 @ T127 PAD~D XDP_TDO_R XDP_TDO
J61 1 2
BPM#[7] RC24 0_0402_5%~D XDP_DBRESET#RC19 2 1 1K_0402_1%~D
+1.05V_RUN_VTT
T133 place near T107;T134 pleace near T127
XDP_TMS RC27 2 1 51_0402_1%~D
IVY-BRIDGE_BGA1023~D For ESD concern, please put near CPU XDP_TDI RC29 2 1 51_0402_1%~D
XDP_PREQ# @ RC32 2 1 51_0402_1%~D

Buffered reset to CPU +3.3V_RUN VCCPWRGOOD_0_R
+1.05V_RUN_VTT SM_RCOMP2 XDP_TDO RC35 2 1 51_0402_1%~D
SM_RCOMP1
1
0.1U_0402_25V6K~D
SM_RCOMP0
1 RC130
1
140_0402_1%~D
200_0402_1%~D
75_0402_1%~D
RC4
25.5_0402_1%~D
10K_0402_5%~D XDP_TCLK RC40 2 1
1
CC140
51_0402_1%~D
RC42
RC43
RC45
XDP_TRST# RC41 2 1
2
2 51_0402_1%~D
UC1
2
1 5
2
A NC VCC A
<14,17> PCH_PLTRST# 2 A
3 4 PCH_PLTRST#_BUF 1 2 PCH_PLTRST#_R
GND Y RC10 43_0402_5%~D Avoid stub in the PWRGD path
SN74LVC1G07DCKR_SC70-5~D while placing resistors RC25 & RC130
Open drain buffer
Title
Sandy Bridge (2/6)
0.1
5 4 3 2 1
5 4 3 2 1
U1D
U1C
D <13> DDR_B_D[0..63] D
<12> DDR_A_D[0..63] DDR_B_D0 AL4
DDR_A_D0 DDR_B_D1 SB_DQ[0] M_CLK_DDR2
AG6 AL1 BA34 M_CLK_DDR2 <13>
DDR_A_D1 SA_DQ[0] M_CLK_DDR0 DDR_B_D2 SB_DQ[1] SB_CK[0] M_CLK_DDR#2
AJ6 AU36 M_CLK_DDR0 <12> AN3 AY34 M_CLK_DDR#2 <13>
DDR_A_D2 SA_DQ[1] SA_CK[0] M_CLK_DDR#0 DDR_B_D3 SB_DQ[2] SB_CK#[0] DDR_CKE2_DIMMB
AP11 AV36 M_CLK_DDR#0 <12> AR4 AR22 DDR_CKE2_DIMMB <13>
DDR_A_D3 SA_DQ[2] SA_CK#[0] DDR_CKE0_DIMMA DDR_B_D4 SB_DQ[3] SB_CKE[0]
AL6 AY26 DDR_CKE0_DIMMA <12> AK4
DDR_A_D4 SA_DQ[3] SA_CKE[0] DDR_B_D5 SB_DQ[4]
AJ10 AK3
DDR_A_D5 SA_DQ[4] DDR_B_D6 SB_DQ[5]
AJ8 AN4
AL8 AR1
AL7 AU4
DDR_A_D8 SA_DQ[7] DDR_B_D9 SB_DQ[8] M_CLK_DDR3
AR11 AT2 BA36 M_CLK_DDR3 <13>
DDR_A_D9 SA_DQ[8] M_CLK_DDR1 DDR_B_D10 SB_DQ[9] SB_CK[1] M_CLK_DDR#3
AP6 SA_DQ[9] SA_CK[1] AT40 M_CLK_DDR1 <12> AV4 SB_DQ[10] SB_CK#[1] BB36 M_CLK_DDR#3 <13>
DDR_A_D10 AU6 AU40 M_CLK_DDR#1 DDR_B_D11 BA4 BF27 DDR_CKE3_DIMMB
SA_DQ[10] SA_CK#[1] M_CLK_DDR#1 <12> SB_DQ[11] SB_CKE[1] DDR_CKE3_DIMMB <13>
DDR_A_D11 AV9 BB26 DDR_CKE1_DIMMA DDR_B_D12 AU3
DDR_A_D12 SA_DQ[11] SA_CKE[1] DDR_CKE1_DIMMA <12> DDR_B_D13 SB_DQ[12]
AR6 SA_DQ[12] AR3 SB_DQ[13]
DDR_A_D13 AP8 DDR_B_D14 AY2
AT13 SA_DQ[14] BA3 SB_DQ[15]
DDR_A_D15 AU13 DDR_B_D16 BE9
DDR_A_D16 SA_DQ[15] DDR_B_D17 SB_DQ[16] DDR_CS2_DIMMB#
BC7 SA_DQ[16] BD9 SB_DQ[17] SB_CS#[0] BE41 DDR_CS2_DIMMB# <13>
DDR_A_D17 BB7 BB40 DDR_CS0_DIMMA# DDR_B_D18 BD13 BE47 DDR_CS3_DIMMB#
SA_DQ[17] SA_CS#[0] DDR_CS0_DIMMA# <12> SB_DQ[18] SB_CS#[1] DDR_CS3_DIMMB# <13>
DDR_A_D18 BA13 BC41 DDR_CS1_DIMMA# DDR_B_D19 BF12
DDR_A_D19 SA_DQ[18] SA_CS#[1] DDR_CS1_DIMMA# <12> DDR_B_D20 SB_DQ[19]
BB11 SA_DQ[19] BF8 SB_DQ[20]
DDR_A_D20 BA7 DDR_B_D21 BD10
BA9 SA_DQ[21] BD14 SB_DQ[22]
DDR_A_D22 BB9 DDR_B_D23 BE13
DDR_A_D23 SA_DQ[22] DDR_B_D24 SB_DQ[23] M_ODT2
AY13 SA_DQ[23] BF16 SB_DQ[24] SB_ODT[0] AT43 M_ODT2 <13>
DDR_A_D24 AV14 AY40 M_ODT0 DDR_B_D25 BE17 BG47 M_ODT3
DDR_A_D25 SA_DQ[24] SA_ODT[0] M_ODT1 M_ODT0 <12> DDR_B_D26 SB_DQ[25] SB_ODT[1] M_ODT3 <13>
AR14 SA_DQ[25] SA_ODT[1] BA41 M_ODT1 <12> BE18 SB_DQ[26]
DDR_A_D26 AY17 DDR_B_D27 BE21
AR19 SA_DQ[27] BE14 SB_DQ[28]
DDR_A_D28 BA14 DDR_B_D29 BG14
AU14 SA_DQ[29] BG18 SB_DQ[30] DDR_B_DQS#[0..7] <13>
C DDR_A_D30 DDR_B_D31 DDR_B_DQS#0 C
BB14 SA_DQ[30] DDR_A_DQS#[0..7] <12> BF19 SB_DQ[31] SB_DQS#[0] AL3
DDR_A_D31 BB17 AL11 DDR_A_DQS#0 DDR_B_D32 BD50 AV3 DDR_B_DQS#1
DDR_A_D32 SA_DQ[31] SA_DQS#[0] DDR_A_DQS#1 DDR_B_D33 SB_DQ[32] SB_DQS#[1] DDR_B_DQS#2
BA45 SA_DQ[32] SA_DQS#[1] AR8 BF48 SB_DQ[33] SB_DQS#[2] BG11
DDR_A_D33 AR43 AV11 DDR_A_DQS#2 DDR_B_D34 BD53 BD17 DDR_B_DQS#3
AW48 SA_DQ[34] SA_DQS#[3] AT17 BF52 SB_DQ[35] SB_DQS#[4] BG51
DDR_A_D35 BC48 AV45 DDR_A_DQS#4 DDR_B_D36 BD49 BA59 DDR_B_DQS#5
BC45 SA_DQ[36] SA_DQS#[5] AY51 BE49 SB_DQ[37] SB_DQS#[6] AT60
DDR SYSTEM MEMORY B

DDR_A_D37 AR45 AT55 DDR_A_DQS#6 DDR_B_D38 BD54 AK59 DDR_B_DQS#7
SA_DQ[37] SA_DQS#[6] SB_DQ[38] SB_DQS#[7]
DDR SYSTEM MEMORY A
DDR_A_D38 AT48 AK55 DDR_A_DQS#7 DDR_B_D39 BE53

DDR_A_D39 SA_DQ[38] SA_DQS#[7] DDR_B_D40 SB_DQ[39]
AY48 BF56
BA49 BE57
AV49 BC59
BB51 AY60
AY53 BE54
BB49 DDR_A_DQS[0..7] <12> BG54 DDR_B_DQS[0..7] <13>
DDR_A_D45 SA_DQ[44] DDR_A_DQS0 DDR_B_D46 SB_DQ[45] DDR_B_DQS0
AU49 AJ11 BA58 AM2
DDR_A_D46 SA_DQ[45] SA_DQS[0] DDR_A_DQS1 DDR_B_D47 SB_DQ[46] SB_DQS[0] DDR_B_DQS1
BA53 AR10 AW59 AV1
BB55 AY11 AW58 BE11
BA55 AU17 AU58 BD18
AV56 AW45 AN61 BE51
AP50 AV51 AN59 BA61
AP53 AT56 AU59 AR59
AV54 AK54 AU61 AK61
DDR_A_D53 SA_DQ[52] SA_DQS[7] DDR_B_D54 SB_DQ[53] SB_DQS[7]
AT54 AN58
AP56 AR58
AP52 AK58
AN57 AL58
AN53 AG58
AG56 AG59 DDR_B_MA[0..15] <13>
AG53 DDR_A_MA[0..15] <12> AM60
DDR_A_D60 SA_DQ[59] DDR_B_D61 SB_DQ[60] DDR_B_MA0
AN55 AL59 BF32
DDR_A_D61 SA_DQ[60] DDR_A_MA0 DDR_B_D62 SB_DQ[61] SB_MA[0] DDR_B_MA1
AN52 BG35 AF61 BE33
B DDR_A_D62 SA_DQ[61] SA_MA[0] DDR_A_MA1 DDR_B_D63 SB_DQ[62] SB_MA[1] DDR_B_MA2 B
AG55 BB34 AH60 BD33
DDR_A_D63 SA_DQ[62] SA_MA[1] DDR_A_MA2 SB_DQ[63] SB_MA[2] DDR_B_MA3
AK56 BE35 AU30
SA_DQ[63] SA_MA[2] DDR_A_MA3 SB_MA[3] DDR_B_MA4
BD35 BD30
SA_MA[3] DDR_A_MA4 SB_MA[4] DDR_B_MA5
AT34 AV30
AU34 BG30
SA_MA[5] DDR_A_MA6 DDR_B_BS0 SB_MA[6] DDR_B_MA7
BB32 <13> DDR_B_BS0 BG39 BD29
DDR_A_BS0 SA_MA[6] DDR_A_MA7 DDR_B_BS1 SB_BS[0] SB_MA[7] DDR_B_MA8
<12> DDR_A_BS0 BD37 AT32 <13> DDR_B_BS1 BD42 BE30
DDR_A_BS1 SA_BS[0] SA_MA[7] DDR_A_MA8 DDR_B_BS2 SB_BS[1] SB_MA[8] DDR_B_MA9
<12> DDR_A_BS1 BF36 AY32 <13> DDR_B_BS2 AT22 BE28
DDR_A_BS2 SA_BS[1] SA_MA[8] DDR_A_MA9 SB_BS[2] SB_MA[9] DDR_B_MA10
<12> DDR_A_BS2 BA28 AV32 BD43
SA_BS[2] SA_MA[9] DDR_A_MA10 SB_MA[10] DDR_B_MA11
BE37 AT28
BA30 AV28
SA_MA[11] DDR_A_MA12 DDR_B_CAS# SB_MA[12] DDR_B_MA13
BC30 <13> DDR_B_CAS# AV43 BD46
DDR_A_CAS# SA_MA[12] DDR_A_MA13 DDR_B_RAS# SB_CAS# SB_MA[13] DDR_B_MA14
<12> DDR_A_CAS# BE39 AW41 <13> DDR_B_RAS# BF40 AT26
DDR_A_RAS# SA_CAS# SA_MA[13] DDR_A_MA14 DDR_B_WE# SB_RAS# SB_MA[14] DDR_B_MA15
<12> DDR_A_RAS# BD39 AY28 <13> DDR_B_WE# BD45 AU22
DDR_A_WE# SA_RAS# SA_MA[14] DDR_A_MA15 SB_WE# SB_MA[15]
<12> DDR_A_WE# AT41 AU26
SA_WE# SA_MA[15]
A A
Title
Sandy Bridge (3/6)
0.1
5 4 3 2 1
5 4 3 2 1
CFG Straps for Processor
CFG2
1
@ RC51
1K_0402_1%~D
2
D D
U1E
+VCC_GFXCORE
1 2 VAXG_VAL_SENSE <7> CFG0

CFG0 B50
CFG[0] RSVD28
BE7 +DIMM0_1_VREF_CPU +DIMM0_1_VREF_CPU
@ RC122 49.9_0402_1%~D @ T11 PAD~D CFG1 C51 BG7 +DIMM0_1_CA_CPU PEG Static Lane Reversal - CFG2 is for the 16x
CFG[1] RSVD29 +DIMM0_1_CA_CPU
1
CFG2 B54
@ RC69 @ T13 PAD~D CFG3 CFG[2]
D53
CFG4 CFG[3]
100_0402_1%~D A51
CFG[4] RSVD30
N42 1:(Default) Normal Operation; Lane #
CFG5 C53 L42 CFG2
CFG6 C55
CFG[5] RSVD31
L45
definition matches socket pin map definition
2
CFG[6] RSVD32
1 2 VSSAXG_VAL_SENSE CFG7 H49 CFG[7] RSVD33 L47 0:Lane Reversed
@ RC123 49.9_0402_1%~D @ T17 PAD~D CFG8 A55
@ T18 PAD~D CFG9 CFG[8]
H51 CFG[9]
@ T15 PAD~D CFG10 K49 M13
@ T16 PAD~D CFG11 CFG[10] RSVD34 CFG4
K53 CFG[11] RSVD35 M14
@ T9 PAD~D CFG12 F53 U14
CFG[12] RSVD36
1
@ T10 PAD~D CFG13 G53 W14
@ T12 PAD~D CFG14 CFG[13] RSVD37 @ RC52
L51 CFG[14] RSVD38 P13
@ T14 PAD~D CFG15 F51 1K_0402_1%~D
@ T20 PAD~D CFG16 CFG[15]
D52 CFG[16]
@ T19 PAD~D CFG17 L53 AT49
2
CFG[17] RSVD39
RSVD40 K24
RESERVED
VCC_VAL_SNESE H43
VSS_VAL_SNESE VCC_VAL_SENSE
K43 VSS_VAL_SENSE RSVD41 AH2
+VCC_CORE AG13
RSVD42
RSVD43 AM14
1 2 VCC_VAL_SNESE VAXG_VAL_SENSE H45 VAXG_VAL_SENSE RSVD44 AM15 Display Port Presence Strap
@ RC120 49.9_0402_1%~D VSSAXG_VAL_SENSE K45 VSSAXG_VAL_SENSE
1
C EDS 1.0 RSVD_12 -> VCC_DIE_SENSE C

RSVD45 N50 1 : Disabled; No Physical Display Port
@ RC71 PAD~D T22 @ TP_VCC_DIESENSE F48 CFG4
VCC_DIE_SENSE attached to Embedded Display Port
100_0402_1%~D
H48 0 : Enabled; An external Display Port device is

2
RSVD6
1 2 VSS_VAL_SNESE K48 RSVD7 connected to the Embedded Display Port
@ RC121 49.9_0402_1%~D A4 TP_DC_TEST_A4 @ T121 PAD~D
DC_TEST_A4
C4
DC_TEST_C4 DC_TEST_C4_D3
BA19 D3
RSVD8 DC_TEST_D3 TP_DC_TEST_D1 @ T118 PAD~D
AV19 D1
RSVD9 DC_TEST_D1 TP_DC_TEST_A58 @ T119 PAD~D CFG6
AT21 A58
RSVD10 DC_TEST_A58
BB21 A59
RSVD11 DC_TEST_A59 DC_TEST_A59_C59 CFG5
BB19 C59
RSVD12 DC_TEST_C59
AY21 A61
RSVD13 DC_TEST_A61
1
BA22 C61 DC_TEST_A61_C61
RSVD14 DC_TEST_C61 TP_DC_TEST_D61 @ T120 PAD~D @ RC54 @ RC53
AY22 D61
RSVD15 DC_TEST_D61 TP_DC_TEST_BD61 @ T122 PAD~D 1K_0402_1%~D
AU19 BD61 1K_0402_1%~D
RSVD16 DC_TEST_BD61
AU21 BE61
RSVD17 DC_TEST_BE61 DC_TEST_BE59_BE61
BD21 BE59
2
RSVD18 DC_TEST_BE59
BD22 BG61
RSVD19 DC_TEST_BG61 DC_TEST_BG59_BG61
BD25 BG59
RSVD20 DC_TEST_BG59 TP_DC_TEST_BG58 @ T132 PAD~D
BD26 BG58
RSVD21 DC_TEST_BG58 TP_DC_TEST_BG4 @ T123 PAD~D
BG22 BG4
RSVD22 DC_TEST_BG4
BE22 BG3
RSVD23 DC_TEST_BG3 DC_TEST_BE3_BG3
BG26 BE3
RSVD24 DC_TEST_BE3
BE26 BG1
RSVD25 DC_TEST_BG1 DC_TEST_BE1_BG1
BF23 BE1
RSVD26 DC_TEST_BE1 TP_DC_TEST_BD1 @ T124 PAD~D
BE24
RSVD27 DC_TEST_BD1
BD1 PCIE Port Bifurcation Straps
1 2 +DIMM0_1_VREF_CPU
@ RC96 1K_0402_1%~D 11: (Default) x16 - Device 1 functions 1 and 2 disabled
1 2 +DIMM0_1_CA_CPU
B B
@ RC97 1K_0402_1%~D IVY-BRIDGE_BGA1023~D CFG[6:5] 10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG7
1
@ RC56
1K_0402_1%~D
2
PEG DEFER TRAINING
1: (Default) PEG Train immediately

CFG7 following xxRESETB de assertion
0: PEG Wait for BIOS for training
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Sandy Bridge (4/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
LA-7741
5 4 3 2 1
5 4 3 2 1
U1F POWER +1.05V_RUN_VTT
+VCC_CORE
8.5A
VCCIO[1] AF46
53A VCCIO[3] AG48
AG50
VCCIO[4]
A26 VCC[1] VCCIO[5] AG51
A29 AJ17
VCC[2] VCCIO[6]
A31 AJ21
VCC[3] VCCIO[7]
A34 AJ25
D VCC[4] VCCIO[8] D
A35 AJ43
VCC[5] VCCIO[9]
A38 AJ47
VCC[6] VCCIO[10]
A39 AK50
VCC[7] VCCIO[11]
A42 AK51
VCC[8] VCCIO[12]
C26 AL14
VCC[9] VCCIO[13]
C27 AL15
VCC[10] VCCIO[14]
C32 AL16
VCC[11] VCCIO[15]
C34 AL20
VCC[12] VCCIO[16]
C37 AL22
VCC[13] VCCIO[17]
C39 AL26
VCC[14] VCCIO[18]
C42 AL45
VCC[15] VCCIO[19]
D27 VCC[16] VCCIO[20] AL48
D32 VCC[17] VCCIO[21] AM16
D39 AM43
PEG IO AND DDR IO

VCC[20] VCCIO[24]
E26 VCC[22] VCCIO[26] AN20
E37 VCC[26]
E38 VCC[27]
CORE SUPPLY
F25 VCC[28]
F26 VCC[29]
F28 VCC[30]
F32 +1.05V_RUN_VTT
VCC[31]
F34 VCC[32]
F37 VCC[33] VCCIO[30] AA14
F38 VCC[34] VCCIO[31] AA15
F42 VCC[35] VCCIO[32] AB17
G42 VCC[36] VCCIO[33] AB20
C C
H25 VCC[37] VCCIO[34] AC13
H26 VCC[38] VCCIO[35] AD16
H32 AE14 +1.05V_RUN_VTT
VCC[41] VCCIO[38]
H34 VCC[42] VCCIO[39] AE15
H35 VCC[43] VCCIO[40] AF16
1
H37 AF18
VCC[44] VCCIO[41]
H38 AF20 Note: Place the PU resistors close to CPU RC60
VCC[45] VCCIO[42] 75_0402_1%~D
H40 AG15 RC61 close to CPU 300 - 1500mils
VCC[46] VCCIO[43]
J25 AG16
VCC[47] VCCIO[44]
J26 AG17
2
VCC[48] VCCIO[45]
J28 AG20
VCC[49] VCCIO[46] H_CPU_SVIDALRT#
J29 AG21 1 2 VIDALERT_N <51>
VCC[50] VCCIO[47] RC61 43_0402_5%~D
J32 AJ14
VCC[51] VCCIO[48]
J34 AJ15
VCC[52] VCCIO[49]
J35
VCC[53]
J37
VCC[54] +3.3V_RUN
J38
VCC[55]
J40
VCC[56]
J42
VCC[57] CAD Note: Place the PU
K26 W16
VCC[58] VCCIO50
2
K27 W17 @ resistors close to CPU
VCC[59] VCCIO51 RC141
K29 RC63 close to CPU 300 - 1500mils
VCC[60]
K32 10K_0402_5%~D
VCC[61]
K34
VCC[62]
K35 Iccmax current changed for PDDG Rev0.7
1
VCC[63]
K37
VCC[64]
K39
K42
VCC[66]
BC22 1 2
CPU Power Rail Table
VCC[67] VCCIO_SEL VCCP_PWRCTRL <50>
L25
VCC[68]
RC140 0_0402_5%~D S0 Iccmax
L28
VCC[69]
Voltage Rail Voltage Current (A)
B B
L33
VCC[70]
L36
VCC[71] +1.05V_RUN_VTT
H_CPU_SVIDALRT# must be routed between the
L40 VCC 0.65-1.3 53
N26
VCC[72] VIDSOUT and VIDSCLK lines to reduce cross
VCC[73]
1U_0402_6.3V6K~D
talk. 18 mils spacing to others.
QUIET
RAILS
N30 AM25
VCC[74] VCCPQE[1]
N34
VCC[75] VCCPQE[2]
AN22 VCCIO 1.05/1 8.5
N38 1
VCC[76] +1.05V_RUN_VTT
CC573
VAXG 0.0-1.1 33
1
2
RC63 VCCPLL 1.8 1.2
130_0402_1%~D
A44 H_CPU_SVIDALRT#
VIDALERT# VIDSCLK
B43 VIDSCLK <51> VDDQ 1.5 5
2
VIDSCLK
SVID
C44 VIDSOUT
VIDSOUT VIDSOUT <51>
+VCC_CORE VCCSA 0.65-0.9 6
1
@ RC75 +1.5V_MEM 1.5 12-16 *
100_0402_1%~D RC66
Place RC66, RC70 ,RC133near CPU 1 2 100_0402_1%~D
2
VCCSENSE_R Description
VCC_SENSE
F43 1 2 VCCSENSE <51> *
SENSE LINES
G43 VSSSENSE_R RC67 1 2 0_0402_5%~D

VSS_SENSE VSSSENSE <51>
RC68 0_0402_5%~D 5A to Mem controller(+1.5V_CPU_VDDQ)
5-6A to 2 DIMMs/channel
1
2 1 +1.05V_RUN_VTT 2-5A to +1.5V_RUN & +0.75V_DDR_VTT
RC98 10_0402_1%~D RC70
VCCIO_SENSE AN16 VTT_SENSE <50> 100_0402_1%~D
A A
VSS_SENSE_VCCIO AN17 VTT_GND <50>
2
1 2
RC133 10_0402_1%~D
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Sandy Bridge (5/6)
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW2 +PWR_SRC_S +1.5V_MEM QC3 +1.5V_CPU_VDDQ

AO4728L_SO8~D
8 1
10U_0603_6.3V6M~D
7 2
1
@
20K_0402_5%~D
6 3 1
CC135
RC73
RC74 RC72 5
100K_0402_5%~D 100K_0402_5%~D U1H
+1.5V_CPU_VDDQ Source
4
RUN_ON_CPU1.5VS3 2
2
3
+1.5V_CPU_VDDQ
DMN66D0LDW-7_SOT363-6~D
330K_0402_1%~D
0.1U_0603_50V7K~D
A13 AM38
VSS[1] VSS[91]
1
QC4B
1K_0402_1%~D
1 A17 AM4
VSS[2] VSS[92]
1
RC143
1 2 QC4A 5 A21 AM42
<16,27,35,39,42,48> SIO_SLP_S3# VSS[3] VSS[93]
CC136
D RC82 0_0402_5%~D D
A25 AM45
RC84
VSS[4] VSS[94]
A28 AM48
4
2 VSS[5] VSS[95]
<40> CPU1.5V_S3_GATE 1 2 2 A33 AM58
2
@ RC79 0_0402_5%~D VSS[6] VSS[96]
A37 AN1
2
VSS[7] VSS[97]
+V_SM_VREF_CNT A40 AN21
1
VSS[8] VSS[98]
A45 AN25
POWER VSS[9] VSS[99]
1K_0402_1%~D
A49 AN28
VSS[10] VSS[100]
1
U1G A53 AN33
RUN_ON_CPU1.5VS3# <7,42> +V_SM_VREF_CNT VSS[11] VSS[101]
33A A9 AN36
RC78
VSS[12] VSS[102]
AA1 AN40
+VCC_GFXCORE VSS[13] VSS[103]
AA13 AN43
VSS[14] VSS[104]
AY43 AA50 AN47
2
SM_VREF VSS[15] VSS[105]
AA46 AA51 AN50
VREF
VAXG[1] VSS[16] VSS[106]
AB47 VAXG[2] AA52 VSS[17] VSS[107] AN54
AB50 +V_SM_VREF should AA53 AP10
AB51 VAXG[4] have 20 mil trace width AA55 VSS[19] VSS[109] AP51
AB52 VAXG[5] AA56 VSS[20] VSS[110] AP55
AB53 VAXG[6] AA8 VSS[21] VSS[111] AP7
AB55 VAXG[7] AB16 VSS[22] VSS[112] AR13
AB56
AB58
VAXG[8] 5A AB18
AB21
VSS[23] VSS[113] AR17
AR21
AB59 VAXG[10] AB48 VSS[25] VSS[115] AR41
AC61 +1.5V_CPU_VDDQ CC178 2 1 0.1U_0402_10V7K~D AB61 AR48
AD47 VAXG[12] AC10 VSS[27] VSS[117] AR61
AD48 VAXG[13] AC14 VSS[28] VSS[118] AR7
AD50 CC179 2 1 0.1U_0402_10V7K~D AC46 AT14
AD51 VAXG[15] VDDQ[1] AJ28 AC6 VSS[30] VSS[120] AT19
- 1.5V RAILS
AD52 VAXG[16] VDDQ[2] AJ33 AD17 VSS[31] VSS[121] AT36
AD53 AJ36 CC149 2 1 0.1U_0402_10V7K~D AD20 AT4
VAXG[17] VDDQ[3] VSS[32] VSS[122]
AD55 AJ40 AD4 AT45
C
AD56
AD58
VAXG[18]
VAXG[19]
VAXG[20]
VDDQ[4]
VDDQ[5]
VDDQ[6]
AL30
AL34 +1.5V_CPU_VDDQ CC150 2 1 0.1U_0402_10V7K~D +1.5V_MEM
AD61
AE13
VSS[33]
VSS[34]
VSS[35]
VSS VSS[123]
VSS[124]
VSS[125]
AT52
AT58
C
AD59 VAXG[21] VDDQ[7] AL38 AE8 VSS[36] VSS[126] AU1
AE46 VAXG[22] VDDQ[8] AL42 AF1 VSS[37] VSS[127] AU11
N45 VAXG[23] VDDQ[9] AM33 AF17 VSS[38] VSS[128] AU28
P47 VAXG[24] VDDQ[10] AM36 AF21 VSS[39] VSS[129] AU32
P48 VAXG[25] VDDQ[11] AM40 AF47 VSS[40] VSS[130] AU51
P50 VAXG[26] VDDQ[12] AN30 AF48 VSS[41] VSS[131] AU7
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_D2_2VM_R6M~D
P51 VAXG[27] VDDQ[13] AN34 1 1 1 1 1 1 1 1 1 AF50 VSS[42] VSS[132] AV17
P52 AN38 AF51 AV21
CC181
CC180
CC161
CC162
CC163
CC164
CC165
CC166
CC167
P53 AR26 + AF52 AV22
DDR3
P55 AR28 AF53 AV34
GRAPHICS
VAXG[30] VDDQ[16] 2 2 2 2 2 2 2 2 VSS[45] VSS[135]
P56 AR30 AF55 AV40
VAXG[31] VDDQ[17] 2 VSS[46] VSS[136]
P61 AR32 AF56 AV48
T48 AR34 AF58 AV55
T58 AR36 AF59 AW13
T59 AR40 AG10 AW43
T61 AV41 AG14 AW61
U46 AW26 AG18 AW7
V47 BA40 AG47 AY14
V48 BB28 AG52 AY19
V50 BG33 AG61 AY30
V51 AG7 AY36
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
V52 AH4 AY4
V53 1 1 1 1 1 1 1 1 1 1 AH58 AY41
CC250
CC251
CC252
CC253
CC254
CC255
CC256
CC257
CC258
CC259
V55 AJ13 AY45
V56 AJ16 AY49
V58 AJ20 AY55
VAXG[46] 2 2 2 2 2 2 2 2 2 2 VSS[61] VSS[151]
V59 AJ22 AY58
W50 AJ26 AY9
W51 AJ30 BA1
W52 AJ34 BA11
W53 AJ38 BA17
W55 AJ42 BA21
B VAXG[52] VSS[67] VSS[157] B
W56 AJ45 BA26
+VCC_GFXCORE VAXG[53] VSS[68] VSS[158]
W61 AJ48 BA32
Y48 AJ7 BA48
Y61 AK1 BA51
1
AK52 BB53
RC99 @RC76
@ RC76 VSS[72] VSS[162]
AL10 BC13
100_0402_1%~D +1.5V_CPU_VDDQ VSS[73] VSS[163]
100_0402_1%~D AL13 BC5
VSS[74] VSS[164]
1 2 AL17 BC57
VSS[75] VSS[165]
AL21 BD12
2
VSS[76] VSS[166]
QUIET RAILS
AM28 AL25 BD16

SENSE
LINES
VCCDQ[1] VSS[77] VSS[167]
1U_0402_6.3V6K~D
<51> VCC_AXG_SENSE F45 AN26 AL28 BD19
VAXG_SENSE VCCDQ[2] VSS[78] VSS[168]
<51> VSS_AXG_SENSE G45 1 AL33 BD23
VSSAXG_SENSE VSS[79] VSS[169]
AL36 BD27
VSS[80] VSS[170]
CC574
AL40 BD32
VSS[81] VSS[171]
1
AL43 BD36
RC100 2 VSS[82] VSS[172]
AL47 BD40
+1.8V_RUN VSS[83] VSS[173]
1.2A AL61 BD44
1.8V RAIL
100_0402_1%~D VSS[84] VSS[174]

AM13 BD48
VSS[85] VSS[175]
BB3 AM20 BD52
2
VCCPLL[1] VSS[86] VSS[176]

330U_D2_2.5VM_R6M~D
1 BC1 AM22 BD56

1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 BC4 AM26 BD8

CC176
+ AM30 BE5
VSS[89] VSS[179]
CC174
CC175
AM34 BG13
VSS[90] VSS[180]
2 2 2 BC43
+VCC_SA VDDQ_SENSE
BA43
VSS_SENSE_VDDQ
SENSE LINES
6A L17
VCCSA[1] IVY-BRIDGE_BGA1023~D
L21
VCCSA[2]
N16
VCCSA[3]
330U_D2_2VM_R6M~D
N20
VCCSA[4]
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
N22
SA RAIL
A VCCSA[5] A
1 1 1 1 1 1 1 1 1 1 1 P17 VCCSA[6]
CC264
CC263
CC262
CC261
CC260
P20 VCCSA[7] VCCSA_SENSE U10 +VCCSA_SENSE <54>

CC172
CC171
CC170
CC169
CC168
CC183
+ R16 VCCSA[8]
R18 VCCSA[9]
2 2 2 2 2 2 2 2 2 2
R21
2 U15
VCCSA[10] DELL CONFIDENTIAL/PROPRIETARY
VCCSA VID
VCCSA[11] RC139 0_0402_5%~D

V16 VCCSA[12]
V17 VCCSA[13] VCCSA_VID[0] D48 1 2 VCCSA_VID_0 <54> Compal Electronics, Inc.
lines
V18 VCCSA[14] VCCSA_VID[1] D49 1 2 VCCSA_VID_1 <54>

V21 RC138 0_0402_5%~D Title
VCCSA[15]
W20 VCCSA[16] Sandy Bridge (6/6)
0.1
LA-7741
IVY-BRIDGE_BGA1023~D Date: Thursday, June 23, 2011 Sheet 11 of 56
5 4 3 2 1
5 4 3 2 1
+V_DDR_REFA_M3 1
RD7
2
0_0402_5%~D +DIMM1_VREF_DQ JDIMM1 H=4
+V_DDR_REF 1 2 +1.5V_MEM +1.5V_MEM 2-3A to 1 DIMMs/channel
RD1 0_0402_5%~D JDIMM1
1 VREF_DQ VSS 2
3 4 DDR_A_D4
VSS DQ4
2.2U_0603_6.3V6K~D
0.1U_0402_25V6K~D
DDR_A_D0 5 6 DDR_A_D5
DDR_A_D1 DQ0 DQ5 +1.5V_MEM
7 DQ1 VSS 8
1 1 9 10 DDR_A_DQS#0
VSS DQS0#
CD2
11 12 DDR_A_DQS0
DM0 DQS0
CD1
13 14
VSS VSS
1
2 2 DDR_A_D3 DQ2 DQ6 DDR_A_D7 RD27
17 18
D DQ3 DQ7 1K_0402_1%~D D
19 20
DDR_A_D8 VSS VSS DDR_A_D12
21 22
DDR_A_D9 DQ8 DQ12 DDR_A_D13
23 24
2
DQ9 DQ13
25 26
DDR_A_DQS#1 VSS VSS DDR3_DRAMRST#_R 1
27 28 <13> DDR3_DRAMRST#_R 2 DDR3_DRAMRST# <7>
DDR_A_DQS1 DQS1# DM1 DDR3_DRAMRST#_R RD28 1K_0402_1%~D
29 30
DQS1 RESET#
31 32
33 34
35 36
DQ11 DQ15
Populate RD1, De-Populate RD7 for Intel DDR3 37
VSS VSS
38
VREFDQ multiple methods M1 DDR_A_D17 41
DQ16 DQ20
42 DDR_A_D21
Populate RD7, De-Populate RD1 for Intel DDR3 DQ17 DQ21
43 VSS VSS 44
VREFDQ multiple methods M3 DDR_A_DQS#2 45 46
DDR_A_DQS2 DQS2# DM2 @ RD29 1
47 DQS2 VSS 48 2 0_0402_5%~D
49 50 DDR_A_D22
DDR_A_D18 VSS DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54 QD1
DQ19 VSS
D
All VREF traces should 55 56 DDR_A_D28 +DIMM0_1_VREF_CPU 3 1 BSS138_NL_SOT23-3 +V_DDR_REFA_M3
have 10 mil trace width 57 DQ24 DQ29 58
DDR_A_D25 59 60
DQ25 VSS DDR_A_DQS#3
61 62
G
2
VSS DQS3# DDR_A_DQS3
<8> DDR_A_DQS#[0..7] 63 DM3 DQS3 64
65 66 DDR_HVREF_RST
DDR_A_D26 VSS VSS DDR_A_D30 <7> DDR_HVREF_RST
<8> DDR_A_D[0..63] 67 DQ26 DQ30 68
DQ27 DQ31
<8> DDR_A_DQS[0..7] 71 VSS VSS 72
@ RD30 1 2 0_0402_5%~D
<8> DDR_A_MA[0..15]
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
<8> DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA <8>
75 VDD VDD 76
77 78 DDR_A_MA15 QD2
C NC A15 C
D
DDR_A_BS2 79 80 DDR_A_MA14 3 1 BSS138_NL_SOT23-3
<8> DDR_A_BS2 BA2 A14 +DIMM0_1_CA_CPU +V_DDR_REFB_M3
81 VDD VDD 82
DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
Layout Note: Note:
G
85 86
2
A9 A7
87 88
Place near JDIMM1 Check voltage tolerance of DDR_A_MA8 89
VDD VDD
90 DDR_A_MA6 DDR_HVREF_RST
A8 A6
VREF_DQ at the DIMM socket DDR_A_MA5 91 A5 A4 92 DDR_A_MA4
93 94
DDR_A_MA3 VDD VDD DDR_A_MA2
95
A3 A2
96 M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
DDR_A_MA1 97 98 DDR_A_MA0
A1 A0
99 100
+1.5V_MEM M_CLK_DDR0 VDD VDD M_CLK_DDR1
<8> M_CLK_DDR0 101 102 M_CLK_DDR1 <8>
M_CLK_DDR#0 CK0 CK1 M_CLK_DDR#1
<8> M_CLK_DDR#0 103 104 M_CLK_DDR#1 <8>
CK0# CK1#
105 106
DDR_A_MA10 VDD VDD DDR_A_BS1
107 108 DDR_A_BS1 <8>
A10/AP BA1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
DDR_A_BS0 109 110 DDR_A_RAS#

<8> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <8>
1 1 1 1 111 112
DDR_A_WE# VDD VDD DDR_CS0_DIMMA#
<8> DDR_A_WE# 113 114 DDR_CS0_DIMMA# <8>
WE# S0#
CD3
CD4
CD5
CD6
DDR_A_CAS# 115 116 M_ODT0

<8> DDR_A_CAS# CAS# ODT0 M_ODT0 <8>
117 118
2 2 2 2 DDR_A_MA13 VDD VDD M_ODT1 +DIMM1_VREF_CA
119 120 M_ODT1 <8>
DDR_CS1_DIMMA# A13 ODT1
<8> DDR_CS1_DIMMA# 121 122
S1# NC
123 124
VDD VDD
125 126 2 1 +V_DDR_REF
TEST VREF_CA RD11 0_0402_5%~D
127 128
VSS VSS
2.2U_0603_6.3V6K~D
0.1U_0402_25V6K~D
DDR_A_D32 129 130 DDR_A_D36
131 132
DQ33 DQ37
133 134 1 1
VSS VSS
CD15
CD16
DDR_A_DQS#4 135 136
+1.5V_MEM DDR_A_DQS4 DQS4# DM4
137 138
DQS4 VSS DDR_A_D38
139 140
DDR_A_D34 VSS DQ38 DDR_A_D39 2 2
141 142
B DDR_A_D35 DQ34 DQ39 B
143 144
DQ35 VSS
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
145 146 DDR_A_D44

147 148
DQ40 DQ45
330U_SX_2VY~D
1 DDR_A_D41 149 150

DQ41 VSS
@ CD13
1 1 1 1 1 1 1 151 152 DDR_A_DQS#5

VSS DQS5#
CD7
CD8
CD9
CD10
CD11
CD51
CD14
+ 153 154 DDR_A_DQS5

DM5 DQS5
155 156
157 158
2 2 2 2 2 2 2 2 DDR_A_D43 DQ42 DQ46 DDR_A_D47
159 160
DQ43 DQ47
161 162
163 164
165 166
DQ49 DQ53
167 168
DDR_A_DQS#6 VSS VSS
169 170
DDR_A_DQS6 DQS6# DM6
171 172
DQS6 VSS DDR_A_D54
173 174
175 176
DDR_A_D51 DQ50 DQ55
177 178
DQ51 VSS DDR_A_D60
Layout Note: 179
VSS DQ60
180
DDR_A_D56 181 182 DDR_A_D61
Place near JDIMM1.203,204 DDR_A_D57 183
DQ56 DQ61
184
DQ57 VSS DDR_A_DQS#7
185 186
VSS DQS7# DDR_A_DQS7
187 188
DM7 DQS7
189 190
191 192
193 194
DQ59 DQ63
195 196
RD21 VSS VSS
2 10K_0402_5%~D 197 198
+0.75V_DDR_VTT SA0 EVENT#
+3.3V_RUN 199 200 DDR_XDP_WAN_SMBDAT <13,15,27,34>
VDDSPD SDA
1 2 201 202 DDR_XDP_WAN_SMBCLK <13,15,27,34>
RD3 10K_0402_5%~D SA1 SCL
1 1 203 204 +0.75V_DDR_VTT
VTT VTT
0.1U_0402_25V6K~D
2.2U_0603_6.3V6K~D
+0.75V_DDR_VTT
CD22
A A
205 GND1 GND1 206
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD21
2 2
1 1 1 1
CD17
CD18
CD19
CD20
TYCO_2-2013022-2~D
2 2 2 2
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT DDRIII-SODIMM SLOT1
5 4 3 2 1
5 4 3 2 1
2-3A to 1 DIMMs/channel
+DIMM2_VREF_DQ +1.5V_MEM +1.5V_MEM
JDIMM2 CONN@
+V_DDR_REFB_M3 1 2 1 2
RD8 0_0402_5%~D VREF_DQ VSS DDR_B_D4
3 4
VSS DQ4
JDIMMB H=8
2.2U_0603_6.3V6K~D
0.1U_0402_25V6K~D
DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 DQ0 DQ5
+V_DDR_REF 1 2 7 DQ1 VSS 8
RD4 0_0402_5%~D 1 1 9 10 DDR_B_DQS#0
VSS DQS0#
CD24
11 12 DDR_B_DQS0
DM0 DQS0
CD23
13 VSS VSS 14
2 2 DDR_B_D3 DQ2 DQ6 DDR_B_D7
17 18
DQ3 DQ7
19 20
DDR_B_D8 VSS VSS DDR_B_D12
21 22
D DDR_B_D9 DQ8 DQ12 DDR_B_D13 D
23 24
DQ9 DQ13
25 26
DDR_B_DQS#1 VSS VSS
27 28
DDR_B_DQS1 DQS1# DM1 DDR3_DRAMRST#_R
29 30 DDR3_DRAMRST#_R <12>
DQS1 RESET#
Note: 31
VSS VSS
32
Check voltage tolerance of DDR_B_D11 35
DQ10 DQ14
36 DDR_B_D15
DQ11 DQ15
VREF_DQ at the DIMM socket 37
VSS VSS
38
DDR_B_D17 DQ16 DQ20 DDR_B_D21
41 42
DQ17 DQ21
43 44
DDR_B_DQS#2 VSS VSS
45 DQS2# DM2 46
DDR_B_DQS2 47 48
DQS2 VSS DDR_B_D22
49 VSS DQ22 50
Populate RD4, De-Populate RD8 for Intel DDR3 DDR_B_D18 51 52 DDR_B_D23
DDR_B_D19 DQ18 DQ23
VREFDQ multiple methods M1 53 DQ19 VSS 54
55 56 DDR_B_D28
Populate RD8, De-Populate RD4 for Intel DDR3 DDR_B_D24 VSS DQ28 DDR_B_D29
57 DQ24 DQ29 58
VREFDQ multiple methods M3 DDR_B_D25 59 60
DQ25 VSS DDR_B_DQS#3
61 VSS DQS3# 62
63 64 DDR_B_DQS3
DM3 DQS3
65 VSS VSS 66
<8> DDR_B_DQS#[0..7] 69 DQ27 DQ31 70
71 VSS VSS 72
<8> DDR_B_D[0..63]
All VREF traces should
have 10 mil trace width
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
<8> DDR_B_DQS[0..7] <8> DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB <8>
75 VDD VDD 76
77 78 DDR_B_MA15
<8> DDR_B_MA[0..15] DDR_B_BS2 NC A15 DDR_B_MA14
<8> DDR_B_BS2 79 BA2 A14 80
81 VDD VDD 82
C DDR_B_MA12 DDR_B_MA11 C
83 A12/BC# A11 84
Layout Note: DDR_B_MA9 85 86 DDR_B_MA7
A9 A7
87 88
Place near JDIMM2 DDR_B_MA8 89
VDD VDD
90 DDR_B_MA6
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
93 VDD VDD 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 98
A1 A0
99 100
M_CLK_DDR2 VDD VDD M_CLK_DDR3
<8> M_CLK_DDR2 101 102 M_CLK_DDR3 <8>
M_CLK_DDR#2 CK0 CK1 M_CLK_DDR#3
<8> M_CLK_DDR#2 103 104 M_CLK_DDR#3 <8>
+1.5V_MEM CK0# CK1#
105 106
DDR_B_MA10 VDD VDD DDR_B_BS1
107 108 DDR_B_BS1 <8>
DDR_B_BS0 A10/AP BA1 DDR_B_RAS#
<8> DDR_B_BS0 109 110
BA0 RAS# DDR_B_RAS# <8>
111 112
VDD VDD
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
DDR_B_WE# 113 114 DDR_CS2_DIMMB#

<8> DDR_B_WE# WE# S0# DDR_CS2_DIMMB# <8>
1 1 1 1 DDR_B_CAS# 115 116 M_ODT2
<8> DDR_B_CAS# CAS# ODT0 M_ODT2 <8>
117 118
VDD VDD +DIMM2_VREF_CA
CD25
CD26
CD27
CD28
DDR_B_MA13 119 120 M_ODT3

DDR_CS3_DIMMB# A13 ODT1 M_ODT3 <8>
<8> DDR_CS3_DIMMB# 121 122
2 2 2 2 S1# NC
123 124
VDD VDD
125 126 2 1 +V_DDR_REF
TEST VREF_CA RD15 0_0402_5%~D
127 128
VSS VSS
2.2U_0603_6.3V6K~D
0.1U_0402_25V6K~D
DDR_B_D32 129 130 DDR_B_D36
131 132
DQ33 DQ37
133 134 1 1
VSS VSS
CD38
DDR_B_DQS#4 135 136
DQS4# DM4
CD37
DDR_B_DQS4 137 138
+1.5V_MEM DQS4 VSS DDR_B_D38
139 140
DDR_B_D34 VSS DQ38 DDR_B_D39 2 2
141 142
DDR_B_D35 DQ34 DQ39
143 144
DQ35 VSS DDR_B_D44
145 146
VSS DQ44
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_SX_2VY~D
B DDR_B_D40 DDR_B_D45 B
147 148
DDR_B_D41 DQ40 DQ45
149 150
DQ41 VSS DDR_B_DQS#5
1 151 152
VSS DQS5#
@ CD35
1 1 1 1 1 1 1 153 154 DDR_B_DQS5

DM5 DQS5
CD29
CD30
CD31
CD32
CD33
CD34
CD36
+ 155 156
157 158
159 160
2 2 2 2 2 2 2 2 DQ43 DQ47
161 162
163 164
165 166
DQ49 DQ53
167 168
DDR_B_DQS#6 VSS VSS
169 170
DDR_B_DQS6 DQS6# DM6
171 172
DQS6 VSS DDR_B_D54
173 174
DDR_B_D50 VSS DQ54 DDR_B_D55
175 176
DDR_B_D51 DQ50 DQ55
177 178
DQ51 VSS DDR_B_D60
179 180
DDR_B_D56 VSS DQ60 DDR_B_D61
181 182
DDR_B_D57 DQ56 DQ61
Layout Note: 183
DQ57 VSS
184
185 186 DDR_B_DQS#7
Place near JDIMM2.203,204 187
VSS DQS7#
188 DDR_B_DQS7
DM7 DQS7
189 190
191 192
193 194
DQ59 DQ63
195 196
+3.3V_RUN VSS VSS
197 198
SA0 EVENT#
+3.3V_RUN 199 200 DDR_XDP_WAN_SMBDAT <12,15,27,34>
VDDSPD SDA
2 1 201 202 DDR_XDP_WAN_SMBCLK <12,15,27,34>
+0.75V_DDR_VTT RD5 10K_0402_5%~D SA1 SCL
+0.75V_DDR_VTT 203 204 +0.75V_DDR_VTT
VTT VTT
1
10K_0402_5%~D
0.1U_0402_25V6K~D
RD6
205 206
GND1 GND1
2.2U_0603_6.3V6K~D
1 1
CD43
A A
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD44
2
1 1 1 1 TYCO_2-2013297-2~D
2 2
CD39
CD40
CD41
CD42
2 2 2 2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT2
LA-7741
5 4 3 2 1
5 4 3 2 1
CMOS_CLR1 CMOS setting PCH_AZ_SYNC is sampled

at the rising edge of RSMRST# pin. +1.05V_RUN +3.3V_ALW_PCH JXDP2 @
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
So signal should be PU to the ALWAYS rail. +1.05V_RUN
Shunt Clear CMOS 1 OBSFN_A0
1 1 2 OBSFN_A1
PXDP@
CH6
PXDP@
CH1
Open Keep CMOS +3.3V_ALW_PCH
3 GND
4 OBSDATA_A[0]
PXDP@ 5
2 2 RH284 0_0402_5%~D OBSDATA_A[1]
ME_CLR1 TPM setting 6 GND
D
PCH_AZ_SYNC_Q 3 1 PCH_AZ_SYNC RSMRST#_XDP 1 2 7
RH66 OBSDATA_A[2]
Shunt Clear ME RTC Registers 8 OBSDATA_A[3]
1K_0402_1%~D 1 2 QH7 CH1 clsoe to JXDP2 @ RH283 1K_0402_5%~D 9 GND
Open Keep ME RTC Registers RH31 1M_0402_5%~D SSM3K7002FU_SC70-3~D CH6 clsoe to JXDP2 2 1.05V_0.8V_PWROK_R
G
1 10
2
<40,51> 1.05V_0.8V_PWROK HOOK0
+5V_RUN 1 2 PCH_PWRBTN#_XDP 11
2
<7,16> SIO_PWRBTN#_R HOOK1
INTEL HDA_SYNC RH21 0_0402_5%~D 12 HOOK2
PXDP@ 13
+RTC_CELL PCH_AZ_SYNC isolation circuit +3.3V_ALW_PCH 14
HOOK3
HOOK4
15
HOOK5
1
+3.3V_ALW_PCH 16
VCCOBS_AB
1
RH282 @ SIO_PWRBTN#_R 2 1 RSMRST#_XDP 17

D
RH38 100K_0402_5%~D PXDP@ RH41 10K_0402_5%~D XDP_DBRESET# HOOK6 D
18
330K_0402_1%~D <7,16> XDP_DBRESET# HOOK7
19
PCH_JTAG_TDO GND
20
2
TDO
21
2
PCH_INTVRMEN PCH_JTAG_TDI TRSTn

22
PCH_RSMRST#_Q RSMRST#_XDP PCH_JTAG_TMS TDI
<16,41> PCH_RSMRST#_Q 1 2 23
TMS
1
PXDP@ RH24 1K_0402_1%~D 24 27

@ RH39
@RH39 TCK1 GND
On Die PLL VR is supplied by 25
GND GND
28
330K_0402_1%~D CH2 PCH_JTAG_TCK 26
1.5V when sampled high, 1.8 V 15P_0402_50V8J~D TCK0
when sampled low 2 1 PCH_RTCX1 MOLEX_52435-2671
2
1
1
INTVRMEN- Integrated SUS RH2
YH1 10M_0402_5%~D UH4A
1.1V VRM Enable 32.768KHZ_12.5PF_Q13FC1350000~D
* High - Enable Internal VRs CH3 A20 C38 LPC_LAD0
2
RTCX1 FWH0 / LAD0 LPC_LAD1 LPC_LAD0 <32,34,39,40>
15P_0402_50V8J~D A38
Low - Enable External VRs FWH1 / LAD1 LPC_LAD1 <32,34,39,40> +3.3V_RUN
2 1 PCH_RTCX2_R 1 2 PCH_RTCX2 C20 B37 LPC_LAD2
LPC
RTCX2 FWH2 / LAD2 LPC_LAD2 <32,34,39,40>
RH286 0_0402_5%~D C37 LPC_LAD3
FWH3 / LAD3 LPC_LAD3 <32,34,39,40>
1 2 PCH_RTCRST# D20
+RTC_CELL RTCRST#
RH22 20K_0402_5%~D D36 LPC_LFRAME# PCH_GPIO33 2 1
SRTCRST# FWH4 / LFRAME# LPC_LFRAME# <32,34,39,40>
1 2 G22 RH355 100K_0402_5%~D
RH23 20K_0402_5%~D SRTCRST# LPC_LDRQ0#
LDRQ0# E36 LPC_LDRQ0# <39>
1 2 INTRUDER# K22 K36 LPC_LDRQ1# IRQ_SERIRQ 2 1
RTC
INTRUDER# LDRQ1# / GPIO23 LPC_LDRQ1# <39>
RH11 1M_0402_5%~D RH28 8.2K_0402_5%~D
PCH_INTVRMEN C17 V5 IRQ_SERIRQ
INTVRMEN SERIRQ IRQ_SERIRQ <32,39,40>
1 1 2 2 1 1 2 2 SATA0RXN AM3 PSATA_PRX_DTX_N0_C <27>

PCH_AZ_BITCLK N34 AM1 BBS_BIT0_R 1 2
HDA_BCLK SATA0RXP PSATA_PRX_DTX_P0_C <27>
AP7 HDD RH52 4.7K_0402_5%~D
SATA 6G
PCH_AZ_SYNC SATA0TXN PSATA_PTX_DRX_N0_C <27> INTEL feedback 0302
L34 HDA_SYNC SATA0TXP AP5
@ @ PSATA_PTX_DRX_P0_C <27>
ME1 SHORT PADS~D CMOS1 SHORT PADS~D T10 AM10
<29> SPKR SPKR SATA1RXN SATA_ODD_PRX_DTX_N1_C <28>
1 2 1 2 SATA1RXP AM8 SATA_ODD_PRX_DTX_P1_C <28>
CH5 1U_0402_6.3V6K~D CH4 1U_0402_6.3V6K~D PCH_AZ_RST# K34 AP11 ODD/ E Module Bay
HDA_RST# SATA1TXN SATA_ODD_PTX_DRX_N1_C <28>
CMOS place near DIMM SATA1TXP AP10
SATA_ODD_PTX_DRX_P1_C <28>
C C
PCH_AZ_CODEC_SDIN0 E34 AD7 +3.3V_RUN
<29> PCH_AZ_CODEC_SDIN0 HDA_SDIN0 SATA2RXN
SATA2RXP AD5
<29> PCH_AZ_CODEC_SDOUT 1 2 PCH_AZ_SDOUT G34 HDA_SDIN1 SATA2TXN AH5
RH29 33_0402_5%~D AH4 SPKR 2 1
+3.3V_ALW_PCH SATA2TXP
<29> PCH_AZ_CODEC_SYNC 1 2 PCH_AZ_SYNC_Q C34 @ RH35 10K_0402_5%~D
RH26 33_0402_5%~D HDA_SDIN2
1 2 AB8
IHDA
SATA3RXN
<29> PCH_AZ_CODEC_RST# 1 2 PCH_AZ_RST# @ RH287 1K_0402_1%~D A34 AB10 No Reboot Strap
RH27 33_0402_5%~D HDA_SDIN3 SATA3RXP
SATA3TXN AF3
<29> PCH_AZ_CODEC_BITCLK 1 2 PCH_AZ_BITCLK AF1 Low = Default
PCH_AZ_SDOUT SATA3TXP
1 RH25 33_0402_5%~D <39> ME_FWP 1 2 A36 SPKR
HDA_SDO
RH50 1K_0402_1%~D Y7 ESATA_PRX_DTX_N4_C <37>
High = No Reboot
SATA
@CH101
@ CH101 SATA4RXN
SATA4RXP Y5 ESATA_PRX_DTX_P4_C <37>
27P_0402_50V8J~D +3.3V_ALW_PCH PCH_GPIO33
2
C36 HDA_DOCK_EN# / GPIO33 SATA4TXN AD3
ESATA_PTX_DRX_N4_C <37> E-SATA
SATA4TXP AD1
ESATA_PTX_DRX_P4_C <37>
1
USB30_SMI# N32
<28> USB30_SMI# HDA_DOCK_RST# / GPIO13
SATA5RXN Y3 SATA_PRX_DKTX_N5_C <38>
RH288 Y1
SATA5RXP SATA_PRX_DKTX_P5_C <38>
0_0603_5%~D AB3 DOCK
RH59 2 PCH_JTAG_TCK SATA5TXN SATA_PTX_DKRX_N5_C <38>
1 51_0402_1%~D J3 AB1
2
JTAG_TCK SATA5TXP SATA_PTX_DKRX_P5_C <38>

+3.3V_ALW_PCH_JTAG RH44 2 1 200_0402_1%~D PCH_JTAG_TMS H7 Y11 +1.05V_RUN
JTAG_TMS SATAICOMPO
JTAG
RH45 2 1 200_0402_1%~D PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2
JTAG_TDI SATAICOMPI RH40 37.4_0402_1%~D
RH43 2 1 200_0402_1%~D PCH_JTAG_TDO H1 JTAG_TDO +1.05V_RUN
SATA3RCOMPO AB12
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
AB13 SATA3_COMP 1 2
SATA3COMPI
1
RH42 49.9_0402_1%~D
+3.3V_RUN
RH48
RH49
RH47
PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2

SPI_CLK SATA3RBIAS RH46 750_0402_1%~D
1
PCH_SPI_CS0# Y14
2
SPI_CS0# RH30
PCH_SPI_CS1# T1 10K_0402_5%~D
SPI_CS1# SATA_ACT#
P3
SPI
SATALED# SATA_ACT# <43>
2
PCH_SPI_DO V4 V14 HDD_DET#_R 1 2
SPI_MOSI SATA0GP / GPIO21 HDD_DET# <27>
RH290 0_0402_5%~D
B B
PCH_SPI_DIN U3 P1 BBS_BIT0_R 1 3
S
SPI_MISO SATA1GP / GPIO19 PCH_SATA_MOD_EN# <40>
BD82PPSM-QNHN-A0_BGA989~D QH1 BSS138W-7-F_SOT323-3~D
G
2
<7,17> PCH_PLTRST#
BBS_BIT0 - BIOS BOOT STRAP BIT 0
+3.3V_M C746 @SPI +3.3V_M C745

0.1U_0402_25V6K~D 0.1U_0402_25V6K~D
1 2 1 2
1
200 MIL SO8 200 MIL SO8

1
@SPI R890
3.3K_0402_5%~D R891 @SPI
64Mb Flash ROM 3.3K_0402_5%~D 32Mb Flash ROM
U52 @SPI U53 @SPI
2
PCH_SPI_CS0# 1 2 PCH_SPI_CS0_R# 1 8 PCH_SPI_CS1# 1 2 PCH_SPI_CS1_R# 1 8

2
@SPI R935 0_0402_5%~D /CS VCC R936 0_0402_5%~D CS# VCC SPI_HOLD#
2 DO HOLD# 7
PCH_SPI_DIN 1 2 SPI_DIN64 2 7 SPI_HOLD# PCH_SPI_DIN 1 2 SPI_DIN32 3 6 SPI_CLK32 1 2 PCH_SPI_CLK
@SPI R894 33_0402_5%~D DO /HOLD R895 33_0402_5%~D WP# CLK SPI_DO32 R897 33_0402_5%~D
4 GND DI 5
SPI_WP#_SEL 1 2 SPI_WP#_SEL_R 3 6 SPI_CLK64 1 2 PCH_SPI_CLK
<39> SPI_WP#_SEL /WP CLK
@R898
@ R898 0_0402_5%~D @SPI R899 33_0402_5%~D W25Q32BVSSIG_SO8~D
4 5 SPI_DO64 1 2 PCH_SPI_DO
GND DIO @SPI R901 33_0402_5%~D SPI_WP#_SEL_R
1 2 PCH_SPI_DO
W25Q64CVSSIG_SO8~D R900 33_0402_5%~D
JTAA1 CONN@
SPI_DO32 1 1 2 2
3 4 4
SPI_CLK32 5
3 SPI_DIN32 TAA config R895,R897,R900 need change to 0 ohm SD02800008L
PCH_SPI_CLK PCH_SPI_CS0# 5 6 6
7 7 8 8
9 PCH_SPI_CS1_R#
10 10
A A
9
12P_0402_50V8J~D
1 +3.3V_M 11 11 12 12
C1204
13 G1 G2 14
15 G3 G4 16
2
RF team request 17 G5 G6 18
@
TYCO_5-1775013-4~D
Link Done DELL CONFIDENTIAL/PROPRIETARY

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (1/8)
LA-7741
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
QH5A
2
MEM_SMBCLK 6 1 DDR_XDP_WAN_SMBCLK <12,13,27,34>
5
MEM_SMBDATA 3 4
Follow DG0.9 Device DDR_XDP_WAN_SMBDAT <12,13,27,34>
QH5B
D down & Express/Mini UH4B DMN66D0LDW-7_SOT363-6~D D
card topology
PCIE_PRX_WANTX_N1 BG34
<34> PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 PERN1 PCH_SMB_ALERT#
<34> PCIE_PRX_WANTX_P1 BJ34 E12
PCIE_PTX_WANRX_N1 PERP1 SMBALERT# / GPIO11 +3.3V_ALW_PCH
MiniWWAN (Mini Card 1)---> <34> PCIE_PTX_WANRX_N1
AV32
PETN1
PCIE_PTX_WANRX_P1 AU32 H14 MEM_SMBCLK
<34> PCIE_PTX_WANRX_P1 PETP1 SMBCLK
PCIE_PRX_WLANTX_N2 BE34 C9 MEM_SMBDATA SML1_SMBCLK 1 2
<34> PCIE_PRX_WLANTX_N2 PERN2 SMBDATA
PCIE_PRX_WLANTX_P2 BF34 RH298 2.2K_0402_5%~D
<34> PCIE_PRX_WLANTX_P2 PCIE_PTX_WLANRX_N2 PERP2 SML1_SMBDATA
MiniWLAN (Mini Card 2)---> <34> PCIE_PTX_WLANRX_N2
BB32
PETN2 1 2
PCIE_PTX_WLANRX_P2 AY32 RH299 2.2K_0402_5%~D
<34> PCIE_PTX_WLANRX_P2 PETP2 DDR_HVREF_RST_PCH
A12
SMBUS
PCIE_PRX_EXPTX_N3 SML0ALERT# / GPIO60 DDR_HVREF_RST_PCH <7> +3.3V_ALW_PCH
<35> PCIE_PRX_EXPTX_N3 BG36 PERN3
PCIE_PRX_EXPTX_P3 BJ36 C8 LAN_SMBCLK
<35> PCIE_PRX_EXPTX_P3 PERP3 SML0CLK LAN_SMBCLK <31>
EXPRESS Card---> PCIE_PTX_EXPRX_N3 AV34
<35> PCIE_PTX_EXPRX_N3 PCIE_PTX_EXPRX_P3 PETN3 LAN_SMBDATA DDR_HVREF_RST_PCH 2
AU34 PETP3 SML0DATA G12 LAN_SMBDATA <31> 1
<35> PCIE_PTX_EXPRX_P3 RH300 1K_0402_1%~D
PCIE_PRX_EMBTX_N4 BF36 PCH_GPIO74 2 1
<28> PCIE_PRX_EMBTX_N4 PCIE_PRX_EMBTX_P4 PERN4
BE36 RH301 10K_0402_5%~D
<28> PCIE_PRX_EMBTX_P4 PERP4
E3 Module Bay---> PCIE_PTX_EMBRX_N4 AY34 C13 PCH_GPIO74 MEM_SMBCLK 2 1
<28> PCIE_PTX_EMBRX_N4 PCIE_PTX_EMBRX_P4 PETN4 SML1ALERT# / PCHHOT# / GPIO74 RH302 2.2K_0402_5%~D
BB34 PETP4
<28> PCIE_PTX_EMBRX_P4 SML1_SMBCLK MEM_SMBDATA
SML1CLK / GPIO58 E14 2 1
PCIE_PRX_WPANTX_N5 SML1_SMBCLK <40> RH303 2.2K_0402_5%~D
BG37
PCI-E*
<34> PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5 PERN5 SML1_SMBDATA PCH_SMB_ALERT#
1/2vMINI CARD-3 PCIE <34> PCIE_PRX_WPANTX_P5 BH37 PERP5 SML1DATA / GPIO75 M16 SML1_SMBDATA <40> 2 1
PCIE_PTX_WPANRX_N5 AY36 RH304 10K_0402_5%~D
(Mini Card 3)---> <34> PCIE_PTX_WPANRX_N5 PCIE_PTX_WPANRX_P5 BB36
PETN5 PEG_A_CLKRQ# 2 1
<34> PCIE_PTX_WPANRX_P5 PETP5 RH80 10K_0402_5%~D
PCIE_PRX_MMITX_N6 BJ38
<33> PCIE_PRX_MMITX_N6 PERN6
PCIE_PRX_MMITX_P6 BG38
<33> PCIE_PRX_MMITX_P6 PCIE_PTX_MMIRX_N6 PERP6 PCH_CL_CLK1 +3.3V_LAN
MMI ---> AU36 M7 PCH_CL_CLK1 <34>
Controller
<33> PCIE_PTX_MMIRX_N6 PCIE_PTX_MMIRX_P6 PETN6 CL_CLK1
AV36 PETP6
C <33> PCIE_PTX_MMIRX_P6 C
PCIE_PRX_GLANTX_N7 BG40 T11 PCH_CL_DATA1 LAN_SMBCLK 2 1
Link
<31> PCIE_PRX_GLANTX_N7 PCIE_PRX_GLANTX_P7 PERN7 CL_DATA1 PCH_CL_DATA1 <34>
BJ40 RH305 2.2K_0402_5%~D
<31> PCIE_PRX_GLANTX_P7 PCIE_PTX_GLANRX_N7 PERP7 LAN_SMBDATA
10/100/1G LAN ---> <31> PCIE_PTX_GLANRX_N7 AY40 PETN7 2 1
PCIE_PTX_GLANRX_P7 BB40 P10 PCH_CL_RST1# RH306 2.2K_0402_5%~D
<31> PCIE_PTX_GLANRX_P7 PETP7 CL_RST1# PCH_CL_RST1# <34>
BE38 PERN8
BC38
PERP8 CLK_BUF_DMI#
AW38 1 2
PETN8 CLK_BUF_DMI RH74 1
AY38 2 10K_0402_5%~D
PETP8 RH75 10K_0402_5%~D
M10 PEG_A_CLKRQ#
PEG_A_CLKRQ# / GPIO47 CLK_BUF_BCLK
Y40 1 2
<34> CLK_PCIE_MINI1# CLKOUT_PCIE0N RH91 10K_0402_5%~D
Y39
<34> CLK_PCIE_MINI1 CLKOUT_PCIE0P
MiniWWAN (Mini Card 1)---> +3.3V_ALW_PCH 2 1 CLKOUT_PEG_A_N
AB37
RH81 10K_0402_5%~D MINI1CLK_REQ# J2 AB38
<34> MINI1CLK_REQ# PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
CLOCKS
CLK_BUF_DOT96# 1 2
CLK_BUF_DOT96 RH76 1 2 10K_0402_5%~D
AB49 AV22 CLK_CPU_DMI# RH77 10K_0402_5%~D
<31> CLK_PCIE_LAN# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI CLK_CPU_DMI# <7>
AB47 AU22
<31> CLK_PCIE_LAN CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI <7> CLK_BUF_CKSSCD#
10/100/1G LAN ---> 1 2
LANCLK_REQ# M1 CLK_BUF_CKSSCD RH78 1 2 10K_0402_5%~D
<31> LANCLK_REQ# PCIECLKRQ1# / GPIO18
AM12 RH79 10K_0402_5%~D
CLKOUT_DP_N
AM13
CLKOUT_DP_P CLK_PCH_14M
AA48 1 2
<33> CLK_PCIE_MMI# CLKOUT_PCIE2N
MMI Card---> <33> CLK_PCIE_MMI
AA47
CLKOUT_PCIE2P
RH183 10K_0402_5%~D
1 2 BF18 CLK_BUF_DMI#
+3.3V_RUN CLKIN_DMI_N
RH87 10K_0402_5%~D MMICLK_REQ# V10 BE18 CLK_BUF_DMI
<33> MMICLK_REQ# PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
Y37 BJ30 CLK_BUF_BCLK CLOCK TERMINATION for FCIM and need close to PCH
<34> CLK_PCIE_MINI3# CLKOUT_PCIE3N CLKIN_GND1_N CLK_BUF_BCLK
B
MiniWPAN (Mini Card 3)---> <34> CLK_PCIE_MINI3 Y36
CLKOUT_PCIE3P CLKIN_GND1_P
BG30
B
+3.3V_ALW_PCH 2 1
RH152 10K_0402_5%~D MINI3CLK_REQ# A8 CLK_PCI_TPM_TCM
<34> MINI3CLK_REQ# PCIECLKRQ3# / GPIO25 CLK_BUF_DOT96# CLK_SIO_14M
G24
CLKIN_DOT_96N CLK_BUF_DOT96 PCLK_80H
E24
CLKIN_DOT_96P
<35> CLK_PCIE_EXP# Y43 1 1 1
CLKOUT_PCIE4N
27P_0402_50V8J~D
27P_0402_50V8J~D
27P_0402_50V8J~D
Express card---> <35> CLK_PCIE_EXP Y45
CLKOUT_PCIE4P
CH113 @
CH111 @
CH112 @
2 1 AK7 CLK_BUF_CKSSCD# RF request
+3.3V_ALW_PCH CLKIN_SATA_N
RH94 10K_0402_5%~D EXPCLK_REQ# L12 AK5 CLK_BUF_CKSSCD
<35> EXPCLK_REQ# PCIECLKRQ4# / GPIO26 CLKIN_SATA_P 2 2 2
V45 K45 CLK_PCH_14M

<34> CLK_PCIE_MINI2# CLKOUT_PCIE5N REFCLK14IN
<34> CLK_PCIE_MINI2 V46
CLKOUT_PCIE5P
MiniWLAN (Mini Card 2)---> +3.3V_ALW_PCH 2 1
RH97 10K_0402_5%~D MINI2CLK_REQ# L14 H45 CLK_PCI_LOOPBACK
<34> MINI2CLK_REQ# PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LOOPBACK <17>
AB42 V47 XTAL25_IN 2 1

CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT RH309 0_0402_5%~D
AB40 V49
CLKOUT_PEG_B_P XTAL25_OUT
1
1 2 PEG_B_CLKRQ# E6 RH99
+3.3V_ALW_PCH PEG_B_CLKRQ# / GPIO56
RH98 10K_0402_5%~D 1M_0402_5%~D
Y47 +XCLK_RCOMP 1 2
XCLK_RCOMP +1.05V_RUN
V40 RH100 90.9_0402_1%~D YH2
2
CLKOUT_PCIE6N
V42 3 1
CLKOUT_PCIE6P OUT IN
12P_0402_50V8J~D
12P_0402_50V8J~D
T13 4 2
PCIECLKRQ6# / GPIO45 GND GND
2 2
V38 K43 PCI_TPM_TCM RH311 2 1 22_0402_5%~D 25MHZ_10PF_Q22FA2380049900~D
CH18
CH19
<28> CLK_PCIE_EMB# CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 CLK_PCI_TPM_TCM <32>
eModule Bay---> V37
FLEX CLOCKS
<28> CLK_PCIE_EMB CLKOUT_PCIE7P

2 1 F47 SIO_14M RH313 2 1 22_0402_5%~D
+3.3V_ALW_PCH CLKOUTFLEX1 / GPIO65 CLK_SIO_14M <39> 1 1
RH104 10K_0402_5%~D EMBCLK_REQ# K12
<28> EMBCLK_REQ# PCIECLKRQ7# / GPIO46 CLK_80H
H47 RH314 2 1 22_0402_5%~D
A CLKOUTFLEX2 / GPIO66 PCLK_80H <34> A
<7> CLK_CPU_ITP# AK14 CLKOUT_ITPXDP_N
AK13 K49 JETWAY_14M @ RH315 2 1 22_0402_5%~D
<7> CLK_CPU_ITP CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 JETWAY_CLK14M <32>
BD82PPSM-QNHN-A0_BGA989~D
PCIE REQ power rail:
suspend: 0 3 4 5 6 7 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
core: 1 2 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (2/8)
LA-7741
5 4 3 2 1
5 4 3 2 1
1 2 PCH_CRT_BLU
+3.3V_ALW_PCH RH131 150_0402_1%~D +3.3V_RUN
1 2 PCH_CRT_GRN
RH132 150_0402_1%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
1 2 PCH_CRT_RED
1
RH133 150_0402_1%~D
RH316
RH317
1 2 SUS_STAT#/LPCPD# 1 2 ENVDD_PCH
@ RH318 10K_0402_5%~D RH134 100K_0402_5%~D
1 2 ME_SUS_PWR_ACK
2
RH144 10K_0402_5%~D PCH_DPWROK 1 2 PCH_RSMRST#_R
RH113 0_0402_5%~D
1 2 PCH_PCIE_WAKE# PCH_CRT_DDC_CLK
D PCH_CRT_DDC_CLK <24> D
RH142 10K_0402_5%~D DSWODVREN - On Die DSW VR Enable
1 2 SIO_SLP_LAN# RESET_OUT# 1 2 SYS_PWROK Enabled (DEFAULT) PCH_CRT_DDC_DAT
PCH_CRT_DDC_DAT <24>
@ RH319 10K_0402_5%~D @ RH321 0_0402_5%~D
HIGH: RH127 STUFFED,
1 2 PCH_RI# RH129 UNSTUFFED
RH140 10K_0402_5%~D
ME_SUS_PWR_ACK_R 1 2 SUSACK#_R Disabled

RH323 0_0402_5%~D
LOW: RH129 STUFFED,
RH127 UNSTUFFED
+3.3V_RUN
+3.3V_RUN
PCH_RSMRST#_Q 1 2
1 2 CLKRUN# @ RH322 10K_0402_5%~D PCH_SDVO_CTRLCLK 2 1
RH137 8.2K_0402_5%~D RH351 2.2K_0402_5%~D
PCH_SDVO_CTRLDATA 2 1
RH352 2.2K_0402_5%~D
UH4C
UH4D
DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0
<6> DMI_CTX_PRX_N0 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0 <6>
DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1 PANEL_BKEN_PCH J47 AP43
<6> DMI_CTX_PRX_N1 DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1 <6> <23> PANEL_BKEN_PCH L_BKLTEN SDVO_TVCLKINN
DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2 ENVDD_PCH M45 AP45
<6> DMI_CTX_PRX_N2 DMI2RXN FDI_RXN2 FDI_CTX_PRX_N2 <6> <23,39> ENVDD_PCH L_VDD_EN SDVO_TVCLKINP
DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3
<6> DMI_CTX_PRX_N3 DMI3RXN FDI_RXN3 FDI_CTX_PRX_N3 <6>
BC12 FDI_CTX_PRX_N4 BIA_PWM_PCH P45 AM42
FDI_RXN4 FDI_CTX_PRX_N4 <6> <23> BIA_PWM_PCH L_BKLTCTL SDVO_STALLN
DMI_CTX_PRX_P0 BE24 BJ12 FDI_CTX_PRX_N5 AM40
<6> DMI_CTX_PRX_P0 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5 <6> SDVO_STALLP
DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6 LDDC_CLK_PCH T40
C <6> DMI_CTX_PRX_P1 DMI1RXP FDI_RXN6 FDI_CTX_PRX_N6 <6> <23> LDDC_CLK_PCH L_DDC_CLK C
DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7 LDDC_DATA_PCH K47 AP39
<6> DMI_CTX_PRX_P2 DMI2RXP FDI_RXN7 FDI_CTX_PRX_N7 <6> <23> LDDC_DATA_PCH L_DDC_DATA SDVO_INTN
DMI_CTX_PRX_P3 BJ20 AP40
<6> DMI_CTX_PRX_P3 DMI3RXP SDVO_INTP
BG14 FDI_CTX_PRX_P0 T45
FDI_RXP0 FDI_CTX_PRX_P0 <6> L_CTRL_CLK
DMI_CRX_PTX_N0 AW24 BB14 FDI_CTX_PRX_P1 P39
<6> DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 <6> L_CTRL_DATA
DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2
<6> DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P2 <6>
DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3 1 2 LVD_IBG AF37 P38 PCH_SDVO_CTRLCLK PCH_SDVO_CTRLCLK <25>
<6> DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P3 <6> LVD_IBG SDVO_CTRLCLK
DMI_CRX_PTX_N3 AV18 BE12 FDI_CTX_PRX_P4 RH344 2.37K_0402_1%~D AF36 M39 PCH_SDVO_CTRLDATA
<6> DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4 <6> LVD_VBG SDVO_CTRLDATA PCH_SDVO_CTRLDATA <25>
BG12 FDI_CTX_PRX_P5 Minimum speacing of 20mils for LVD_IBG
DMI
DMI_CRX_PTX_P0 AY24
FDI FDI_RXP5
BJ10 FDI_CTX_PRX_P6
FDI_CTX_PRX_P5 <6>
AE48
<6> DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6 <6> LVD_VREFH
DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7 AE47 AT49
<6> DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 <6> LVD_VREFL DDPB_AUXN
DMI_CRX_PTX_P2 AY18 AT47
<6> DMI_CRX_PTX_P2 DMI2TXP DDPB_AUXP
DMI_CRX_PTX_P3 AU18 AT40
<6> DMI_CRX_PTX_P3 DMI3TXP DDPB_HPD HDMIB_PCH_HPD <25>
AW16 FDI_INT LCD_ACLK-_PCH AK39
+1.05V_RUN FDI_INT FDI_INT <6> <23> LCD_ACLK-_PCH LVDSA_CLK#
LCD_ACLK+_PCH AK40 AV42
LVDS
<23> LCD_ACLK+_PCH LVDSA_CLK DDPB_0N TMDSB_PCH_N2 <25>
BJ24 AV12 FDI_FSYNC0 AV40
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 <6> DDPB_0P TMDSB_PCH_P2 <25>
LCD_A0-_PCH AN48 AV45
<23> LCD_A0-_PCH LVDSA_DATA#0 DDPB_1N TMDSB_PCH_N1 <25>
1 2 DMI_COMP_R BG25 BC10 FDI_FSYNC1 LCD_A1-_PCH AM47 AV46
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 <6> <23> LCD_A1-_PCH LVDSA_DATA#1 DDPB_1P TMDSB_PCH_P1 <25>
RH111 49.9_0402_1%~D LCD_A2-_PCH AK47 AU48
Digital Display Interface

<23> LCD_A2-_PCH LVDSA_DATA#2 DDPB_2N TMDSB_PCH_N0 <25>
1 2 RBIAS_CPY BH21 AV14 FDI_LSYNC0 AJ48 AU47
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 <6> LVDSA_DATA#3 DDPB_2P TMDSB_PCH_P0 <25>
RH112 750_0402_1%~D AV47
FDI_LSYNC1 LCD_A0+_PCH DDPB_3N TMDSB_PCH_CLK# <25>
BB10 FDI_LSYNC1 <6> <23> LCD_A0+_PCH AN47 AV49 TMDSB_PCH_CLK <25>
FDI_LSYNC1 LCD_A1+_PCH LVDSA_DATA0 DDPB_3P
<23> LCD_A1+_PCH AM49
+RTC_CELL LCD_A2+_PCH LVDSA_DATA1
<23> LCD_A2+_PCH AK49
LVDSA_DATA2
AJ47 P46 PCH_DDPC_CTRLCLK <26>
RH127 1 LVDSA_DATA3 DDPC_CTRLCLK
A18 DSWODVREN 2 330K_0402_1%~D P42 PCH_DDPC_CTRLDATA <26>
DSWVRMEN DDPC_CTRLDATA
@ RH129 1 2 330K_0402_1%~D AF40
LVDSB_CLK#
System Power Management
1 2 SUSACK#_R C12 E22 PCH_DPWROK AF39 AP47

<39> SUSACK# SUSACK# DPWROK PCH_DPWROK <39> LVDSB_CLK DDPC_AUXN DPC_PCH_DOCK_AUX# <26>
@ RH114 0_0402_5%~D AP49
DDPC_AUXP DPC_PCH_DOCK_AUX <26>
AH45 AT38 DPC_PCH_DOCK_HPD <38>
XDP_DBRESET# PCH_PCIE_WAKE# LVDSB_DATA#0 DDPC_HPD
<7,14> XDP_DBRESET# K3 B9 PCH_PCIE_WAKE# <40> AH47
SYS_RESET# WAKE# LVDSB_DATA#1
AF49 AY47 DPC_PCH_LANE_N0 <38>
B LVDSB_DATA#2 DDPC_0N B
AF45 AY49 DPC_PCH_LANE_P0 <38>
SYS_PWROK_R CLKRUN# LVDSB_DATA#3 DDPC_0P
<7,39> SYS_PWROK 1 2 P12 N3 CLKRUN# <32,39,40> AY43 DPC_PCH_LANE_N1 <38>
RH116 0_0402_5%~D SYS_PWROK CLKRUN# / GPIO32 DDPC_1N
AH43 AY45 DPC_PCH_LANE_P1 <38>
LVDSB_DATA0 DDPC_1P
AH49 BA47 DPC_PCH_LANE_N2 <38>
PCH_PWROK SUS_STAT#/LPCPD# T56 PAD~D LVDSB_DATA1 DDPC_2N
<40> RESET_OUT# 1 2 L22 G8 AF47 BA48 DPC_PCH_LANE_P2 <38>
RH117 0_0402_5%~D PWROK SUS_STAT# / GPIO61 LVDSB_DATA2 DDPC_2P
AF43 BB47 DPC_PCH_LANE_N3 <38>
LVDSB_DATA3 DDPC_3N
BB49 DPC_PCH_LANE_P3 <38>
PM_APWROK_R SUSCLK T57 PAD~D DDPC_3P
<40> PM_APWROK 1 2 L10 N14
RH118 0_0402_5%~D APWROK SUSCLK / GPIO62
T58 PAD~D PCH_CRT_BLU N48 M43 PCH_DDPD_CTRLCLK <26>
<24> PCH_CRT_BLU CRT_BLUE DDPD_CTRLCLK
1 2 PM_DRAM_PWRGD_R B13 D10 SIO_SLP_S5# PCH_CRT_GRN P49 M36
<7> PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 SIO_SLP_S5# <40> <24> PCH_CRT_GRN CRT_GREEN DDPD_CTRLDATA PCH_DDPD_CTRLDATA <26>
RH320 0_0402_5%~D PCH_CRT_RED T49
<24> PCH_CRT_RED CRT_RED
T59 PAD~D
1 2 PCH_RSMRST#_R C21 H4 SIO_SLP_S4# AT45
<14,41> PCH_RSMRST#_Q RSMRST# SLP_S4# SIO_SLP_S4# <39> DDPD_AUXN DPD_PCH_DOCK_AUX# <26>
RH120 0_0402_5%~D PCH_CRT_DDC_CLK T39 AT43
CRT
T60 PAD~D PCH_CRT_DDC_DAT CRT_DDC_CLK DDPD_AUXP DPD_PCH_DOCK_AUX <26>
M40 BH41 DPD_PCH_DOCK_HPD <38>
ME_SUS_PWR_ACK_R SIO_SLP_S3# CRT_DDC_DATA DDPD_HPD
<40> ME_SUS_PWR_ACK 1 2 K16 F4 SIO_SLP_S3# <11,27,35,39,42,48>
RH121 0_0402_5%~D SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# RH123 20_0402_1%~D BB43 DPD_PCH_LANE_N0 <38>
T61 PAD~D DDPD_0N
<7,14> SIO_PWRBTN#_R <24> PCH_CRT_HSYNC 1 2 HSYNC M47 BB45 DPD_PCH_LANE_P0 <38>
SIO_PWRBTN#_R SIO_SLP_A# CRT_HSYNC DDPD_0P
<40> SIO_PWRBTN# 1 2 E20 G10 SIO_SLP_A# <39,42,49> <24> PCH_CRT_VSYNC 1 2 VSYNC M49 BF44 DPD_PCH_LANE_N1 <38>
RH122 0_0402_5%~D PWRBTN# SLP_A# RH124 20_0402_1%~D CRT_VSYNC DDPD_1N
BE44 DPD_PCH_LANE_P1 <38>
T62 PAD~D DDPD_1P
BF42 DPD_PCH_LANE_N2 <38>
AC_PRESENT SIO_SLP_SUS# CRT_IREF DDPD_2N
<40> AC_PRESENT H20 G16 SIO_SLP_SUS# <39> T43 BE42 DPD_PCH_LANE_P2 <38>
ACPRESENT / GPIO31 SLP_SUS# DAC_IREF DDPD_2P
T42 BJ42 DPD_PCH_LANE_N3 <38>
T63 PAD~D CRT_IRTN DDPD_3N
BG42 DPD_PCH_LANE_P3 <38>
DDPD_3P
1
+3.3V_ALW_PCH 1 2 PCH_BATLOW# E10 AP14 H_PM_SYNC
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC <7>
RH139 8.2K_0402_5%~D BD82PPSM-QNHN-A0_BGA989~D
RH126
PCH_RI# A10 K14 SIO_SLP_LAN# 1K_0402_0.5%~D
RI# SLP_LAN# / GPIO29 SIO_SLP_LAN# <31,39>
2
A A
LA-7741
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
1 2 PCI_PIRQA#
RH324 8.2K_0402_5%~D
UH4E
D PCI_PIRQB# D
1 2 RSVD1
AY7
RH325 8.2K_0402_5%~D AV7
RSVD2
BG26 AU3
PCI_PIRQC# TP1 RSVD3
1 2 BJ26 BG4
RH326 8.2K_0402_5%~D TP2 RSVD4
BH25
TP3
BJ16 AT10
PCI_PIRQD# TP4 RSVD5
1 2 BG16 BC8
RH329 8.2K_0402_5%~D TP5 RSVD6
AH38
TP6
AH37 AU2
PCI_REQ1# TP7 RSVD7
1 2 AK43 AT4
RH327 10K_0402_5%~D TP8 RSVD8
AK45 AT3
TP9 RSVD9
C18 TP10 RSVD10 AT1
1 2 LCD_CBL_DET# N30 AY3
RH330 10K_0402_5%~D TP11 RSVD11
H3 TP12 RSVD12 AT5
AH12 TP13 RSVD13 AV3
1 2 CAM_MIC_CBL_DET# AM4 AV1
RH331 10K_0402_5%~D TP14 RSVD14
AM5 TP15 RSVD15 BB1
Y13 TP16 RSVD16 BA3
1 2 BT_DET# K24 BB5
RH328 10K_0402_5%~D TP17 RSVD17
L24 TP18 RSVD18 BB3
AB46 TP19 RSVD19 BB7
1 2 PCH_GPIO3 AB45 BE8
@ RH332 10K_0402_5%~D TP20 RSVD20
BD4
RSVD
RSVD21
RSVD22 BF6
PCI_GNT3#
B21 TP21 RSVD23 AV5
M20 TP22 RSVD24 AV10
1
AY16 TP23
@ RH333 BG46 AT8
TP24 RSVD25
1K_0402_1%~D
RSVD26 AY5
BA2
2
C RSVD27 C
<36> USB3RN1 BE28 USB3Rn1
<36> USB3RN2 BC30 USB3Rn2 RSVD28 AT12
BE32 USB3Rn3 RSVD29 BF3
<38> USB3RN4 BJ32 USB3Rn4
<36> USB3RP1 BC28 USB3Rp1
<36> USB3RP2 BE30 USB3Rp2
BF32
USB30
A16 swap override Strap/Top-Block USB3Rp3 USBP0-
<38> USB3RP4 BG32 C24 USBP0- <36>
USB3Rp4 USBP0N
<36> USB3TN1 AV26
USB3Tn1 USBP0P
A24 USBP0+
USBP0+ <36>
----->Right Side
Swap Override jumper BB26 C25 USBP1-
<36> USB3TN2 USB3Tn2 USBP1N USBP1+ USBP1- <36>
AU28
AY30
USB3Tn3 USBP1P
B25
C26
USBP1+ <36> ----->Rear Left side
<38> USB3TN4 USB3Tn4 USBP2N
Low = A16 swap <36> USB3TP1 AU26
USB3TP1 USBP2P
A26
PCI_GNT#3 AY26 K28 USBP3-
<36> USB3TP2 USB3Tp2 USBP3N USBP3- <38>
High = Default AV28
USB3Tp3 USBP3P
H28 USBP3+
USBP3+ <38>
----->MLK DOCK
AW30 E28 USBP4-
<38> USB3TP4 USB3Tp4 USBP4N USBP4- <34>
USBP4P
D28 USBP4+
USBP4+ <34>
----->WLAN/WIMAX
C28 USBP5-
USBP5N USBP5- <34>
CLK_PCI_5048
USBP5P
A28 USBP5+
USBP5+ <34>
----->WWAN/UWB
CLK_PCI_MEC C29 USBP6-
USBP6N USBP6- <34>
CLK_PCI_DOCK
USBP6P
B29 USBP6+
USBP6+ <34> ----->PP
CLK_PCI_LOOPBACK PCI_PIRQA# K40 N28 USBP7-
PIRQA# USBP7N USBP7- <32>
PCI_PIRQB# K38
PIRQB# USBP7P
M28 USBP7+
USBP7+ <32>
----->USH
PCI_PIRQC# H38 L30 USBP8-
PCI
PIRQC# USBP8N USBP8- <38>
PCI_PIRQD# G38
PIRQD# USBP8P
K30 USBP8+
USBP8+ <38>
----->DOCK
USBP9-
1 1 1 1 USBP9N
G30 USBP9- <37> ----->Right side E-SATA
27P_0402_50V8J~D
27P_0402_50V8J~D
27P_0402_50V8J~D
27P_0402_50V8J~D
PCI_REQ1# C46 E30 USBP9+

REQ1# / GPIO50 USBP9P USBP9+ <37>
CH107 @
CH108 @
CH109 @
CH110 @
RF request C44 C30 USBP10-
USB
<34> PCIE_MCARD2_DET# REQ2# / GPIO52 USBP10N USBP10- <35>
2 2 2 2 <41> BT_DET#
BT_DET# E40
REQ3# / GPIO54 USBP10P
A30 USBP10+
USBP10+ <35>
----->Express Card +3.3V_ALW_PCH
L32 USBP11-
USBP11N USBP11- <41>
BBS_BIT1 D47
GNT1# / GPIO51 USBP11P
K32 USBP11+
USBP11+ <41> ----->Blue Tooth INTEL feedback 0307 RPH1
E42 G32 USBP12- USB_OC0#_R 4 5
GNT2# / GPIO53 USBP12N USBP12- <23>
B PCI_GNT3# F46
GNT3# / GPIO55 USBP12P
E32 USBP12+
USBP12+ <23>
----->Camera USB_OC1#_R 3 6 B
C32 USB_OC3# 2 7
USBP13N USB_OC4#_R
A32 1 8
LCD_CBL_DET# USBP13P
<23> LCD_CBL_DET# G42
PCH_GPIO3 PIRQE# / GPIO2 10K_1206_8P4R_5%~D
CAM_MIC_CBL_DET#
G40
PIRQF# / GPIO3 USBRBIAS
Within 500 mils
C42 C33 1 2 RPH2
<23> CAM_MIC_CBL_DET# FFS_PCH_INT PIRQG# / GPIO4 USBRBIAS# USB_OC5#
1 2 D44 RH151 4 5
<27> HDD_FALL_INT PIRQH# / GPIO5 USB_OC6#
RH334 0_0402_5%~D 22.6_0402_1%~D 3 6
1 2 B33 SIO_EXT_SMI# 2 7
<32> PLTRST_USH# USBRBIAS
RH3351 2 0_0402_5%~D PAD~D T104 @ K10 USB_OC2# 1 8
<33> PLTRST_MMI# PME#
RH3361 2 0_0402_5%~D
<7> PLTRST_XDP#
RH3371 2 0_0402_5%~D PCH_PLTRST# C6 A14 USB_OC0#_R 1 2 10K_1206_8P4R_5%~D
<31> PLTRST_LAN# PLTRST# OC0# / GPIO59 USB_OC1#_R USB_OC0# <36>
RH3381 2 0_0402_5%~D K20 RH339 0_0402_5%~D
<28> PLTRST_EMB# OC1# / GPIO40 USB_OC2#
RH340 0_0402_5%~D B17
PCI_5048 OC2# / GPIO41 USB_OC3#
<39> CLK_PCI_5048 2 1 H49
CLKOUT_PCI0 OC3# / GPIO42
C16
RH160 2 1 22_0402_5%~D PCI_MEC H43 L16 USB_OC4#_R 1 2 USB_OC4#
<40> CLK_PCI_MEC CLKOUT_PCI1 OC4# / GPIO43 USB_OC4# <36>
RH102 1 2 22_0402_5%~D PCI_DOCK J48 A16 USB_OC5# RH356 0_0402_5%~D
<38> CLK_PCI_DOCK CLKOUT_PCI2 OC5# / GPIO9 USB_OC6#
RH103 22_0402_5%~D K42 D14
PCI_LOOPBACKOUT CLKOUT_PCI3 OC6# / GPIO10 SIO_EXT_SMI#
<15> CLK_PCI_LOOPBACK 2 1 H40 C14 SIO_EXT_SMI# <40>
RH105 22_0402_5%~D CLKOUT_PCI4 OC7# / GPIO14
+3.3V_RUN CH102
0.1U_0402_25V6K~D
1 2
Boot BIOS Strap

5
A A
UH3 SATA_SLPD
PCH_PLTRST# 1 BBS_BIT1 (BBS_BIT0) Boot BIOS Location
P
<7,14> PCH_PLTRST# B PCH_PLTRST#_EC BBS_BIT1

O 4 PCH_PLTRST#_EC <32,34,35,39,40>
2 A
G
0 0 LPC
1
TC7SH08FU_SSOP5~D
3
@ RH342
0 1 Reserved (NAND) 1K_0402_1%~D Compal Electronics, Inc.
Title
2
1 0 PCI PCH (4/8)

1 1 SPI 0.1
* LA-7741
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW_PCH +3.3V_RUN
2
RH53 CONTACTLESS_DET# 2 1
4.7K_0402_5%~D RH256 10K_0402_5%~D
D D
1
SLP_ME_CSW_DEV# UH4F
1
SIO_EXT_SCI# 1 2 SIO_EXT_SCI#_R T7 C40 CONTACTLESS_DET#

<40> SIO_EXT_SCI# BMBUSY# / GPIO0 TACH4 / GPIO68 CONTACTLESS_DET# <32>
RH353 RH259 0_0402_5%~D
1K_0402_1%~D USH_DET# A42 B41 PCH_GPIO69
<32> USH_DET# TACH1 / GPIO1 TACH5 / GPIO69
@
IO_LOOP# H36 C41 PCIE_MCARD3_DET# PCH_GPIO69 1 2
<30> IO_LOOP# PCIE_MCARD3_DET# <34>
2
TACH2 / GPIO6 TACH6 / GPIO70 RH260 1.5K_0402_1%~D

PCH_GPIO7 E38 A40
TACH3 / GPIO7 TACH7 / GPIO71 USB_MCARD2_DET# <34>
<39> SIO_EXT_WAKE# C10 GPIO8

Note: PCH has internal pull up 20k ohm on PM_LANPHY_ENABLE C4
<31> PM_LANPHY_ENABLE LAN_PHY_PWR_CTRL / GPIO12
E3_PAID_TS_DET# (GPIO27) PCH_GPIO15 G2 P4 SIO_A20GATE
SIO_A20GATE <40>
GPIO15 A20GATE
PECI AU16
PCH_GPIO16 U2 SATA4GP / GPIO16 SIO_RCIN#
SLP_ME_CSW_DEV# PLL ON DIE VR ENABLE P5 SIO_RCIN# <40>
RCIN# +3.3V_RUN
PCH_GPIO17 D40 AY11 H_CPUPWRGD +1.05V_RUN_VTT
GPIO
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD <7>
ENABLED - HIGH DEFAULT
CPU/MISC
DISABLED - LOW MEDIA_DET# T5 AY10 PCH_THRMTRIP#_R 2 1 SIO_A20GATE 2 1
<30> MEDIA_DET# SCLOCK / GPIO22 THRMTRIP# RH262 56_0402_5%~D RH158 10K_0402_5%~D
E8 T14 INIT3_3V# PAD~D T106 1 SIO_RCIN# 2 1
<34> PCIE_MCARD1_DET# GPIO24 INIT3_3V# @ RH203 10K_0402_5%~D
EXPRCRD_DET# E16 AY1 DF_TVS CH97
+3.3V_ALW_PCH <35> EXPRCRD_DET# GPIO27 DF_TVS 0.1U_0402_25V6K~D
SLP_ME_CSW_DEV# 2 SIO_EXT_SCI#
<39> SLP_ME_CSW_DEV# P8 GPIO28 1 2
AH8 RH263 10K_0402_5%~D
SIO_EXT_WAKE# TS_VSS1 USH_DET#
2 1 K1 STP_PCI# / GPIO34 1 2
C RH177 10K_0402_5%~D RH164 100K_0402_5%~D C
TS_VSS2 AK11
1 2 PCH_GPIO15 USB_MCARD1_DET# K4
<34> USB_MCARD1_DET# GPIO35
RH354 1K_0402_1%~D AH10
PCH_GPIO36 TS_VSS3
V8 SATA2GP / GPIO36
TS_VSS4 AK10
PCH_GPIO37 M5 SATA3GP / GPIO37
TPM_ID0 N2 P37 NC_1 PAD~D T108 @
SLOAD / GPIO38 NC_1
TPM_ID1 M3
SDATAOUT0 / GPIO39
FFS_INT2 V13 BG2 VSS_NCTF_15
<27> FFS_INT2 SDATAOUT1 / GPIO48 VSS_NCTF_15
TEMP_ALERT# V3 BG48 VSS_NCTF_16
<39> TEMP_ALERT# SATA5GP / GPIO49 / TEMP_ALERT# VSS_NCTF_16
KB_DET# D6 BH3 VSS_NCTF_17 Layout note:
<41> KB_DET# GPIO57 VSS_NCTF_17
BH47 VSS_NCTF_18 Trace wide 10mil & length 30mil
VSS_NCTF_18
VSS_NCTF_1 VSS_NCTF_19
All NCTF pins should have thick
A4 BJ4
VSS_NCTF_1 VSS_NCTF_19 traces at 45°from the pad.
VSS_NCTF_2 A44 BJ44 VSS_NCTF_20
VSS_NCTF_3 A45 BJ45 VSS_NCTF_21
PCH_GPIO36 VSS_NCTF_3 VSS_NCTF_21
2 1
RH174 10K_0402_5%~D VSS_NCTF_4 A46 BJ46 VSS_NCTF_22
NCTF
PCH_GPIO37 VSS_NCTF_4 VSS_NCTF_22
2 1
RH172 10K_0402_5%~D VSS_NCTF_5 A5 BJ5 VSS_NCTF_23
2 1 PCH_GPIO17 VSS_NCTF_6 A6 BJ6 VSS_NCTF_24
@ RH273 1K_0402_1%~D VSS_NCTF_6 VSS_NCTF_24
VSS_NCTF_7 B3 C2 VSS_NCTF_25
B VSS_NCTF_7 VSS_NCTF_25 B
2 1 PCH_GPIO16 VSS_NCTF_8 B47 C48 VSS_NCTF_26
@ RH265 10K_0402_5%~D VSS_NCTF_8 VSS_NCTF_26
Layout note: VSS_NCTF_9 BD1 D1 VSS_NCTF_27
Trace wide 10mil & length 30mil VSS_NCTF_10 BD49 D49 VSS_NCTF_28 PLACE RH150 CLOSE TO THE BRANCHING POINT
All NCTF pins should have thick VSS_NCTF_11 VSS_NCTF_29
( TO CPU and NVRAM CONNECTOR)
BE1 E1
traces at 45°from the pad. VSS_NCTF_11 VSS_NCTF_29
VSS_NCTF_12 BE49 E49 VSS_NCTF_30
VSS_NCTF_12 VSS_NCTF_30 +VCCDFTERM
VSS_NCTF_13 BF1 F1 VSS_NCTF_31
RH149 need to close to CPU
VSS_NCTF_14 BF49 F49 VSS_NCTF_32
1
+3.3V_ALW_PCH
RH149
2 1 KB_DET# BD82PPSM-QNHN-A0_BGA989~D 2.2K_0402_5%~D
RH170 10K_0402_5%~D
2
1 2 DF_TVS_R 1 2 DF_TVS
<7> H_SNB_IVB#
RH150 0_0402_5%~D RH358 1K_0402_1%~D
+3.3V_RUN
2 1 PCH_GPIO36
@ RH171 10K_0402_5%~D
2 1 PCH_GPIO37 +3.3V_RUN +3.3V_RUN
@ RH173 1K_0402_1%~D
1 2 PCH_GPIO16 DMI & FDI Termination Voltage
RH272 10K_0402_5%~D
2
2 1 TEMP_ALERT#
RH266 10K_0402_5%~D 1@ RH267 3@ RH268 Set to Vss when LOW
2 1 MEDIA_DET# 10K_0402_5%~D 20K_0402_5%~D TPM_ID0 TPM_ID1 DF_TVS
A A
RH181 10K_0402_5%~D Set to Vcc when HIGH
1 2 PCH_GPIO7 China TPM 0 0
1
RH178 10K_0402_5%~D
TPM_ID0 TPM_ID1 No TPM, No China TPM 0 1
1 2 PCH_GPIO17
2
RH269 8.2K_0402_5%~D USH1.0 (For SSI) 1 0

2@ RH270 4@ RH271
IO_LOOP#
1
RH163
2
10K_0402_5%~D
10K_0402_5%~D 2.2K_0402_5%~D USH2.0 1 1 Compal Electronics, Inc.
Title
1
PCH (5/8)
0.1
LA-7741
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
LH1
PCH Power Rail Table
+1.05V_RUN UH4G POWER +VCCADAC 2 1 S0 Iccmax
BLM18PG181SN1_0603~D Voltage Rail Voltage Current (A)
0.01U_0402_16V7K~D
0.1U_0402_10V7K~D
10U_0603_6.3V6M~D
AA23 VCCCORE[1] VCCADAC U48 1 1 1
AC23 VCCCORE[2]
V_PROC_IO 1.05 0.001
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH34
CH35
CH36
1 1 1 1 AD21 VCCCORE[3]
CRT
AD23 U47
VCCCORE[4] VSSADAC 2 2 2
CH30
CH32
CH33
CH31
AF21
VCCCORE[5]
V5REF 5 0.001
VCC CORE
AF23 +3.3V_RUN
D 2 2 2 2 VCCCORE[6] D
AG21
VCCCORE[7]
AG23
VCCCORE[8]
V5REF_Sus 5 0.001
AG24 AK36
VCCCORE[9] VCCALVDS
AG26
VCCCORE[10] +1.8V_RUN
AG27
VCCCORE[11] VSSALVDS
AK37 Vcc3_3 3.3 0.228
AG29 LH8
VCCCORE[12] 100NH_HK1608R10J-T_5%_0603~D
AJ23
VCCCORE[13] +1.8V_RUN_LVDS
AJ26 AM37 2 1 VccADAC3 3.3 0.063
LVDS
VCCCORE[14] VCCTX_LVDS[1]
22U_0805_6.3V6M~D
AJ27 1 1 1 0.1uH inductor, 200mA
VCCCORE[15]
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
CH105
AJ29 AM38
VCCCORE[16] VCCTX_LVDS[2]
CH103
CH104
AJ31 CPN: SHI0110BJ0L VccADPLLA 1.05 0.08
+1.05V_RUN VCCCORE[17]
VCCTX_LVDS[3] AP36
2 2 2
VCCTX_LVDS[4] AP37 VccADPLLB 1.05 0.08

AN19 VCCIO[28]
+1.05V_RUN
VccCore 1.05 1.7
1 2 +VCCAPLLEXP BJ22
@ RH247 VCCAPLLEXP
1UH_LB2012T1R0M_20%~D
10U_0603_6.3V6M~D
1 VCC3_3[6] V33 +3.3V_RUN VccDMI 1.1 0.047
@ AN16
HVCMOS
VCCIO[15]
1
CH40
AN17 VCCIO[16]
VccIO 1.05 3.711
2 CH43
VCC3_3[7] V34
0.1U_0402_10V7K~D
2 VccASW 1.05 0.903
AN21 VCCIO[17]
AN26 +1.05V_+1.5V_1.8V_RUN
VCCIO[18]
VccSPI 3.3 0.01
AN27 VCCIO[19] VCCVRM[3] AT16
+1.05V_RUN
AP21 VCCIO[20]
VccDSW3_3 3.3 0.001
C C
AP23 VCCIO[21] VCCDMI[1] AT20 +1.05V_RUN_VTT
VCCDFTERM 1.8 0.002
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 1 1 1 AP24 1 2 CH49
DMI
VCCIO[22] 1U_0402_6.3V6K~D
VCCIO
CH44
CH45
CH46
CH47
CH48
AP26 AB36 +1.05V_RUN_VCCCLKDMI 2 1 VccRTC 3.3 2 (mA)

VCCIO[23] VCCCLKDMI +1.05V_RUN
10U_0603_6.3V6M~D
1 1 @ RH205 0_0603_5%~D
2 2 2 2 2 AT24
VCCIO[24]
CH106
CH50 VccSus3_3 3.3 0.095
1U_0402_6.3V6K~D
AN33 2 2 INTEL feedback 0302
VCCIO[25]
VccSusHDA 3.3 0.01
AN34 AG16
+3.3V_RUN VCCIO[26] VCCDFTERM[1] +VCCDFTERM
PJP66 VccVRM 1.5 0.167
BH29 AG17 1 2 +1.8V_RUN
VCC3_3[3] VCCDFTERM[2]
DFT / SPI
0.1U_0402_10V7K~D
1 PAD-OPEN1x1m VccClkDMI 1.05 0.07

+1.05V_+1.5V_1.8V_RUN AJ16 1
VCCDFTERM[3]
CH51
AP16
VCCVRM[2]
CH52 VccSSC 1.05 0.095
2 AJ17 0.1U_0402_10V7K~D
VCCDFTERM[4] 2
BG6
VccAFDIPLL
VccDIFFCLKN 1.05 0.055
+1.05V_RUN AP17
VCCIO[27]
VccALVDS 3.3 0.001
V1 +VCCSPI 2 1 +3.3V_M
VCCSPI
FDI
RH202 0_0603_5%~D
+1.05V_RUN_VTT AU20
VCCDMI[2]
VccTX_LVDS 1.8 0.04
1 2 1 +3.3V_RUN
@ RH204 0_0603_5%~D
B BD82PPSM-QNHN-A0_BGA989~D CH54 B
1U_0402_6.3V6K~D INTEL feedback 0307
2
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
2 1
RH197 0_0603_5%~D
A A
LA-7741
5 4 3 2 1
5 4 3 2 1
+5V_ALW +5V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW2
UH4J POWER
1 2 1 3
20K_0402_5%~D
0.1U_0402_10V7K~D
RH201 0_0402_5%~D 1 AD49 N26 +1.05V_RUN
VCCACLK VCCIO[29] QH4
1 2
1
@ RH253 0_0402_5%~D CH55 P26 1 SSM3K7002FU_SC70-3~D 1
G
2
0.1U_0402_10V7K~D VCCIO[30]
RH278
+VCCDSW3_3 T16
D 2 VCCDSW3_3 D
CH98
P28 CH56
VCCIO[31] 1U_0402_6.3V6K~D
2 <42> ALW_ENABLE 2
V12 T27
2
+1.05V_RUN @ LH3 DCPSUSBYP VCCIO[32]
10UH_LBR2012T100M_20%~D T29
+3.3V_RUN_VCC_CLKF33 T38 VCCIO[33]
1 2 VCC3_3[5]
10U_0603_6.3V6M~D
+3.3V_ALW_PCH
0.1U_0402_10V7K~D
1 T23
+1.05V_RUN +VCCAPLL_CPY_PCH VCCSUS3_3[7]
BH23 1
@ VCCAPLLDMI2
T24 +3.3V_ALW_PCH
VCCSUS3_3[8] +5V_ALW_PCH +3.3V_ALW_PCH
0.1U_0402_10V7K~D
CH59
AL29
2 VCCIO[14]
CH58
VCCSUS3_3[9] V23 1
2
USB
2
CH60
AL24 DCPSUS[3] VCCSUS3_3[10] V24
RH208 DH2
2 10_0402_1%~D
VCCSUS3_3[6] P24 RB751S40T1_SOD523-2~D
AA19
1
VCCASW[1] +PCH_V5REF_SUS
VCCIO[34] T26 +1.05V_RUN
AA21 VCCASW[2] 1
AA24 M26 +PCH_V5REF_SUS CH63

VCCASW[3] V5REF_SUS
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 1 +3.3V_ALW_PCH 0.1U_0402_10V7K~D
2
CH64
CH65
0.1U_0402_10V7K~D
AA26 VCCASW[4]
Clock and Miscellaneous

DCPSUS[4] AN23 1
AA27 CRB 0.7 RH208,RH213 trace width 20mil.
2 2 VCCASW[5]
CH66
VCCSUS3_3[1] AN24
AA29 VCCASW[6] 2
+1.05V_M AA31 +5V_RUN +3.3V_RUN
VCCASW[7]
AC26 P34 +PCH_V5REF_RUN
VCCASW[8] V5REF
2
C C
1 1U_0402_6.3V6K~D 1 1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
AC27 RH213 DH3
CH67 VCCASW[9]
CH68
CH69
N20 +3.3V_ALW_PCH 10_0402_1%~D RB751S40T1_SOD523-2~D
VCCSUS3_3[2]
AC29 1
PCI/GPIO/LPC
2 2 2 VCCASW[10]
N22
1
VCCSUS3_3[3] CH70 +PCH_V5REF_RUN
AC31 VCCASW[11]
P20 1U_0603_10V7K~D +3.3V_RUN
VCCSUS3_3[4] 2
AD29 1
VCCASW[12]
P22
VCCSUS3_3[5] CH71
AD31 1
+3.3V_RUN VCCASW[13] 1U_0603_10V7K~D
W21 AA16 CH72 2
VCCASW[14] VCC3_3[1] 0.1U_0402_10V7K~D
W23 W16 2 +3.3V_RUN
VCCASW[15] VCC3_3[8]
1 2 +3.3V_RUN_VCC_CLKF33 W24 T34
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
RH215 0.022_0805_1% 1 1 1
W26
VCCASW[17]
CH74
@ CH75
W29 +3.3V_RUN 0.1U_0402_10V7K~D
2 2 VCCASW[18] 2
CH73
Note: If EMI concern, pop W31 AJ2

with SHI00008S0L, 10UH +-20% 1
W33
VCCASW[20] CH76
AF13 +1.05V_RUN
VCCIO[5] 0.1U_0402_10V7K~D
2 1
+VCCRTCEXT N16
DCPRTC CH77
Note: Place VCCDIFFCLKN with a trace 1
+1.05V_+1.5V_1.8V_RUN VCCIO[12]
AH13
1U_0402_6.3V6K~D
2
specially for XCLK_RCOMP (RH100.2) CH78
0.1U_0402_10V7K~D
Y49
VCCVRM[4] VCCIO[13]
AH14
2
B +1.05V_RUN AF14 LH5 @ B
+1.05V_RUN_VCCA_A_DPL VCCIO[6] 10UH_LBR2012T100M_20%~D
BD47
VCCADPLLA +VCCSATAPLL
AK1 1 2 +1.05V_RUN
SATA
+1.05V_RUN_VCCA_B_DPL VCCAPLLSATA +1.05V_+1.5V_1.8V_RUN
1 BF47 1
VCCADPLLB @ CH80
CH79 AF11 10U_0603_6.3V6M~D
1U_0402_6.3V6K~D VCCVRM[1]
AF17
2 VCCIO[7] 2
AF33
VCCDIFFCLKN[1]
AF34 AC16 +1.05V_RUN
VCCDIFFCLKN[2] VCCIO[2]
1 2 CH81 AG34
VCCDIFFCLKN[3] 1
1U_0402_6.3V6K~D AC17
VCCIO[3] CH82
1 AG33 AD17 1U_0402_6.3V6K~D
VCCSSC VCCIO[4] 2
CH96
1U_0402_6.3V6K~D +VCCSST V16 +1.05V_M
2 DCPSST
1
T17 T21
CH84 DCPSUS[1] VCCASW[22]
V19
0.1U_0402_10V7K~D DCPSUS[2]
MISC
+1.05V_RUN_VTT 2 V21
VCCASW[23]
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
BJ8
CPU
V_PROC_IO
1 1 1 T19
VCCASW[21]
+RTC_CELL
CH86
CH87
CH85
4.7U_0603_6.3V6K~D
2 2 2 A22 P32
VCCRTC VCCSUSHDA +3.3V_ALW_PCH
RTC
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
HDA
1 1 1 1
LH6 BD82PPSM-QNHN-A0_BGA989~D
A +1.05V_RUN A
CH88
CH89
10UH_LBR2012T100M_20%~D CH90 CH91

1 2 +1.05V_RUN_VCCA_A_DPL 1U_0402_6.3V6K~D 0.1U_0402_10V7K~D
2 2 2 2
1 2 +1.05V_RUN_VCCA_B_DPL
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
LH7
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10UH_LBR2012T100M_20%~D 1 1
1 1 Compal Electronics, Inc.
CH94
CH92
CH95
CH93
+ +
Title
2 2 2 2 PCH (7/8)
0.1
LA-7741
5 4 3 2 1
5 4 3 2 1
UH4I
AY4 VSS[159] VSS[259] H46

AY42 K18
VSS[160] VSS[260]
AY46 K26
VSS[161] VSS[261]
AY8 K39
D VSS[162] VSS[262] D
B11 K46
UH4H VSS[163] VSS[263]
B15 K7
VSS[164] VSS[264]
H5 B19 L18
VSS[0] VSS[165] VSS[265]
B23 L2
VSS[166] VSS[266]
AA17 AK38 B27 L20
VSS[1] VSS[80] VSS[167] VSS[267]
AA2 AK4 B31 L26
VSS[2] VSS[81] VSS[168] VSS[268]
AA3 AK42 B35 L28
VSS[3] VSS[82] VSS[169] VSS[269]
AA33 AK46 B39 L36
VSS[4] VSS[83] VSS[170] VSS[270]
AA34 AK8 B7 L48
VSS[5] VSS[84] VSS[171] VSS[271]
AB11 AL16 F45 M12
VSS[6] VSS[85] VSS[172] VSS[272]
AB14 AL17 BB12 P16
VSS[7] VSS[86] VSS[173] VSS[273]
AB39 VSS[8] VSS[87] AL19 BB16 VSS[174] VSS[274] M18
AC19 VSS[13] VSS[92] AL27 BB30 VSS[179] VSS[279] M34
AC33 VSS[17] VSS[96] AL48 BC14 VSS[183] VSS[283] M46
AC34 VSS[18] VSS[97] AM11 BC18 VSS[184] VSS[284] M8
AC48 VSS[19] VSS[98] AM14 BC2 VSS[185] VSS[285] N18
AD10 VSS[20] VSS[99] AM36 BC22 VSS[186] VSS[286] P30
AD11 VSS[21] VSS[100] AM39 BC26 VSS[187] VSS[287] N47
AD19 VSS[24] VSS[103] AM46 BC36 VSS[190] VSS[290] T33
AD26 VSS[26] VSS[105] AN2 BC42 VSS[192] VSS[292] P43
AD27 VSS[27] VSS[106] AN29 BC48 VSS[193] VSS[293] P47
AD33 VSS[28] VSS[107] AN3 BD46 VSS[194] VSS[294] P7
C C
AD34 VSS[29] VSS[108] AN31 BD5 VSS[195] VSS[295] R2
AD36 VSS[30] VSS[109] AP12 BE22 VSS[196] VSS[296] R48
AD37 VSS[31] VSS[110] AP19 BE26 VSS[197] VSS[297] T12
AD38 VSS[32] VSS[111] AP28 BE40 VSS[198] VSS[298] T31
AD39 VSS[33] VSS[112] AP30 BF10 VSS[199] VSS[299] T37
AD4 VSS[34] VSS[113] AP32 BF12 VSS[200] VSS[300] T4
AD40 VSS[35] VSS[114] AP38 BF16 VSS[201] VSS[301] W34
AD42 AP4 BF20 T46
VSS[36] VSS[115] VSS[202] VSS[302]
AD43 AP42 BF22 T47
VSS[37] VSS[116] VSS[203] VSS[303]
AD45 AP46 BF24 T8
VSS[38] VSS[117] VSS[204] VSS[304]
AD46 AP8 BF26 V11
VSS[39] VSS[118] VSS[205] VSS[305]
AD8 AR2 BF28 V17
VSS[40] VSS[119] VSS[206] VSS[306]
AE2 AR48 BD3 V26
VSS[41] VSS[120] VSS[207] VSS[307]
AE3 AT11 BF30 V27
VSS[42] VSS[121] VSS[208] VSS[308]
AF10 AT13 BF38 V29
VSS[43] VSS[122] VSS[209] VSS[309]
AF12 AT18 BF40 V31
VSS[44] VSS[123] VSS[210] VSS[310]
AD14 AT22 BF8 V36
VSS[45] VSS[124] VSS[211] VSS[311]
AD16 AT26 BG17 V39
VSS[46] VSS[125] VSS[212] VSS[312]
AF16 AT28 BG21 V43
VSS[47] VSS[126] VSS[213] VSS[313]
AF19 AT30 BG33 V7
VSS[48] VSS[127] VSS[214] VSS[314]
AF24 AT32 BG44 W17
VSS[49] VSS[128] VSS[215] VSS[315]
AF26 AT34 BG8 W19
VSS[50] VSS[129] VSS[216] VSS[316]
AF27 AT39 BH11 W2
VSS[51] VSS[130] VSS[217] VSS[317]
AF29 AT42 BH15 W27
VSS[52] VSS[131] VSS[218] VSS[318]
AF31 AT46 BH17 W48
VSS[53] VSS[132] VSS[219] VSS[319]
AF38 AT7 BH19 Y12
VSS[54] VSS[133] VSS[220] VSS[320]
AF4 AU24 H10 Y38
VSS[55] VSS[134] VSS[221] VSS[321]
AF42 AU30 BH27 Y4
VSS[56] VSS[135] VSS[222] VSS[322]
AF46 AV16 BH31 Y42
VSS[57] VSS[136] VSS[223] VSS[323]
AF5 AV20 BH33 Y46
VSS[58] VSS[137] VSS[224] VSS[324]
AF7 AV24 BH35 Y8
VSS[59] VSS[138] VSS[225] VSS[325]
AF8 AV30 BH39 BG29
B VSS[60] VSS[139] VSS[226] VSS[328] B
AG19 AV38 BH43 N24
VSS[61] VSS[140] VSS[227] VSS[329]
AG2 AV4 BH7 AJ3
VSS[62] VSS[141] VSS[228] VSS[330]
AG31 AV43 D3 AD47
VSS[63] VSS[142] VSS[229] VSS[331]
AG48 AV8 D12 B43
VSS[64] VSS[143] VSS[230] VSS[333]
AH11 AW14 D16 BE10
VSS[65] VSS[144] VSS[231] VSS[334]
AH3 AW18 D18 BG41
VSS[66] VSS[145] VSS[232] VSS[335]
AH36 AW2 D22 G14
VSS[67] VSS[146] VSS[233] VSS[337]
AH39 AW22 D24 H16
VSS[68] VSS[147] VSS[234] VSS[338]
AH40 AW26 D26 T36
VSS[69] VSS[148] VSS[235] VSS[340]
AH42 AW28 D30 BG22
VSS[70] VSS[149] VSS[236] VSS[342]
AH46 AW32 D32 BG24
VSS[71] VSS[150] VSS[237] VSS[343]
AH7 AW34 D34 C22
VSS[72] VSS[151] VSS[238] VSS[344]
AJ19 AW36 D38 AP13
VSS[73] VSS[152] VSS[239] VSS[345]
AJ21 AW40 D42 M14
VSS[74] VSS[153] VSS[240] VSS[346]
AJ24 AW48 D8 AP3
VSS[75] VSS[154] VSS[241] VSS[347]
AJ33 AV11 E18 AP1
VSS[76] VSS[155] VSS[242] VSS[348]
AJ34 AY12 E26 BE16
VSS[77] VSS[156] VSS[243] VSS[349]
AK12 AY22 G18 BC16
VSS[78] VSS[157] VSS[244] VSS[350]
AK3 AY28 G20 BG28
VSS[79] VSS[158] VSS[245] VSS[351]
G26 BJ28
BD82PPSM-QNHN-A0_BGA989~D VSS[246] VSS[352]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3 VSS[258]
A A
LA-7741
5 4 3 2 1
5 4 3 2 1
+FAN1_VOUT JFAN1 CONN@

FAN1_DET# 1
+FAN1_VOUT 1
Place under CPU 2 2
RB751S40T1_SOD523-2~D
FAN1_TACH_FB 3
Place C266 close to the Q12 as possible 3
22U_0805_6.3V6M~D
4 4
1
1
D2
C219
REM_DIODE1_P_4022 5
GND
6
GND
1
@ 2 C
D C266 2 +3.3V_M D
2 TYCO_2-1775293-4~D
2
100P_0402_50V8J~D B
E Q12 Link Done
3
1 MMBT3904WT1G_SC70-3~D REM_DIODE1_N_4022 BC_INT#_EMC4022 2 1
R385 10K_0402_5%~D
FAN1_TACH_FB 2 1
R426 10K_0402_5%~D
+5V_RUN FAN1_DET# 2 1
R402 10K_0402_5%~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
1 1
C276
C275
Change to EMC4021 for cost saving
+3.3V_RUN
2 2
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
1 1 U6
C305
C738
2 VDDH
2 2 +3.3V_M 3 VDDH THERMATRIP2#
6 VDDL THERMTRIP2# 17
(1) DP3/DN3 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14 1 2 VDD_PWRGD 13 VDD_PWRGD
R389 10K_0402_5%~D 18 THERMATRIP3#
(2) DP5/DN5 for Skin on Q13, place Q13 close to Vcore VR choke. THERMTRIP3#
1 2 REM_DIODE1_N_4022 23
C270 2200P_0402_50V7K~D REM_DIODE1_P_4022 DN1/THERM
24 DP1/VREF_T SYS_SHDN# 19 THERM_STP# <46>
REM_DIODE2_P_4022
100P_0402_50V8J~D
2 1 REM_DIODE2_N_4022 26 20 POWER_SW# 1 2
DN2/DP4 POWER_SW# +RTC_CELL
1 1 C271 2200P_0402_50V7K~D REM_DIODE2_P_4022 27 @R390
@ R390 47K_0402_1%~D
DP2/DN4
1
E
C @
C277
C @C272
@ C272
B C
2 2 30 DP3/DN5 ACAVAIL_CLR 21 ACAV_IN <40,53,55>
100P_0402_50V8J~D B Q13 29 9 BC_INT#_EMC4022
2 E 2 C
MMBT3904WT1G_SC70-3~D DN3/DP5 ATF_INT#/BC_IRQ# BC_INT#_EMC4022 <40>
3
Q14 REM_DIODE2_N_4022
MMBT3904WT1G_SC70-3~D 2 1 VCP2 31
<53> MAX8731_IINP VCP
4.7K_0402_5%~D R387 25 VIN
FAN_OUT 5 +FAN1_VOUT
VSET_4022 28 4
VSET FAN_OUT
8 BC_CLK_EMC4022 <40>
FAN1_TACH_FB SMCLK/BC_CLK
10 7 BC_DAT_EMC4022 <40>
+3.3V_M TACH/GPIO1 SMDATA/BC_DATA
11
GPIO2
1
1
FAN1_DET# 15
R395 R404 GPIO3/PWM/THERMTRIP_SIO +3.3V_M
8.2K_0402_5%~D 10K_0402_5%~D
SMSC request
1
2
2
+1.05V_RUN_VTT THERMATRIP2# 1 2 3V_PWROK# 12 R388
<40> PCH_PWRGD# 3V_PWROK#
R399 R391 1K_0402_1%~D 22_0402_5%~D
1
0.1U_0402_25V6K~D
2.2K_0402_5%~D C 1
C278
1 2 2 1 +VCC_4022
2
B VDD +ADDR_XEN
32 1 2 +VCC_4022
ADDR_MODE/XEN
0.1U_0402_25V6K~D
1U_0402_6.3V6K~D
Q16 E 4.7K_0402_5%~D R393 1 1
3
PMST3904_SOT323-3~D 2 14
TEST1
C273
C1179
<7> H_THERMTRIP# 22
TEST2
+RTC_CELL 16 33
RTC_PWR3V VSS 2 2
1
1U_0402_6.3V6K~D
B EMC4022-1-EZK-TR_QFN32_5X5~D R403 B
1
10K_0402_5%~D
C274
SMSC request
2
2
+RTC_CELL
+3.3V_M
VSET_4022
0.1U_0402_25V6K~D
1 2
C281 0.1U_0402_25V6K~D
1
5
1 U10
R405 R406 TC7SH08FU_SSOP5~D 1
P
B DOCK_PWR_SW# <40>
C282
8.2K_0402_5%~D 1.4K_0402_1%~D POWER_SW# 4

O
2 POWER_SW_IN# <40>
A
G
2
2
3
THERMATRIP3#
1
C280 Rest=1400 Tp=94degree
0.1U_0402_25V6K~D
2
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, FAN & Thermal Sensor
LA-7741
5 4 3 2 1
5 4 3 2 1
LCD Power Q18

SI3456DDV-T1-GE3_TSOP6~D
+PWR_SRC_S +LCDVDD +3.3V_ALW
D
S
6
+LCDVDD +3.3V_ALW 4 5
0.1U_0402_25V6K~D
JLVDS1 2
130_0402_1%~D
45 40 R412 1
G5 40
1
10K_0402_5%~D
44 39 DMIC0 100K_0402_5%~D
G
G4 39 DMIC0 <29> 1
1
R413
C292
43 38
3
G3 38
R414
42 37 DMIC_CLK
DMIC_CLK <29>
2
G2 37
41 G1 36 36 +CAMERA_VDD 2
0.1U_0402_25V6K~D
35 USBP12_D-
6 2
35
2
34 USBP12_D+
2
34
3
PESD5V0U2BT_SOT23-3~D
D8
1M_0402_5%~D
33 CAM_MIC_CBL_DET# 1
33 CAM_MIC_CBL_DET# <17>
1
Q19A
C293
D D
32 +BL_PWR_SRC
32
Q19B
R1632
31
31
30 2 5
30 2
29
29
1
28 DISP_ON
2
28 BIA_PWM_LVDS_L
27
27 1 2BIA_PWM_LVDS D6
26 LE92 BLM18BB221SN1D_2P~D
LCD_CBL_DET# <17>
1
26
25 <39> LCD_VCC_TEST_EN 2
25 LCD_ACLK+_PCH EN_LCDPWR 2
24 LCD_ACLK+_PCH <16> 1
24 LCD_ACLK-_PCH
23 LCD_ACLK-_PCH <16>
23 +3.3V_RUN
22 <16,39> ENVDD_PCH 3
22 LCD_A2+_PCH Q20
21 21 LCD_A2+_PCH <16>
20 LCD_A2-_PCH 1 2 LDDC_CLK_PCH PDTC124EU_SC70-3~D
LCD_A2-_PCH <16>
3
20 R159 2.2K_0402_5%~D BAT54CW_SOT323-3~D
19 19
18 LCD_A1+_PCH 1 2 LDDC_DATA_PCH
18 LCD_A1+_PCH <16>
17 LCD_A1-_PCH R160 2.2K_0402_5%~D
17 LCD_A1-_PCH <16>
16 16
15 LCD_A0+_PCH Place near to JLVDS1
15 LCD_A0-_PCH LCD_A0+_PCH <16>
14 14 LCD_A0-_PCH <16>
13 LDDC_DATA_PCH
13 LDDC_DATA_PCH <16>
12 LDDC_CLK_PCH
12 LDDC_CLK_PCH <16> +LCDVDD +3.3V_RUN +BL_PWR_SRC
11 Q21
11 LCD_TST <39>
10 +3.3V_RUN FDC654P-G_SSOT-6~D
10
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+PWR_SRC
9 9 +LCDVDD 40mil
40mil
D
8 8 1 6
S
7 7 1 1 4 5 +BL_PWR_SRC
C298
C243
6 +5V_ALW C246 2
6
5 5 PANEL_HDD_LED <43> 0.1U_0603_50V7K~D 1
2
1000P_0402_50V7K~D
G
4 4
BREATH_WHITE_LED 2 2
3 BREATH_WHITE_LED <43> 1
3
3
1
2 BATT_YELLOW_LED 1
2 BATT_WHITE_LED BATT_YELLOW_LED <43>
1 R422 C296
1 BATT_WHITE_LED <43>
C297
C C
Close to JLVDS1.7,8 Close to JLVD1.9 100K_0402_5%~D
2
0.1U_0603_50V7K~D
AMPHE_G47D4022101EU~D
2
2
CONN@ +5V_ALW PWR_SRC_ON
Q22
0.1U_0402_25V6K~D
SSM3K7002FU_SC70-3~D
1
C302
1 2 1 3
S
R423 47K_0402_5%~D
D66 D67
RB751V-40GTE-17_SOD323-2~D RB751V-40GTE-17_SOD323-2~D 2
G
2
BIA_PWM_LVDS 1 2 DISP_ON 1 2
BIA_PWM_PCH <16> PANEL_BKEN_PCH <16>
1
1
Close to JLVDS1.6 EN_INVPWR
<40> EN_INVPWR
R1137 D68 R1138 D69 FDC654P: P CHANNAL
10K_0402_5%~D RB751V-40GTE-17_SOD323-2~D 100K_0402_5%~D RB751V-40GTE-17_SOD323-2~D
1 2 BIA_PWM_EC <40> 1 2 PANEL_BKEN_EC <39>
Panel backlight power control by EC
2
RF TEAM request
B LCD_ACLK+_PCH B
LCD_ACLK-_PCH
For Webcam
LDDC_CLK_PCH
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
1 1 1
+CAMERA_VDD Q23
C1201
C1202
C1203
PMV65XP_SOT23-3~D @ L10 DLW21SN121SQ2L_4P~D

2 2 2 USBP12+ 4 3 USBP12_D+
<17> USBP12+ 4 3
@ @ @ 1 3
S
+3.3V_RUN
0.1U_0402_25V6K~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
USBP12- 1 2 USBP12_D-
<17> USBP12- 1 2
1 1
G
2
C299
C300
C301
1 2
R427 0_0402_5%~D
2 2
2
1 2
R428 0_0402_5%~D
CCD_OFF
<39> CCD_OFF
A A
Title
LVDS
0.1
5 4 3 2 1
2 1
B
SW for MB/DOCK B
+5V_RUN +3.3V_RUN
U18
PCH_CRT_RED 1 16
<16> PCH_CRT_RED PCH_CRT_GRN R 5V VDD
<16> PCH_CRT_GRN 2 G
PCH_CRT_BLU 5 4
<16> PCH_CRT_BLU PCH_CRT_HSYNC B VDD
<16> PCH_CRT_HSYNC 6 H_SOURCE VDD 23
+3.3V_RUN PCH_CRT_VSYNC 7 32
<16> PCH_CRT_VSYNC PCH_CRT_DDC_DAT V_HOURCE VDD
<16> PCH_CRT_DDC_DAT 9 SDA_SOURCE
PCH_CRT_DDC_CLK 10 27 RED_CRT
<16> PCH_CRT_DDC_CLK SCL_SOURCE R1 GREEN_CRT RED_CRT <30>
G1 25 GREEN_CRT <30>
22 BLUE_CRT
B1 BLUE_CRT <30>
1
CRT_SWITCH 30 20 HSYNC_BUF
<39> CRT_SWITCH SEL H1_OUT VSYNC_BUF HSYNC_BUF <30>
R556 18
4.7K_0402_5%~D V1_OUT DAT_DDC2_CRT VSYNC_BUF <30>
SDA1 12
CLK_DDC2_CRT DAT_DDC2_CRT <30>
29 TEST SCL1 14 CLK_DDC2_CRT <30>
2
8 26 RED_DOCK
Reserved R2 GREEN_DOCK RED_DOCK <38>
G2 24
BLUE_DOCK GREEN_DOCK <38>
3 21
GND B2 HSYNC_DOCK BLUE_DOCK <38>
11 19
GND H2_OUT VSYNC_DOCK HSYNC_DOCK <38>
28 17
GND V2_OUT DAT_DDC2_DOCK VSYNC_DOCK <38>
31 13
GND SDA2 CLK_DDC2_DOCK DAT_DDC2_DOCK <38>
33 15
GPAD SCL2 CLK_DDC2_DOCK <38>
PI3V713-AZLEX_TQFN32_6X3~D
+3.3V_RUN +5V_RUN
SEL1/SEL2 Chanel Source
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0 A=B1 MB
1 1 1 1 1 1
1 A=B2 APR/SPR
C332
C333
C334
C335
C336
C339
2 2 2 2 2 2
@ @
A A
Title
CRT/Video switch
0.1
LA-7741
2 1
2 1
+5V_RUN
fuse P/N ok only, symbol not ready
BAT1000-7-F_SOT23-3~D
2
3
D4
NC
2 +5V_RUN_HDMI 1
+VDISPLAY_VCC
10U_0805_10V6K~D
0.5A_15V_SMD1812P050TF
0.1U_0402_10V7K~D
1 1
C338
C337
F2 2 2
1
B JHDMI1 CONN@ B
HDMI_HPD_SINK 19 HP_DET
18 +5V
17 Reserved
PCH_SDVO_CTRLDATA_R 16
PCH_SDVO_CTRLCLK_R SDA
15 SCL
HDMI_CEC 14 CEC
13 DDC/CEC_GND
TMDSB_CON_CLK# 12
TMDSB_CON_CLK CK-
11 CK+
+3.3V_RUN 10
TMDSB_CON_N0 CK_shield
9 D0-
TMDSB_CON_P0 8 D0+
7 D0_shield
HDMI_CEC 2 1 TMDSB_CON_N1 6
R1165 10K_0402_5%~D TMDSB_CON_P1 D1-
5 D1+
4 D1_shield GND1 20
TMDSB_CON_N2 3 21
TMDSB_CON_P2 D2- GND2
2 D2+ GND3 22
1 D2_shield GND4 23
BELLW_80079-1021
TMDSB_PCH_P2_C R452 1 2 680_0402_5%~D HDMI_OB

TMDSB_PCH_N2_C R450 1 2 680_0402_5%~D
TMDSB_PCH_P1_C R448 1 2 680_0402_5%~D
TMDSB_PCH_N1_C R449 1 2 680_0402_5%~D
TMDSB_PCH_P0_C R454 1 2 680_0402_5%~D
TMDSB_PCH_N0_C R453 1 2 680_0402_5%~D
TMDSB_PCH_CLK_C R456 1 2 680_0402_5%~D 1 2
TMDSB_PCH_CLK#_C R455 1 2 680_0402_5%~D @ R451 0_0402_5%~D
L19
2 1 TMDSB_PCH_CLK_C 1 2 TMDSB_CON_CLK
<16> TMDSB_PCH_CLK 1 2
1
D C353 0.1U_0402_10V7K~D
+3.3V_RUN R458 1 2 10K_0402_5%~D 2
G 2 1 TMDSB_PCH_CLK#_C 4 3 TMDSB_CON_CLK#
<16> TMDSB_PCH_CLK# 4 3
Q26 S C352 0.1U_0402_10V7K~D
3
SSM3K7002FU_SC70-3~D DLW21SN900HQ2L_0805_4P~D
1 2
@ R459 0_0402_5%~D
1 2
@ R462 0_0402_5%~D
L20
2 1 TMDSB_PCH_P0_C 1 2 TMDSB_CON_P0
<16> TMDSB_PCH_P0 1 2
C351 0.1U_0402_10V7K~D
2 1 TMDSB_PCH_N0_C 4 3 TMDSB_CON_N0
<16> TMDSB_PCH_N0 4 3
C350 0.1U_0402_10V7K~D
DLW21SN900HQ2L_0805_4P~D
+5V_RUN 1 2
+5V_RUN @ R466 0_0402_5%~D
1 2
2
RB751V-40GTE-17_SOD323-2~D
+3.3V_RUN @ R468 0_0402_5%~D

2
L21
1
0_0402_5%~D
2 1 TMDSB_PCH_P1_C 1 2 TMDSB_CON_P1
<16> TMDSB_PCH_P1 1 2
1
@D65
@ D65 C347 0.1U_0402_10V7K~D
R1163
RB751V-40GTE-17_SOD323-2~D @ D70
R1164 2 1 TMDSB_PCH_N1_C 4 3 TMDSB_CON_N1
Q120A 0_0402_5%~D C346 0.1U_0402_10V7K~D
1
2
2
DMN66D0LDW-7_SOT363-6~D DLW21SN900HQ2L_0805_4P~D
1
A A
1 2
1 6 PCH_SDVO_CTRLCLK_R 1 2 +5V_HDMI_DDC_CLK @ R469 0_0402_5%~D
<16> PCH_SDVO_CTRLCLK
R1153 2.2K_0402_5%~D
1 2
5
@ R470 0_0402_5%~D
L22
4 3 PCH_SDVO_CTRLDATA_R 1 2 +5V_HDMI_DDC_DAT 2 1 TMDSB_PCH_P2_C 1 2 TMDSB_CON_P2
<16> PCH_SDVO_CTRLDATA <16> TMDSB_PCH_P2 1 2
R1152 2.2K_0402_5%~D C349 0.1U_0402_10V7K~D
Q120B
DMN66D0LDW-7_SOT363-6~D 2 1 TMDSB_PCH_N2_C 4 3 TMDSB_CON_N2
C348 0.1U_0402_10V7K~D
+3.3V_RUN 1 2
@ R471 0_0402_5%~D
1M_0402_5%~D
2
R1168
2
G
1
HDMI_HPD_SINK
<16> HDMIB_PCH_HPD
3 1
R1128
1 2
20K_0402_5%~D Compal Electronics, Inc.
S
Q121 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, HDMI port
SSM3K7002FU_SC70-3~D NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
LA-7741
2 1
5 4 3 2 1
+3.3V_RUN
AUX/DDC SW for DPC to E-DOCK 1 2
C356
0.1U_0402_25V6K~D
C357 U20
D 0.1U_0402_10V7K~D D
1 BE0 VCC
14
2 1 DPC_AUX_C 2 13
<16> DPC_PCH_DOCK_AUX A0 BE3
DPC_DOCK_AUX 3 12
<38> DPC_DOCK_AUX B0 A3 PCH_DDPC_CTRLCLK <16>
4 BE1 B3
11
2 1 DPC_AUX#_C 5 10
<16> DPC_PCH_DOCK_AUX# A1 BE2
C360 0.1U_0402_10V7K~D
DPC_DOCK_AUX# 6 9
<38> DPC_DOCK_AUX# B1 A2 PCH_DDPC_CTRLDATA <16>
7 8
GND B2
PI3C3125LEX_TSSOP14~D
+5V_RUN
2 1
C365
0.1U_0402_25V6K~D
5
1
U21
P
NC
DPC_CA_DET 2 4 DPC_CA_DET#
<38> DPC_CA_DET A Y
G
NC7SZ04P5X-G_SC70-5~D
3
C C
There is a new die for PI3C3125. Sample availabe on May.
+3.3V_RUN
AUX/DDC SW for DPD to E-DOCK 1 2
C366
0.1U_0402_25V6K~D
C367 U23
0.1U_0402_10V7K~D 1 14
DPD_AUX_C BE0 VCC
<16> DPD_PCH_DOCK_AUX 2 1 2 13
A0 BE3
DPD_DOCK_AUX 3 12
<38> DPD_DOCK_AUX B0 A3 PCH_DDPD_CTRLCLK <16>
4 11
DPD_AUX#_C BE1 B3
<16> DPD_PCH_DOCK_AUX# 2 1 5 10
C368 0.1U_0402_10V7K~D A1 BE2
DPD_DOCK_AUX# 6 9
<38> DPD_DOCK_AUX# B1 A2 PCH_DDPD_CTRLDATA <16>
7 8
GND B2
PI3C3125LEX_TSSOP14~D
B B
+5V_RUN
2 1
C369
0.1U_0402_25V6K~D
5
U24
P
NC
DPD_CA_DET 2 4 DPD_CA_DET#
<38> DPD_CA_DET A Y
G
NC7SZ04P5X-G_SC70-5~D
3
+3.3V_RUN
1 2 PCH_DDPC_CTRLCLK
R487 2.2K_0402_5%~D Intel WW18 Strapping option
1 2 PCH_DDPC_CTRLDATA
R488 2.2K_0402_5%~D
1 2 PCH_DDPD_CTRLCLK
A R489 2.2K_0402_5%~D A
PCH_DDPD_CTRLDATA
Intel WW18 Strapping option
1 2
R490 2.2K_0402_5%~D
1 2 DPD_CA_DET
R491
1
1M_0402_5%~D
2 DPC_CA_DET Compal Electronics, Inc.
R492 1M_0402_5%~D PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DP125
LA-7741
5 4 3 2 1
5 4 3 2 1
+5V_HDD
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
1 1
For HDD Temp.
C396
C395
JSATA1 CONN@
1
D 2 2 GND D
<14> PSATA_PTX_DRX_P0_C
C389 2 1 0.01U_0402_16V7K~D SATA_PTX_DRX_P0 2
RX+
<14> PSATA_PTX_DRX_N0_C
C390 2 1 0.01U_0402_16V7K~D SATA_PTX_DRX_N0 3
RX-
4
SATA_PRX_DTX_N0 GND
2 1 5
<14> PSATA_PRX_DTX_N0_C TX-
C391 2 1 0.01U_0402_16V7K~D SATA_PRX_DTX_P0 6
<14> PSATA_PRX_DTX_P0_C C392 0.01U_0402_16V7K~D TX+
7
GND
PJP64
Pleace near HDD CONN 8
3.3V
1 2 +3.3V_RUN_HDD 9
+3.3V_RUN 3.3V
10
3.3V
11
+3.3V_RUN_HDD PAD-OPEN1x1m HDD_DET# GND
12 GND
<14> HDD_DET#
13 GND
+5V_HDD 14 5V
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
15 5V
16 5V
1 1 17 GND
FFS_INT2_Q 18 23
Reserved GND1
C402
C399
19 GND GND2 24
20 12V
2 2
21 12V
22 12V
+3.3V_RUN
Free Fall Sensor TYCO_1775770-3~D
Main SATA +5V Default

10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
Pleace near HDD CONN

1 1
U88
C388
C387
C LNG3DM C
RES 10
2 2
1 VDD_IO RES 13
14 VDD RES 15
RES 16
HDD_FALL_INT 11
<17> HDD_FALL_INT FFS_INT2 INT 1
9 INT 2 GND 5
GND 12
7
SDO/SA0
<12,13,15,34> DDR_XDP_WAN_SMBDAT 6
SDA / SDI / SDO
<12,13,15,34> DDR_XDP_WAN_SMBCLK 4
SCL/SPC
2
NC
8 3
CS NC
LNG3DMTR_LGA16_3X3~D
+3.3V_RUN
HDD PWR
1 2 DDR_XDP_WAN_SMBDAT +5V_ALW
R501 10K_0402_5%~D +PWR_SRC_S
1 2 DDR_XDP_WAN_SMBCLK
R502 10K_0402_5%~D
1 2 HDD_FALL_INT +3.3V_ALW2
1
R503 100K_0402_5%~D
R499
1
2
5
6
100K_0402_5%~D @
1
B D Q27 B
R500 G
2
100K_0402_5%~D HDD_EN_5V 3 SI3456DDV-T1-GE3_TSOP6~D
S
+5V_HDD +5V_RUN
4
3
PJP3
0.1U_0603_50V7K~D
1 2
1 2
Q28B
10U_0805_10V6K~D
5 1 1 JUMP_43X79
1
+5V_HDD
C393
SHORT DEFAULT
6
C394
4
R504
1
2 2
Q28A
100K_0402_5%~D
+3.3V_RUN @R506
@ R506 1 2 2
<35,39,42,48> RUN_ON
2
100K_0402_5%~D @R1621
@ R1621 0_0402_5%~D
<11,16,35,39,42,48> SIO_SLP_S3# 1 2
1
1
1
R1624 0_0402_5%~D
2
R508 FFS_INT2_Q R505

+5V_HDD Source
100K_0402_5%~D 100K_0402_5%~D
3
2
2
Q29B
5
6
4
Q29A
FFS_INT2 2
<18> FFS_INT2
1
A A
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT HDD CONNECTOR
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW
1 2 ZODD_WAKE#
R510 10K_0402_5%~D
1
R513
2 MOD_MD
10K_0402_5%~D For ODD
+3.3V_ALW_PCH
D D
1 2 USB30_SMI#
R514 100K_0402_5%~D
JSATA2 CONN@ +5VMOD Source

+PWR_SRC_S +5V_ALW
1 GND
SATA_ODD_PTX_DRX_P1_RP 2 1 SATA_PTX_DRX_P1 2 A+
1
SATA_ODD_PTX_DRX_N1_RP C407 2 1 0.01U_0402_16V7K~D SATA_PTX_DRX_N1 3 +3.3V_ALW2
C406 0.01U_0402_16V7K~D A- R507
4 GND
SATA_ODD_PRX_DTX_N1_RP 2 1 SATA_PRX_DTX_N1 5 100K_0402_5%~D
B-
1
2
5
6
SATA_ODD_PRX_DTX_P1_RP C405 2 1 0.01U_0402_16V7K~D SATA_PRX_DTX_P1 6
C404 0.01U_0402_16V7K~D B+ R509 D Q30
7
2
GND 100K_0402_5%~D G
8 2 MOD_EN 3 SI3456DDV-T1-GE3_TSOP6~D
<40> DEVICE_DET# DP S
+5V_MOD +5V_MOD 9
2
+5V
3
10 +5V_MOD
4
+5V
0.1U_0603_50V7K~D
MOD_MD 11 MD
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
Q31B
12 GND
10U_0805_10V6K~D
1 1 13 MODC_EN# 5 1
GND
1
C400
1
C398
6
C397
14 R511
4
GND
C401
15 100K_0402_5%~D
2 2 <15> CLK_PCIE_EMB REFCLK+ 2
Q31A
<15> CLK_PCIE_EMB# 16 REFCLK- 2
17 <39> MODC_EN 2
2
GND
<15> PCIE_PRX_EMBTX_P4 18 PETX+
1
<15> PCIE_PRX_EMBTX_N4 19
1
C PETX- R512 C
20 GND
21 100K_0402_5%~D
GND
<15> PCIE_PTX_EMBRX_P4
0.1U_0402_10V7K~D 2 1 C409 PCIE_PTX_EMBRX_P4_C 22 PERX+
<15> PCIE_PTX_EMBRX_N4
0.1U_0402_10V7K~D 2 1 C408 PCIE_PTX_EMBRX_N4_C 23
2
PERX-
Pleace near ODD CONN 24 GND
+5V_MOD 25 +5V
EMBCLK_REQ# 26
<15> EMBCLK_REQ# PCIE_WAKE# CLKREQ#
<34,35,40> PCIE_WAKE# 27
PLTRST_EMB# WAKE#
<17> PLTRST_EMB# 28
BAY_SMBDAT PERST#
<40,45> BAY_SMBDAT 29 32
BAY_SMBCLK SMB_DATA GND1
<40,45> BAY_SMBCLK 30 33
SMB_CLK GND2
<39> MOD_SATA_PCIE#_DET 31
HPD
+3.3V_ALW 1 2 TYCO_2-2129116-1
R1183 10K_0402_5%~D
+3.3V_RUN
Q76
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
+3.3V_RUN
SSM3K7002FU_SC70-3~D 1 1
C382
C381
S
MOD_MD 3 1 ZODD_WAKE#
ZODD_WAKE# <39>
0_0402_5%~D
0_0402_5%~D
1
2
2 2
0_0402_5%~D
@ R493
0_0402_5%~D
@ R494
G
R1181
R1177
2
MODC_EN#
U25
1
B +ODD_DEW2 B
7 6
Q123B +ODD_EQ2 EN VCC
18 10
DMN66D0LDW-7_SOT363-6~D DD VCC +ODD_DEW1
19 16
USB30_SMI# SATA_ODD_PTX_DRX_P1 OL VCC
4 3 USB30_SMI# <14> <14> SATA_ODD_PTX_DRX_P1_C 2 1 VCC
20
C383 0.01U_0402_16V7K~D 1
SATA_ODD_PTX_DRX_N1 HAP +ODD_PE1
<14> SATA_ODD_PTX_DRX_N1_C 2 1 2 9
C384 0.01U_0402_16V7K~D HAM PA +ODD_PE2
8
5
USB30_EN SATA_ODD_PRX_DTX_N1 PB
2 1 4
<14> SATA_ODD_PRX_DTX_N1_C HBM
10K_0402_5%~D
10K_0402_5%~D
C386 0.01U_0402_16V7K~D 5 15 SATA_ODD_PTX_DRX_P1_RP
HBP DAP
1
@ R1172
@ R1178
0_0402_5%~D
0_0402_5%~D
2 1 SATA_ODD_PRX_DTX_P1 14 SATA_ODD_PTX_DRX_N1_RP
<14> SATA_ODD_PRX_DTX_P1_C DAM
R496
R495
C385 0.01U_0402_16V7K~D 3
GND SATA_ODD_PRX_DTX_P1_RP
13 11
+ODD_EQ1 +ODD_EQ1 GND DBP SATA_ODD_PRX_DTX_N1_RP
17 12
+3.3V_ALW GND DBM
21
2
EP
+ODD_EQ2 MAX4951CCTPLFT_TQFN20_4X4~D
1
R515
100K_0402_5%~D
+3.3V_RUN
2
10K_0402_5%~D
10K_0402_5%~D
USB30_EN
1
1
@ R1173
@ R1175
6
Q123A
MOD_SATA_PCIE#_DET 2 DMN66D0LDW-7_SOT363-6~D
1
1
0_0402_5%~D
0_0402_5%~D
A A
R1174
R1176
2

Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT ODD CONNECTOR
5 4 3 2 1
2 1
place close to pin27 place close to pin38 L77 +5V_RUN
Internal Speakers Header +VDDA_AVDD

BLM21PG600SN1D_0805~D
1 2 +5V_RUN
2
0.1U_0402_25V6K~D
10U_0805_10V6K~D
0_0805_5%~D
+3.3V_RUN
1U_0603_10V7K~D
R1095
1 1 1
15 mils trace DVDD_IO should match
C957
C956
C955
CONN@
with HDA Bus level JSPK1
1
2 2 2
1U_0603_10V7K~D
0.1U_0402_25V6K~D
10U_0805_10V6K~D
INT_SPK_L+ L91 1 2 BLM18BD121SN1D_2P~D INT_SPKL_L+ 1
2
1 1 1 1 Place C994, C952~C957 close to Codec
2
C952
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
INT_SPK_L- L92 1 2 BLM18BD121SN1D_2P~D INT_SPKL_L- 3
3
C953
C954
10U_0805_10V6K~D
10U_0805_10V6K~D
4 1 1 1 1
L93 1 4 2 2 2
INT_SPK_R+ 2 BLM18BD121SN1D_2P~D INT_SPKR_R+ U72
C958
C959
C960
C961
5 1 27
INT_SPK_R- L94 1 GND DVDD_CORE AVDD1
2 BLM18BD121SN1D_2P~D INT_SPKR_R- 6 38
GND AVDD2 2 2 2 2
TYCO_2-1775765-4~D 3 45 +VDDA_PVDD
DVDD_IO PVDD +VREFOUT
39
C994 PVDD
1U_0603_10V7K~D
2 1 9 13 AUD_SENSE_A 1
DVDD SENSE_A
@ C973
@ C974
@ C975
@ C976
14 AUD_SENSE_B
SENSE_B
C1180
0.1U_0402_25V6K~D
28 MIC_IN_L 1 2
PORTA_L MIC_IN_R <30> 2
PCH_AZ_CODEC_BITCLK 6 29 MIC_IN_R C1163 2.2U_0603_6.3V6K~D
<14> PCH_AZ_CODEC_BITCLK BITCLK PORTA_R
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D
23 +VREFOUT +VREFOUT
PCH_AZ_CODEC_SDOUT VrefOut_A
<14> PCH_AZ_CODEC_SDOUT 5 1 2
SDATA_OUT AUD_HP_OUT_L R1143 2.2K_0402_5%~D
1 1 1 1 31 AUD_HP_OUT_L <30>
PORTB_L AUD_HP_OUT_R
<14> PCH_AZ_CODEC_SYNC 10 32 AUD_HP_OUT_R <30>
SYNC PORTB_R
2
Place R1096 close to codec
@ DE2
@ DE1
1 2 PCH_AZ_SDIN0_R 8 40 INT_SPK_L+
B 2 2 2 2 <14> PCH_AZ_CODEC_SDIN0 33_0402_5%~D SDATA_IN PORTD_+L INT_SPK_L- B
41
R1096 PCH_AZ_CODEC_RST# PORTD_-L
<14> PCH_AZ_CODEC_RST# 11
RESET# INT_SPK_R+
44
PORTD_+R INT_SPK_R-
43
PORTD_-R
I2S_MCLK 1 2 I2S_MCLK_R 15 25
RE9 0_0402_5%~D I2S_MCLK MONO_OUT AUD_PC_BEEP 2 1 1 2 SPKR <14>
1
1
I2S_BCLK 1 2 I2S_BCLK_R 16 12 C1105 0.1U_0402_25V6K~D R1119 100K_0402_5%~D
RE10 0_0402_5%~D I2S_SCLK PC_BEEP
2 1 1 2 BEEP <40>
I2S_DO 1 2 17 C1106 0.1U_0402_25V6K~D R1120 100K_0402_5%~D
R1097 33_0402_5%~D I2S_DOUT DMIC_CLK_L 1
2 2 DMIC_CLK <23>
I2S_LRCLK DMIC_CLK/GPIO 1 LE3 BLM18BB221SN1D_2P~D
Place R1097 close to codec 18
I2S_LRCLK DMIC_0/GPIO 2
4 DMIC0 <23>
I2S_DI# DMIC1/GPIO0/SPDIFOUT1
46 Place LE3 close to codec
24 48 1 2 1 2
I2S_DIN SPDIFOUT0//GPIO3/Aux_Out @ R169 0_0402_5%~D @ R1141 10K_0402_5%~D
Close to U72 pin5 Close to U72 pin6
36 @ T90 PAD~D 1 2
CAP+ @ R1142 10K_0402_5%~D
1
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK 19 C962
No Connect
BCLK: Audio serial data bus bit clock input/output 4.7U_0603_6.3V6K~D
LRCK: Audio serial data bus word clock input/output 20 Place C962 close to Codec
No Connect
1
35 2
@ R1077 @ R1076 CAP-
47_0402_5%~D 10_0402_1%~D
Place C963~C966 close to Codec
<39> AUD_NB_MUTE# 47 21
EAPD VREFFILT
22
+3.3V_RUN CAP2
34
2
V-
1 1 7 37
DVSS Vreg
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1U_0603_10V7K~D
10U_0805_10V6K~D
1 1 1 1
@C978
@C978 @ C977 1 2 42 26
PVSS AVSS1
C963
C964
C965
C966
0.1U_0402_10V7K~D 10P_0402_50V8J~D R1099 10K_0402_5%~D 30
2 2 AVSS
49 33
GND AVSS 2 2 2 2
92HD90B2X5NLGXYAX8_QFN48_7X7~D
+VDDA_AVDD place at AGND and DGND plane

Notes:
Place closely to Pin 13. R1083
2.49K_0402_1%~D
1 2 Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
@
AUD_SENSE_A 2 1 C981
100P_0402_50V8J~D
1
0.1U_0402_10V7K~D
1 2 place at Codec bottom side

R1086 +3.3V_RUN PJP62
1
20K_0402_1%~D
@
C982 1 2
100P_0402_50V8J~D
C980
1 2
2
2 PAD-OPEN1x1m
@
R1087 C983 +3.3V_RUN

100K_0402_5%~D 100P_0402_50V8J~D
6
0.1U_0402_10V7K~D
2
2
5 AUD_HP_NB_SENSE <30,39> 2
C1103
Q107A
1
DMN66D0LDW-7_SOT363-6~D Q107B
4
@ DMN66D0LDW-7_SOT363-6~D
1 U73
R162, R163, R164, R165,R166 CO-lay with U73 16
VCC
DAI_BCLK# 1 2 I2S_BCLK 2 3 DAI_BCLK#
@ R162 22_0402_5%~D 1A 1Y# DAI_BCLK# <38>
DAI_LRCK# 1 2 I2S_LRCLK 4 5 DAI_LRCK#
@ R163 0_0402_5%~D 2A 2Y# DAI_LRCK# <38>
DAI_DO# 1 2 I2S_DO 6 7 DAI_DO#
A 3A 3Y# DAI_DO# <38> A
@ R164 0_0402_5%~D
Resistor SENSE_A SENSE_B DAI_12MHZ# 1 2 I2S_MCLK 10 9 DAI_12MHZ#
@ R165 22_0402_5%~D 4A 4Y# DAI_12MHZ# <38>
Place closely to Pin 14 +VDDA_AVDD 12 11
R1078 5A 5Y#
39.2K PORT A PORT E
2.49K_0402_1%~D 14 13 I2S_DI# 1 2 DAI_DI
AUD_SENSE_B 6A 6Y# @ R166 0_0402_5%~D
2 1
20K PORT B PORT F EN_I2S_NB_CODEC# 1
<39> EN_I2S_NB_CODEC# OE1#
1000P_0402_50V7K~D
1 2 1 15 8
R1540 OE2# GND
1
+3.3V_RUN
C979
10K NA DMIC0 1K_0402_1%~D

R1079 R1080 +3.3V_RUN CD74HC366M96_SO16~D
39.2K_0402_1%~D 20K_0402_1%~D 2
1
5.11K SPDIFOUT0 SPDIFOUT1 (DMIC1)

1
R1081 DAI_DI
2
100K_0402_5%~D R1082 DAI_DI <38>

100K_0402_5%~D 2.49K Pull-up to AVDD
2
PORT A External MIC

<39> DOCK_HP_DET 2 5 DOCK_MIC_DET <39> DELL CONFIDENTIAL/PROPRIETARY
Q106A Q106B PORT B HeadPhone Out Compal Electronics, Inc.
1
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
PORT C Dock Audio
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Azalia (HD) Codec
PORT D Internal SPK LA-7741
2 1
5 4 3 2 1
SW1
<40,41> POWER_SW#_MB
POWER_SW#_MB 3 1 I/O board CONN.
@ D23
3
1
2
4 2 Link Done
NTC033-XJ1J-X260CM_4P JIO1 CONN@
PESD24VS2UT_SOT23-3~D 2
D VSYNC_BUF 2 1 1 IO_LOOP# <18> D
4
<24> VSYNC_BUF HSYNC_BUF 4 3 3 +5V_RUN
6
5 5
POWER & INSTANT ON SWITCH <24> HSYNC_BUF
8
6
8 7 7
+5V_RUN
0.1U_0402_16V4Z~D
RED_CRT 10
<24> RED_CRT 10 9 9 1
C1000
GREEN_CRT 12 11
<24> GREEN_CRT 12 11 AUD_HP_OUT_R <29>
BLUE_CRT 14
<24> BLUE_CRT 14 13 13
16
DAT_DDC2_CRT 16 15 15 AUD_HP_OUT_L <29> 2
18
<24> DAT_DDC2_CRT CLK_DDC2_CRT 18 17 17 MIC_IN_R <29>
20
Defult on, <24> CLK_DDC2_CRT 20 19 19 AUD_HP_NB_SENSE <29,39>
22
DETECT_GND 22 21 21
WIRELESS_ON/OFF#: 24 23
Media Board
G2 G1
LOW: ON 26
28
G4 G3 25
27
Place close
G6 G5 to JIO1.3,5
HIGH: OFF LS-6613P TYCO_2041300-1~D
JMEDIA1 CONN@
MEDIA_DET# 1
<18> MEDIA_DET# WIRELESS_ON#/OFF 1
2 2
<39> WIRELESS_ON#/OFF
3 3
4 4
VOL_MUTE 5
<40> VOL_MUTE
<40> VOL_DOWN
<40> VOL_UP
VOL_DOWN
VOL_UP
6
7
8
5
6 G1
7 G2
8
11
12 LED Board with Lid
9
10
9
10
+5V_ALW LS-6612P
TYCO_1-2041070-0~D JLED1 CONN@
1
C
LinK Done <43> SATA_LED
SATA_LED
BATT_WHITE
2
3
1
2 C
1 <43> BATT_WHITE 3
BATT_YELLOW 4
<43> BATT_YELLOW WLAN_LED 4
C1002 5
<43> WLAN_LED LID_CL# 5
<39,43> LID_CL# 6 6 G1 9
2 7 10
+3.3V_ALW 7 G2
0.1U_0402_25V6K~D
8 8
TYCO_2041322-8~D
1
C457
0.1U_0402_10V7K~D
Link Done
2
B B
A A
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT PWR SW/Sub-board Connector
5 4 3 2 1
5 4 3 2 1
+3.3V_LAN
+3.3V_RUN
1 2 TP_LAN_JTAG_TMS
1
@ R545 10K_0402_5%~D
1 2 TP_LAN_JTAG_TCK R547
@ R546 10K_0402_5%~D 10K_0402_5%~D
2
U31
1 2 LANCLK_REQ#_R 48 13 LAN_TX0+
<15> LANCLK_REQ# R1187 0_0402_5%~D CLK_REQ_N MDI_PLUS0 LAN_TX0-
<17> PLTRST_LAN# 36 14
D PE_RST_N MDI_MINUS0 D
CLK_PCIE_LAN 44 17 LAN_TX1+
<15> CLK_PCIE_LAN CLK_PCIE_LAN# PE_CLKP MDI_PLUS1 LAN_TX1-
<15> CLK_PCIE_LAN# 45 18
PCIE
PE_CLKN MDI_MINUS1
MDI
<15> PCIE_PRX_GLANTX_P7 2 1 PCIE_PRX_GLANTX_P7_C
C458 0.1U_0402_10V7K~D 38 20 LAN_TX2+
PETp MDI_PLUS2 +1.0V_LAN
<15> PCIE_PRX_GLANTX_N7 2 1 PCIE_PRX_GLANTX_N7_C 39
PETn MDI_MINUS2
21 LAN_TX2-
C459 0.1U_0402_10V7K~D
+3.3V_LAN 1 2 PCIE_PTX_GLANRX_P7_C 41 23 LAN_TX3+ L29
<15> PCIE_PTX_GLANRX_P7 PERp MDI_PLUS3 LAN_TX3- REGCTL_PNP10
C460 0.1U_0402_10V7K~D 42 24 1 2
PERn MDI_MINUS3
10U_0603_6.3V6M~D
0.1U_0402_10V7K~D
<15> PCIE_PTX_GLANRX_N7 1 2 PCIE_PTX_GLANRX_N7_C
1
C461 0.1U_0402_10V7K~D 4.7UH_CBC2012T4R7M_20%~D 1 1
C462
C463
R549 R551 0_0402_5%~D 28 6 Idc max=330mA
SMBUS
SMB_CLK RSVD_NC
10K_0402_5%~D
<15> LAN_SMBCLK 1 2 LAN_SMBCLK_R 31 SMB_DATA
<15> LAN_SMBDATA 1 2 LAN_SMBDATA_R RSVD_VCC3P3_1 1 +RSVD_VCC3P3_1 2 1 +3.3V_LAN
R552 0_0402_5%~D +RSVD_VCC3P3_2 R5532 2 2
2 14.7K_0402_5%~D
2
RSVD_VCC3P3_2
SMBus Device Address 0xC8 VDD3P3_IN 5 R554 4.7K_0402_5%~D
1 2 LAN_DISABLE#_R 3
<18> PM_LANPHY_ENABLE LAN_DISABLE_N +3.3V_LAN_OUT
R555 0_0402_5%~D 4
VDD3P3_OUT
<39> LAN_DISABLE#_R Place C462, C463 and L29 close to U31
VDD3P3_15 15 1
1
LOM_ACTLED_YEL# 26 19
@ R557 LOM_SPD100LED_ORG# LED0 VDD3P3_19 C464
27 LED1 VDD3P3_29 29
LED
10K_0402_5%~D LOM_SPD10LED_GRN# 25 +1.0V_LAN 1U_0603_10V7K~D
LED2 2
47 +1.0V_LAN +3.3V_LAN
2
VDD1P0_47
VDD1P0_46 46
T142 PAD~D TP_LAN_JTAG_TDI 32 37
T143 PAD~D TP_LAN_JTAG_TDO JTAG_TDI VDD1P0_37
34 JTAG_TDO
JTAG
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
TP_LAN_JTAG_TMS 33 43
TP_LAN_JTAG_TCK JTAG_TMS VDD1P0_43
35 JTAG_TCK 1 1 1 1 1 1
C1177
C1178
R1144 11
VDD1P0_11
C466
C467
C468
C469
0_0402_5%~D
C XTALO C
1 2 9 XTAL_OUT VDD1P0_40 40
XTALI 2 2 2 2 2 2
10 XTAL_IN VDD1P0_22 22
25MHZ_18PF_X3G025000DI1H-H~D 16
Y3 VDD1P0_16
VDD1P0_8 8
1 IN LAN_TEST_EN
OUT 3 30 TEST_EN
33P_0402_50V8J~D
33P_0402_50V8J~D
2 4 RES_BIAS 12 7 REGCTL_PNP10 Place C1178 close to pin5

GND GND RBIAS CTRL_1P0
2 2
49
VSS_EPAD
1
1
C470
C471
1K_0402_1%~D
3.01K_0402_1%~D
Note:
R561
R562
82579_QFN48_6X6~D +1.0V_LAN will work at 0.95V to 1.15V

1 1
2
Q34
+3.3V_ALW +3.3V_LAN
+PWR_SRC_S
D
6
S
+3.3V_ALW2 5 4
1
+3.3V_LAN 2
10U_0603_6.3V6M~D
0.1U_0402_10V7K~D
R564 1 1 1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
100K_0402_5%~D
C475
C476
1 1 1
3
1
2
2 2
C472
C473
C474
R565 ENAB_3VLAN
LAN ANALOG
470K_0402_5%~D
100K_0402_5%~D
3
2 2 2
2200P_0402_50V7K~D
B B
SWITCH
R1638
2
Q35B
39
30
21
14
1
8
4
1
U32 5
C477
VDD
VDD
VDD
VDD
VDD
VDD
VDD
6
38 SW_LAN_TX0+
SW_LAN_TX0+ <44>
2
B0+ SW_LAN_TX0- 2
37 SW_LAN_TX0- <44>
B0-
Q35A
LAN_TX0+ 1 2 LAN_TX0+R 2
L30 12NH_0603CS-120EJTS_5%~D A0+ SW_LAN_TX1+
34 SW_LAN_TX1+ <44> <16,39> SIO_SLP_LAN# 2
LAN_TX0- LAN_TX0-R B1+ SW_LAN_TX1-
1 2 3
A0- B1-
33 SW_LAN_TX1- <44>
L31 12NH_0603CS-120EJTS_5%~D
1
29 SW_LAN_TX2+
LAN_TX1+ 1 LAN_TX1+R B2+ SW_LAN_TX2- SW_LAN_TX2+ <44>
2 6
A1+ B2-
28
L33 12NH_0603CS-120EJTS_5%~D SW_LAN_TX2- <44>
LAN_TX1- 1 2 LAN_TX1-R 7 25 SW_LAN_TX3+
A1- B3+ SW_LAN_TX3- SW_LAN_TX3+ <44>
L32 12NH_0603CS-120EJTS_5%~D 24
B3- SW_LAN_TX3- <44>
LAN_TX2+ 1 2 LAN_TX2+R 9 17 LAN_ACTLED_YEL#
A2+ LEDB0 LED_100_ORG# LAN_ACTLED_YEL# <44>
L34 12NH_0603CS-120EJTS_5%~D 18
LAN_TX2- LAN_TX2-R LEDB1 LED_10_GRN# LED_100_ORG# <44>
1 2 10
A2- LEDB2
41 LED_10_GRN# <44>
L35 12NH_0603CS-120EJTS_5%~D +3.3V_LAN C478
36 DOCK_LOM_TRD0+ 0.1U_0402_10V7K~D
LAN_TX3+ 1 LAN_TX3+R C0+ DOCK_LOM_TRD0- DOCK_LOM_TRD0+ <38>
2 11 35 DOCK_LOM_TRD0- <38> 1 2
L36 12NH_0603CS-120EJTS_5%~D A3+ C0-
LAN_TX3- 1 2 LAN_TX3-R 12 32 DOCK_LOM_TRD1+
A3- C1+ DOCK_LOM_TRD1+ <38>
5
L37 12NH_0603CS-120EJTS_5%~D 31 DOCK_LOM_TRD1-
C1- DOCK_LOM_TRD1- <38>
LOM_SPD100LED_ORG# 1
P
DOCKED DOCK_LOM_TRD2+ B
13 27 4
<39> DOCKED SEL C2+ DOCK_LOM_TRD2- DOCK_LOM_TRD2+ <38> LOM_SPD10LED_GRN# O WLAN_LAN_DISB# <39>
26 2
C2- DOCK_LOM_TRD2- <38> A
G
LOM_ACTLED_YEL# 15 23 DOCK_LOM_TRD3+ TC7SH08FU_SSOP5~D
DOCK_LOM_TRD3+ <38>
3
LOM_SPD100LED_ORG# LEDA0 C3+ DOCK_LOM_TRD3- U15
16 LEDA1 C3- 22 DOCK_LOM_TRD3- <38>
A LOM_SPD10LED_GRN# A
Layout Notice : Place bead as 42 LEDA2
19 DOCK_LOM_ACTLED_YEL#
close PI3L500 as possible LEDC0 DOCK_LOM_SPD100LED_ORG# DOCK_LOM_ACTLED_YEL# <38>
5 PD LEDC1 20 DOCK_LOM_SPD100LED_ORG# <38>
40 DOCK_LOM_SPD10LED_GRN#
LEDC2 DOCK_LOM_SPD10LED_GRN# <38>
43 PAD_GND DELL CONFIDENTIAL/PROPRIETARY
1: TO DOCK
FROM NIC DOCKED
0: TO RJ45 TO
PI3L720ZHEX_TQFN42_9X3P5~D Title
DOCK
Intel 82579 (Hanksville) / LAN SW
0.1
LA-7741
5 4 3 2 1
5 4 3 2 1
+3.3V_SUS USH board conn
+3.3V_RUN +3.3V_SB3V
1 2 USH_SMBCLK
R589 2.2K_0402_5%~D JUSH1 CONN@
1 2 1 2 USH_SMBDAT 1
1@ R873 0_0402_5%~D +3.3V_SB3V R585 2.2K_0402_5%~D 1
<17> USBP7- 2 2
+3.3V_RUN 3
+3.3V_SUS <17> USBP7+ 3
4
ATMEL TPM for E4 <40> USH_SMBCLK 5
4
5
0.1U_0402_25V6K~D
4700P_0402_25V7K~D
D D
<40> USH_SMBDAT 6
6
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.1U_0402_25V6K~D
1 7
<39> BCM5882_ALERT# 7
0.1U_0402_25V6K~D
1 1@ 8
8
C44
1@ U39 1@ 1 1 1 1 9
9
C45
C553
1 10
2 10
C550
C551
C552
C53
10 11
2 VCC_0 <41> BT_COEX_STATUS2 11
5 19 12
SB3V VCC_1 2 2 2 2 <41> BT_PRI_STATUS 12
24 13
VCC_2 2 13
14
14
15
<17> PLTRST_USH# 15
16
<39> USH_PWR_STATE# 16
<18> CONTACTLESS_DET# 17 17
SP_TPM_LPC_EN 28 12 +3.3V_RUN 18
<39> SP_TPM_LPC_EN LPCPD# V_BAT 18
13 JETWAY_CLK14M 19
LPC_LAD0 NBO_13 NC_P JETWAY_CLK14M <15> +5V_RUN 19
<14,34,39,40> LPC_LAD0 26 LAD0 NBO_14 14 1 2 20 20
<18> USH_DET#
0.1U_0402_25V6K~D
LPC_LAD1 23 C554 1U_0402_6.3V6K~D
<14,34,39,40> LPC_LAD1 LPC_LAD2 LAD1
<14,34,39,40> LPC_LAD2 20 LAD2 21 GND1
0.1U_0402_25V6K~D
LPC_LAD3 17 1 22
<14,34,39,40> LPC_LAD3 LAD3 GND2
C51
GPIO6 6
1 TYCO_2-2041070-0
C52
CLK_PCI_TPM_TCM 21 9 TCM_BA0
<15> CLK_PCI_TPM_TCM LPC_LFRAME# LCLK TESTBI 2
<14,34,39,40> LPC_LFRAME# 22 LFRAME# TESTI 8
PCH_PLTRST#_EC 16 +3.3V_RUN
<17,34,35,39,40> PCH_PLTRST#_EC IRQ_SERIRQ LRESET# 2
<14,39,40> IRQ_SERIRQ 27 SERIRQ
CLKRUN# 15
<16,39,40> CLKRUN# CLKRUN# PP
NC_7 7 1 2
@ R656 4.7K_0402_5%~D
CLK_PCI_TPM_TCM 1 4
ATEST_1 GND_4
2 ATEST_2 GND_11 11
1
TCM_BA1 3 18
@ RE5 ATEST_3 GND_18
GND_25 25
33_0402_5%~D
C AT97SC3204-X2A14-AB_TSSOP28 C
2
1
@
CE3
27P_0402_50V8J~D
2
Co-lay U37 and U39

LPC layout: Place TCM first and then end LPC with TPM.
China TCM: NationZ & Jetway co-lay

+3.3V_RUN
LOW:Power Down Mode 4@ U37
High:Working Mode
10
VDD_0
19
VDD_1
24
VDD_2
SP_TPM_LPC_EN 28
+3.3V_RUN LPC_LAD0 LPCPD#
26 11
B LPC_LAD1 LAD0 GND_11 B
23 18
LPC_LAD2 LAD1 GND_18
20 25
LPC_LAD3 LAD2 GND_25
17 4
LAD3 GND_4
1
+3.3V_SB3V
@ R657 @ R658
10K_0402_5%~D 10K_0402_5%~D
CLK_PCI_TPM_TCM 21 5 JETWAY_CLK14M
LPC_LFRAME# LCLK NC_5
22 12
2
LFRAME# NC_12
1
PCH_PLTRST#_EC 16 13 JETWAY_CLK14M
TCM_BA0 IRQ_SERIRQ LRESET# NC_13 @
27
TCM_BA1 CLKRUN# SERIRQ RE6
15 1
PP CLKRUN# NC_1 33_0402_5%~D
7 2
TCM_BA1 PP NC_2
3 6
2
TCM_BA0 BA_1 NC_6
9 8
BA_0 NC_8
1
14 NC_P 1
R659 R660 NC_P @
10K_0402_5%~D 10K_0402_5%~D CE4
27P_0402_50V8J~D
2
2
SSX44-B-D-T1_TSSOP28~D
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, TPM/TCM
LA-7741
5 4 3 2 1
5 4 3 2 1
D D
+3.3V_RUN
L45
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
BLM18PG471SN1D_2P~D
4.7U_0603_6.3V6K~D
1 2 1 1
+1.5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 1 1
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
C559
C560
L47
C577
1 2 1 1 2 2
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
C576
C575
BLM18BD601SN1D_0603~D
2 2 2
C563
C564
1 1
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
U38
2 2
C561
C562
1 1
+3.3VDDH 16 10 +OZ_DVDD
2 2 3.3VDDH DVDD
C565
C566
+VDDH_SD 9 8 +OZ_AVDD
+PE_VDDH VDDH AVDD
1 2 32 PE_VDDH
L44 BLM18BD601SN1D_0603~D 2 2 +3.3V_RUN_CARD
17 +SKT_VCC
+PE_VDDH SKT_VCC
MMI_VCC_OUT 15
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
<15> CLK_PCIE_MMI 2 PE_REFCLKP

1 1 1 1 28 SD/MMCDAT1_R R663 1 2 33_0402_5%~D SD/MMCDAT1
<15> CLK_PCIE_MMI# PE_REFCLKM SD_D1 SD/MMCDAT2_R
SD_D2 26 R664 1 2 33_0402_5%~D SD/MMCDAT2
C578
C574
C579 29 SD/MMCDAT0_R R665 1 2 33_0402_5%~D SD/MMCDAT0

C569 0.1U_0402_10V7K~D PCIE_PRX_MMITX_P6_C MMI_D0
4.7U_0603_6.3V6K~D 1 2 6 27
2 2 2 <15> PCIE_PRX_MMITX_P6 C573 0.1U_0402_10V7K~D PCIE_PRX_MMITX_N6_C PE_TXP MS_D1
<15> PCIE_PRX_MMITX_N6 1 2 7 PE_TXM MS_D2 25
C567 1 2 0.1U_0402_10V7K~D PCIE_PTX_MMIRX_P6_C 5 24 SD/MMCDAT3_R R668 1 2 33_0402_5%~D SD/MMCDAT3
<15> PCIE_PTX_MMIRX_P6 PCIE_PTX_MMIRX_N6_C PE_RXP MMI_D3 SD/MMCDAT4_R SD/MMCDAT4
C568 1 2 0.1U_0402_10V7K~D 4 23 R669 1 2 33_0402_5%~D
<15> PCIE_PTX_MMIRX_N6 PE_RXM MMI_D4 SD/MMCDAT5_R SD/MMCDAT5
1 2 3 22 R670 1 2 33_0402_5%~D
R677 191_0402_1%~D PE_REXT MMI_D5 SD/MMCDAT6_R R672 33_0402_5%~D SD/MMCDAT6
MMI_D6 21 1 2
33 20 SD/MMCDAT7_R R673 1 2 33_0402_5%~D SD/MMCDAT7
GPAD MMI_D7
C C
13 PE_RST# MS_CD# 11
place close to pin U38.32 19 SD/MMCCMD_R R674 1 2 33_0402_5%~D SD/MMCCMD
<17> PLTRST_MMI# SD_CMD/MS_BS SD/MMCCLK_R SD/MMCCLK
MMI_CLK 18 1 2
14 12 SD/MMCCD# R676 33_0402_5%~D
MULTI-IO1 SD_CD# SDWP
31 MULTI-IO2 SD_WPI 30
<15> MMICLK_REQ#
OZ600FJ0LN_QFN32_5X5~D
EMI request
SD/MMCCLK
@ RE678
B JSD1 CONN@ B
33_0402_5%~D
SD/MMCDAT3 14
1
SD/MMCCMD DAT3/SD1
12
CMD/SD2
1 10
@ CE757 VSS1/SD3
+3.3V_RUN_CARD 9
SD/MMCCLK VCC/SD4
8
10P_0402_50V8J~D CLK/SD5
6
2 SD/MMCDAT0 GND/VSSS2/SD6
4
DAT0/SD7
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
SD/MMCDAT1 3
DAT1/SD8
1
10K_0402_5%~D
1 1 SD/MMCDAT2 15
DAT2/SD9
C572
C571
R826
SD/MMCDAT4 13
SD/MMCDAT5 DAT4/MMC10
11
2 2 SD/MMCDAT6 DAT5/MMC11
7
2
SD/MMCDAT7 DAT6/MMC12
5
DAT7/MMC13
19
CD_WP_SW/GND
20
CD_WP_SW/GND
SD/MMCCD# 17
SDWP CD_SW/SD
18
SD/MMCCD# WP_SW/SD
2
SDWP CD_SW_TAISOL/SD
1
WP/SW_TAISOL/SD
16
GND_SW
T-SOL_156-4000000901_NR~D
A
Link Done A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Card Reader
LA-7741
5 4 3 2 1
5 4 3 2 1
+3.3V_PCIE_WWAN
1 2 +3.3V_ALW_PCH
+3.3V_RUN @ R693 0_0402_5%~D
PCIE_MCARD1_DET# 1 2
2.2K_0402_5%~D
2.2K_0402_5%~D
USB_MCARD2_DET# 2 1 1 2 WLAN_RADIO_DIS#_R R692 100K_0402_5%~D
<39> WLAN_RADIO_DIS#
1
@ R1159
@ R1160
R694 100K_0402_5%~D
D31
+3.3V_PCIE_WWAN RB751S40T1_SOD523-2~D
PCIE_MCARD2_DET#_R 1 2
Mini WLAN/WIMAX H=6.7
2
R695 100K_0402_5%~D
2 1 WWAN_SMBCLK USB_MCARD1_DET# 1 2 PCIE_MCARD1_DET# +3.3V_RUN
<12,13,15,27> DDR_XDP_WAN_SMBCLK
R1157 0_0402_5%~D @ R698 0_0402_5%~D
2 1 WWAN_SMBDAT +3.3V_WLAN +3.3V_WLAN
<12,13,15,27> DDR_XDP_WAN_SMBDAT
R1158 0_0402_5%~D
D JMINI2 CONN@ +1.5V_RUN PCIE_MCARD1_DET# 1 2 D
<28,35,40> PCIE_WAKE# PCIE_WAKE# 1 2 @ R699 100K_0402_5%~D
Mini WWAN/GPS/LTE/UWB H=5.2 <41> COEX2_WLAN_ACTIVE
<41> COEX1_BT_ACTIVE
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
1
R7001
2
0_0402_5%~D
2
3
5
1
3
5
2
4
6
4
6
USB_MCARD1_DET# 1
R701
2
100K_0402_5%~D
R702 0_0402_5%~D 7 8
+3.3V_PCIE_WWAN +3.3V_PCIE_WWAN <15> MINI2CLK_REQ# 7 8
9 10 1 2
JMINI1 CONN@ 9 10
<15> CLK_PCIE_MINI2# 11 12
<28,35,40> PCIE_WAKE# PCIE_WAKE# 11 12 MSDATA C595 4700P_0402_25V7K~D
1 2 <15> CLK_PCIE_MINI2 13 14
1 2 13 14
3 4 15 16 HOST_DEBUG_TX <40>
3 4 15 16
5 6 +1.5V_RUN 17 18
MINI1CLK_REQ# 5 6 <40> HOST_DEBUG_RX 17 18 WLAN_RADIO_DIS#_R
7 8 +SIM_PWR 19 20
<15> MINI1CLK_REQ# 7 8 UIM_DATA <40> MSCLK 19 20
9 9 10 10 21 21 22 22 2 1 PCH_PLTRST#_EC
CLK_PCIE_MINI1# 11 12 UIM_CLK PCIE_PRX_WLANTX_N2 23 24 R703 0_0402_5%~D
<15> CLK_PCIE_MINI1# CLK_PCIE_MINI1 11 12 UIM_RESET <15> PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2 23 24
13 13 14 14 25 25 26 26
<15> CLK_PCIE_MINI1 UIM_VPP <15> PCIE_PRX_WLANTX_P2
15 15 16 16 27 27 28 28
17 18 C596 0.1U_0402_10V7K~D 29 30
17 18 29 30
19 19 20 20 WWAN_RADIO_DIS# <39> <15> PCIE_PTX_WLANRX_N2 1 2 PCIE_PTX_WLANRX_N2_C 31 31 32 32
21 22 1 R704
2 PCH_PLTRST#_EC <17,32,35,39,40> <15> PCIE_PTX_WLANRX_P2 1 2 PCIE_PTX_WLANRX_P2_C 33 34
PCIE_PRX_WANTX_N1 21 22 0_0402_5%~D C598 0.1U_0402_10V7K~D 33 34 USBP4-
23 23 24 24 35 35 36 36 USBP4- <17>
<15> PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 PCIE_MCARD1_DET# USBP4+
25 25 26 26 37 37 38 38 USBP4+ <17>
<15> PCIE_PRX_WANTX_P1 <18> PCIE_MCARD1_DET# USB_MCARD1_DET#
27 27 28 28 39 39 40 40 USB_MCARD1_DET# <18>
C597 0.1U_0402_10V7K~D 29 30 WWAN_SMBCLK 41 42 WIMAX_LED#
29 30 41 42
<15> PCIE_PTX_WANRX_N1 1 2 PCIE_PTX_WANRX_N1_C 31 31 32 32 WWAN_SMBDAT COEX2_WLAN_ACTIVE 43 43 44 44 WLAN_LED#
<15> PCIE_PTX_WANRX_P1 1 2 PCIE_PTX_WANRX_P1_C 33 33 34 34 <15> PCH_CL_CLK1 45 45 46 46
C599 0.1U_0402_10V7K~D 35 36 USBP5- 1 47 48 1 2 MSDATA
35 36 USBP5- <17> <15> PCH_CL_DATA1 47 48 MSDATA <40>
<17> PCIE_MCARD2_DET# R7251 2 PCIE_MCARD2_DET#_R 37 37 38 38 USBP5+
USBP5+ <17> <15> PCH_CL_RST1# 1 2 49 49 50 50 @R706
@ R706 0_0402_5%~D
0_0402_5%~D 39 40 USB_MCARD2_DET# @ C600 R707 0_0402_5%~D 51 52
39 40 LED_WWAN_OUT# USB_MCARD2_DET# <18> 51 52 WIMAX_LED# STUDY FOR DEBUG
41 42 33P_0402_50V8J~D
41 42 2
43 43 44 44 53 GND1 GND2 54
45
47
45 46 46
48
check
+1.5V_RUN 47 48 MOLEX_48338-1088~D +3.3V_WLAN
49 49 50 50
C C
<39> HW_GPS_DISABLE2# 51 51 52 52
53 GND1 GND2 54
33P_0402_50V8J~D
0.047U_0402_16V4Z~D
USB_MCARD2_DET# 1 2 PCIE_MCARD2_DET#
100K_0402_5%~D
100K_0402_5%~D
@ R697 0_0402_5%~D
2
MOLEX_48338-1088~D +1.5V_RUN +3.3V_WLAN
1 1
R718
R705
C593
C594
+3.3V_PCIE_WWAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
5
2 2 DMN66D0LDW-7_SOT363-6~D
1
@ C603
1 1 1 1 1 2 2 1
WIMAX_LED# 4 3 WIRELESS_LED#
100K_0402_5%~D
C601
C602
C604
C605
C606
C607
C608
2
Q124B
2
2 2 2 2 2 1 1 2
R719
+3.3V_PCIE_WWAN
WLAN_LED# 1 6
2
G
1
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
33P_0402_50V8J~D
22U_0805_6.3V6M~D
33P_0402_50V8J~D
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
Q124A
1 1 LED_WWAN_OUT# 3 1 WIRELESS_LED# <39,43>
S
1 1 1 1 1
@ C1176
+ +
C610
C611
C612
C613
C614
C615
Q77
2 2 2 2 2 2 2
1/2 Minicard Flash Card H=4
+3.3V_PCIE_FLASH +3.3V_PCIE_FLASH
Primary Power Aux Power USB_MCARD3_DET# 1 2 PCIE_MCARD3_DET#
PWR Voltage JMINI3 CONN@ @R708
@ R708 0_0402_5%~D
PCIE_WAKE# 1 2
Rail Tolerance Peak Normal Normal COEX2_WLAN_ACTIVE 1 2 3
1 2
4
B R709 0_0402_5%~D 3 4 B
5 6 +1.5V_RUN
MINI3CLK_REQ# 5 6 LPC_LFRAME#
<15> MINI3CLK_REQ# 7 8 LPC_LFRAME# <14,32,39,40>
7 8 LPC_LAD3
+3.3V +-9% 1000 750 9 10
SIM Card Push-Push 250 (Wake enable)
<15> CLK_PCIE_MINI3#
<15> CLK_PCIE_MINI3
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
11
13
9
11
13
10
12
14
12
14
LPC_LAD2
LPC_LAD1
LPC_LAD0
LPC_LAD3 <14,32,39,40>
LPC_LAD2 <14,32,39,40>
LPC_LAD1 <14,32,39,40>
+3.3Vaux +-9% 330 250 5 (Not wake enable) 15
15 16
16 LPC_LAD0 <14,32,39,40>
PCH_PLTRST#_EC 17 18
PCLK_80H 17 18
<15> PCLK_80H 19 20
+SIM_PWR 19 20
+1.5V +-5% 500 375 NA 21 22 2 1 PCH_PLTRST#_EC
PCIE_PRX_WPANTX_N5 21 22 R710 0_0402_5%~D
23 24
JSIM1 CONN@ <15> PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5 23 24
25 26
<15> PCIE_PRX_WPANTX_P5 25 26
1 5 27 28
UIM_RESET VCC GND UIM_VPP C617
0.1U_0402_10V7K~D 27 28
2 6 29 30
UIM_CLK RST VPP UIM_DATA PCIE_PTX_WPANRX_N5_C 29 30
3 7 <15> PCIE_PTX_WPANRX_N5 2 1 31 32
CLK I/O PCIE_PTX_WPANRX_P5_C 31 32
4 8 <15> PCIE_PTX_WPANRX_P5 2 1 33 34
NC NC C618
0.1U_0402_10V7K~D 33 34 USBP6-
9 35 36 USBP6- <17>
GND PCIE_MCARD3_DET# 35 36 USBP6+
10 37 38 USBP6+ <17>
GND <18> PCIE_MCARD3_DET# 37 38 USB_MCARD3_DET#
1
1 2
39
41
39 40
40
42
just reserve
+3.3V_RUN 41 42
C616 SUYIN_254070FB008S205ZL R711 100K_0402_5%~D 43 44 2 1 +3.3V_ALW_PCH
1U_0402_6.3V6K~D 43 44 @ R712 100K_0402_5%~D
45 46
2 45 46
47 48
47 48
49 50
49 50
51
51 52
52 WPAN Noise
+1.5V_RUN +3.3V_PCIE_FLASH 53 54 USB_MCARD3_DET#
GND1 GND2
1
LOTES_AAA-PCI-073-P02-A
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
@ C627
4700P_0402_25V7K~D
2
@ C621
A
1 1 1 1 1 2 2 1 A
C619
C620
C622
C623
C624
C625
C626
2 2 2 2 2 1 1 2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Mini Card
LA-7741
5 4 3 2 1
5 4 3 2 1
Power Control for Mini card2 Express Card PWR S/W

+PWR_SRC_S
+3.3V_ALW +3.3V_ALW Q38 +3.3V_WLAN +1.5V_RUN +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
D D
D
100K_0402_5%~D
6
S
1
100K_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
5 4
R714
2
R713
1 1 1 1 1 1 1 1 1 1
C635
C634
C633
C642
C643
C640
C641
C637
C638
2
3
R715
2
2 2 2 2 2 2 2 2 2
20K_0402_5%~D
4700P_0402_25V7K~D
1 U41
2
Q39B
17 15
1M_0402_5%~D
AUXIN AUXOUT
C632
5 2 3.3VIN 3.3VOUT 3
R1620
12 1.5VIN 1.5VOUT 11
6
Q39A 2
4 <11,16,27,39,42,48> SIO_SLP_S3# 1 2
DMN66D0LDW-7_SOT363-6~D R734 0_0402_5%~D 20 8 CARD_RESET#
EXPRCRD_STBY_R# SHDN# PERST# EXPRCRD_CPPE#
<27,39,42,48> RUN_ON 1 2 1 10
2
@ R717 0_0402_5%~D STBY# CPPE# CPUSB#
<39> AUX_EN_WOWL 2 <17,32,34,39,40> PCH_PLTRST#_EC 6 9
SYSRST# CPUSB#
19 OC#
1
+3.3V_RUN 4 NC
R716 +3.3V_CARD 5 18
100K_0402_5%~D NC RCLKEN
+1.5V_CARD 13 NC
+1.5V_RUN 14 7
2
NC GND
16 NC PAD 21
TPS2231MRGPR-2_QFN20_4X4~D
C Power Control for Mini card1 Note: Add connection on pin4, pin5, pin 13 C
+PWR_SRC_S
+3.3V_PCIE_WWAN and pin14 to support GMT 2nd source part
+3.3V_ALW +3.3V_ALW Q40
100K_0402_5%~D
6
S
1
100K_0402_5%~D
5 4
1
R722
2
R721
1
1
G
R723
Express Card Conn.
2
1K_0402_1%~D
2
3
4700P_0402_25V7K~D
+3.3V_SUS +1.5V_CARD
1M_0402_5%~D
1
1
Q41B
R1625
C644
0.1U_0402_25V6K~D
MCARD_WWAN_PWREN# 5
1
D
6
2
Q73
2.2K_0402_5%~D
2.2K_0402_5%~D
Q41A 2 MCARD_WWAN_PWREN# 1
4
<18> EXPRCRD_DET#
1
DMN66D0LDW-7_SOT363-6~D G
2
R731
R732
C645
S 1 2
3
2 @R724
@ R724 0_0402_5%~D
<39> MCARD_WWAN_PWREN 2
1
2
R726 1 2
100K_0402_5%~D @R727
@ R727 0_0402_5%~D
1 2 JEXP1 CONN@
<17> USBP10- 1 2
1
2
USBP10_D- 1
2
USBP10_D+ 2
<17> USBP10+ 4 3 3
B 4 3 CPUSB# 3 B
4
L49 DLW21SN900SQ2L_0805_4P~D 4
5
Power Control for Mini card3 <40> CARD_SMBCLK
CARD_SMBCLK
CARD_SMBDAT
6
7
5
6
7
<40> CARD_SMBDAT 8
8
9
9
10
10
11
+3.3V_ALW +3.3V_ALW Q42 +3.3V_PCIE_FLASH <28,34,40> PCIE_WAKE# 11
+3.3V_CARDAUX 12
+PWR_SRC_S 12
0.1U_0402_25V6K~D
SI3456DDV-T1-GE3_TSOP6~D CARD_RESET# 13
13
100K_0402_5%~D
+3.3V_CARD 14
14
D
6 1 15
S
15
1
100K_0402_5%~D
5 4 16
16
<15> EXPCLK_REQ#
1
R729
C646
0.1U_0402_25V6K~D
2 EXPRCRD_CPPE# 17
17
R728
1 <15> CLK_PCIE_EXP# 18
18
1
2 19
1
G
<15> CLK_PCIE_EXP 19
R730 20
2
20
C649
20K_0402_5%~D <15> PCIE_PRX_EXPTX_N3 21
2
21
<15> PCIE_PRX_EXPTX_P3 22
22
3
2
4700P_0402_25V7K~D
C647 0.1U_0402_10V7K~D 23
2
23
2 PCIE_PTX_EXPRX_N3_C
1M_0402_5%~D
1 <15> PCIE_PTX_EXPRX_N3 1 24
24
1
Q43B
<15> PCIE_PTX_EXPRX_P3 1 2 PCIE_PTX_EXPRX_P3_C 25

25
R1628
C650
5 C648 0.1U_0402_10V7K~D 26
26
27
GND
6
Q43A 2 28
4
DMN66D0LDW-7_SOT363-6~D GND
2
TYCO_2-2041070-6~D
<39> MCARD_MISC_PWREN 2
1
R733
A 100K_0402_5%~D A
2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCIE-SATA SW / PCIE PWR
LA-7741
5 4 3 2 1
5 4 3 2 1
+5V_USB_PWR
L97 D79
USB3RN2 4 3 USB3RN2_D- USB3RN2_D- 1 10 USB3RN2_D- JUSB2
<17> USB3RN2 4 3
1 VBUS
0.1U_0402_25V6K~D
USB3RP2_D+ 2 9 USB3RP2_D+ USBP1_D- 2 D-
150U_B2_6.3V-M~D
USB3RP2 1 2 USB3RP2_D+ USBP1_D+ 3
<17> USB3RP2 1 2 USB3TN2_D- USB3TN2_D- D+
4 7 1 1 4 GND
2
DLW21SN900HQ2L_0805_4P~D USB3RN2_D- 5
+5V_USB_PWR StdA-SSRX-
C655
D73
1 2 USB3TP2_D+ 5 6 USB3TP2_D+ + USB3RP2_D+ 6 10
StdA-SSRX+ GND
C652
+5V_ALW @R1608
@ R1608 0_0402_5%~D 7 11
2 USB3TN2_D- GND-DRAIN GND
3 8
StdA-SSTX- GND
12
D U49 2 USB3TP2_D+ D
1 2 9
StdA-SSTX+ GND
13
1 10 @R1609
@ R1609 0_0402_5%~D 8
GND FAULT1# USB_OC0# <17>
2 9 SANTA_373130-1
IN OUT1
10U_0805_10V6K~D
0.1U_0402_25V6K~D
3 8 IP4292CZ10-TB_XSON10U10~D
IN OUT2 new conn
<39> USB_SIDE_EN# 4 7
1
EN1# ILIM
1
1 1 5 6
EN2# FAULT#2 R750
11
T-PAD
C678
C677
24.9K_0402_1%~D
TPS2560DRCR-PG1.1_SON10_3X3~D
2 2 L52
2
4 3 USBP1_D+
<17> USBP1+ 4 3
L98
2 1 USB3TN2_C 4 3 USB3TN2_D-
<17> USB3TN2 4 3
C410 0.01U_0402_16V7K~D 1 2 USBP1_D-
<17> USBP1- 1 2
2 1 USB3TP2_C 1 2 USB3TP2_D+ DLW21SN900SQ2L_0805_4P~D
<17> USB3TP2 1 2
C411 0.01U_0402_16V7K~D 1 2
DLW21SN900HQ2L_0805_4P~D @ R737 0_0402_5%~D
1 2
@ R1612 0_0402_5%~D 1 2
@ R739 0_0402_5%~D
1 2
@ R1607 0_0402_5%~D
+SATA_SIDE_PWR
+5V_ALW
U48 +5V_USB_CHG_PWR
1 GND FAULT1# 10 USB_OC4# <17>
2 IN OUT1 9
10U_0805_10V6K~D
0.1U_0402_25V6K~D
+5V_ALW 3 8
<39> ESATA_USB_PWR_EN# IN OUT2
4 EN1# ILIM 7
C PWRSHARE_EN# C
<39> USB_PWR_SHR_VBUS_EN 1 2 1 1 5 EN2# FAULT#2 6 USB_OC0# <17>
1
R784 0_0402_5%~D 11
T-PAD
C676
C675
U2 R816 R748
R1626 2 10_0402_5%~D SB# 8 1 PWRSHARE_EN 100K_0402_5%~D TPS2560DRCR-PG1.1_SON10_3X3~D 24.9K_0402_1%~D
<39> USB_PWR_SHR_EN# SB INT USBP0_D- 2 2
<17> USBP0- 7 Y- D- 2
6 3 USBP0_D+
<17> USBP0+
2
Y+ D+ SEL
5 VDD SEL 4
+5V_ALW 9 +5V_ALW PWRSHARE_EN#
GND
1
D
0.1U_0402_25V6K~D
PI5USB1457AZAEX_TDFN8_2X2~D
2
1 2 Q48
R1614 G SSM3K7002FU_SC70-3~D
C715
10K_0402_5%~D S
3
2
1
2
@ R1613
10K_0402_5%~D
+5V_USB_CHG_PWR
1
+3.3V_RUN +3.3V_RUN JUSB1

1
VBUS
150U_B2_6.3V-M~D
0.1U_0402_25V6K~D
USBP0_R_D- 2
USBP0_R_D+ D-
1 3
D+
1 4
GND
2
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
+ USB3RN1_D- 5
StdA-SSRX-
C651
C654
D72
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
1 1 USB3RP1_D+ 6 10
StdA-SSRX+ GND
7 11
GND-DRAIN GND
1
2 2 USB3TN1_D- 8 12
StdA-SSTX- GND
C669
C670
R752
R753
R754
R771
B USB3TP1_D+ B
9 13
2 2 L95 StdA-SSTX+ GND
USB3RN1_RP 4 3 USB3RN1_D- SANTA_373280-1
@ @ @ @ 4 3
U90
2
new conn
1
1 18 +A_DE1 USB3RP1_RP 1 2 USB3RP1_D+
VDD A_DE1 +B_DE1 1 2
13 6
VDD B_DE1 +A_EQ0 DLW21SN900HQ2L_0805_4P~D
5 17
USB3TP1_C PD# A_EQ0 +B_EQ0 D78
<17> USB3TP1 2 1 2 1 2
C414 0.01U_0402_16V7K~D B_EQ0 USB3TP1_RP @ R1605 0_0402_5%~D USB3RN1_D- USB3RN1_D-
19 12 1 10
USB3TN1_C A_INp A_OUTp USB3TN1_RP
<17> USB3TN1 2 1 20
A_INn A_OUTn
11
C415 0.01U_0402_16V7K~D 9 USB3RP1_RP 1 2 USB3RP1_D+ 2 9 USB3RP1_D+
USB3RP1_C B_INp USB3RN1_RP @ R1604 0_0402_5%~D
<17> USB3RP1 2 1 22
B_OUTp B_INn
8
C416 0.01U_0402_16V7K~D 23 7 USB3TN1_D- 4 7 USB3TN1_D-
USB3RN1_C B_OUTn REXT
<17> USB3RN1 2 1 TEST
14
C417 0.01U_0402_16V7K~D 3 24 USB3TP1_D+ 5 6 USB3TP1_D+
I2C_R0 12C_EN L96
4 21
I2C_R1 GND USB3TN1_RP
16 10 2 1 USB3TN1_RP_C 4 3 USB3TN1_D- 3
SCL_CTL GND C412 0.01U_0402_16V7K~D 4 3
15 25
SDA_CTL EPAD
1
8
PS8710BTQFN24GTR-A0_TQFN24_4X4 R751 USB3TP1_RP 2 1 USB3TP1_RP_C 1 2 USB3TP1_D+
3.3K_0402_1%~D C413 0.01U_0402_16V7K~D 1 2 IP4292CZ10-TB_XSON10U10~D
1 2 L51
2
+3.3V_RUN 1 2 +B_DE0 @ R1606 0_0402_5%~D USBP0_D+ 4 3 USBP0_R_D+

@ R783 4.7K_0402_5%~D 4 3
1 2 +B_EQ1 1 2
@ R781 4.7K_0402_5%~D @ R1603 0_0402_5%~D USBP0_D- 1 2 USBP0_R_D-
+A_DE0 1 2
1 2
@ R779 4.7K_0402_5%~D DLW21SN900SQ2L_0805_4P~D
1 2 +A_EQ1 1 2
@ R773 4.7K_0402_5%~D @ R736 0_0402_5%~D
A A
1 2
@ R740 0_0402_5%~D
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, USB 3.0 x2
LA-7741
5 4 3 2 1
5 4 3 2 1
ESATA Repeater +3.3V_RUN
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
1 1
1
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
@ R742
0_0402_5%~D
R1595
R1594
R743
C661
C662
2 2
2
D +3.3V_RUN D
1 2
R741 0_0402_5%~D U44
7 6
EN VCC
17 16
NC_GND_VDD VCC REXT
19 20
NC_GND_VDD
PREXT/NC/VDD
18 10
ESATA_PTX_DRX_P4_C ESATA_PTX_DRX_P4 NC_GND_VDDNC/GND/VDD
<14> ESATA_PTX_DRX_P4_C 2 1
C663 0.01U_0402_16V7K~D 1 9 ESATA_PE1
ESATA_PTX_DRX_N4_C A_INp A_PRE
<14> ESATA_PTX_DRX_N4_C 2 1 ESATA_PTX_DRX_N4 2
A_INn B_PRE
8 ESATA_PE2
C664 0.01U_0402_16V7K~D
ESATA_PRX_DTX_N4_C 2 1 ESATA_PRX_DTX_N4 4 15 ESATA_PTX_DRX_P4_RP
<14> ESATA_PRX_DTX_N4_C C665 0.01U_0402_16V7K~D B_OUTn A_OUTp ESATA_PTX_DRX_N4_RP
5 B_OUTp A_OUTn 14
ESATA_PRX_DTX_P4_C 2 1 ESATA_PRX_DTX_P4
<14> ESATA_PRX_DTX_P4_C C666 0.01U_0402_16V7K~D ESATA_PRX_DTX_P4_RP
3 GND B_INp 11
13 12 ESATA_PRX_DTX_N4_RP
GND B_INn
21 GND
PS8513BTQFN20GTR-A0_TQFN20_4X4
C C
+SATA_SIDE_PWR
150U_B2_6.3V-M~D
0.1U_0402_25V6K~D
1
1
C667
C668
+
2 2
JESA1 CONN@
1
USBP9_D- VBUS
2
USBP9_D+ D- USB
3
D+
4
GND
B B
ESATA_PTX_DRX_P4_RP 1 2 SATA_PTX_DRX_P4 5
C671 0.01U_0402_16V7K~D GND
6
ESATA_PTX_DRX_N4_RP A+
L90 1 2 SATA_PTX_DRX_N4 7
A-
ESATA
1 2 USBP9_D+ C672 0.01U_0402_16V7K~D 8
<17> USBP9+ 1 2 ESATA_PRX_DTX_N4_RP GND
1 2 SATA_PRX_DTX_N4 9
C673 0.01U_0402_16V7K~D B-
10
USBP9_D- ESATA_PRX_DTX_P4_RP B+
<17> USBP9- 4 3 1 2 SATA_PRX_DTX_P4 11
4 3 C674 0.01U_0402_16V7K~D GND
DLW21SN900SQ2L_0805_4P~D
1 2 12
GND
3
@ R1150 0_0402_5%~D 13
GND
14
GND
1 2 15
@ R1151 0_0402_5%~D GND
D74
TYCO_2129160-2~D
1
Place D74 close to JESATA1
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, USB/ESATA/IO/MDC
LA-7741
5 4 3 2 1
5 4 3 2 1
JDOCK1 CONN@
DOCK_DET_1 1 2 DOCK_AC_OFF
1 2 DOCK_AC_OFF <39,55>
3 3 4 4
<31> DOCK_LOM_SPD10LED_GRN# DPD_CA_DET DPC_CA_DET DOCK_LOM_SPD100LED_ORG# <31>
5 6
<26> DPD_CA_DET 5 6 DPC_CA_DET <26>
7 8
C690 DPD_DOCK_LANE_P0 7 8 DPC_DOCK_LANE_P0
<16> DPD_PCH_LANE_P0 2 1 0.1U_0402_10V7K~D 9
9 10
10 C691 2 1 0.1U_0402_10V7K~D
D C679 DPD_DOCK_LANE_N0 DPC_DOCK_LANE_N0 DPC_PCH_LANE_P0 <16> D
<16> DPD_PCH_LANE_N0 2 1 0.1U_0402_10V7K~D 11
11 12
12 C680 2 1 0.1U_0402_10V7K~D DPC_PCH_LANE_N0 <16>
13 14
15 16
16 C682 2 1 0.1U_0402_10V7K~D
C683 DPD_DOCK_LANE_N1 DPC_DOCK_LANE_N1 DPC_PCH_LANE_P1 <16>
<16> DPD_PCH_LANE_N1 2 1 0.1U_0402_10V7K~D 17 18 C684 2 1 0.1U_0402_10V7K~D
17 18 DPC_PCH_LANE_N1 <16>
19 20
21 22
22 C693 2 1 0.1U_0402_10V7K~D DPC_PCH_LANE_P2 <16>
C685 2 1 0.1U_0402_10V7K~D DPD_DOCK_LANE_N2 23 24 DPC_DOCK_LANE_N2 C686 2 1 0.1U_0402_10V7K~D
<16> DPD_PCH_LANE_N2 23 24 DPC_PCH_LANE_N2 <16>
25 26
27 28
28 C688 2 1 0.1U_0402_10V7K~D
C689 DPD_DOCK_LANE_N3 DPC_DOCK_LANE_N3 DPC_PCH_LANE_P3 <16>
<16> DPD_PCH_LANE_N3 2 1 0.1U_0402_10V7K~D 29 30 C694 2 1 0.1U_0402_10V7K~D
29 30 DPC_PCH_LANE_N3 <16>
31 32
DPD_DOCK_AUX 31 32 DPC_DOCK_AUX
<26> DPD_DOCK_AUX 33 33 34 34 DPC_DOCK_AUX <26>
DPD_DOCK_AUX# 35 36 DPC_DOCK_AUX#
<26> DPD_DOCK_AUX# 35 36 DPC_DOCK_AUX# <26>
37 37 38 38
DPD_PCH_DOCK_HPD 39 40 DPC_PCH_DOCK_HPD
<16> DPD_PCH_DOCK_HPD 39 40 DPC_PCH_DOCK_HPD <16>
+NBDOCK_DC_IN_SS 41 41 42 42 ACAV_DOCK_SRC# <55>
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
1 43 43 44 44 1
BLUE_DOCK 45 46
<24> BLUE_DOCK 45 46 DAT_DDC2_DOCK <24>
C695
C696
47 47 48 48 CLK_DDC2_DOCK <24>
2
49 49 50 50
2
Close to DOCK
51 51 52 52 Its for Enhance ESD on dock issue.
RED_DOCK 53 54 SATA_PRX_DKTX_P5 2 1
<24> RED_DOCK 53 54 SATA_PRX_DKTX_N5 SATA_PRX_DKTX_P5_C <14>
Close to DOCK 55 55 56 56 C697 2 1 0.01U_0402_16V7K~D SATA_PRX_DKTX_N5_C <14>
57 58 C698 0.01U_0402_16V7K~D
Its for Enhance ESD on dock issue. GREEN_DOCK 59
57 58
60 SATA_PTX_DKRX_P5 1 2
<24> GREEN_DOCK 59 60 SATA_PTX_DKRX_N5 SATA_PTX_DKRX_P5_C <14>
61 62 C699 1 2 0.01U_0402_16V7K~D
61 62 C700 0.01U_0402_16V7K~D SATA_PTX_DKRX_N5_C <14>
63 63 64 64
<24> HSYNC_DOCK 65 65 66 66 USBP8+ <17>
<24> VSYNC_DOCK 67 67 68 68 USBP8- <17>
69 70 DPC_PCH_DOCK_HPD
DPD_PCH_DOCK_HPD 69 70
<40> CLK_MSE 71 71 72 72 USBP3+ <17>
<40> DAT_MSE 73 73 74 74 USBP3- <17>
C C
75 75 76 76
1
<29> DAI_BCLK# 77 77 78 78 CLK_KBD <40>
1
<29> DAI_LRCK# 79 79 80 80 DAT_KBD <40>

81 82 R758
R757 81 82 100K_0402_5%~D
<29> DAI_DI 83 83 84 84 USB3RN4 <17>
100K_0402_5%~D 85 86
<29> DAI_DO# USB3RP4 <17>
2
85 86
87 88
2
87 88
<29> DAI_12MHZ# 89 90 USB3TN4 <17>
89 90
91 92 USB3TP4 <17>
91 92
93 94
93 94
95 96
95 96
<39> D_LAD0 97 98
97 98 BREATH_LED# <39,43>
<39> D_LAD1 99 100
99 100 DOCK_LOM_ACTLED_YEL# <31>
101 102
101 102
<39> D_LAD2 103 104
103 104 DOCK_LOM_TRD0+ <31>
<39> D_LAD3 105 106
105 106 DOCK_LOM_TRD0- <31>
107 108
107 108 +3.3V_ALW
<39> D_LFRAME# 109 110
109 110 DOCK_LOM_TRD1+ <31> +LOM_VCT
<39> D_CLKRUN# 111 112
111 112 DOCK_LOM_TRD1- <31>
113 114
113 114 DOCK_DET#
<39> D_SERIRQ 115 116 1 1 2
115 116 @ R755 100K_0402_5%~D
<39> D_DLDRQ1# 117 118 +LOM_VCT
117 118 C701
119 120
119 120 1U_0402_6.3V6K~D
<17> CLK_PCI_DOCK 121 122 DOCK_LOM_TRD2+ <31>
121 122 2
123 124 DOCK_LOM_TRD2- <31>
123 124
125 126
125 126
<40> DOCK_SMB_CLK 127 128 DOCK_LOM_TRD3+ <31>
127 128
<40> DOCK_SMB_DAT 129 130 DOCK_LOM_TRD3- <31>
129 130
131 132
131 132
<39,55> DOCK_SMB_ALERT# 133 134 DOCK_DCIN_IS+ <53>
133 134
<45> DOCK_PSID 135 136 DOCK_DCIN_IS- <53>
135 136
137 138
B 137 138 D32 B
<40> DOCK_PWR_BTN# 139 140 DOCK_POR_RST# <40>
139 140 RB751S40T1_SOD523-2~D
141 142
SLICE_BAT_PRES# 141 142 DOCK_DET_R#
<39,55> SLICE_BAT_PRES# 143 144 1 2 DOCK_DET# <39>
143 144
145 149 +DOCK_PWR_BAR
GND1 PWR2
+DOCK_PWR_BAR 146 150
PWR1 PWR2
0.1U_0603_50V7K~D
147 151
PWR1 PWR2
3
2
0.1U_0603_50V7K~D
148 152
PWR1 GND2
SM24.TCT_SOT23-3~D
4.7U_0805_25V6K~D
D33
C703
1 @ 1 153 159
Shield_G Shield_G
C702
@ 154 160
Shield_G Shield_G
CE6
155 161
Shield_G Shield_G 2
156 162
1
2 2 Shield_G Shield_G
157 163
Shield_G Shield_G
158 164
Shield_G Shield_G
DAI_12MHZ# DAI_BCLK# CLK_PCI_DOCK
1
JAE_WD2F144WB3R300~D @ RE11 @ RE12 R756
10_0402_1%~D 10_0402_1%~D 33_0402_5%~D
2
1 1 1
@CE8
@CE8 @CE9
@CE9 C704
4.7P_0402_50V8C~D 4.7P_0402_50V8C~D 12P_0402_50V8J~D
2 2 2
A A

Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT DOCKING CONN
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW
1 2 DYN_TURB_PWR_ALRT#
R796 10K_0402_5%~D
1 2 HW_GPS_DISABLE2#
R798 100K_0402_5%~D +3.3V_ALW
1 2 PROCHOT_GATE
R761 100K_0402_5%~D
1 1 1 1 1 1
1 2 CPU_DETECT# C705 C706 C707 C708 C709 C710

R763 100K_0402_5%~D 10U_0603_6.3V6M~D 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D 0.1U_0402_10V7K~D 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D
2 2 2 2 2 2
D SLICE_BAT_PRES# D
1 2
R760 100K_0402_5%~D
A17
B30
A43
A54
B5
1 2 WWAN_RADIO_DIS# U46 +3.3V_ALW
R774 100K_0402_5%~D @ C711 0.1U_0402_25V6K~D
VCC1
VCC1
VCC1
VCC1
VCC1
ACAV_IN_NB <40,53,55> 1 2
1 2 USB_PWR_SHR_EN# CRT_SWITCH B52 B63 SIO_SLP_A#
<24> CRT_SWITCH GPIOA0 GPIOI1 SIO_SLP_A# <16,42,49>
5
R776 100K_0402_5%~D A49 A60 0.75V_DDR_VTT_ON
MCARD_MISC_PWREN GPIOA1 GPIOI2/TACH0 0.75V_DDR_VTT_ON <47>
B53 A61 1
P
<35> MCARD_MISC_PWREN GPIOA2 GPIOI3 SIO_SLP_S4# <16> B
1 2 USB_SIDE_EN# PROCHOT_GATE A50 B65
O 4D34 2@
<53> PROCHOT_GATE SIO_SLP_S3# <11,16,27,35,42,48> 1
R768 10K_0402_5%~D LID_CL_SIO# GPIOA3 GPIOI4 DOCK_AC_OFF <38,55>
B54 A62 IMVP_PWRGD <51> 2
GPIOA4 GPIOI5 A
G
A51 B66 1 2 RB751S40T1_SOD523-2~D
<38,55> DOCK_SMB_ALERT# GPIOA5 GPIOI6 IMVP_VR_ON <51>
1
1 2 ESATA_USB_PWR_EN# B55 A63 R765 0_0402_5%~D U47 @
3
R769 100K_0402_5%~D GPIOA6 GPIOI7 DOCK_AC_OFF_EC TC7SH08FU_SSOP5~D R770 @
A52 GPIOA7
B67 33K_0402_5%~D
USB_PWR_SHR_VBUS_EN USB_SIDE_EN# GPIOJ0 AUX_EN_WOWL <35> DOCK_AC_OFF_EC <55>
1 2 <36> USB_SIDE_EN# A33 A64 WLAN_LAN_DISB# <31>
R778 100K_0402_5%~D EN_I2S_NB_CODEC# GPIOB0 GPIOJ1/TACH1 SIO_SLP_LAN#
<29> EN_I2S_NB_CODEC# B36 A5 SIO_SLP_LAN# <16,31>
2
USH_PWR_STATE# GPIOB1 GPIOJ2/TACH2 SIO_SLP_SUS#
<32> USH_PWR_STATE# A34 GPOC2 GPIOJ3 B6 SIO_SLP_SUS# <16>
1 2 DOCK_SMB_ALERT# <55> EN_DOCK_PWR_BAR EN_DOCK_PWR_BAR B37 A6
R785 10K_0402_5%~D PANEL_BKEN_EC GPOC3 GPIOJ4 MODC_EN GPIO_PSID_SELECT <45>
<23> PANEL_BKEN_EC A35 GPOC4 GPIOJ5 B7 MODC_EN <28>
ENVDD_PCH B38 A7 DOCK_HP_DET
<16,23> ENVDD_PCH LCD_TST GPOC5 GPIOJ6 DOCK_MIC_DET DOCK_HP_DET <29>
<23> LCD_TST A36 GPOC6/TACH4 GPIOJ7 B8 DOCK_MIC_DET <29>
PSID_DISABLE# A37
<45> PSID_DISABLE# PBAT_PRES# GPIOC7 ME_FWP
<45,55> PBAT_PRES# B40 GPIOD0 GPIOK0 A8 ME_FWP <14>
DOCKED A38 B9 MASK_SATA_LED#
<31> DOCKED DOCK_DET# GPIOC1 GPIOK1/TACH3 MASK_SATA_LED# <43>
<38> DOCK_DET# B41 GPIOC0 GPIOK2 B10 1.8V_RUN_PWRGD <48>
AUD_NB_MUTE# A39 A10 LED_SATA_DIAG_OUT#
<29> AUD_NB_MUTE# MCARD_WWAN_PWREN GPIOB7 GPIOK3 TEMP_ALERT#_R LED_SATA_DIAG_OUT# <43>
+3.3V_RUN B42 GPIOB6 GPIOK4 B11 1 2TEMP_ALERT# TEMP_ALERT# <18>
<35> MCARD_WWAN_PWREN LCD_VCC_TEST_EN RUN_ON R738 0_0402_5%~D +3.3V_RUN
<23> LCD_VCC_TEST_EN A40 GPIOB5 GPIOK5 A11 RUN_ON <27,35,42,48>
CCD_OFF B43 B12
MCARD_PCIE_SATA# <23> CCD_OFF AUD_HP_NB_SENSE GPIOB4 GPIOK6
1 2 <29,30> AUD_HP_NB_SENSE A41 GPIOB3 GPIOK7 A12 SPI_WP#_SEL <14>
R457 100K_0402_5%~D ESATA_USB_PWR_EN# B44 D_CLKRUN# 2 1
C WIRELESS_ON#/OFF <36> ESATA_USB_PWR_EN# GPIOB2 SUS_ON C
1 2 B60 R777 100K_0402_5%~D
GPIOL0/PWM7 SUS_ON <42> D_SERIRQ
R766 100K_0402_5%~D A57 2 1
SP_TPM_LPC_EN MODULE_ON GPIOL1/PWM8 BAT1_LED# R780 100K_0402_5%~D
1 2 <55> MODULE_ON B32 GPIOD1 GPIOL2/PWM0 B64 BAT1_LED# <43> trace width 20 mils
@ R772 10K_0402_5%~D <55> SLICE_BAT_ON SLICE_BAT_ON A31 B68 D_DLDRQ1# 2 1
LCD_TST SLICE_BAT_PRES# GPIOD2 GPIOL3/PWM1 BAT2_LED# R782 100K_0402_5%~D
1 2 <38,55> SLICE_BAT_PRES# B33 GPIOD3 GPIOL4/PWM3 A9 BAT2_LED# <43> trace width 20 mils
R767 100K_0402_5%~D MODULE_BATT_PRES# B15 B1
<45,55> MODULE_BATT_PRES# CHARGE_MODULE_BATT GPIOD4 GPIOL5/PWM2 USH_PWR_ON
A15 GPIOD5 GPIOL6 A18 PAD~D T117 @
<55> CHARGE_MODULE_BATT CHARGE_PBATT B16 A44
SYS_LED_MASK# <55> CHARGE_PBATT DEFAULT_OVRDE GPIOD6 GPIOL7/PWM5 RUN_ON
1 2 <55> DEFAULT_OVRDE
A16
GPIOD7 2 1
R775 10K_0402_5%~D B34 HW_GPS_DISABLE2# R786 100K_0402_5%~D
GPIOM1 BREATH_LED# HW_GPS_DISABLE2# <34>
B39 BREATH_LED# <38,43>
GPIOM3/PWM4 CPU_VTT_ON
A1 B51 2 1
USB_PWR_SHR_EN# GPIOE0/RXD GPIOM4/PWM6 R789 100K_0402_5%~D
B2
<36> USB_PWR_SHR_EN# GPIOE1/TXD
A2
CHARGE_EN MCARD_PCIE_SATA# GPIOE2/RTS# LPC_LAD0 0.75V_DDR_VTT_ON 2
1 2 B3
GPIOE3/DSR# LAD0
A27 LPC_LAD0 <14,32,34,40> 1
R3 100K_0402_5%~D CPU_DETECT# A3 A26 LPC_LAD1 R790 100K_0402_5%~D
<7> CPU_DETECT# GPIOE4/CTS# LAD1 LPC_LAD1 <14,32,34,40>
B45 B26 LPC_LAD2 SLICE_BAT_ON 2 1
GPIOE5/DTR# LAD2 LPC_LAD2 <14,32,34,40>
MOD_SATA_PCIE#_DET A42 B25 LPC_LAD3 R791 100K_0402_5%~D
<28> MOD_SATA_PCIE#_DET GPIOE6/RI# LAD3 LPC_LAD3 <14,32,34,40>
B4 A21 LPC_LFRAME# SUS_ON 2 1
GPIOE7/DCD# LFRAME# PCH_PLTRST#_EC LPC_LFRAME# <14,32,34,40>
B22 R878 100K_0402_5%~D
LRESET# CLK_PCI_5048 PCH_PLTRST#_EC <17,32,34,35,40>
A28 CLK_PCI_5048 <17>
ZODD_WAKE# PCICLK CLKRUN#
<28> ZODD_WAKE# A59 B20 CLKRUN# <16,32,40>
BCM5882_ALERT# GPIOF0 CLKRUN# LPC_LDRQ0#
<32> BCM5882_ALERT# B62 A23 LPC_LDRQ0# <14>
GPIOF1 LDRQ0# LPC_LDRQ1#
<16> SUSACK# A58 A22 LPC_LDRQ1# <14>
GPIOF2 LDRQ1# IRQ_SERIRQ
B61 B21 IRQ_SERIRQ <14,32,40>
GPIOF3/TACH8 SER_IRQ CLK_SIO_14M
A56 A32 CLK_SIO_14M <15>
VGA_ID GPIOF4/TACH7 14.318MHZ/GPIOM0
B59 B35 EC_32KHZ_ECE5048 <40>
GPIOF5 CLK32/GPIOM2
A55
SLP_ME_CSW_DEV# GPIOF6
<18> SLP_ME_CSW_DEV# B58
GPIOF7 D_LAD0
B29
DLAD0 D_LAD1 D_LAD0 <38>
B28
LAN_DISABLE#_R DLAD1 D_LAD2 D_LAD1 <38>
<31> LAN_DISABLE#_R B47 A25
B CHARGE_EN GPIOG0/TACH5 DLAD2 D_LAD3 D_LAD2 <38> B
A45 A24
SYS_LED_MASK# GPIOG1 DLAD3 D_LFRAME# D_LAD3 <38>
<43> SYS_LED_MASK# B48 B23 D_LFRAME# <38>
DYN_TURB_PWR_ALRT# GPIOG2 DLFRAME# D_CLKRUN#
A46 A19 D_CLKRUN# <38>
R797 1 GPIOG3 DCLKRUN# D_DLDRQ1#
<18> SIO_EXT_WAKE# 2 0_0402_5%~D B49
GPIOG4 DLDRQ1#
B24 D_DLDRQ1# <38>
WIRELESS_LED# A47 A20 D_SERIRQ
+3.3V_ALW <34,43> WIRELESS_LED# USB_PWR_SHR_VBUS_EN GPIOG5 DSER_IRQ D_SERIRQ <38>
B50
<36> USB_PWR_SHR_VBUS_EN WLAN_RADIO_DIS# GPIOG6
<34> WLAN_RADIO_DIS# A48
GPIOG7/TACH6 BC_INT#_ECE5048
A29 BC_INT#_ECE5048 <40>
BC_INT# BC_DAT_ECE5048
B31 BC_DAT_ECE5048 <40>
WIRELESS_ON#/OFF BC_DAT BC_CLK_ECE5048
<30> WIRELESS_ON#/OFF B13 A30 BC_CLK_ECE5048 <40>
VGA_ID BT_RADIO_DIS# GPIOH0 BC_CLK
1 2 <41> BT_RADIO_DIS# A13
GPIOH1
R800 100K_0402_5%~D WWAN_RADIO_DIS# A53
<34> WWAN_RADIO_DIS# SYS_PWROK SYSOPT1/GPIOH2 RUNPWROK
<7,16> SYS_PWROK B57 A4
SYSOPT0/GPIOH3 PWRGD RUNPWROK <7,40>
B14
GPIOH4 SP_TPM_LPC_EN
A14 B56 SP_TPM_LPC_EN <32>
CPU_VTT_ON GPIOH5 OUT65 +3.3V_ALW
<50> CPU_VTT_ON B17
GPIOH6
<16> PCH_DPWROK 1 2 B18
VGA_ID @R802
@ R802 0_0402_5%~D GPIOH7
1 2 B19 1 2
@R803
@ R803 100K_0402_5%~D TEST_PIN R804 1K_0402_1%~D +CAP_LDO trace width 20 mils
1
B46 +CAP_LDO
CAP_LDO CLK_SIO_14M CLK_PCI_5048 R805
1
B27 100K_0402_5%~D
VSS C714
C1
EP
1
4.7U_0603_6.3V6K~D
2
DB Version 0.4 2 @R794
@ R794 @ R795
VGA_ID0 ECE5048-LZY_DQFN132_11X11~D 10_0402_1%~D 10_0402_1%~D LID_CL_SIO# 2 1 LID_CL# <30,43>
R807 10_0402_1%~D
Discrete 0 1
2
UMA 1 1 1 C716
0.047U_0402_16V4Z~D
@ C712 @ C713 2
A 4.7P_0402_50V8C~D 4.7P_0402_50V8C~D A
2 2
ME_FWP PCH has internal 20K PD.
(suspend power rail)
ME_FWP DELL CONFIDENTIAL/PROPRIETARY
1
@ R793 Compal Electronics, Inc.

1K_0402_1%~D PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, ECE5048
2
LA-7741
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW +RTC_CELL
C720
0.1U_0402_25V6K~D
1
1 2 @ C721
R810 1U_0402_6.3V6K~D
100K_0402_5%~D 1 2
5
U50
1.05V_VTTPWRGD 1
P
<50,54> 1.05V_VTTPWRGD
2
B 1.05V_0.8V_PWROK
4 1.05V_0.8V_PWROK <14,51>
VCCSAPWROK O POWER_SW_IN#
<54> VCCSAPWROK 2 <22> POWER_SW_IN# 1 2 POWER_SW#_MB <30,41>
G
A R811 10K_0402_5%~D
1
Modify name net TC7SH08FU_SSOP5~D
3
C722
1U_0402_6.3V6K~D
2
+3.3V_ALW
1 2 PCIE_WAKE# +RTC_CELL R815 +3.3V_ALW

R759 10K_0402_5%~D 0_0402_5%~D +RTC_CELL
D 1 2 BC_DAT_ECE5048 1 2 +RTC_CELL_VBAT D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
R814 100K_0402_5%~D
1
2 1 BC_DAT_ECE1117 1 1 1 1 1 1 1 1 1 1 @ C733
R817 100K_0402_5%~D R819 1U_0402_6.3V6K~D
C723
C725
C727
C729
C731
C726
C728
C739
C732
C730
2 1 BC_DAT_EMC4022 100K_0402_5%~D 1 2
R821 100K_0402_5%~D
1 2 PBAT_SMBDAT 2 2 2 2 2 2 2 2 2 2
2
R818 2.2K_0402_5%~D
B64
A11
A22
B35
A41
A58
A52
A26
PBAT_SMBCLK DOCK_PWR_SW#
B3
1 2 <22> DOCK_PWR_SW# 1 2 DOCK_PWR_BTN# <38>
R820 2.2K_0402_5%~D U51 1 R825 10K_0402_5%~D
2 1 LPC_LDRQ#_MEC
VBAT
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
@ R823 100K_0402_5%~D C734
1U_0402_6.3V6K~D
1 2 CHARGER_SMBDAT 2
R827 2.2K_0402_5%~D PS/2 INTERFACE MISC INTERFACE
1 2 CHARGER_SMBCLK SML1_SMBDATA A5 A10 SYSTEM_ID
<15> SML1_SMBDATA GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA GPIO021/RC_ID1
R828 2.2K_0402_5%~D SML1_SMBCLK B6 B10 BOARD_ID
<15> SML1_SMBCLK GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK GPIO020/RC_ID2
CLK_TP_SIO A37 B14 DDR_ON
<41> CLK_TP_SIO GPIO110/PS2_CLK2/GPTP-IN6 GPIO025/UART_CLK DDR_ON <47>
DAT_TP_SIO B40 B44 HOST_DEBUG_TX +RTC_CELL
<41> DAT_TP_SIO GPIO111/PS2_DAT2/GPTP-OUT6 GPIO120/UART_TX HOST_DEBUG_TX <34>
1 2 GPU_SMBDAT CLK_KBD A38 B46 HOST_DEBUG_RX
<38> CLK_KBD GPIO112/PS2_CLK1A GPIO124/GPTP-OUT5/UART_RX HOST_DEBUG_RX <34>
R829 2.2K_0402_5%~D DAT_KBD B41 B26 RUNPWROK
<38> DAT_KBD RUNPWROK <7,39>
1
GPU_SMBCLK CLK_MSE GPIO113/PS2_DAT1A VCC_PRWGD EN_INVPWR
1 2 <38> CLK_MSE A39 A25
R822 2.2K_0402_5%~D DAT_MSE GPIO114/PS2_CLK0A GPIO060/KBRST EN_INVPWR <23> R870
<38> DAT_MSE B42 B36 PCH_SATA_MOD_EN# <14>
PBAT_SMBDAT GPIO115/PS2_DAT0A GPIO101/ECGP_SCLK 100K_0402_5%~D
<45> PBAT_SMBDAT B59 B37
EC firmware can configure those un-used SMBUS pins as GPO (Output), PBAT_SMBCLK GPIO154/I2C1C_DATA/PS2_CLK1B GPIO103/ECGP_MISO
<45> PBAT_SMBCLK A56 B38
then it's OK to leave these un-used pins No-Connect. GPIO155/I2C1C_CLK/PS2_DAT1B GPIO105/ECGP_MOSI DDR_HVREF_RST_GATE
A34
2
GPIO102/HSPI_SCLK DYN_TUR_CURRNT_SET# DDR_HVREF_RST_GATE <7>
A35 DYN_TUR_CURRNT_SET# <53>
GPIO104/HSPI_MISO CPU1.5V_S3_GATE LAT_ON_SW#
A36 CPU1.5V_S3_GATE <11>
GPIO106/HSPI_MOSI MSDATA
JTAG INTERFACE GPIO116/MSDATA
A40 MSDATA <34>
JTAG_TDI A51 B43 MSCLK
GPIO145/I2C1K_DATA/JTAG_TDI GPIO117/MSCLK MSCLK <34>
JTAG_TDO B55 A45 SIO_A20GATE
GPIO146/I2C1K_CLK/JTAG_TDO GPIO127/A20M SIO_A20GATE <18>
JTAG_CLK B56 A55 PS_ID
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO153/LED3 PS_ID <45>
JTAG_TMS A53 A57
JTAG_RST# GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO156/LED1
B57 B61
JTAG_RST# GPIO157/LED2 FWP#
B65
nFWP PROCHOT#_EC
A46
PROCHOT#/PWM4
+3.3V_ALW C736 2 1 0.1U_0402_25V6K~D FAN PWM & TACH +1.05V_RUN_VTT
DOCK_POR_RST# H_PROCHOT# <7,51,53>
<38> DOCK_POR_RST# B22
GPIO050/FAN_TACH1
GENERAL PURPOSE I/O
A21 B2 R884 1 2 1K_0402_1%~D
GPIO051/FAN_TACH2 GPIO001/ECSPI_CS1 VOL_MUTE <30>
1
10K_0402_5%~D
B23 A2 1 2
GPIO052/FAN_TACH3 GPIO002/ECSPI_CS2
R824
B24 B8 R886 1 2 1K_0402_1%~D @ R1179 10K_0402_5%~D

C GPIO053/PWM0 GPIO014/GPTP-IN7/HSPI_CS1 VOL_UP <30> C
JTAG_RST# citcuit <42> PCH_ALW_ON
PCH_ALW_ON A23 B18 R887 2 1 1K_0402_1%~D VOL_DOWN <30>
GPIO054/PWM1 GPIO040/GPTP-OUT3/HSPI_CS2
1
BIA_PWM_EC ME_SUS_PWR_ACK D
close to U51.B57 <23> BIA_PWM_EC B25
GPIO055/PWM2 GPIO015/GPTP-OUT7
A8 ME_SUS_PWR_ACK <16>
A24 B9 1.5V_SUS_PWRGD PROCHOT#_EC 2 @ Q47
1.5V_SUS_PWRGD <47>
2
GPIO056/PWM3 GPIO016/GPTP-IN8 PM_APWROK G SSM3K7002FU_SC70-3~D

A9 PM_APWROK <16>
JTAG_RST# GPIO017/GPTP-OUT8 1.05V_A_PWRGD
A14 1.05V_A_PWRGD <49> 1 2 S
3
GPIO026/GPTP-IN1 ALW_PWRGD_3V_5V @ R812 100K_0402_5%~D
BC-LINK GPIO027/GPTP-OUT1
B15 ALW_PWRGD_3V_5V <46>
100_0402_1%~D
0.1U_0402_25V6K~D
<39> BC_CLK_ECE5048
BC_CLK_ECE5048 A43 A17 DEVICE_DET#
DEVICE_DET# <28>
Bat2 = Amber LED
GPIO123/BCM_A_CLK GPIO041
1
@ 1 BC_DAT_ECE5048 B45 B39 RESET_OUT# Bat1 = Blue LED

<39> BC_DAT_ECE5048 GPIO122/BCM_A_DAT GPIO107/nRESET_OUT RESET_OUT# <16>
BC_INT#_ECE5048 A42 A44
1
<39> BC_INT#_ECE5048 GPIO121/BCM_A_INT# GPIO125/GPTP-IN5

R836
C735
@SHORT PADS~D
JTAG1 CONN@
BC_CLK_EMC4022 A12 B47 PCH_RSMRST# 20mA drive pins 1 2

<22> BC_CLK_EMC4022 GPIO022/BCM_B_CLK GPIO126 PCH_RSMRST# <41>
<22> BC_DAT_EMC4022 BC_DAT_EMC4022 B13 A54 AC_PRESENT R1180 0_0402_5%~D
2 GPIO023/BCM_B_DAT GPIO151/GPTP-IN4 AC_PRESENT <16>
BC_INT#_EMC4022 A13 B58 SIO_PWRBTN#
<22> BC_INT#_EMC4022 SIO_PWRBTN# <16>
2
GPIO024/BCM_B_INT# GPIO152/GPTP-OUT4
B20
PCH_PCIE_WAKE# GPIO044/BCM_C_CLK
<16> PCH_PCIE_WAKE# A18
PCIE_WAKE# GPIO043/BCM_C_DAT +3.3V_RUN
<28,34,35> PCIE_WAKE# B19
GPIO042/BCM_C_INT# SMBUS INTERFACE
2
BC_CLK_ECE1117 A20 A3 DOCK_SMB_DAT

<41> BC_CLK_ECE1117 GPIO047/LSBCM_D_CLK GPIO003/I2C1A_DATA DOCK_SMB_DAT <38>
<41> BC_DAT_ECE1117 BC_DAT_ECE1117 B21 B4 DOCK_SMB_CLK
DOCK_SMB_CLK <38>
2
GPIO046/LSBCM_D_DAT GPIO004/I2C1A_CLK
1
BC_INT#_ECE1117 A19 A4 LCD_SMBDAT
<41> BC_INT#_ECE1117 GPIO045/LSBCM_D_INT# GPIO005/I2C1B_DATA
BEEP A16 B5 LCD_SMBCLK R799
<29> BEEP GPIO032/GPTP-IN3/BCM_E_CLK GPIO006/I2C1B_CLK
SIO_SLP_S5# B16 B7 BAY_SMBDAT 10K_0402_5%~D
<16> SIO_SLP_S5# GPIO31/GPTP-OUT2/BCM_E_DAT GPIO012/I2C1H_DATA/I2C2D_DATA BAY_SMBDAT <28,45>
ACAV_IN_NB A15 A7 BAY_SMBCLK
<39,53,55> ACAV_IN_NB GPIO30/GPTP-IN2/BCM_E_INT# GPIO013/I2C1H_CLK/I2C2D_CLK BAY_SMBCLK <28,45>
B48 GPU_SMBDAT
2
GPIO130/I2C2A_DATA GPU_SMBCLK RUNPWROK
B49
GPIO131/I2C2A_CLK CHARGER_SMBDAT
HOST INTERFACE GPIO132/I2C1G_DATA
A47 CHARGER_SMBDAT <53>
SIO_EXT_SMI# A6 B50 CHARGER_SMBCLK
<17> SIO_EXT_SMI# GPIO011/nSMI GPIO140/I2C1G_CLK CHARGER_SMBCLK <53>
1
SIO_RCIN# CARD_SMBDAT D
<18> SIO_RCIN#
A27 B52 CARD_SMBDAT <35>
LPC_LDRQ#_MEC GPIO061/LPCPD# GPIO141/I2C1F_DATA/I2C2B_DATA CARD_SMBCLK
B29 A49 CARD_SMBCLK <35> <42> RUN_ON_ENABLE# 2
LDRQ# GPIO142/I2C1F_CLK/I2C2B_CLK
Q45
IRQ_SERIRQ A28 B53 USH_SMBDAT G
32 KHz Clock <14,32,39> IRQ_SERIRQ
<17,32,34,35,39> PCH_PLTRST#_EC
PCH_PLTRST#_EC B30
SER_IRQ GPIO143/I2C1E_DATA
A50 USH_SMBCLK
USH_SMBDAT <32>
USH_SMBCLK <32> S
3
CLK_PCI_MEC LRESET# GPIO144/I2C1E_CLK +3.3V_ALW_PCH
<17> CLK_PCI_MEC A29
LPC_LFRAME# PCI_CLK
<14,32,34,39> LPC_LFRAME# B31
C741 LPC_LAD0 LFRAME#
<14,32,34,39> LPC_LAD0 A30
LAD0
DELL PWR SW INF
1 2 LPC_LAD1 B32 A59 AC_PRESENT 1 2
<14,32,34,39> LPC_LAD1 LAD1 BGPO0
LPC_LAD2 A31 B63 LAT_ON_SW# R835 10K_0402_5%~D
<14,32,34,39> LPC_LAD2 LAD2 VCI_IN2#
22P_0402_50V8J~D LPC_LAD3 B33 A60 ALWON
<14,32,34,39> LPC_LAD3 LAD3 VCI_OUT ALWON <46>
MEC_XTAL2 CLKRUN# A32 A63 VCI_IN1# +3.3V_ALW
<16,32,39> CLKRUN# CLKRUN# VCI_IN1#
SIO_EXT_SCI# A33 B67 POWER_SW_IN#
<18> SIO_EXT_SCI# GPIO100/nEC_SCI VCI_IN0#
2
B1 ACAV_IN LCD_SMBCLK 2 1
VCI_OVRD_IN ACAV_IN <22,53,55> +1.05V_RUN_VTT
Y6 A1 DOCK_PWR_SW# R863 close to R418 2.2K_0402_5%~D
VCI_IN3# U51& least 250mils LCD_SMBDAT
32.768KHZ_12.5PF_Q13FC1350000~D MASTER CLOCK 2 1
MEC_XTAL1 A61 PECI B51 +PECI_VREF 1 2 R420 2.2K_0402_5%~D
1
MEC_XTAL1 MEC_XTAL2 2 MEC_XTAL2_R XTAL1 PECI_VREF PECI_EC_R R862 0_0402_5%~D DOCK_SMB_DAT

1 A62 A48 1 2 PECI_EC <7> 2 1
B R1068 XTAL2 PECI B
<39> EC_32KHZ_ECE5048 1 20_0402_5%~D B62 DB Version 0.12 R863 43_0402_5%~D 1 R838 2.2K_0402_5%~D
C743 R867 0_0402_5%~D GPIO160/32KHZ_OUT DOCK_SMB_CLK
I2S I2S_DAT
B17 2 1
1 2 B27 C737 R841 2.2K_0402_5%~D
VSS_RO
VR_CAP
I2S_CLK 0.1U_0402_25V6K~D
B34 B28
VSS[1]
VSS[4]
NC1 I2S_WS
AGND
22P_0402_50V8J~D A64 2 BAY_SMBDAT 2 1

NC2 R854 2.2K_0402_5%~D
EP
B68
NC3 BAY_SMBCLK 2 1
MEC5055-LZY_DQFN132_11X11~D R856 2.2K_0402_5%~D
B66
B11
B60
+VR_CAP B12
B54
C1 DYN_TUR_CURRNT_SET# 2 1
GPIO024/THSEL_STRAP note R1171 100K_0402_5%~D
15mil least i.THSEL_STRAP =1 (selects thermistor on diode channel 1) DEVICE_DET# 2 1
15mil ii.THSEL_STRAP = 0 (selects remote diode on diode channel 1) R1125 100K_0402_5%~D
+3.3V_ALW
+RTC_CELL +5V_RUN
1
CLK_KBD 2 1
49.9_0402_1%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
C740 R845 4.7K_0402_5%~D

1
+3.3V_ALW 4.7U_0603_6.3V6K~D DAT_KBD 2 1

2
R864
R858
R859
R860
R861
C740 close to U51.B12 VCI_IN1# 2 1 R846 4.7K_0402_5%~D

R1156 100K_0402_5%~D CLK_MSE 2 1
10K_0402_5%~D
R851 4.7K_0402_5%~D
1
1
10K_0402_5%~D
10K_0402_5%~D
100K_0402_5%~D
@ R850
CONN@ DAT_MSE 2 1
2
R847
R848
R849
JDEG2 2 1 MSDATA R852 4.7K_0402_5%~D

1 R869 10K_0402_5%~D
1 JTAG_TDI
2
2 2 JTAG_TMS
3
2
3 JTAG_CLK
4
4 4 JTAG_TDO +3.3V_ALW +3.3V_RUN
5
5 MSCLK DDR_ON
6 1 2
6 6 MSDATA R876 100K_0402_5%~D VOL_MUTE
7 2 1
7 HOST_DEB_TX HOST_DEBUG_TX +3.3V_M R1169 100K_0402_5%~D
8 1 2
8 8
2
9 HOST_DEB_RX R853 1 2 0_0402_5%~D HOST_DEBUG_RX VOL_DOWN 2 1
9 R855 0_0402_5%~D R872 PCH_ALW_ON R1197 100K_0402_5%~D
10 1 2
10 10
1
10K_0402_5%~D R880 100K_0402_5%~D VOL_UP 2 1

11 R893 1 2 DOCK_POR_RST# R1118 100K_0402_5%~D
G1 100K_0402_5%~D R881 100K_0402_5%~D
12
1
G2 +3.3V_ALW EN_INVPWR
13 1 2
G3 FWP# R882 100K_0402_5%~D
14
2
G4 +3.3V_ALW
R875 C744 REV PCH_PWRGD# <22> 1 2 1.05V_0.8V_PWROK
ACES_87153-10411 R883 10K_0402_5%~D
2
* 240K 4700p X00 2

2
R871 D @ R879 1 2 RESET_OUT#

A R875 RESET_OUT# 2 Q50 10K_0402_5%~D @ R843 8.2K_0402_5%~D A
1K_0402_1%~D
Place closely pin A29 130K 4700p X01 240K_0402_5%~D G SSM3K7002FU_SC70-3~D 1 2 CPU1.5V_S3_GATE
R889 100K_0402_5%~D
62K 4700p X02 S
1
CLK_PCI_MEC 1 2 PCH_RSMRST#
1
BOARD_ID SYSTEM_ID R892 10K_0402_5%~D

33K 4700p A00
1
4700P_0402_25V7K~D
@ R885
10_0402_1%~D 8.2K 4700p
4.3K 4700p
1
C744
1
C742
4700P_0402_25V7K~D
2
1
2K 4700p 2 2
CHIPSET_ID for BID Compal Electronics, Inc.
@ C747
4.7P_0402_50V8C~D
2
1K 4700p function PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, MEC5055
BOARD_ID rise time is measured from 5%~68%. LA-7741
5 4 3 2 1
5 4 3 2 1
+3.3V_TP
+3.3V_TP
BlueTooth
TP_CLK +3.3V_RUN
Touch Pad
4.7K_0402_5%~D
4.7K_0402_5%~D
TP_DATA
1
R903
R902
1 1 2
2
C755
D37
C748
0.1U_0402_25V6K~D 0.1U_0402_16V4Z~D
2
2
L54 2 1 BLM18AG601SN1D_0603~D TP_DATA
<40> DAT_TP_SIO
L55 2 1 BLM18AG601SN1D_0603~D TP_CLK
D <40> CLK_TP_SIO D
JBT1 CONN@
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
1 1 1
1
1
C752
1 1 2
<17> BT_DET# 2
C751
3
Place close to JTP1 <34> COEX1_BT_ACTIVE 3
C750
C749
<32> BT_COEX_STATUS2 4
2 2 4
<32> BT_PRI_STATUS 5
2 2 5
6
<43> BT_ACTIVE 6
<39> BT_RADIO_DIS# 7
7
<34> COEX2_WLAN_ACTIVE 8
8
9
9
10
10
<17> USBP11- 11 11 GND 13
<17> USBP11+ 12 12 GND 14
JTP1 CONN@ ACES_50228-0127N-001

1 1
PS2_CLK_TS 2
PS2_DAT_TS 2
3 3
+3.3V_ALW +3.3V_RUN +3.3V_TP
100P_0402_50V8J~D
+3.3V_TP 4 R1133
4
33P_0402_50V8J~D
10K_0402_5%~D
5 1K_0402_5%~D
5
@ C754
R1161 TP_DATA 6 9 +3.3V_RUN 1 2 BT_COEX_STATUS2 1 1
+3.3V_ALW +5V_RUN 6 G1
C753
R904
0_0603_5%~D TP_CLK 7 10
1 2 8
7
8
G2 R1134
1K_0402_5%~D
Link Done
@R1162
@ R1162 1 2 BT_PRI_STATUS 2 2
1 1
2
0_0603_5%~D TYCO_2041070-8~D
C756 C758 1 2
0.1U_0402_25V6K~D 0.1U_0402_25V6K~D
2 2 Link Done
C C
Place close to JKB1
Power Switch for debug

KB Conn. Pitch=1.0mm JKB1 CONN@
KB_DET# 1
<18> KB_DET# PS2_CLK_TS 1
2
PS2_DAT_TS 2
3
3
+3.3V_ALW 4 1 2
4 <30,40> POWER_SW#_MB 1 2
+5V_RUN 5
5
6 1
<40> BC_INT#_ECE1117 6
<40> BC_DAT_ECE1117 7
7 @ C759
8
8 100P_0402_50V8J~D @ PWRSW1
<40> BC_CLK_ECE1117 9
9 2 @SHORT PADS~D
10
10
11
GND Place on Bottom
12
GND
TYCO_1-2041084-0~D
Link Done
B B
+3.3V_ALW
+3.3V_ALW
10K_0402_5%~D
2
R1622
1 2
C288 0.1U_0402_25V6K~D
+5V_ALW 1 2 PCH_RSMRST#_Q
EC SIDE @ R1623 0_0402_5%~D
1
U9
5
U7
PCH_RSMRST# 1
P
<40> PCH_RSMRST# B
0.01U_0402_16V7K~D
1 4 PCH_RSMRST#_Q <14,16>
VCC RSMRST# O
3 2
RESET# A
G
1 2
GND
C289
TC7SH08FU_SSOP5~D
3
A A
RT9818A-46GU3_SC70-3~D
2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Touch PAD/Int KB/BT
LA-7741
5 4 3 2 1
5 4 3 2 1
DC/DC Interface +1.5V_RUN Source

+3.3V_ALW_PCH Source Q59
+PWR_SRC_S +3.3V_ALW Q49 +3.3V_ALW_PCH +1.5V_MEM NTGS4141NT1G_TSOP6~D
+3.3V_ALW2 SI3456DDV-T1-GE3_TSOP6~D +PWR_SRC_S +1.5V_RUN
D
+3.3V_ALW2 6
S
D
6 5 4
S
1
10U_0603_6.3V6M~D
5 4 2
1
10U_0603_6.3V6M~D
2 R920 1 1
C769
R907 R905 1 1 100K_0402_5%~D R921
G
1
C760
100K_0402_5%~D 100K_0402_5%~D R908 20K_0402_5%~D
3
20K_0402_5%~D R909
2
ALW_ENABLE 100K_0402_5%~D 2
2
<20> ALW_ENABLE 2 1.5V_RUN_ENABLE
2
3
D D
3
1M_0402_5%~D
470K_0402_5%~D
1
1
Q51B
1 1
R1619
Q52B
R1610
ALW_ON_3.3V# 5
C762 RUN_ON_ENABLE# 5 C771
<40> RUN_ON_ENABLE#
6
3300P_0402_50V7K~D 4700P_0402_25V7K~D
4
2 2
Q51A
2
6
<40> PCH_ALW_ON 2 <11,16,27,35,39,48> SIO_SLP_S3# 1 2
Q52A
R735 0_0402_5%~D
1 <27,35,39,48> RUN_ON 1 2 2
@ R744 0_0402_5%~D
1
+1.05V_RUN Source
+3.3V_SUS Source +PWR_SRC_S
+3.3V_ALW Q54 +PWR_SRC_S +1.05V_M Q63
SI3456DDV-T1-GE3_TSOP6~D +3.3V_SUS SI4164DY-T1-GE3_SO8~D +1.05V_RUN
1
8 1
1
R911 6 7 2
10U_0603_6.3V6M~D
+3.3V_ALW2 100K_0402_5%~D 5 4 R930 6 3
1
10U_0603_6.3V6M~D
2 100K_0402_5%~D 5 1
C772
1 1 R931
C765
R914 20K_0402_5%~D
4
1
20K_0402_5%~D 1.05V_RUN_ENABLE
3
R915 SUS_ENABLE 2
2
100K_0402_5%~D 2
2
3
1
D
2200P_0402_50V7K~D
470K_0402_5%~D
1
1M_0402_5%~D
Q64
2
2
1
Q53B
R1611
1
R1618
SUS_ON_3.3V# 5 1 S
C773
C C
6
C767
4
2
Q53A 4700P_0402_25V7K~D 2
2
DMN66D0LDW-7_SOT363-6~D 2
<39> SUS_ON 2
+5V_RUN Source
1
+5V_RUN
0.1U_0402_25V6K~D
C1199 +5V_ALW
1
1U_0603_10V7K~D U78
+3.3V_M Source 1
C761
2 1 1 14 R910
+3.3V_ALW Q58 +3.3V_M VIN1 VOUT1 20K_0402_5%~D
2 13
+PWR_SRC_S SI3456DDV-T1-GE3_TSOP6~D +3.3V_M VIN1 VOUT1 @ C1196
+3.3V_ALW2 1 2 3 12 1 2 2
<11,16,27,35,39,48> SIO_SLP_S3#
2
ON1 CT1
D
1
6 R749 0_0402_5%~D
S
1
5 4 R916 4 11 270P_0402_50V7K~D
R917
10U_0603_6.3V6M~D
39_0603_5%~D VBIAS GND C1197
2
1
1
100K_0402_5%~D 1 1 1 2 5 10 1 2
<27,35,39,48> RUN_ON ON2 CT2
C768
R918 @ R919 @ R747 0_0402_5%~D
G
2
100K_0402_5%~D 20K_0402_5%~D 270P_0402_50V7K~D
+3.3V_M_CHG
+3.3V_ALW 6 9
2
A_ENABLE VIN2 VOUT2

7 8
2 VIN2 VOUT2 +3.3V_RUN Source
2
2
3
1 15 +3.3V_RUN
C1198 GPAD
Q57B
1M_0402_5%~D
1U_0603_10V7K~D TPS22966DPUR_SON14_2X3~D
1
0.1U_0402_25V6K~D
A_ON_3.3V# 5 1
1
2
R1617
1
6
1
D
C764
C770 R913
4
Q60
Q57A 4700P_0402_25V7K~D A_ON_3.3V# 2 20K_0402_5%~D
B DMN66D0LDW-7_SOT363-6~D 2 G B
2
2
<16,39,49> SIO_SLP_A# 2 S
2
1
Discharg Circuit
+3.3V_SUS +3.3V_ALW_PCH +5V_RUN +1.5V_RUN +3.3V_RUN +1.05V_RUN +1.5V_CPU_VDDQ +0.75V_DDR_VTT
1
1
@ R929 @ R925 R926
@ R922 @ R928
@R928 @ R923 @ R924 39_0603_5%~D 39_0402_5%~D 220_0402_5%~D R927
1K_0402_1%~D 1K_0402_1%~D 1K_0402_1%~D 1K_0402_1%~D 22_0603_5%~D
2
2
+3.3V_ALWPCH_CHG
+5V_RUN_CHG
+1.5V_RUN_CHG
+3.3V_RUN_CHG
+1.05V_RUN_CHG
+1.5V_CPU_VDDQ_CHG
+3.3V_SUS_CHG
+DDR_CHG
<7,11> RUN_ON_CPU1.5VS3#
1
1
D D D D D
@ Q67
@ Q68
@ Q70
@
1
D D
@ Q65
@ Q66
Q69
Q72
RUN_ON_ENABLE# 2 2 2 2 2
1
SUS_ON_3.3V# ALW_ON_3.3V# 2 G G G G D G
2
Q71
G G S S S S 2 S
3
3
A G A
S S
3
S
3
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, POWER CONTROL
LA-7741
5 4 3 2 1
5 4 3 2 1
HDD LED solution for White LED Battery LED

+3.3V_ALW
Q83B R949
+5V_ALW DMN66D0LDW-7_SOT363-6~D 4.7K_0402_5%~D
1
4 3 BAT2_LED#_Q 1 2 BATT_WHITE <30>
<39> BAT2_LED#
R932
10K_0402_5%~D
BATT_YELLOW <30>
5
3
Q74B MASK_BASE_LEDS#
2
DMN66D0LDW-7_SOT363-6~D Q74A
D59 DMN66D0LDW-7_SOT363-6~D
<14> SATA_ACT# 4 3 1 2 1 6 2
R958
D D
RB751S40T1_SOD523-2~D Q75 4.7K_0402_5%~D
PDTA114EU_SC70-3~D 1 2 BATT_WHITE_LED <23>
2
<39> MASK_SATA_LED#
1
BATT_YELLOW_LED <23>
D62 1 2
MASK_BASE_LEDS# R934 4.7K_0402_5%~D SATA_LED <30>
<39> LED_SATA_DIAG_OUT# 1 2
RB751S40T1_SOD523-2~D
Q83A R951
DMN66D0LDW-7_SOT363-6~D 330_0402_5%~D
1 6 BAT1_LED#_Q 1 2
PANEL_HDD_LED <23> <39> BAT1_LED#
2
3
MASK_BASE_LEDS#
Q80A
1 6 2 R959
330_0402_5%~D
Q81 1 2
PDTA114EU_SC70-3~D
1
1 2
SYS_LED_MASK# R938 4.7K_0402_5%~D
Breath LED
+5V_ALW
+3.3V_ALW
WLAN LED solution for White LED
Q84A
DMN66D0LDW-7_SOT363-6~D LED1
1 6 BREATH_LED#_Q 1 2 BREATH_WHITE_LED_SNIFF 1 2
+5V_ALW <38,39> BREATH_LED#
R957 1K_0402_1%~D
1
C LTW-193ZDS5_WHITE~D C
R937
2
100K_0402_5%~D
Place LED1 close to SW1
3
MASK_BASE_LEDS#
Q78A
2
1 6 2 R955
<34,39> WIRELESS_LED#
4.7K_0402_5%~D
Q79 1 2 BREATH_WHITE_LED <23>
PDTA114EU_SC70-3~D
2
MASK_BASE_LEDS#
1
3
Q78B
<41> BT_ACTIVE 5
4
1 2
WLAN_LED <30>
1
R939 4.7K_0402_5%~D
R950
100K_0402_5%~D
2
B B
LED Circuit Control Table

SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function) 0 X

Mask Base MB LEDs (Lid Closed) 1 0
Do not Mask LEDs (Lid Opened) 1 1
+3.3V_ALW
C778 0.1U_0402_25V6K~D
EMI CLIP
1 2 CLIP1
5 EMI_CLIP
U58 1
SYS_LED_MASK# GND
1
Fiducial Mark
P
<39> SYS_LED_MASK# B
4 MASK_BASE_LEDS#
@ FD1 LID_CL# O
<30,39> LID_CL# 2
A
G
1
LVDS standoff TC7SH08FU_SSOP5~D
3
FIDUCIAL MARK~D
A @ H3 @ H4 @ H5 @ H6 @ H7 @ H9 @ H10 @ H11 @ H12 @ H13 A
@ FD2 H_2P8 H_2P0 H_2P8 CLIP_C5 CLIP_C5 H_2P8 H_2P8 H_2P8 H_2P6 H_2P6
1
FIDUCIAL MARK~D
1
@ FD3
1
FIDUCIAL MARK~D @ H15 @ H16 @ H17 @ H18 @ H19 @ H20 @ H21 @ H22 @ H24 @ H25 @ H26 @ H27
@ FD4
H_2P8 H_3P4 H_2P3 H_3P4 H_2P3 H_2P8 H_2P8 H_2P0X2P5 H_2P8 H_2P8 H_2P8 H_2P8
1 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
PAD and Standoff
1
FIDUCIAL MARK~D BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
LA-7741
5 4 3 2 1
5 4 3 2 1
D TR1 D
1:1 +3.3V_LAN
<31> SW _LAN_TX0+ 1 TD1+ T1/B
24 NB_LAN_TX0+
TX1+
<31> SW _LAN_TX0- 2 TD1-
1U_0603_10V4Z~D
0.1U_0402_10V7K~D
470P_0402_50V7K~D
23 NB_LAN_TX0-
TX1-
1 1 1
C1169
C1168
C1167
+TRM_CT1 3 22 Z2805
TDCT1 T1/A TXCT1
+TRM_CT2 Z2807 2 2 2
4 TDCT2 1:1 TXCT2 21
<31> SW _LAN_TX1+ 5 TD2+ T1/B
20 NB_LAN_TX1+
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
TX2+
1 1
JLOM1 CONN@
C37
6
C36
<31> SW _LAN_TX1- TD2-

19 NB_LAN_TX1- 9
2 2 TX2- Yellow LED+
R1089 1 2 150_0402_5%~D LAN_ACTLED_YEL#_R 10
T1/A <31> LAN_ACTLED_YEL# Yellow LED-
NB_LAN_TX3- 8
1:1 PR4-
<31> SW _LAN_TX2+ 7 TD3+ T1/B
18 NB_LAN_TX2+ NB_LAN_TX3+ 7
TX3+ PR4+
NB_LAN_TX1- 6
C PR2- C
<31> SW _LAN_TX2- 8 TD3- NB_LAN_TX2- 5
NB_LAN_TX2- PR3-
TX3- 17
NB_LAN_TX2+ 4
+TRM_CT3 Z2806 PR3+
9 TDCT3 TXCT3 16
T1/A NB_LAN_TX1+ 3 PR2+
+TRM_CT4 10 15 Z2808 NB_LAN_TX0- 2
TDCT4 1:1 TXCT4 PR1-
<31> SW _LAN_TX3+ 11 TD4+ T1/B GND 14
14 NB_LAN_TX3+ NB_LAN_TX0+ 1
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
TX4+ PR1+
1 1 GND 15
R1091 1 2 150_0402_5%~D 11
<31> LED_10_GRN# Green LED-
C38
C39
12 R1090 1 2 150_0402_5%~D 13
1 75_0402_1%~D
1 75_0402_1%~D
1 75_0402_1%~D
1 75_0402_1%~D
2 2 <31> SW _LAN_TX3- TD4- <31> LED_100_ORG# Orange LED-
13 NB_LAN_TX3-
TX4-
12 Green-Orange LED+
T1/A
TYCO_2041341-1~D
350UH_H5120DNL~D
Link Done
2
R1114
R1113
R1112
R1111
B B
GND 1 2 GND_CHASSIS
C1104 1000P_1808_3KV7K~D
CHASSIS
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RJ45
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-7741
5 4 3 2 1
5 4 3 2 1
ESD Diodes
+COINCELL
COIN RTC Battery
1
@ PD2 @ PD3
PESD24VS2UT_SOT23-3~D PESD24VS2UT_SOT23-3~D PL19
1
FBMJ4516HS720NT_2P~D +3.3V_ALW
1 2 PR1
1K_0402_5%~D
3
2nd Battery Connector +3.3V_RTC_LDO Link Done
PJP51
2
1
MBATT+_C 2 1 MPBATT+ JRTC1
Z4012
PAD-OPEN 2x2m~D PR108
+COINCELL 1
1 G
3
1
PC136 100K_0402_5%~D 2 4
PBATT2 PR106 0.1U_0603_25V7K~D 2 G
2
D D
1 100_0402_5%~D PR77 TYCO_2-1775293-2~D
2
1
2
2 Z5304 1 2 100_0402_5%~D PR105
BAY_SMBCLK <28,40>
+RTC_CELL
2200P_0402_50V7K~D
2 Z5305 100_0402_5%~D
3 1 2 BAY_SMBDAT <28,40>
3 Z5306
4 1 2 MODULE_BATT_PRES# <39,55>
4
1
PC141
5
5
6
6 PD1
2
1
7
GND RB715FGT106_UMD3
8
GND
ESD Diodes 1
PL20 PC1
SUYIN_150010GR006M500ZR FBMJ4516HS720NT_2P~D
1U_0603_10V4Z~D
1 2
2
1
Move to power schematic
@ PD6 @ PD7 PL1
GND PESD24VS2UT_SOT23-3~D PESD24VS2UT_SOT23-3~D FBMJ4516HS720NT_2P~D +3.3V_ALW
1 2
2
3
PJP43
1
PBATT+_C 1 2 PBATT+
PBATT1 PAD-OPEN 4x4m PR2
1
9 PC2 100K_0402_5%~D
GND PR4
8 0.1U_0603_25V7K~D
2
GND 100_0402_5%~D PR3
7
2
7 Z4304 100_0402_5%~D PR5
6 1 2 PBAT_SMBCLK <40>
2200P_0402_50V7K~D
6 Z4305 100_0402_5%~D
5 1 2 PBAT_SMBDAT <40>
5 Z4306
4 1 2 PBAT_PRES# <39,55>
4
1
PC3
3
3
2
2
1
2
1
SUYIN_200277MR009F515ZR~D
C C
GND +3.3V_ALW Primary Battery Connector
@ PR7 PU1
2
1 2 <38> DOCK_PSID 1 6 GPIO_PSID_SELECT <39>
PR8 NO IN
0_0402_5%~D
2.2K_0402_5%~D
2 5
PR9 GND V+ +5V_ALW
1
PL2 33_0402_5%~D
NB_PSID_TS5A63157
S
2 1 1 3 1 2 3 4 PS_ID <40>
NC COM
BLM18BD102SN1D_0603~D
100K_0402_1%~D PQ2 TS5A63157DCKR_SC70-6~D
2 FDV301N_NL_SOT23-3~D +5V_ALW <BOM Structure>
G
2
PR10
10K_0402_1%~D
1
1
C
PQ3
PR11
2
B MMST3904-7-F_SOT323~D
E
15K_0402_1%~D
3
2
2
PR12
PR13
1 2
PSID_DISABLE# <39>
1
@ 10K_0402_5%~D
B B
DC_IN+ Source
+DC_IN +DC_IN_SS
PQ4
FDS6679AZ_SO8~D
PL3
1
2
S D
8
7 +PWR_SRC +PWR_SRC_S
FBMJ4516HS720NT_2P~D S D
3 6 3 1
+DC_IN S D
1 2 4 5
G D
0.1U_0603_25V7K
0.22U_0603_25V7K
1
1
100K_0402_1%
1M_0402_5%~D
2
1
0.022U_0805_50V7K~D
PC903
PR903
PC902
100K_0402_5%~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
1
PC6
PR15
VZ0603M260APT_0603
Link Done 1
1
2
PC7
PC8
PC9
PR16
PC11
PD10
<55> SOFT_START_GC
2
2
0.1U_0603_25V7K~D
1
PJPDC1 PQ902
4.7K_0805_5%~D
2
1
PR902 TP0610K-T1-E3_SOT23-3
0.1U_0603_25V7K~D
1 1 2
2
1
1
NB_PSID 22K_0402_1%
PC10
@ PR17
2 @ PR18
2
2 VSB_N_001
3 1 2
3
1
+DCIN_JACK 2 10K_0402_5%~D
PC12
1VSB_N_003
1M_0402_5%~D
4
2
4
5
2
PR19
5 -DCIN_JACK
6
6 @
7
7 PR901
2
MOLEX_87438-0743~D PL4 0_0402_5% D

FBMJ4516HS720NT_2P~D
+3.3V_ALW 1 2VSB_N_002 2 PQ901
1 2 G SSM3K7002FU_SC70-3
S
0.1U_0402_16V7K
3
1
PC901
1
PC13
2
0.1U_0603_25V7K~D
2
A A
Title
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D +DCIN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Size Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 0.1
LA-7741
5 4 3 2 1
A B C D E
3.3VALWP +/- 5% +5V_ALWP/ +3.3V_ALWP

TDC=5.45A Charlie_note :
Peak Current=7.786A 5VALWP +/- 5%
SKIPSEL Connect to REF : DEM Mode
OCP min=10.122A TDC=8.41A
L/S RDS(on) 14.2m ohm(typ),17.5m ohm(max) 2VREF_6182 @DEM VFBx=2.0V
Peak Current=12.012A
FSW=375KHz OCP min=15.62A
TONSEL
Delta_Iin=1.246A Frequency Selectable Input for VOUT1(+5v)/VOUT2(+3.3v)
L/S RDS(on) 14.2m ohm(typ),17.5m ohm(max)
respectively.
Delta_Io=3.3231A 300kHz/375kHz : Connect to REF FSW=300KHz
1
1 1
PC36 Delta_Iin=1.64A
1U_0603_16V6K
Delta_Io=3.756A
2
+PWR_SRC
PJP5 PR37 PR36
1 2 13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
PAD-OPEN 4x4m
+DC1_PWR_SRC PR43 PR42
20K_0402_1% 20K_0402_1% +DC1_PWR_SRC
FB_3V FB_5V 1
+3.3V_RTC_LDO 1 2 2
@ PL24
1 2
HCB2012KF-121T50_0805
+3.3V_ALW2
PR27 PR33 PR34
2200P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0_0402_5% 140K_0402_1% 232K_0402_1%~D
0.1U_0402_25V6
0.1U_0402_25V6
1 2 1 2 ENTRIP2 ENTRIP1
1 2
1
1
PC16
PC21
PC17
PC23
PC24
PC18
PC20
PC22
PQ6
1
AON7408L_DFN8-5 PU2
2
3
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
@
1
PC28 @ PQ5
D
4 10U_0805_6.3V6M 25 FDS8878_G 1N SO8
P PAD
2
7 VO2 VO1 24 2 G
2 2
Typ: 175mA
1
2
3
PC38 8 23 PC37
VREG3 PGOOD
S
0.22U_0603_25V7K~D 0.22U_0603_25V7K~D
1 2 BST1_3V 1 PR41 2 BST_3V 9 22 BST_5V 1 PR38
2 BST1_5V 1 2
1
BOOT2 BOOT1
2.2_0603_5% 2.2_0603_5%
PL8 UG_3V 10 21 UG_5V PL7
2.2UH_ETQP3W2R2WFN_8.5A_20% UGATE2 UGATE1 3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
+3.3V_ALWP 1 2 LX_3V 11
PHASE2 PHASE1
20 LX_5V 1 2
+5V_ALWP
1
8
7
6
5
3
LG_3V LG_5V
4.7_1206_5%
12 19
LGATE2 LGATE1
4.7_1206_5%
1
PR39
220U_D_6.3VM_R25M
D
SKIPSEL
PR40
220U_D_6.3VM_R25M
VREG5
1
1
GND
@
VIN
PC40
NC
EN
@
2
PC35
4 2 +
2
RT8205LZQW(2) WQFN 24P PWM G
1 SNUB_3V
13
14
15
16
17
18
2 PQ7
SNUB_5V
PQ8
2
S
FDMS7692 1N POWER56-8
680P_0603_50V7K
IRF8707GTRPBF_SO8
1
2
3
1
+5V_ALW2
PC34
680P_0603_50V7K
1
PC33
1U_0603_10V6K
Typ: 175mA
PC19
@
2
PJP9
300K_0402_1%
+3.3V_ALW
2
1
1
1 2 @
@
1
PC26
PR47
PD37 4.7U_0805_10V6K
PAD-OPEN 4x4m
2
PR46
2
1 2 2 1
+PWR_SRC
2
PJP10
499K_0402_1%~D
+3.3V_ALWP 1 2 +3.3V_ALW 2 PR20
1
MMSZ5229BS_SOD323-2 100K_0402_1%
3 (4A,120mils ,Via NO.= 6) PC27 3
1
PAD-OPEN 4x4m 0.1U_0603_25V7K
2
2VREF_6182 ALW_PWRGD_3V_5V <40>
ENTRIP2
ENTRIP1
Max: 100uA
+DC1_PWR_SRC
3
PQ70B PQ70A
2N7002DW-T/R7_SOT363-6~D 5 2 2N7002DW-T/R7_SOT363-6~D
4
PJP6
1 2
PAD-OPEN 4x4m
PR150 PJP74
1 2
+5V_ALW2 +5V_ALWP 1 2 +5V_ALW(5A,180mils ,Via NO.= 9)
1
100K_0402_1%
PAD-OPEN 4x4m
PR147
2K_0402_1%~D
<40> ALWON 1 2 2
PR151 PQ105
4 0_0402_5% PDTC115EU_SOT323-3 4
3
<22> THERM_STP# 1 2
1U_0603_10V6K
PC119
Security Classification Compal Secret Data Compal Electronics, Inc.

2
@
Issued Date 2007/08/02 Deciphered Date <Deciphered_Date> Title
+5V/+3.3V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-7741 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
5 4 3 2 1
1.5Volt +/- 5% +1.5V_MEN_P/ +0.75V_P

TDC=7.18A
Peak Current=10.25A
OCP min=13.33A
L/S RDS(on) 3.8m ohm(typ),4.8m ohm(max) 0.75Volt +/- 5%
FSW=253KHz for RTON=1M ohm, spec. On-Time =303.947ns
Delta_Iin=1.458A TDC=0.525A
Delta_Io=5.4728A Peak Current=0.75A
OCP min=0.975A
D D
+PWR_SRC PJP404
PJP204
1 2 1.5V_B+
VLDOIN_1.5V
1
PR482
2 BOOT_1.5V
2 1 +1.5V_MEN_P
PAD-OPEN 4x4m
2.2_0603_5%~D PAD-OPEN1x1m
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
2200P_0402_50V7K~D
0.1U_0402_25V6K~D
0.22U_0603_16V7K~D
DH_1.5V
+0.75V_P
1
PC412
PC415
PC413
PC414
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
PC416
SW _1.5V
1
PC417
PC418
5
DL_1.5V
16
17
18
19
20
PU16
2
VLDOIN
PHASE
UGATE
BOOT
VTT
PAD 21
PQ67
SIR472DP-T1-GE3_POW ERPAK8-5~D 4 15 LGATE VTTGND 1
14 PGND VTTSNS 2
PR483
1
2
3
PL27 5.1K_0402_1%~D
1 2 1 2 CS_1.5V 13 3
+1.5V_MEN_P 1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D
CS RT8207MZQW _W QFN20_3X3 GND
5
PC419
330U_SX_2VY~R9M
1U_0603_10V6K~D
330U_SX_2VY~R9M
12 4
PR484 VDDP VTTREF +V_DDR_REF
1
C 1 1 C
5.1_0603_5%~D
@ PR220
+ + VDD_1.5V VDDQ_1.5V
+5V_ALW
@ PC422
PC423
4.7_1206_5% 1 2 11 VDD VDDQ 5

+1.5V_MEN_P
PGOOD
4
PC424
TON
1SNUB_1.5V2
2 2 1U_0603_10V6K~D PC425
+3.3V_ALW
FB
S5
S3
0.033U_0402_16V7~D
PQ68
1
2
3
10
6
SIR466DP-T1-GE3_POW ERPAK8-5
+5V_ALW
1
20110602 modify item
PR485 1. delete PU16.4 another net name VTTREF_1.5V
, only left +V_DDR_REF
@ PC231 100K_0402_1%~D
0.1U_0603_25V7K~D
2
2
<40> 1.5V_SUS_PW RGD 1.5V_SUS_PW RGD @ PR904
+1.5V_MEN_P_FB 2 1
PR486
+1.5V_MEN_P
1.5V_B+ 0_0402_5%~D
1 2
PR487 1M_0402_1%~D
2
1 2 S5_1.5V
<40> DDR_ON
2
PR905 @ PC904
0_0402_5%~D
1
Mode Level +0.75V_P +V_DDR_REF @ PC426

0_0402_5%~D
0.1U_0603_25V7K
S5 L off off
1
0.1U_0402_16V7K~D S3_1.5V
2
1
S3 L off on
S0 H on on
PR489
Note: S3 - sleep ; S5 - power off 0_0402_5%~D
B B
<39> 0.75V_DDR_VTT_ON 1 2
PJP405
2 2 1 1
JUMP_43X118
PJP406 PJP407
+1.5V_MEN_P 2 2 1 1 +1.5V_MEM +0.75V_P 1 2 +0.75V_DDR_VTT
JUMP_43X118
PAD-OPEN 3x3m
(2A,80mils ,Via NO.= 4)
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.5V_MEN/+0.75V_DDR_VTT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-7741
5 4 3 2 1
A B C D
+1.8V_RUNP
1.8Volt +/-5%
1 TDC=0.81A 1
Peak Current=1.157A
OCP min=1.5A
2
PR475
1
FSW=1MHz
+3.3V_RUN
10K_0402_5%~D Delta_Iin=0.407A
Delta_Io=0.8182A
1.8V_RUN_PW RGD <39>
PU15 PL26
4
PL25 1UH_PH041H-1R0MS_3.8A_20%
+3.3V_ALW 1 2 1.8VSP_VIN 10 2 1.8VSP_LX 1 2
PG
HCB1608KF-121T30_0603
PVIN LX
+1.8V_RUNP
22P_0402_50V8J
9 PVIN LX 3
PC407
4.7_1206_5%
1
1
PC406 8 PR477
PR476
22U_0805_6.3VAM SVIN
20K_0402_1%
6 1.8VSP_FB
2
2
FB
22U_0805_6.3VAM
22U_0805_6.3VAM
47P_0402_50V8J~D
5
2
EN
1
@
PC306
NC
NC
TP
PC408
PC409
@ PR478
11
2
SNUB_1.8VSP
2
1 2 EN_1.8VSP 2
<27,35,39,42> RUN_ON
1
0_0402_5% PR480
1
SYN470DBC_DFN10_3X3 10K_0402_1%
1
@ PR479 @ PC410
PR481 47K_0402_5%
2
0.1U_0402_10V7K
680P_0603_50V7K
<11,16,27,35,39,42> SIO_SLP_S3# 1 2
2
2
0_0402_5%
1
PC411
2
@
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR477/PR480)=0.6*(1+20K/10K)=1.8V
PJP403
1 2
+1.8V_RUNP +1.8V_RUN
PAD-OPEN 3x3m
3 3
4 4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.8V_RUN
A B C D
5 4 3 2 1
+1.05V_MP
PJP400
+V1.05SP_B+ 2 1
2 1 +PWR_SRC
JUMP_43X118
D D
2200P_0402_50V7K
4.7U_0805_25V6K
4.7U_0805_25V6K
0.1U_0402_25V6
1
1
PC401
+3.3V_ALW
PC402
PC403
PC400
5
6
7
8
2
PQ400
AO4466_SO8
1
PR400 4
PR401 PC404
100K_0402_1%~D 2.2_0603_5% 0.1U_0603_25V7K
1 2 1 2
3
2
1
<40> 1.05V_A_PW RGD PU17
PR402 1 10 BST_+V1.05SP
66.5K_0402_1%~D PGOOD VBST
1 2 TRIP_+V1.05SP 2 9 UG_+V1.05SP PL400
TRIP DRVH 3.3UH_PCMB064T-3R3MS_7A_20%
EN_+V1.05SP 3 EN SW 8 SW _+V1.05SP 1 2 +1.05V_MP
5
6
7
8
PR403 FB_+V1.05SP 4 7 V5IN_+V1.05SP +5V_ALW
VFB V5IN PQ401
<16,39,42> SIO_SLP_A# 1 2
RF_+V1.05SP 5 6 LG_+V1.05SP AO4710_SO8
220U_D2_4VM
0_0402_5% RF DRVL 1
1
1
S0 mode be high level +
PC430
TP 11
1
PC405 4 @ PR404
@ PC431 TPS51212DSCR_SON10_3X3 1U_0603_6.3V6M 4.7_1206_5%
2
0.1U_0402_16V7K 2
2
2
C C
1
3
2
1
1
PR405 @ PC432
470K_0402_1%
1000P_0603_50V7K
2
2
PR406
2 1
4.99K_0402_1%
+1.05Volt +/- 5%
2
@ PJP401 TDC=2.38A
1
PR407 2 1
2 1
PC433
0.1U_0603_25V7K
10K_0402_1%
JUMP_43X118
Peak Current=3.396A
2
OCP min=4.42A
1
PJP402
+1.05V_MP 2 2 1 1 +1.05V_M
JUMP_43X118 L/S RDS(on) 11.7m ohm(typ),14.12m ohm(max)
B B
FSW=290KHz
Delta_Iin=0.234A
Delta_Io=1.038A
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.05V_M
5 4 3 2 1
5 4 3 2 1
+1.05VTTP
PJP23
PC108 +1.05VTT_PWR_SRC 1 2 +5V_ALW
1.05Volt +/-5%
2 1
D
PAD-OPEN 4x4m TDC=4.49A D
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
1U_0402_6.3V6K~D
Peak Current=6.411A
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
1
+1.05VTT_VX
PC109
PC110
PC111
PC300
PC301
OCP min=8.334A
PC112
PC113
2
2
GNDA_1.05VTT +3.3V_ALW FSW=1MHz
17
16
2
PU7
PC114
Delta_Iin=0.804A
VIN
VIN
0.1U_0603_25V7K
1
PC115
2 1
Delta_Io=1.975A
PR89
1 15 +1.05VTT_BST 1 2
100P_0402_50V8J~D VCCA VBST
3.3_0603_1%~D
2 14 +1.05VTT_PWRGD
PC116 GND PGOOD
PR90 @ PR91
2 1 2 1 +1.05VTT_COMP 3 13 +1.05VTT_EN 1 2 CPU_VTT_ON <39>
COMP EN
5.6K_0402_5%~D @ PR92 0_0402_5%~D
680P_0402_50V7K~D +1.05VTT_VFB 4 12 +1.05VTT_FSET 2 1
VFB VFB=0.6V FSET
PR93 2K_0402_0.5%~D 22.1K_0402_1%~D
2 1 +1.05VTT_SENSE 5 11 +1.05VTT_MODE
VOUT MODE
+1.05VTT_SENSE
PR94 PC117
2
0_0402_5%~D
2 1 1 2 +1.05VTT_SS 6 10
SS IMON GNDA_1.05VTT
PR95
0_0402_5%~D 1
1800P_0402_50V7K~D
PGND
PGND
PC118
SW
0.01U_0402_25V7K~D
2
1
SN1003055RUWR_QFN17_3P5X3P5~D
9
1
3.01K_0402_1%
GNDA_1.05VTT +1.05VTTP
PR96
PL10
+1.05VTT_VX
GNDA_1.05VTT
+1.05VTT_VX 2 1
0.42UH_ETQP4LR42AFM_17A_20%~D
2
1
@
PC513
22U_0805_6.3V6M
22U_0805_6.3V6M
47U_0805_4V6M~D
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
47U_0805_4V6M~D
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
6800P_0402_25V7K~D
0.1U_0603_25V7K~D
1
1
C 0.1U_0603_25V7K~D C
2
20K_0402_0.5%~D
1
PC131
PC128
PC120
PC129
PC121
PC122
PC130
PC123
PC124
PC125
PC126
PC127
+3.3V_RUN SNUB_1.05VTT
PR130
10_0402_5%~D
2
1
2
GNDA_1.05VTT
PR100
@ PR511
2
7.68K_0805_1%~D
2
2
PR128
1
10K_0402_5%
1
1
D
PR119
PQ17 2 2 1 From GPIO
VCCP_PWRCTRL <10>
G 0_0402_5%~D
SSM3K7002FU_SC70-3
S PR102
3
+1.05VTT_SENSE
0.01U_0402_16V7K~D
1 2 VTT_SENSE <10>
Vth =1~x~2.5v
VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB) 0_0402_5%~D
2
PC183
1
@ PR116 VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)

100K_0402_5%
@
2
PR118
1
GNDA_1.05VTT 1 2 VTT_GND <10>

0_0402_5%~D
GNDA_1.05VTT
PR101
2 1 +5V_RUN
9.31K_0402_1%~D
B @ PR103 B
+1.05VTT_PWRGD 1 2 1.05V_VTTPWRGD <40,54>
0_0402_5%~D
PR104
2 1
13.3K_0402_1%~D
PJP25
PJP24
1 2 2 1
PAD-OPEN 43X118 PAD-OPEN1x1m

PJP26
+1.05VTTP 1 2 +1.05V_RUN_VTT
GNDA_1.05VTT
A PAD-OPEN 43X118 A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ISL95870A +1.05V_RUN_VTT
5 4 3 2 1
5 4 3 2 1
+VCC_CORE +VCC_PWR_SRC
4.7U_0805_25VAK
4.7U_0805_25VAK
4.7U_0805_25VAK
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
4.7U_0805_25VAK
1
1
PC132
5
PC281 PQ9
PC168
PC147
PC133
PC134
PC135
SIR472DP-T1-GE3_POWERPAK8-5~D
Charlie_note : 1 2
2
UGATE3
20110509 Maxim FAE-Allen reply:There are total 3 pcs 0.01U_0402_25V7K~D
2.2uF capacitor for VCC(PC143), VDDA(PC160) +5V_ALW
and VDDB(PC142) pin. PC278 PR330 4
1 2 1 2 PC137
PR107
BOST3 2 1 BT3_1 1 2
0.1U_0402_16V7K~D 0_0402_5%~D PC138 PU8 PL11
2.2_0603_5%~D
2 1 5 1 0.22U_0603_10V7K~D
3
2
1
VDD BST 0.42UH_ETQP4LR42AFM_17A_20%~D
PR109 1U_0603_10V6K~D
2 1 PR110 6 8 1 2
D
P1_SW SKIP DH D
2 1
6.49K_0402_1%~D +VCC_CORE
1
12.7K_0402_1%~D 2 7 P3_SW P3_SW
PWM LX @ PC139
Layout Note: PH1
PR111 PR112
PQ10
1
1 2 2 1 2 1 P2_SW 3 4 SIR818DP-T1-GE3_POWERPAK8-5 1500P_0603_50V7K~D
PC142 close to PIN15
2
GND DL PR114
12.7K_0402_1%~D PR113
10K_0402_1%_ERTJ0EG103FA~D 3.09K_0402_1%~D 9 1_0402_5%~D
EP 2K_0402_0.5%~D
2 PR115 1 P3_SW LGATE3 4
1
12.7K_0402_1%~D MAX17491GTA+T_TQFN8_3X3~D
2
@ PR117
+Vcore_VCC 1_1206_5%
1
@ PR121 PC140 PR120
3
2
1
0_0402_5%~D PR122 2200P_0402_50V7K~D 2 1
2
+5V_ALW 1 2 +Vcore_VDD 1 2 3.24K_0402_1%~D
2
165K_0402_1%
1K_0402_5%~D
107K_0402_1%~D
10_0402_5%~D
5.62K_0402_1%~D
5.62K_0402_1%~D
2.2U_0603_10V7K~D
1
2
@ PC144
1
PC143
PC142
PR123
PR124
PR125
PR126
PR127
1 2
PC277
1U_0603_10V6K~D
1 2 +Vcore_CSPA3
2
@ PR129 @ PC145 1000P_0402_50V7K~D

2
GNDA_VCC 2.2U_0603_10V7K~D 1 2 1 2 PC146

GNDA_VCC
1
@ <14,40> 1.05V_0.8V_PWROK 0.22U_0402_16V7K~D
0_0402_5%~D
1000P_0402_50V7K~D 2 1
@ PR131
1 2 +Vcore_IMAXA
<39> IMVP_VR_ON
0_0402_5%~D
+GFX_IMAXB +Vcore_CSNA
+Vcore_CSPAAVE
+VGFX_THERMB
+Vcore_THERMA
100K_0402_1%_TSM0B104F4251RZ~D
100K_0402_1%_TSM0B104F4251RZ~D
10K_0402_1%~D
154K_0402_1%~D
105K_0402_1%~D
2
2
+Vcore_CSPA3
+Vcore_CSPA2
+Vcore_CSPA1
+Vcore_PWMA
+Vcore_CSNA
+VCC_PWR_SRC
2
+Vcore_VCC
PR133
PR134
PR135
+Vcore_EN
+Vcore_SR
PJP27
PH2
PH3
+PWR_SRC
PR132 1 2
+VCC_PWR_SRC 1 2 +VGFX_TONB @
1
100K_0402_5%~D PAD-OPEN 4x4m
4.7U_0805_25VAK
4.7U_0805_25VAK
4.7U_0805_25VAK
2200P_0402_50V7K~D
1
0.1U_0603_25V7K~D
@ PR137
4.7U_0805_25VAK
100U_25V_M_R0.7~D
100U_25V_M_R0.7~D
100U_25V_M_R0.7~D
1 2 1 1 1
1
PC148
PC154
PC155
PC156
41
40
39
38
37
36
35
34
33
32
31
10_0402_5%~D PQ11
5
PU9 + + +
PC214
PC192
PC151
PC152
PC153
GNDA_VCC SIR472DP-T1-GE3_POWERPAK8-5~D
CSPA3
CSPA2
CSPA1
TPAD
EN
VCC
SR
CSNA
CSPAAVE
THERMB
THERMA
DRVPWMA
PR138
2
<10> VSSSENSE 1 2 +Vcore_GNDSA
C 2 2 2 C
10_0402_5%~D
1
PC149
4
1
PC150
@ 1000P_0402_50V7K~D 2 30 +GFX_IMAXB
2
1000P_0402_50V7K~D TON IMAXB

GNDA_VCC 3 29 +Vcore_IMAXA PR141 PC157
2
GNDSA IMAXA 2.2_0603_5%~D 0.22U_0603_10V7K~D PL12

PR139
3
2
1
PR140
<10> VCCSENSE 1 2 2 1 +Vcore_FBA 4 28 BOST2 2 1 BT2_1 1 2 0.42UH_ETQP4LR42AFM_17A_20%~D
FBA BSTA2
10_0402_5%~D 9.76K_0402_1%~D 1 2
+VCC_CORE
1
@ PR142 PC158 +Vcore_VRHOT# 5 27 P2_SW

VRHOT# LXA2
1
+VCC_CORE 1 2 P2_SW
5
@ PR143 1000P_0402_50V7K~D 26 UGATE2 @ PC159
10_0402_5%~D
2
DHA2 PQ15
75_0402_5%~D 1500P_0603_50V7K~D
1
1 2 GNDA_VCC +VGFX_FBB 6 25 LGAT2 SIR818DP-T1-GE3_POWERPAK8-5
+1.05V_RUN_VTT FBB DLA2 PR144 PR145
1 2 +VGFX_GNDSB 7 MAX17511GTL+T_TQFN40_5X5~D 2K_0402_0.5%~D 1_0402_5%~D
<7,40,53> H_PROCHOT# GNDSB
1
4
PC269 @ PR146 +Vcore_VDD
24
2
0_0402_5%~D VDDA @ PR148
GNDA_VCC 1 2
1
8 23 PC160 PC161 1_1206_5% PR152
43P_0402_50V8J CSPB1 DLA1 2200P_0402_50V7K~D
2.2U_0603_10V7K~D 2 1
3
2
1
2
9 22 3.24K_0402_1%~D
2
<52> +GFX_CSNB CSNB DHA1
21 @ PC162
LXA1
1 2
10 20 +Vcore_CSPA2
POKB BSTA1 1000P_0402_50V7K~D
@ PC164
<52> +GFX_CSPB1
ALERT#
PC205 GNDA_VCC 1 2 PC166

PR149
POKA
VDDB
BSTB
VDIO
1 2 GNDA_VCC 1 2 2 1
DHB
DLB
CLK
LXB
10_0402_5%~D 1000P_0402_50V7K~D
1000P_0402_50V7K~D 0.22U_0402_16V7K~D
+Vcore_CSNA
PR153
11
12
13
14
15
+Vcore_VDIO 16
+Vcore_ALERT# 17
18
+Vcore_POKA 19
<11> VSS_AXG_SENSE 1 2 +VGFX_GNDSB

10_0402_5%~D
1
+Vcore_VDD
+Vcore_CLK
PC163
1000P_0402_50V7K~D
@ PC165 +VCC_PWR_SRC
1
B <52> +GFX_BSTB B
1000P_0402_50V7K~D GNDA_VCC
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
4.7U_0805_25VAK
4.7U_0805_25VAK
4.7U_0805_25VAK
2
<52> +GFX_LXB
4.7U_0805_25VAK
<11> VCC_AXG_SENSE PR156 PR157
1 2 2 1+VGFX_FBB
<52> +GFX_DHB
1
PC169
PC226
PC171
PC172
10_0402_5%~D
PC170
8.45K_0402_1%~D
1
5
PQ13
PC276
+VCC_GFXCORE PR158 <52> +GFX_DLB
1 2 PC167 SIR472DP-T1-GE3_POWERPAK8-5~D
2
10_0402_5%~D 1000P_0402_50V7K~D PC173 0.1U_0402_25V6K~D UGATE1
2
1 2
GNDA_VCC 2 1 4
PR159 130_0402_1%~D PC174
+3.3V_RUN PR161
+1.05V_RUN_VTT 2 1 BOST1 2 1 BT1_1 1 2
@ PR160 130_0402_1%~D 2.2_0603_5%~D
2 1 0.22U_0603_10V7K~D PL13
3
2
1
+GFX_POKB PR162 54.9_0402_1%~D 0.42UH_ETQP4LR42AFM_17A_20%~D
P1_SW 1 2
+VCC_CORE
2
<10> VIDSOUT 1 2
1
PR165 @ PR166 PR164 0_0402_5%~D P1_SW
@ PC175
0_0402_5%~D <10> VIDALERT_N 1 2
10K_0402_1%~D PQ14 1500P_0603_50V7K~D
PR167 0_0402_5%~D
1
<10> VIDSCLK 1 2 SIR818DP-T1-GE3_POWERPAK8-5
1
PR168 0_0402_5%~D PR169 PR170

@ PR171 LGATE1 4 1_0402_5%~D
2K_0402_0.5%~D
1
<39> IMVP_PWRGD 2 1 +Vcore_POKA
@ PR173
2
0_0402_5%~D
1_1206_5%
1
PC176 PR176
3
2
1
2200P_0402_50V7K~D 2 1
2
3.24K_0402_1%~D
2
@ PC177
1 2
+Vcore_CSPA1
+VCC_CORE 1000P_0402_50V7K~D
TDC=37.1A @ PC178
1 2 PC179
GNDA_VCC
A PQ9,PQ11,PQ13 PQ10,PQ14,PQ15 Peak Current=53A 1000P_0402_50V7K~D
2 1 A
PJP28 OCP min=69A +Vcore_CSNA

0.22U_0402_16V7K~D
1 2 Main X7629631L88 AON6414AL AON6704L
Fsw=270KHZ @ PC180
PAD-OPEN1x1m GNDA_VCC 1 2
GNDA_VCC 2nd X7629631L89 MDU2657RH MDU2653RH
Choke DCR=1.55± 7% mΩ 1000P_0402_50V7K~D DELL CONFIDENTIAL/PROPRIETARY
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Vcore
5 4 3 2 1
5 4 3 2 1
+VCC_GFXCORE
D D
+VGFX_PWR_SRC
C C
PJP29
1 2
+PWR_SRC
PAD-OPEN 4x4m
10U_1206_25VAK~D
10U_1206_25VAK~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
5
10U_1206_25VAK~D
PQ24
1
PC193
SIR472DP-T1-GE3_POWERPAK8-5~D
PC194
PC195
PC196
PC204
2
2
4 4
<51> +GFX_DHB
PR189 PC197 PQ21
3
2
1
3
2
1
2 1 GBT1_1 1 2 SIR472DP-T1-GE3_POWERPAK8-5~D
<51> +GFX_BSTB
2.2_0603_5%~D 0.22U_0603_10V7K~D PL15
0.36UH_FDUE1040J-H-R36M=P3_33A_20%~D
<51> +GFX_LXB 5
1 4 +VCC_GFXCORE
1
GP1_SW 2 3GP1_Vo
470U_D2_2VM_R4.5M~D
0.1U_0402_10V7K~D
470U_D2_2VM_R4.5M~D
PQ25 @ PC198
1 1
2200P_0402_50V7K~D
SIR818DP-T1-GE3_POWERPAK8-5 470P_0603_50V8J~D
1
+ +
PC201
PC202
PC200
PC199
4 4
2
1
<51> +GFX_DLB 2 2
@ PR193
2.2_1206_1%~D
1
PC203
3
2
1
3
2
1
1
4700P_0402_25V7K~D PQ26
2
SIR818DP-T1-GE3_POWERPAK8-5 PR190
2
1.37K_0402_1%~D
B B
1
PR191
0_0402_5%~D
<51> +GFX_CSPB1
PC282
2
1 2
0.068U_0402_16V7K~D
PC208 PR192
1 2 2 1
0.33U_0402_10V6K 0_0402_5%~D
@ PR201 +VCC_GFXCORE
2 1
PQ21,PQ24 PQ25,PQ26 40.2K_0402_1%~D TDC=23.1A
PH4 PR203 Peak Current=33A
Main X7629631L88 AON6414AL AON6704L 1 2 2 1
OCP min=43A
2.21K_0402_1%~D
10K_0402_1%_ERTJ0EG103FA~D
Fsw=330KHZ
2nd X7629631L89 MDU2657RH MDU2653RH
<51> +GFX_CSNB
Choke DCR=0.82± 5% mΩ
PC207
GNDA_VCC 1 2
1000P_0402_50V7K~D
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ISL95870A +1.05V_RUN_VTT
0.1
LA-7741
5 4 3 2 1
5 4 3 2 1
@ PD14
2 1
@ PL800
ES2AA-13-F 1UH_PCMB053T-1R0MS_7A_20%
2 1
PQ27
+SDC_IN PR801 +PWR_SRC CHAGER_SRC
SI4835DDY-T1-E3_SO8~D 0.01_1206_1%~D
8 1 PJP800
+DC_IN_SS 7 2 4 1 1 2
6 3
5 3 2 PAD-OPEN 4x4m
Adapter Protection Event
0.1U_0603_25V7K~D
47P_0402_50V8J~D
1
1
PC801
PC802
4
PR521 PR522 PR510
2
2 1 @
<55> DC_BLOCK_GC
D @ PR206 D
0_0402_5%~D
SW 0 Ohm @ 100k
1
@ PC800
HW @ 0 Ohm @ 0.1U_0603_25V7K~D
1
PR803 D
1 2 2 PQ801
<55> CSS_GC
G NTR4502PT1G_SOT23-3~D
1
0_0402_5%~D D S
3
2 PQ803A
G NTGD4161PT1G_TSOP6~D
PQ802 S
S
NTR4502PT1G_SOT23-3~D
D
5 6 DOCK_DCIN_IS+ <38>
E2 AC_OK=17.7 Volt +DOCK_PWR_BAR 2
CSSN_1
CSSP_1
G
1
1
PR813 PQ803B
3 PR804 NTGD4161PT1G_TSOP6~D
TI bq24745 = 316K +DC_IN_SS 10K_0402_5%~D
10_0402_5%~D
PD801
S
Intersil ISL88731 = 226K 2 1 2 4
D
DOCK_DCIN_IS- <38>
100K_0402_1%~D
BAT54CW_SOT323~D
1
Maxim = 383K
100K_0402_1%~D
PR833
1
10_0402_5%~D PR850
+SDC_IN
G
PR807
3
PR808
MAX8731A_LDO MAX8731_REF PC803 PC804
@ PR809 0.1U_0603_25V7K~D 0.047U_0603_25V7M~D PC805
2
1 2 1 2 1 2 1 2 PR812
10K_0402_1%~D
<55> +CHGR_DC_IN
2
1
1
1 2 DK_CSS_GC <55>
1_0805_5%~D 0.1U_0603_25V7K~D
PR810
PR813
2
@ PR811 0_0402_5%~D
226K_0402_1%~D GNDA_CHG
28
27
1
10K_0402_5%~D PC806 GNDA_CHG PU801 ICOUT
2
2
0.1U_0805_50V7M~D
CSSN
ICREF
CSSP
2 1 +DCIN 22 26 PR817
1
DCIN ICOUT PR816 4.7_0603_5%~D

PR815
1
C 2 1 2 2.2_0603_1%~D C
PR818 ACIN BOOT BOOT_D PC807
49.9K_0402_1%~D 25 1 2
BOOT 1U_0603_10V6K~D
1 2 13
2
PC808 <22,40,55> ACAV_IN ACOK
0_0402_5%~D
10U_1206_25V6M~D
10U_1206_25V6M~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
1
1
2 1 11 PC809
1
VDDSMB
5
PR814
1
0.01U_0402_25V7K~D 0.1U_0603_25V7K~D GNDA_CHG PQ804
PC812
PC813
PC814
PC810
10
2
15.8K_0402_1%~D SCL
GNDA_CHG +5V_ALW 9 21 MAX8731A_LDO 1 2
2
2
SDA VDDP
GNDA_CHG 14 PC811 1U_0603_10V6K~D 4
NC CHG_UGATE
24
MAX8731_IINP UGATE
8 PR819
VICM
1
23 2 1 +VCHGR_B
PC815 PHASE AON7408L_DFN8-5
6 0_0603_5%~D
3
2
1
0.1U_0402_10V7K~D FBO
2
5
EAI
GNDA_CHG 4
EAO LGATE
20 CHG_LGATE +VCHGR
<40> CHARGER_SMBCLK PL801 PR823
1
0.01_1206_1%~D
<40> CHARGER_SMBDAT PR822 5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
MAX8731_REF 3 19 2 1+VCHGR_L 4 1
2.2K_0402_1%~D VREF PGND
18
CSOP
3 2
2
<22> MAX8731_IINP
1
7 17 PQ805
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
CE CSON
SI7716ADN-T1-GE3_POWERPAK8-5
0_0402_5%~D
10_0402_1%~D
PR826
1
1
15 VFB 1 2 PC821
2
VFB
1
@ PR825 12 1000P_0603_50V7K~D
GND 100_0402_5%~D
PR827
PR828
PC828
PC829
PC830
PC831
8.45K_0402_1%~D 16
NC
1
29
PC825 +VCHGR
2
PC823 TP
2
4 PR829
2
2
0.01U_0402_25V7K~D 0.01U_0402_25V7K~D
2
ISL88731CHRTZ-T T_QFN28P__5X5 4.7_1206_5%~D
PJP801 @ PC832
3
2
1
1
1 2 0.1U_0603_25V7K~D PC833 @ PC834
B
1 2 1 2 1 2 B
PAD-OPEN1x1m GNDA_CHG 0.22U_0603_25V7K~D 0.1U_0603_25V7K~D

GNDA_CHG GNDA_CHG
GNDA_CHG
MAX8731_REF
+DC_IN MAX8731_REF
Maximum charging current is 7.2A PR236
1M_0402_1%~D
47K_0402_1%~D
232K_0402_1%~D
1
1
1 2
+5V_ALW +5V_ALW
PR235
PR237
H_PROCHOT# <7,40,51> PR239
+5V_ALW 10K_0402_1%~D
+3.3V_ALW2
221K_0402_1%~D
2
1
2
PR474
DYN_TUR_CURRENT_SET#
8
@ PC244 @ PC245 @ PR336 PU12A
100P_0402_50V8J~D 0.01U_0402_25V7K~D 0_0402_5%~D 3
P
2
+
1 1 2
65W High O ACAV_IN_NB <39,40,55>
1
2 @ PR240
22.6K_0402_1%~D
1
100P_0402_50V8J~D
-
G
PR259
41.2K_0402_1%~D
PR846
42.2K_0402_1%~D
0_0402_5%~D
100P_0402_50V8J~D
1
1
150K_0402_1%~D 1 2 +3.3V_ALW LM393DR_SO8~D
4
1
1
PC242
PR241
PC243
PR243
90W Low 1.8M_0402_1%
6
PR847
PR242
PQ806B
2
20K_0402_1%~D 2N7002DW-T/R7_SOT363-6~D
2
MAX8731_IINP 1 2 5 @
P
2
+
1
7 2 5
2
O PR852
6
-
G
PU12B PQ806A 100K_0402_5%~D

+3.3V_ALW
1
LM393DR_SO8~D
150K_0402_1%~D
66.5K_0402_1%~D
PC842 2N7002DW-T/R7_SOT363-6~D
2
1
PC841
100P_0402_50V8J~D
220P_0402_50V8J~D
1
PR261
PR260
A 2 1 A
PC279
0.1U_0402_25V4Z~D
2
PUH800
2
1
P
B
1
D
4
O
1
D
TC7SH08FU_SSOP5~D 2 PROCHOT_GATE <39> 2 ACAV_IN <22,40,55>
A
G
2 G
0> DYN_TUR_CURRNT_SET#
G To preset system to throtlle S DELL CONFIDENTIAL/PROPRIETARY
3
S switching from AC to DC PQ808

3
PQ38 RHU002N06_SOT323-3~D
RHU002N06_SOT323-3~D Adapter Protection Circuit fot Turbo Mode Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Charger
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-7741P
5 4 3 2 1
5 4 3 2 1
+VCCSA_P
VCCSA_VID_0 VCCSA_VID_1 VCCSA Vout
0 0 0.9V
0 1 0.8V
1 0 0.725V
The 1k PD on the VCCSA VIDs are empty. 1 1 0.675V
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability. output voltage adjustable network
D D
@ PR264
1 2 VCCSA_VID_1 <11>
0_0402_5%~D
2
PR266
1K_0402_5%~D
+3.3V_RUN
1
VCCSA
100K_0402_5%~D
1
TDC=3.15A
PR244
@ PR265
2 1
Peak Current=4.5A
VCCSA_VID_0 <11>
0_0402_5%~D OCP min=5.85A
2
@ PR258
FSW=1MHz
2
<40> VCCSAPWROK 2 1
PR300
+VCCSA_PWRGD
0_0402_5%~D 1K_0402_5%~D
1
+VCCSA_VID0
@
+5V_ALW PR255
1U_0603_10V6K~D
0_0402_5%~D 1.05V_VTTPWRGD <40,50>
1 2
2
PC252
PR303
1
2 1 +VCCSA_EN
PC250 10_0402_1%~D
1 2
C 2.2U_0603_10V7K~D C
18
17
16
15
14
13
PU13
PC253
VID1
VID0
PGOOD
EN
V5FILT
V5DRV
PR245 0.1U_0603_25V7K
12 +VCCSA_BT 1 2+VCCSA_BT_1 1 2
BST
19 2.2_0603_1%~D
PGND
PL18
11 +VCCSA_PHASE 2 1
20
PGND
SW
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
+VCCSA_P
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
2200P_0402_50V7K~D
0.1U_0402_10V7K~D
10
SW
1
22U_0805_6.3V6M
21
PGND
1
@ PC254
2200P_0402_50V7K~D
PC257
PC260
PC182
PC259
PC256
0.1U_0603_25V7K~D
PC255
10U_0805_25V6K
PC258
10U_0805_25V6K
PC181
TPS51461RGER_QFN24_4X4~D 9 1000P_0603_50V7K~D
1 2
2
SW
1 2 2 22
2
VIN
2
PC248
@
PC249
PC247
PC246
8 @
SW @ PR248
23
1
2 1 1 VIN 2.2_1206_1%~D
PJP35
7
2
SW
+3.3V_ALW 2 1 +VCCSA_PWR_SRC +VCCSA_PWR_SRC 24
VIN
Vo=2v
PAD-OPEN 43X118 25
COMP
MODE
TP
SLEW
VOUT
VREF
GND
1
6
@ PR335
2 1
33K_0402_5%~D PR267
2 1
100_0402_1%~D
PC251
2 1
GNDA_VCCSA
0.22U_0402_10V6K~D
B PC383 B
PR247 PR253
2 1 2 1 2 1 +VCCSA_SENSE <11>
3300P_0402_50V7K~D 5.1K_0402_1%~D 0_0402_5%~D
2
PC262
0.01U_0402_25V7K~D
1
PJP37
PJP38
+VCCSA_P 1 2 +VCC_SA 2 1
PAD-OPEN 4x4m
PAD-OPEN1x1m
A GNDA_VCCSA A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ISL95870A 0.8V_VCC_SA
5 4 3 2 1
5 4 3 2 1
PQ39 PD17
SI4835DDY-T1-E3_SO8~D PQ40 2
+3.3V_ALW2 1 8
MPBATT+ FDS6679AZ_SO8~D 1
+VCHGR 2 7 1 8 3
S D
3 6 2 7 PR283 PD16
S D PDS5100H-13_POWERDI5-3~D
5 3 6 1 2
PC232 S D PQ41 ES2AA-13-F_SMA2~D
0.1U_0603_25V7K~D
4 5 330K_0402_5%~D
100K_0402_5%~D
G D
620K_0402_5%~D
2
1
390K_0402_5%~D
1 2 8 1 2 1
4
D S
1
PR270
PC264
PR271
7 2
PR272
0.1U_0402_10V7K~D MPBATT_IN_SS D S
6 3
D S
5
PUH3 5 4 PQ37
2
@ D G
1 8 1
P
<22,40,53> ACAV_IN
2
B FDS6679AZ_SO8~D D S
4 7 2
O +DOCK_PWR_BAR D S
9> CHARGE_MODULE_BATT 2 PR274 6 3
A D S
1
G
1 2 PD18 5 4
D G PC263
TC7SH08FU_SSOP5~D 3 820_0603_1%~D RB751V-40_SOD323~D
1
0.47U_0805_25V7K~D
10K_0402_5%~D
2 1 FDS6679AZ_SO8~D
0.01U_0603_25V7K~D
2
1
3
PR273
1K_0402_5%~D
2N7002DW-T/R7_SOT363-6~D
390K_0402_5%~D
2
D D
PD19
PR304
1
RB751V-40_SOD323~D
PC265
5 2 1 PR268
PR276
2
2
499K_0402_1%~D
330K_0402_5%~D
PQ42B
2
1
@ PR269
1
6
0_0402_5%~D
PR275
2
PQ42A
1
2
2
2N7002DW-T/R7_SOT363-6~D
STSTART_DCBLOCK_GC
1
1
39,45> MODULE_BATT_PRES# D
PQ909 PR278
2 PQ45 1 2 PD20
G 2N7002W-7-F_SOT323-3~D
PBATT+ FDS6679AZ_SO8~D
330K_0402_5%~D 2
S PQ44 1 8 1
3
SI4835DDY-T1-E3_SO8~D S D
2 7 3
S D PBATT_IN_SS
+VCHGR 1 8 3 6
S D PDS5100H-13_POWERDI5-3~D
2 7 4 5
G D PQ46
620K_0402_5%~D
3 6
390K_0402_5%~D
+3.3V_ALW2
1
5 8 1
D S
0.1U_0603_25V7K~D
PR281
PR282
7 2
100K_0402_5%~D
D S
2
6 3 +PWR_SRC
4
D S
1
PC233 5 4
PR279
PC266
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
D G
1 2
2
2
PR284 FDS6679AZ_SO8~D
2
1
0.1U_0402_10V7K~D PUH5 PR297
PC267
PC268
1 2
1
@
5
TC7SH08FU_SSOP5~D 20K_0402_1%~D 820_0603_1%~D
6
> ACAV_IN 1
P
2
B PD21
4 1
0.01U_0603_25V7K~D
O
2N7002DW-T/R7_SOT363-6~D
2 2 1
A
G
2
10K_0402_5%~D
390K_0402_5%~D
1
1
CHARGE_PBATT RB751V-40_SOD323~D
PC270
3
PQ49A
PR286
1
2
PR280
2N7002DW-T/R7_SOT363-6~D
PD23
PR291
2N7002DW-T/R7_SOT363-6~D
2
2
20K_0402_1%~D 2 1
<39> DEFAULT_OVRDE
2
PQ47A
PR257 RB751V-40_SOD323~D
499K_0402_1%~D
2
PQ47B
1
C 1K_0402_5%~D 2 C
1
2N7002DW-T/R7_SOT363-6~D
3
2
1
PR292
PR923
1
6
PQ49B
2N7002DW-T/R7_SOT363-6~D
10K_0402_5%~D
PQ48A
5 2N7002DW-T/R7_SOT363-6~D 5
2
3
1
1
6
D PQ910
2N7002DW-T/R7_SOT363-6~D
2
4
@ PR287
PQ48B
9,45> PBAT_PRES# 2
G 5 1 2 MODULE_ON <39>
1
2
S 0_0402_5%~D 2
3
RB751V-40_SOD323~D
RB751V-40_SOD323~D
RB751V-40_SOD323~D
2N7002W-7-F_SOT323-3~D @ PR285
1
PQ50A
499K_0402_1%~D
0_0402_5%~D
RB751V-40_SOD323~D
1
2
PR289
PD22
RB751V-40_SOD323~D
1
PD25
PD26
MPBATT+
2
@
2
PBATT+
PD24
1
PD27
200K_0402_1%~D
510K_0402_5%~D
1
1
PQ911
1
2N7002W-7-F_SOT323-3~D
PR290
PR471
3
1
D
2N7002DW-T/R7_SOT363-6~D
<39> SLICE_BAT_ON
PQ51B
3
2N7002DW-T/R7_SOT363-6~D
@ PR296 2 ACAV_IN <22,40,53>

0_0402_5%~D G
2
5 @ PR473 S
3
PQ50B
5 1 2
2
6
100K_0402_5%~D
PQ51A
2 4
2N7002DW-T/R7_SOT363-6~D
@ PR294
1 2 2 @ PR298 <38,39> SLICE_BAT_PRES# @ PR472
<39> DEFAULT_OVRDE 1 2
0_0402_5%~D MODULE_BATT_PRES# <39,45>
499K_0402_1%~D
0_0402_5%~D
0_0402_5%~D
1
1
PBATT+
1
PR288
@ PR299
2
<39,45> PBAT_PRES# +DOCK_PWR_BAR 1 2

@ @ PR302 0_0402_5%~D @ PR301
2
2
1 2
B +DC_IN_SS 0_0402_5%~D @ PR306
B
0_0402_5%~D
0_0402_5%~D
1
1 2
<53> +CHGR_DC_IN
@ PR305
1
CHGVR_DCIN
DK_PWRBAR
PR307 0_0402_5%~D
1 2 CD3301_DCIN
+DC_IN
DC_IN_SS
47_0805_5%~D
1
PC271
0.1U_0603_50V4Z~D
2
@ PR309
P50ALW
36
35
34
33
32
31
30
29
28
<45> SOFT_START_GC 1 2 +5V_ALW

PU14 0_0402_5%~D
PR310
1 2
NC
CHARGERVR_DCIN
DK_PWRBAR
GND
NC
BLK_MOSFET_GC
DSCHRG_MOSFET_GC
PBatt+
DC_IN_SS
+3.3V_ALW2 CD_PBATT_OFF
@ PR311
100K_0402_5%~D 1 2
@ PR312 SLICE_BAT_ON <39>
0_0402_5%~D
<38> ACAV_DOCK_SRC# 1 2ACAVDK_SRC @ PR313
1 2 DOCK_AC_OFF <38,39>
0_0402_5%~D
1 27 0_0402_5%~D
DC_IN P50ALW
@ PR314 2 26 PR315
ERC1 SS_GC PBATT_OFF DK_AC_OFF
+SDC_IN 1 2 3 25 @ PR316 1 2
ERC1 DK_AC_OFF_EN 3301_ACAV_IN_NB
0_0402_5%~D 4 24 1 2 ACAV_IN_NB <39,40,53> 1M_0402_5%~D
ACAVDK_SRC ACAV_IN_NB
5 23 0_0402_5%~D @ PR317
CD3301_SDC_IN GND GND DK_AC_OFF_EN
6 22 1 2 DOCK_AC_OFF_EC <39>
SDC_IN DK_AC_OFF_EN SL_BAT_PRES#
7 21 0_0402_5%~D
<53> DC_BLOCK_GC ACAVIN DC_BLK_GC SL_BAT_PRES# BLKNG_MOSFET_GC
8 20
P33ALW2 9 ACAV_IN BLKNG_MOSFET_GC
@ PR318 19
P33ALW2 NBDK_DCINSS
EN_DK_PWRBAR
<22,40,53> ACAV_IN 1 2
SS_DCBLK_GC
0_0402_5%~D @ PR320
DK_CSS_GC
1 2 SLICE_BAT_PRES# <38,39>
PWR_SRC
0_0402_5%~D
RB751V-40_SOD323~D
CSS_GC
RB751V-40_SOD323~D
P33ALW
@ PR319 37 @ PR322
TP
1
ERC3
ERC2
1 2 1 2
GND
+3.3V_ALW2 +NBDOCK_DC_IN_SS
PD29
PD28
0_0402_5%~D 0_0402_5%~D
CD3301ARHHR_QFN36_6X6~D
10
11
12
13
14
15
16
17
18
A A
2
PQ57
<53> CSS_GC @ PR324
0.1U_0603_25V7K~D
FDN338P_NL_SOT23-3~D P33ALW 1 2 +3.3V_ALW

ERC2
<53> DK_CSS_GC
0_0402_5%~D
1
1 3 ERC3
1
PC273
DOCK_SMB_ALERT# <38,39>
@ PR325
EN_DK_PWRBAR 1 2 EN_DOCK_PWR_BAR <39>
2
0.047U_0603_25V7K~D
0_0402_5%~D DELL CONFIDENTIAL/PROPRIETARY

2
@ PR326
2
0.1U_0402_25V4Z~D
@ PR321 1 2
38,39> SLICE_BAT_PRES# 1 2 1M_0402_5%~D
1
STSTART_DCBLOCK_GC
PC275
PC274
0_0402_5%~D
1
@ PR327 Title
2
PC272 @ 3301_PWRSRC PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
1500P_0402_7K~D
1 2
0_0402_5%~D
+PWR_SRC TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Selector
2
5 4 3 2 1
5 4 3 2 1
+VCC_CORE Charlie note: Vcore_Cout1

1.2.2uF*35 (SE00000888L) Below is 458544_CRV_PDDG_0.5 Table 5-8.
2.22uF*25 (SE000008L80)
Vcore_Cout2
+VCC_CORE +VCC_GFXCORE
1.470uF 4.5m *4 (SGA00004X80)
Charlie note:
1
iGfx_Cout1
1.22uF*6 (SE000000I10)
5 x 22 µF (0805)
1
2.10uF*6 (SE000005T8L) Socket Bottom 5 x (0805) no-stuff
PC1200 PC1201 PC1202 PC1203 PC1204 +VCC_GFXCORE 3.1uF*11 (SE000000K8L)
2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D iGfx_Cout2 sites
2
2
1.470uF 4.5m *2 (SGA00004200)
D
7 x 22 µF (0805) D
Socket Top 2 x (0805) no-stuff
1
1
PC1205 PC1206 PC1207 PC1208 PC1209 PC1210 sites
22U_0805_6.3V6M
1 1
22U_0805_6.3V6M
1 1
22U_0805_6.3V6M
1
22U_0805_6.3V6M
1
22U_0805_6.3V6M
22U_0805_6.3V6M
2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D
PC1211
PC1212
PC1213
PC1214
PC1215
PC1216
2
2
2 2 2 2 2 2
+1.05V_RUN_VTT
+1.05V_RUN_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
PC1277 PC1259 PC1279 PC1258 PC1276 PC1278
PC1224
PC1225
PC1226
PC1227
PC1228
PC1230
PC1231
PC1232
PC1233
PC1234
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PC1229
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
1
1
PC1235
PC1236
PC1237
PC1238
PC1217
PC1218
2
2
1
1
PC1282 PC1281 PC1284 PC1280 PC1283 PC1285
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
PC1312
PC1267
PC1311
PC1248
PC1249
PC1250
PC1251
PC1252
PC1253
PC1254
PC1255
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
PC1239
PC1240
PC1241
PC1242
PC1304
PC1306
C C
1
2
PC1288 PC1287 PC1290 PC1286 PC1289 PC1291
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
PC1315
PC1313
PC1314
PC1316
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
PC1305
PC1307
PC1308
PC1310
PC1309
1
2
PC1294 PC1293 PC1296 PC1292 PC1295 PC1297
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
1
PC1319
PC1317
PC1318
PC1325
PC1321
PC1322
PC1324
PC1320
PC1326
PC1323
2
2
+VCC_CORE 1 1
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
+ +
PC1257
PC1256
1 1 1 1 1
PC1219 PC1220 PC1221 PC1222 PC1223 2 2
22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM
330U_X_2VM_R6M
330U_X_2VM_R6M
2 2 2 2 2
1 1
PC1265
PC1266
Charlie note: + +
B B
+1.05V_RUN_VTT_1
3.1uF*26 (SE000000K8L)
4.10uF*10 (SE000005T8L) 2 2
1 1 1 1 1
PC1243 PC1244 PC1245 PC1246 PC1247 +1.05V_RUN_VTT_2
22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 5.330uF 6m *2 (SGA00001Q80)
2 2 2 2 2
1 1 1 1 1
PC1260 PC1261 PC1262 PC1263 PC1264 +VCC_CORE
2
22U_0805_6.3VAM
2
22U_0805_6.3VAM
2
22U_0805_6.3VAM
2
22U_0805_6.3VAM
2
22U_0805_6.3VAM +VCC_CORE
1 1 1 1
+ PC1272 + PC1273 + PC1274 + PC1275
1 1 1 1 1
470U_D2_2VM_R4.5M 470U_D2_2VM_R4.5M 470U_D2_2VM_R4.5M 470U_D2_2VM_R4.5M
PC1268 PC1269 PC1270 PC1271 PC1298 2 3 2 3 2 3 2 3
2 2 2 2 2
A A
1 1 1 1 1 DELL CONFIDENTIAL/PROPRIETARY
PC1302 PC1301 PC1300 PC1299 PC1303
2 2 2 2 2 Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL PROCESSOR DECOUPLING
5 4 3 2 1
www.s-manuals.com

1a319 Compal La-7741p r0.1

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1a319 Compal La-7741p r0.1

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A B C D E

@ Ivy Bridge + Panther POINT

MB Type BOM P/N

TPM EN/ TCM DIS 1@ 3@

TPM DIS/ TCM EN 2@ 4@

TPM DIS/ TCM DIS 2@ 3@

SPI ON BOARD @SPI

MB PCB DELL CONFIDENTIAL/PROPRIETARY

S0 ON ON ON ON ON SATA 4 ESATA 0 BIO

S5 S4/AC ON OFF OFF ON OFF

need to update Power Status and PM Lane 1 MINI CARD-1 WWAN

Lane 3 Express card

Lane 4 E3 Module Bay (USB3)

UMA DP/HDMI Port Connetion Lane 5 1/2vMINI CARD-3 PCIE

Port B MB HDMI Conn Lane 6 MMI

Port C Dock DP port 2 Lane 7 10/100/1G LOM

+3.3V_WLAN +3.3V_ALW_PCH +3.3V_SUS +3.3V_LAN +3.3V_RUN +3.3V_M

+VCC_CORE +1.5V_MEM +0.75V_DDR_VTT +1.8V_RUN +1.05V_RUN_VTT +1.05V_M

AO4728 NTGS4141N SI4164

G12 LAN_SMBDATA 31 LOM SMBUS Address [C8]

Compal Electronics, Inc.

BG17 VSS[181] VSS[250] M4

PCI EXPRESS -- GRAPHICS

VR1 TOPOLOGY Max 500mils QC2

H_PM_SYNC C48 M60 XDP_TDI_R 1 2

PM_DRAM_PWRGD_CPUBE45 G58 @ T128 PAD~D

XDP_PREQ# @ RC32 2 1 51_0402_1%~D

DDR SYSTEM MEMORY B

DDR_A_D38 AT48 AK55 DDR_A_DQS#7 DDR_B_D39 BE53

CFG Straps for Processor

1 2 VAXG_VAL_SENSE <7> CFG0

C EDS 1.0 RSVD_12 -> VCC_DIE_SENSE C

H48 0 : Enabled; An external Display Port device is

1: (Default) PEG Train immediately

U1F POWER +1.05V_RUN_VTT

PEG IO AND DDR IO

G43 VSSSENSE_R RC67 1 2 0_0402_5%~D

+3.3V_ALW2 +PWR_SRC_S +1.5V_MEM QC3 +1.5V_CPU_VDDQ

AM28 AL25 BD16

VCCDQ[1] VSS[77] VSS[167]

100_0402_1%~D VSS[84] VSS[174]

VCCPLL[1] VSS[86] VSS[176]

1 BC1 AM22 BD56

1 1 BC4 AM26 BD8

P20 VCCSA[7] VCCSA_SENSE U10 +VCCSA_SENSE <54>

VCCSA[11] RC139 0_0402_5%~D

V18 VCCSA[14] VCCSA_VID[1] D49 1 2 VCCSA_VID_1 <54>

DDR_A_BS0 109 110 DDR_A_RAS#

DDR_A_CAS# 115 116 M_ODT0

145 146 DDR_A_D44

1 DDR_A_D41 149 150

1 1 1 1 1 1 1 151 152 DDR_A_DQS#5

+ 153 154 DDR_A_DQS5

DDR_B_WE# 113 114 DDR_CS2_DIMMB#

DDR_B_MA13 119 120 M_ODT3

1 1 1 1 1 1 1 153 154 DDR_B_DQS5

CMOS_CLR1 CMOS setting PCH_AZ_SYNC is sampled

RH282 @ SIO_PWRBTN#_R 2 1 RSMRST#_XDP 17

PCH_INTVRMEN PCH_JTAG_TDI TRSTn

PXDP@ RH24 1K_0402_1%~D 24 27

1 1 2 2 1 1 2 2 SATA0RXN AM3 PSATA_PRX_DTX_N0_C <27>

JTAG_TCK SATA5TXP SATA_PTX_DKRX_P5_C <38>

PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2