Application Report

SNVA678B – September 2012 – Revised May 2013

AN-2296 SM72295: Highly Integrated Gate Driver for

800VA to 3KVA Inverter
.....................................................................................................................................................

ABSTRACT
This application note describes the design principles and circuit operation of TI’s highly Integrated Gate
driver in the Low Frequency Inverters.
The inverter industry is expected to witness many technological innovations in the coming years to cater to
a larger number of applications and new categories of end users. The demand from retail showrooms,
small offices and residential use is primarily for 800VA, 1 kVA, 1.4 kVA and 2 kVA inverters. Being a
highly fragmented, competitive and growing market, it is in desperate need of constant Innovation and
Integration.

Contents
1 Introduction .................................................................................................................. 2
1.1 Basics of Gate Drive Requirement .............................................................................. 2
1.2 Bootstrap circuit Principle for High Side Gate Drive ........................................................... 3
1.3 Low Frequency 600VA to 3KVA Pure Sine Wave Inverter Design .......................................... 4
2 SM72295– Achieving High Integration in Current LF Inverter Design ............................................... 7
2.1 Application Schematic — SM72295 in 800VA Pure Sine Wave Inverters ................................. 8
2.2 Easy Design Guidelines for Integrated Current Sensing ..................................................... 9
2.3 Layout Guidelines ................................................................................................ 10
3 Test Results in 850VA Pure Sine Wave Inverter Applications ...................................................... 11
3.1 Inverter Mode ..................................................................................................... 11
3.2 Charger Mode/Mains Mode ..................................................................................... 13

List of Figures
1 Simplified Model of a Non Inverting Gate Driver IC and a Power MOSFET ....................................... 2
2 A Closer Look of Driver Driving the MOSFET .......................................................................... 2
3 Power MOSFET Gate Drive Characteristics ............................................................................ 3
4 Bootstrap Supply Circuit ................................................................................................... 4
5 Inverter’s Block Diagram .................................................................................................. 5
6 Gate Drive Inputs in Inverter Mode ...................................................................................... 6
7 Inverter Mode Operation .................................................................................................. 6
8 Block Diagram of SM72295 Gate Driver ................................................................................ 7
9 SM72295 in 800VA pure Sine Wave Inverters .......................................................................... 8
10 Integrated Current Sensing Amplifier ..................................................................................... 9
11 Inputs to Gate Driver in Inverter Mode with Load of 700VA ......................................................... 11
12 Signal Integrity from Input to Output Gate Drives in Low Side MOSFETs on 700VA Load in Inverter
Mode. ....................................................................................................................... 12
13 Signal Integrity from Input to Output Gate Drives in High Side MOSFETs on 700VA Load in Inverter
Mode ........................................................................................................................ 13
14 Inputs to Gate Driver in Mains Mode With AC Mains Input of 220V ................................................ 14
15 Signal Integrity from Input to Output Gate Drives in Low Side MOSFETs in 220V AC Mains Mode. .......... 14
16 Signal Integrity from Input to Output Gate Drives in High Side MOSFETs in 220V AC Mains Mode. ......... 15
All trademarks are the property of their respective owners.

SNVA678B – September 2012 – Revised May 2013 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA 1
Submit Documentation Feedback Inverter
Copyright © 2012–2013, Texas Instruments Incorporated
Introduction www.ti.com

1 Introduction
Gate Driver is a power amplifier that accepts a low-power input from a controller IC and produces the
appropriate high-current gate drive for a power MOSFET. The gate driver must source and sink current to
establish required Vgs. A gate driver is used when a pulse width- modulation (PWM) controller cannot
provide the output current required to drive the gate capacitance of the MOSFET. Gate drivers may be
implemented as dedicated ICs, discrete transistors, or transformers. They can also be integrated within a
controller IC. Partitioning the gate-drive function off the PWM controller allows the controller to run cooler
and be more stable by eliminating the high peak currents and heat dissipation needed to drive a power
MOSFET at very high frequencies.

1.1 Basics of Gate Drive Requirement

Drain
Power MOSFET
LD

CGD
CDS

Controller Gate Gate RG

Input Driver

CGS LS

Source
Figure 1. Simplified Model of a Non Inverting Gate Driver IC and a Power MOSFET

A Real MOSFET’s Properties

• Fundamentally a voltage controlled switch.
• Inherent parasitic capacitors.
• Rds(ON) is not negligible.
This leads to the requirement of Gate driver which must source and sink current to establish required
threshold voltage from Gate to Source Vgs.
SW-Node
VCC
D

Driver CGD

P Turn On G
PWM
N Turn Off CDS

CGS

MOSFET
Figure 2. A Closer Look of Driver Driving the MOSFET

2 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA SNVA678B – September 2012 – Revised May 2013
Inverter Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
www.ti.com Introduction

Figure 1 shows the simplified model, including the parasitic components that influence high-speed
switching, gate-to-source capacitance (CGS), the gate-to-drain capacitance (CGD), and drain-to-source
capacitance (CDS).Values of the source inductance (LS) and drain inductance (LD) depend on the
MOSFET’s package. The other parasitic component is RG, the resistance associated with the gate signal
distribution within the MOSFET that affects switching times. An important attribute for the gate driver is its
ability to provide sufficient drive current to quickly pass through the Miller Plateau Region of the power-
MOSFET’s switching transition. This interval occurs when the transistor is being driven on or off, and the
voltage across its gate-to-drain parasitic capacitor (CGD) is being charged or discharged by the gate
driver. Figure 3 plots total gate charge as a function of the gate-drive voltage of a power MOSFET. Total
gate charge (QG) is how much must be supplied to the MOSFET gate. to achieve full turn-on. It is usually
specified in nanocoulombs (nC).
VSG, Gate-To-Source Voltage (V)

QG, Total Gate Charge (nC)

Figure 3. Power MOSFET Gate Drive Characteristics

1.2 Bootstrap circuit Principle for High Side Gate Drive

The gate drive requirements for a power MOSFET utilized as a high side switch, in applications like Full
bridge, half-bridge converters or synchronous buck converters can be summarized as follows:
• Gate voltage must be 6 to 12V higher than the source voltage. To fully enhance a high side switch, the
gate to source voltage would have to be higher than the threshold voltage plus the minimum necessary
voltage to fully enhance the MOSFET
• The gate voltage must be controllable from the logic level, which are normally referenced to ground.
Thus, the control signals need to be level shifted to the source terminal of high side MOSFET (HS
node), which in most applications, swings between ground and the high voltage rail.
The Bootstrap supply technique is a simple, cost-effective way to power the upper MOSFET’s gate and
provide bias supply to the floating logic sections of the Gate Driver. Only two components (a Bootstrap
diode and capacitance) per bridge phase are needed to implement the Bootstrap supply.

SNVA678B – September 2012 – Revised May 2013 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA 3
Submit Documentation Feedback Inverter
Copyright © 2012–2013, Texas Instruments Incorporated
Introduction www.ti.com

RBoot DBoot DC Supply

Bootstrap Charge Current Path
Bootstrap Discharge Current Path
VB
RG1
VDD HO Q1

ILoad
CBoot

VDD VS
Load
Q2
RG2
COM LO

Figure 4. Bootstrap Supply Circuit

Using this circuit, the Bootstrap Capacitor is charged to ground through the Low side FET. When the Low
side FET is turned off, the bottom of the capacitor flies up and this creates a voltage greater than Vcc.
This voltage is applied to the High side gate driver.

1.3 Low Frequency 600VA to 3KVA Pure Sine Wave Inverter Design
There is a dual mode of operation in a residential Inverter ie Mains mode and Inverter mode. As shown in
Figure 5, the Input AC voltage is fed to the transformer through a switch (relay). In the mains mode, when
input AC is present and is within valid range, the switch is closed and the input AC directly goes to the
output load. The same AC is fed to transformer, and the H-bridge consisting of MOSFETs or IGBTs are
driven through microcontroller or DSP to charge the battery. A bridge less rectification principle is used to
charge the battery by boosting the voltage produced in the transformer primary using the inductance of the
winding, by switching the lower MOSFET banks. The lower MOSFET switches are switched and upper
switches kept turned OFF, The body diodes of the upper MOSFETS will act as rectifiers. The pulse width
of the switching pulses of the lower bank is proportional to the output charge current.

4 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA SNVA678B – September 2012 – Revised May 2013
Inverter Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
www.ti.com Introduction

Mains Input

Inverter Section
Power Stage Power Transformer

5 T1 1
C2
Battery Output
Switch
Bank 3 4 Load

DSP Control

Figure 5. Inverter’s Block Diagram

The DC/AC inversion can be achieved using any one of the two following methods.
The method in which the low voltage DC power is inverted, is completed in two steps. The first is the
conversion of the low voltage DC power to a high voltage DC source, and the second step is the
conversion of the high DC source to an AC waveform using pulse width modulation.
Another method to complete the desired outcome would be to first convert the low voltage DC power to
AC, and then use a transformer to boost the voltage to 120/220 volts. The widely used method in the
current residential inverter is the second one . Here if the AC fails or is out of valid range (AC Voltage
Sense is required), the switch between Mains Input and Output Load opens. H-bridge circuit converts
battery DC voltage into AC using high frequency PWM (5 kHz to 15 KHz) thus feeding the same
transformer which is being used for charging in the mains mode. The output of transformer contains a
capacitor which filters it to make 50 Hz AC.

SNVA678B – September 2012 – Revised May 2013 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA 5
Submit Documentation Feedback Inverter
Copyright © 2012–2013, Texas Instruments Incorporated
Introduction www.ti.com

INV O/P

Switch Battery
L 1 T1 5
Input C2
AC N W_Bridge
4 8

BAT+

15
Three Level PWM Signal

D1 D2 10
Q1 Q3
Battery
BT1 5
5 8

T1 0
D3 D4
Q2 4 Q4
1 C1 -5

INV O/P RSENSE -10

-15
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018

Figure 6. Gate Drive Inputs in Inverter Mode

BAT+
OFF PWM PWM OFF

Q1 D1 D2
Q3
Battery
BT1
5 8

T1
D3 D4
Q2 4 Q4
1 C1

INV O/P RSENSE

ON Complementary PWM Complementary PWM ON

Figure 7. Inverter Mode Operation

For the Positive Half of the Sine Wave generation, Q2 is always high ,Q1 is always off , Q3 is applied with
6.4KHz (6.4KHz to 20KHz) PWM corresponding to Positive Half cycle 50Hz sine wave and Q4 is applied
with corresponding complementary (to Q3) PWM . For the Negative Half 50Hz sine wave generation , Q4
is always high , Q3 is always off , Q1 is applied with 6.4KHz PWM corresponding to positive half cycle
50Hz sine wave and Q2 is applied with Q1's complementary PWM .

6 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA SNVA678B – September 2012 – Revised May 2013
Inverter Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
www.ti.com SM72295– Achieving High Integration in Current LF Inverter Design

2 SM72295– Achieving High Integration in Current LF Inverter Design

The SM72295 is a full bridge MOSFET driver with 3A (higher no. of FETs in parallel for high power) peak
current drive capability with
1. Integrated ultra fast 100V boot strap diodes (can easily support up to 5KVA rated inverters)
2. Two high side current sense amplifiers with externally programmable gain and buffered outputs which
can be used for measuring the Battery charge and discharge current – Additional current sense
amplifiers and buffers are not required
3. Programmable over voltage protection – which can be used for Charge complete detection or for driver
shutdown feature in case of a fault condition
4. Can be directly interfaced with a microcontroller
100V Bootstrap Diode

HIA
HIB
LIA
LIB
HBB
VCCB
UVLO
HOB
VDD 3V DRIVER
LEVEL
3V 200k SHIFT
HSB

100V Bootstrap Diode HBA

VCCA

UVLO
HOA
VDD LEVEL DRIVER
VCC SHIFT
3V HSA
50k UVLO
PGOOD
VCCA

VDD 3V
LOB
DRIVER
50k
PGND

OVP
VCCB
3V
OVS LOA
+ DRIVER
VDD 3.3V/5V PGND
-

SIA
SIB

Integrated Current Sensing

Amplifiers SOA
SOB + +
_ _
IIN
IOUT + +
_ _
VDD VDD
CLAMP CLAMP
BOUT BIN
AGND

Figure 8. Block Diagram of SM72295 Gate Driver

SNVA678B – September 2012 – Revised May 2013 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA 7
Submit Documentation Feedback Inverter
Copyright © 2012–2013, Texas Instruments Incorporated
 8
FUSE1
40A 2.1
1mE/2W

Inverter
+ + 1mE/2W CSD18532KCS CSD18532KCS CSD18532KCS CSD18532KCS CSD18532KCS CSD18532KCS
40A
Battery + C5 C4 C3
FUSE2
2.2µF/35V 2200µF/35V 2200µF/35V
Battery +
AP AN Q7 Q6 Q1 Q8 Q9 Q2
R19
220E R31 R29 R30 R39 R36 R37
47E 47E 47E 47E 47E 47E
VCC VDD
VDD VCC R20 1K
C10 0.1µF C11 1µF D5 D6 R32 R38
12V 3.3V 10K 10K

J1
A
1 C12 0.1µF A
Battery + R11 R12
U3 R35 IN4148 R40 IN4148
2 499E 499E HSB
SM72295 10E D1 10E D2
Battery - HSA
17 21 HOA
VDD VCC1 C HOB C
25
VCC2
2
SDA R15 499E
14
1 SIB AN
J2 SIA R18 499E CSD18532KCS CSD18532KCS CSD18532KCS CSD18532KCS CSD18532KCS CSD18532KCS
13
SOB AP
BLI R21 470E 9
1
LIB
BHI R25 470E 26 C14 0.47µF
2 8 Q10 Q11 Q3 Q4
HIB HBA Q12 Q13
3 AHI R26 470E 7 27 R42
HOA HOA R44 R41 R49 R47
HIA 47E R46
28 47E 47E 47E 47E
ALI R22 470E 47E
4 6 HSA HSA
SM72295– Achieving High Integration in Current LF Inverter Design

LIA 24

AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA

LOA LOA
10
PGD R43 R48
H Bridge Switching Waveform Inputs 15 22 10K
LOB LOB 10K
generated by micorontroller OVP
18
R23 1K HSB HSB
4 19
BIN BIN HOB HOB
C15 0.47µF A A
R24 1K 20
11 BOUT HBB
BOUT R45 IN4148 R50 IN4148
10E D3 10E D4
3

Copyright © 2012–2013, Texas Instruments Incorporated

C18 C19 R28 100K
IIN 16 LOB
1000pF 1000pF SD LOA C C
12 OVS
IOUT
R27
5 23 1M
AGND AGND
Shutdown signal from microcontroller

Figure 9. SM72295 in 800VA pure Sine Wave Inverters

All the outputs will be disabled if voltage at
OVS>VDD ie 3.3V in this case
Application Schematic — SM72295 in 800VA Pure Sine Wave Inverters

C22 C23 R34 BIN = Discharging current in inverter mode (Gain = R33/R11)
R33
1000pF 1000pF BOUT = Charging current in mains mode (Gain = R34/R15)
39K 82K
Both the current sense can directly be interfaced to the ADC of microcontroller

SNVA678B – September 2012 – Revised May 2013

www.ti.com

Submit Documentation Feedback

www.ti.com SM72295– Achieving High Integration in Current LF Inverter Design

2.2 Easy Design Guidelines for Integrated Current Sensing

In the Inverter design, the charge current during the Mains mode and discharge current during the inverter
mode is needed to be measured and given to the ADCs of microcontroller or DSP.
In SM72295, Current sensing is provided by two transconductance amplifiers with externally
programmable gain and filtering to remove ripple current to provide average current information to the
control circuit. The current sense amplifiers have buffered outputs available to provide a low impedance
interface to an A/D converter.
VSENSE ISENSE
SIA SOA IN
+
RSENSE
+ Drop Across R
is VSENSE VDD
LOAD CLAMP
R R
+
SIA SOA
Voltage
Source
+

+
Current Through FET
is VSENSE/R
P Channel FET BIN

Current Sense BOUT

IOUT Amplifier
V0 = (VSENSE*R0)/R

+
R0

+
VDD
CLAMP

SIB SOB OUT

Shunt
Discharge Charge

Discharge Charge
RD1 RC1
BPI Current Signal Current Signal
SIA SOB LOAD/
IIN IOUT Charger
SOA SIB
RD2 RC2
RD1 RC1

Gain = RD2/RD1 Gain = RC2/RC1

Figure 10. Integrated Current Sensing Amplifier

SNVA678B – September 2012 – Revised May 2013 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA 9
Submit Documentation Feedback Inverter
Copyright © 2012–2013, Texas Instruments Incorporated
SM72295– Achieving High Integration in Current LF Inverter Design www.ti.com

Hence the charge and the discharge current can easily be measured by giving individual gain to each of
them. The charging current is generally pretty less than the possible Discharging current in 800VA Low
Frequency inverter. The Maximum charging current for 150-165AH battery is close to 15A while the
discharging current can goes upto 60A-70A.

2.2.1 Steps of Current Sense Design

1. Current Sense Resistance is chosen based on Max current and respective power dissipation on
Current Sense resistance. In this Design, two 2W 1 milliohm resistances in parallel were chosen so
that even at 70A Discharge current in Inverter mode, the power dissipation is 2.45W which is much
lesser than allowed 4W(2W each of parallel 1milliohm Resistance).
2. There is VDD (3.3V) clamped at the Current Sense amplifier output and hence the gain should be
maintained in such a way that the output is not clamped in the area of interest. The Discharge current
gain is achieved through R33 / R11 (refer to application Schematic) which comes out to be the gain of
78 in this application. Even at 70A discharge current, the BIN= 2.73V which is lower than VDD clamp.
3. Since the Maximum Charge current in this application is close to 15A, the gain of this section is
maintained higher through R34/R15 ratio.

2.3 Layout Guidelines

The optimum performance of high and low-side gate drivers cannot be achieved without taking due
considerations during circuit board layout. Following points are emphasized.
1. Low ESR / ESL capacitors must be connected close to the IC, between VDD and VSS pins and
between the HB and HS pins to support the high peak currents being drawn from VDD during turn-on
of the external MOSFET.
2. To prevent large voltage transients at the drain of the top MOSFET, a low ESR electrolytic capacitor
must be connected between MOSFET drain and ground (VSS).
3. In order to avoid large negative transients on the switch node (HS pin), the parasitic inductances in the
source of top MOSFET and in the drain of the bottom MOSFET (synchronous rectifier) must be
minimized.
4. Grounding Considerations
(a) The first priority in designing Grounding Consideration is a part in layout Guidelines. connections is
to confine the high peak currents that charge and discharge the MOSFET gate into a minimal
physical area. This will decrease the loop inductance and minimize noise issues on the gate
terminal of the MOSFET. The MOSFETs should be placed as close as possible to the gate driver.
(b) The second high current path includes the Bootstrap capacitor, the Bootstrap diode, the local
ground referenced bypass capacitor and low-side MOSFET body diode. The Bootstrap capacitor is
recharged on a cycle-by-cycle basis through the Bootstrap diode from the ground referenced VDD
bypass capacitor. The recharging occurs in a short time interval and involves high peak current.
Minimizing this loop length and area on the circuit board is important to ensure reliable operation.

10 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA SNVA678B – September 2012 – Revised May 2013
Inverter Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
www.ti.com Test Results in 850VA Pure Sine Wave Inverter Applications

3 Test Results in 850VA Pure Sine Wave Inverter Applications

3.1 Inverter Mode

BAT+
OFF PWM
PWM OFF

Q1 D1 D2
Q3
Battery
BT1
5 8

T1
D3 D4
Q2 4 Q4
1 C1

INV O/P RSENSE

ON Complementary PWM Complementary PWM ON

Channel 1-BLI Channel 2-BHI Channel 3-ALI Channel 4-AHI

Figure 11. Inputs to Gate Driver in Inverter Mode with Load of 700VA

SNVA678B – September 2012 – Revised May 2013 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA 11
Submit Documentation Feedback Inverter
Copyright © 2012–2013, Texas Instruments Incorporated
Test Results in 850VA Pure Sine Wave Inverter Applications www.ti.com

Channel 1-ALI Channel 2-ALO Channel 3-BLI Channel 4-BLO

Figure 12. Signal Integrity from Input to Output Gate Drives in Low Side MOSFETs on 700VA Load in
Inverter Mode.

12 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA SNVA678B – September 2012 – Revised May 2013
Inverter Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
www.ti.com Test Results in 850VA Pure Sine Wave Inverter Applications

Channel 1- Probe Across BHO and BHS

Channel 1- BHO Channel 2-BHS Channel 3- BHI Channel between 1 and 2 ± Maths 1-2 for VGS

Figure 13. Signal Integrity from Input to Output Gate Drives in High Side MOSFETs on 700VA Load in
Inverter Mode

3.2 Charger Mode/Mains Mode

1. During Mains mode, the same transformer which is used in DC/AC inversion by boosting battery
voltage to line voltage in inverter mode, is connected to the mains power using a relay. A bridge less
rectification principle is used to charge the battery by boosting the voltage produced in the transformer
primary using the inductance of the winding, by switching the lower MOSFET banks..
2. The lower MOSFET switches are switched and upper switches kept turned OFF, The body diodes of
the upper MOSFETS will act as rectifiers. The pulse width of the switching pulses of the lower bank is
proportional to the output charge current.

SNVA678B – September 2012 – Revised May 2013 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA 13
Submit Documentation Feedback Inverter
Copyright © 2012–2013, Texas Instruments Incorporated
Test Results in 850VA Pure Sine Wave Inverter Applications www.ti.com

Channel 1 ± BLI Channel 2-BHI Channel 3-ALI Channel 4-AHI

Figure 14. Inputs to Gate Driver in Mains Mode With AC Mains Input of 220V

Channel 1-BLI Chanel 2-BLO Channel 3-ALI Channel 4-ALO

Figure 15. Signal Integrity from Input to Output Gate Drives in Low Side MOSFETs in 220V AC Mains
Mode.

14 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA SNVA678B – September 2012 – Revised May 2013
Inverter Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
www.ti.com Test Results in 850VA Pure Sine Wave Inverter Applications

Figure 16. Signal Integrity from Input to Output Gate Drives in High Side MOSFETs in 220V AC Mains
Mode.

SNVA678B – September 2012 – Revised May 2013 AN-2296 SM72295: Highly Integrated Gate Driver for 800VA to 3KVA 15
Submit Documentation Feedback Inverter
Copyright © 2012–2013, Texas Instruments Incorporated
 IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products Applications
Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications
Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers
DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps
DSP dsp.ti.com Energy and Lighting www.ti.com/energy
Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Security www.ti.com/security
Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com
OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com
Wireless Connectivity www.ti.com/wirelessconnectivity

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2014, Texas Instruments Incorporated