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1FEATURES
• Operation From −40°C to 125°C • Typical Temperature Drift (TL431B)
• Reference Voltage Tolerance at 25°C – 6 mV (C Temp)
– 0.5% . . . B Grade – 14 mV (I Temp, Q Temp)
– 1%. . . A Grade • Low Output Noise
– 2% . . . Standard Grade • 0.2-Ω Typical Output Impedance
• Sink-Current Capability . . . 1 mA to 100 mA
• Adjustable Output Voltage . . . Vref to 36 V
TL431, TL431A, TL431B . . . D (SOIC) PACKAGE TL431, TL431A, TL431B . . . P (PDIP), PS (SOP),
(TOP VIEW) OR PW (TSSOP) PACKAGE
(TOP VIEW)
CATHODE 1 8 REF
ANODE 2 7 ANODE CATHODE 1 8 REF
ANODE 3 6 ANODE NC 2 7 NC
NC 4 5 NC NC 3 6 ANODE
NC 4 5 NC
NC − No internal connection
NC − No internal connection
TL431, TL431A, TL431B . . . PK (SOT-89) PACKAGE TL432, TL432A, TL432B . . . PK (SOT-89) PACKAGE
(TOP VIEW) (TOP VIEW)
CATHODE REF
ANODE
ANODE
ANODE ANODE
REF CATHODE
TL431, TL431A, TL431B . . . DBZ (SOT-23-3) PACKAGE TL432, TL432A, TL432B . . . DBZ (SOT-23-3) PACKAGE
(TOP VIEW) (TOP VIEW)
CATHODE 1 REF 1
3 ANODE 3 ANODE
REF 2 CATHODE 2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 2004–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TL431, TL431A, TL431B
TL432, TL432A, TL432B
SLVS543L – AUGUST 2004 – REVISED FEBRUARY 2011 www.ti.com
TL431, TL431A, TL431B . . . LP (TO-92/TO-226) PACKAGE TL431A, TL431B . . . DCK (SC-70) PACKAGE
(TOP VIEW) (TOP VIEW)
ANODE CATHODE
ANODE
REF
DESCRIPTION/ORDERING INFORMATION
The TL431 and TL432 are three-terminal adjustable shunt regulators, with specified thermal stability over
applicable automotive, commercial, and military temperature ranges. The output voltage can be set to any value
between Vref (approximately 2.5 V) and 36 V, with two external resistors (see Figure 17). These devices have a
typical output impedance of 0.2 Ω. Active output circuitry provides a very sharp turn-on characteristic, making
these devices excellent replacements for Zener diodes in many applications, such as onboard regulation,
adjustable power supplies, and switching power supplies. The TL432 has exactly the same functionality and
electrical specifications as the TL431, but has different pinouts for the DBV, DBZ, and PK packages.
Both the TL431 and TL432 devices are offered in three grades, with initial tolerances (at 25°C) of 0.5%, 1%, and
2%, for the B, A, and standard grade, respectively. In addition, low output drift vs temperature ensures good
stability over the entire temperature range.
The TL43xxC devices are characterized for operation from 0°C to 70°C, the TL43xxI devices are characterized
for operation from –40°C to 85°C, and the TL43xxQ devices are characterized for operation from –40°C to
125°C.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DBV/DBZ/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DBV/DBZ/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DBV/DBZ/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
SYMBOL
REF
ANODE CATHODE
REF +
_
Vref
ANODE
EQUIVALENT SCHEMATIC
CATHODE
800 Ω 800 Ω
20 pF
REF
150 Ω
3.28 kΩ 4 kΩ 10 kΩ
2.4 kΩ 7.2 kΩ 20 pF
1 kΩ
800 Ω
ANODE
NOTE: All component values are nominal.
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to ANODE, unless otherwise noted.
(1) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
ELECTRICAL CHARACTERISTICS
over recommended operating conditions, TA = 25°C (unless otherwise noted)
TL431C, TL432C
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage Figure 1 VKA = Vref, IKA = 10 mA 2440 2495 2550 mV
Deviation of reference input SOT23-3 and TL432
VKA = Vref, 6 16
VI(dev) voltage over full temperature Figure 1 devices mV
IKA = 10 mA,
range (1) All other devices 4 25
Ratio of change in reference ΔVKA = 10 V − Vref -1.4 -2.7
ΔVref /
voltage to the change in Figure 2 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V − 10 V -1 -2
cathode voltage
Iref Reference input current Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 2 4 µA
Deviation of reference input
II(dev) current over full temperature Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 0.4 1.2 µA
range (1)
Minimum cathode current for
Imin Figure 1 VKA = Vref 0.4 1 mA
regulation
Ioff Off-state cathode current Figure 3 VKA = 36 V, Vref = 0 0.1 1 µA
(2)
|zKA| Dynamic impedance Figure 1 VKA = Vref, f ≤ 1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
∆VKA
|zKA| =
(2) The dynamic impedance is defined as: ∆IKA
|z'| = ∆V
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: ∆I
ELECTRICAL CHARACTERISTICS
over recommended operating conditions, TA = 25°C (unless otherwise noted)
TL431I, TL432I
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage Figure 1 VKA = Vref, IKA = 10 mA 2440 2495 2550 mV
Deviation of reference input SOT23-3 and TL432
VKA = Vref, 14 34
VI(dev) voltage over full temperature Figure 1 devices mV
IKA = 10 mA
range (1) All other devices 5 50
Ratio of change in reference ΔVKA = 10 V − Vref -1.4 -2.7
ΔVref /
voltage to the change in Figure 2 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V − 10 V -1 -2
cathode voltage
Iref Reference input current Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 2 4 µA
Deviation of reference input
II(dev) current over full temperature Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 0.8 2.5 µA
range (1)
Minimum cathode current for
Imin Figure 1 VKA = Vref 0.4 1 mA
regulation
Ioff Off-state cathode current Figure 3 VKA = 36 V, Vref = 0 0.1 1 µA
(2)
|zKA| Dynamic impedance Figure 1 VKA = Vref, f ≤ 1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
∆VKA
|zKA| =
(2) The dynamic impedance is defined as: ∆IKA
|z'| = ∆V
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: ∆I
ELECTRICAL CHARACTERISTICS
over recommended operating conditions, TA = 25°C (unless otherwise noted)
TL431Q, TL432Q
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage Figure 1 VKA = Vref, IKA = 10 mA 2440 2495 2550 mV
Deviation of reference input
VI(dev) voltage over full temperature Figure 1 VKA = Vref, IKA = 10 mA 14 34 mV
range (1)
Ratio of change in reference ΔVKA = 10 V − Vref -1.4 -2.7
ΔVref /
voltage to the change in Figure 2 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V − 10 V -1 -2
cathode voltage
Iref Reference input current Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 2 4 µA
Deviation of reference input
II(dev) current over full temperature Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 0.8 2.5 µA
range (1)
Minimum cathode current for
Imin Figure 1 VKA = Vref 0.4 1 mA
regulation
Ioff Off-state cathode current Figure 3 VKA = 36 V, Vref = 0 0.1 1 µA
(2)
|zKA| Dynamic impedance Figure 1 VKA = Vref, f ≤ 1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
∆VKA
|zKA| =
(2) The dynamic impedance is defined as: ∆IKA
|z'| = ∆V
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: ∆I
ELECTRICAL CHARACTERISTICS
over recommended operating conditions, TA = 25°C (unless otherwise noted)
TL431AC, TL432AC
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage Figure 1 VKA = Vref, IKA = 10 mA 2470 2495 2520 mV
Deviation of reference input SOT23-3 and TL432
VKA = Vref, 6 16
VI(dev) voltage over full temperature Figure 1 devices mV
IKA = 10 mA
range (1) All other devices 4 25
Ratio of change in reference ΔVKA = 10 V − Vref -1.4 -2.7
ΔVref /
voltage to the change in Figure 2 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V − 10 V -1 -2
cathode voltage
Iref Reference input current Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 2 4 µA
Deviation of reference input
II(dev) current over full temperature Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 0.8 1.2 µA
range (1)
Minimum cathode current for
Imin Figure 1 VKA = Vref 0.4 0.6 mA
regulation
Ioff Off-state cathode current Figure 3 VKA = 36 V, Vref = 0 0.1 0.5 µA
(2)
|zKA| Dynamic impedance Figure 1 VKA = Vref, f ≤ 1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
∆VKA
|zKA| =
(2) The dynamic impedance is defined as: ∆IKA
|z'| = ∆V
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: ∆I
ELECTRICAL CHARACTERISTICS
over recommended operating conditions, TA = 25°C (unless otherwise noted)
TL431AI, TL432AI
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage Figure 1 VKA = Vref, IKA = 10 mA 2470 2495 2520 mV
Deviation of reference input SOT23-3 and TL432
VKA = Vref, 14 34
VI(dev) voltage over full temperature Figure 1 devices mV
IKA = 10 mA
range (1) All other devices 5 50
Ratio of change in reference ΔVKA = 10 V − Vref -1.4 -2.7
ΔVref /
voltage to the change in Figure 2 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V − 10 V -1 -2
cathode voltage
Iref Reference input current Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 2 4 µA
Deviation of reference input
II(dev) current over full temperature Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 0.8 2.5 µA
range (1)
Minimum cathode current for
Imin Figure 1 VKA = Vref 0.4 0.7 mA
regulation
Ioff Off-state cathode current Figure 3 VKA = 36 V, Vref = 0 0.1 0.5 µA
(2)
|zKA| Dynamic impedance Figure 1 VKA = Vref, f ≤ 1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
∆VKA
|zKA| =
(2) The dynamic impedance is defined as: ∆IKA
|z'| = ∆V
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: ∆I
ELECTRICAL CHARACTERISTICS
over recommended operating conditions, TA = 25°C (unless otherwise noted)
TL431AQ, TL432AQ
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage Figure 1 VKA = Vref, IKA = 10 mA 2470 2495 2520 mV
Deviation of reference input
VI(dev) voltage over full temperature Figure 1 VKA = Vref, IKA = 10 mA 14 34 mV
range (1)
Ratio of change in reference ΔVKA = 10 V − Vref -1.4 -2.7
ΔVref /
voltage to the change in Figure 2 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V − 10 V -1 -2
cathode voltage
Iref Reference input current Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 2 4 µA
Deviation of reference input
II(dev) current over full temperature Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 0.8 2.5 µA
range (1)
Minimum cathode current for
Imin Figure 1 VKA = Vref 0.4 0.7 mA
regulation
Ioff Off-state cathode current Figure 3 VKA = 36 V, Vref = 0 0.1 0.5 µA
(2)
|zKA| Dynamic impedance Figure 1 VKA = Vref, f ≤ 1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
∆VKA
|zKA| =
(2) The dynamic impedance is defined as: ∆IKA
|z'| = ∆V
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: ∆I
ELECTRICAL CHARACTERISTICS
over recommended operating conditions, TA = 25°C (unless otherwise noted)
TL431BC, TL432BC
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage Figure 1 VKA = Vref, IKA = 10 mA 2483 2495 2507 mV
Deviation of reference input
VI(dev) voltage over full temperature Figure 1 VKA = Vref, IKA = 10 mA 6 16 mV
range (1)
Ratio of change in reference ΔVKA = 10 V − Vref -1.4 -2.7
ΔVref /
voltage to the change in Figure 2 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V − 10 V -1 -2
cathode voltage
Iref Reference input current Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 2 4 µA
Deviation of reference input
II(dev) current over full temperature Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 0.8 1.2 µA
range (1)
Minimum cathode current for
Imin Figure 1 VKA = Vref 0.4 0.6 mA
regulation
Ioff Off-state cathode current Figure 3 VKA = 36 V, Vref = 0 0.1 0.5 µA
(2)
|zKA| Dynamic impedance Figure 1 VKA = Vref, f ≤ 1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
∆VKA
|zKA| =
(2) The dynamic impedance is defined as: ∆IKA
|z'| = ∆V
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: ∆I
ELECTRICAL CHARACTERISTICS
over recommended operating conditions, TA = 25°C (unless otherwise noted)
TL431BI, TL432BI
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage Figure 1 VKA = Vref, IKA = 10 mA 2483 2495 2507 mV
Deviation of reference input
VI(dev) voltage over full temperature Figure 1 VKA = Vref, IKA = 10 mA 14 34 mV
range (1)
Ratio of change in reference ΔVKA = 10 V − Vref -1.4 -2.7
ΔVref /
voltage to the change in Figure 2 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V − 10 V -1 -2
cathode voltage
Iref Reference input current Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 2 4 µA
Deviation of reference input
II(dev) current over full temperature Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 0.8 2.5 µA
range (1)
Minimum cathode current for
Imin Figure 1 VKA = Vref 0.4 0.7 mA
regulation
Ioff Off-state cathode current Figure 3 VKA = 36 V, Vref = 0 0.1 0.5 µA
(2)
|zKA| Dynamic impedance Figure 1 VKA = Vref, f ≤ 1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
∆VKA
|zKA| =
(2) The dynamic impedance is defined as: ∆IKA
|z'| = ∆V
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: ∆I
ELECTRICAL CHARACTERISTICS
over recommended operating conditions, TA = 25°C (unless otherwise noted)
TL431BQ, TL432BQ
PARAMETER TEST CIRCUIT TEST CONDITIONS UNIT
MIN TYP MAX
Vref Reference voltage Figure 1 VKA = Vref, IKA = 10 mA 2483 2495 2507 mV
Deviation of reference input
VI(dev) voltage over full temperature Figure 1 VKA = Vref, IKA = 10 mA 14 34 mV
range (1)
Ratio of change in reference ΔVKA = 10 V − Vref -1.4 -2.7
ΔVref /
voltage to the change in Figure 2 IKA = 10 mA mV/V
ΔVKA ΔVKA = 36 V − 10 V -1 -2
cathode voltage
Iref Reference input current Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 2 4 µA
Deviation of reference input
II(dev) current over full temperature Figure 2 IKA = 10 mA, R1 = 10 kΩ, R2 = ∞ 0.8 2.5 µA
range (1)
Minimum cathode current for
Imin Figure 1 VKA = Vref 0.4 0.7 mA
regulation
Ioff Off-state cathode current Figure 3 VKA = 36 V, Vref = 0 0.1 0.5 µA
(2)
|zKA| Dynamic impedance Figure 1 VKA = Vref, f ≤ 1 kHz, IKA = 1 mA to 100 mA 0.2 0.5 Ω
(1) The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage αVref is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the lower temperature.
∆VKA
|zKA| =
(2) The dynamic impedance is defined as: ∆IKA
|z'| = ∆V
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: ∆I
Vref
Input VKA
IKA
R1 Iref
R2 Vref æ R1 ö
VKA = Vref ç 1 + ÷ + Iref × R1
è R2 ø
Input VKA
Ioff
TYPICAL CHARACTERISTICS
Data at high and low temperatures are applicable only within the recommended operating free-air temperature
ranges of the various devices.
2520 3
Vref = 2495 mV
2500
2480 2
2460
2420
2400 0
−75 −50 −25 0 25 50 75 100 125 −75 −50 −25 0 25 50 75 100 125
TA − Free-Air Temperature − °C TA − Free-Air Temperature − °C
Figure 4. Figure 5.
100 600
I KA − Cathode Current − µ A
I KA − Cathode Current − mA
75 Imin
50 400
25
0 200
−25
−50 0
−75
−100 −200
−2 −1 0 1 2 3 −1 0 1 2 3
VKA − Cathode Voltage − V VKA − Cathode Voltage − V
Figure 6. Figure 7.
2
− 0.95
∆V ref / ∆V KA − mV/V
1.5 −1.05
−1.15
1
−1.25
0.5
−1.35
0
−75 −50 −25 0 25 50 75 100 125 −1.45
TA − Free-Air Temperature − °C −75 −50 −25 0 25 50 75 100 125
TA − Free-Air Temperature − °C
Figure 8. Figure 9.
240 TA = 25°C
Vn − Equivalent Input Noise V oltage − nV/
220
200
180
160
140
120
100
10 100 1k 10 k 100 k
f − Frequency − Hz
Figure 10.
0
−1
−2
−3
−4 f = 0.1 to 10 Hz
IKA = 10 mA
−5
TA = 25°C
−6
0 1 2 3 4 5 6 7 8 9 10
t − Time − s
19.1 V
1 kΩ
500 µF 910 Ω
2000 µF
VCC VCC
1 µF
TL431
(DUT) TLE2027
AV = 10 V/mV
+ 22 µF
820 Ω + TLE2027 To
− 16 kΩ 16 kΩ Oscilloscope
16 Ω −
160 kΩ 1 µF 33 kΩ
0.1 µF AV = 2 V/V
33 kΩ
VEE VEE
Figure 11.
TA = 25°C
50 Output
IKA
15 kΩ 232 Ω
40
9 µF
+
30
−
8.25 kΩ
20 GND
0
1k 10 k 100 k 1M 10 M
f − Frequency − Hz
Figure 12.
REFERENCE IMPEDANCE
vs
FREQUENCY
100
IKA = 10 mA
TA = 25°C
|z KA| − Reference Impedance − Ω
1 kΩ
Output
10 IKA
50 Ω
−
+
GND
1
0.1
1k 10 k 100 k 1M 10 M
f − Frequency − Hz
Figure 13.
PULSE RESPONSE
6
TA = 25°C
Input
5
220 Ω
Input and Output V oltage − V
Output
4
Pulse
Generator 50 Ω
3 f = 100 kHz
Output
GND
2
0
−1 0 1 2 3 4 5 6 7
t − Time − µs
Figure 14.
70
Stable
60 TEST CIRCUIT FOR CURVE A
Stable C
50
A
40 IKA
R1 = 10 kΩ 150 Ω
30
D
CL
20
+
10 R2 VBATT
−
0
0.001 0.01 0.1 1 10
CL − Load Capacitance − µF
TEST CIRCUIT FOR CURVES B, C, AND D
A. The areas under the curves represent conditions that may cause the device to oscillate. For curves B, C, and D, R2 and V+ are adjusted
to establish the initial VKA and IKA conditions, with CL = 0. VBATT and CL then are adjusted to determine the ranges of stability.
Figure 15.
150 Ω
STABILITY BOUNDARY CONDITIONS
FOR ALL TL431B, TL432, SOT-23, SC-70, AND Q-TEMP DEVICES IKA
100 +
A VKA = Vref
B V KA =5V CL VBATT
90
C VKA = 10 V −
80 D VKA = 15 Vf
B
I KA − Cathode Current − mA
70
TA = 25°C
60 TEST CIRCUIT FOR CURVE A
Stable C
Stable
50
A
40 IKA
A
R1 = 10 kΩ 150 Ω
30
D
20 CL
B +
10 R2 VBATT
−
0
0.001 0.01 0.1 1 10
CL − Load Capacitance − µF
TEST CIRCUIT FOR CURVES B, C, AND D
A. The areas under the curves represent conditions that may cause the device to oscillate. For curves B, C, and D, R2 and V+ are adjusted
to establish the initial VKA and IKA conditions, with CL = 0. VBATT and CL then are adjusted to determine the ranges of stability.
Figure 16.
APPLICATION INFORMATION
R
(see Note A)
VI(BATT) VO
R1 æ R1 ö
VO = ç 1 + ÷ Vref
0.1% è R2 ø
Vref TL431
R2
0.1%
RETURN
A. R should provide cathode current ≥1 mA to the TL431 at minimum V(BATT).
VI(BATT)
VO
TL431
Von ≈2 V
Input Voff ≈VI(BATT)
VIT ≈ 2.5 V
GND
VI(BATT)
R
(see Note A) 2N222
2N222
30 Ω
0.01 µF 4.7 kΩ
TL431 VO
R1
R2 æ R1 ö
0.1% VO = ç 1 +
0.1% ÷ Vref
è R2 ø
VI(BATT)
IN
OUT
uA7805 VO
Common R1
(
VO = 1 + R1 Vref (
R2
TL431 Minimum V V + 5V
O = ref
R2
VI(BATT) VO
R1 (
VO = 1 + R1 Vref (
R2
R2 TL431
VI(BATT) VO
R1
TL431
C
(see Note A)
R2
A. Refer to the stability boundary conditions in Figure 15 and Figure 16 to determine allowable values for C.
IN OUT
VI(BATT) LM317 VO ≈5 V, 1.5 A
8.2 kΩ Adjust
243 Ω
0.1%
TL431
243 Ω
0.1%
VI(BATT) VO ≈5 V
Rb
(see Note A) 27.4 kΩ
0.1%
TL431
27.4 kΩ
0.1%
12 V
VCC
6.8 kΩ
5V 10 kΩ
−
10 kΩ
+
0.1% TL598
X
TL431 Not
10 kΩ Used
0.1%
Feedback
R3
(see Note A)
VI(BATT)
R4
R1A R1B
(see Note A)
Low Limit = 1 + R1B V ref
R2B
TL431
High Limit = 1 + R1A V ref
R2A
LED on When Low Limit < VI(BATT) < High Limit
R2A R2B
A. Select R3 and R4 to provide the desired LED intensity and cathode current ≥1 mA to the TL431 at the available
VI(BATT).
650 Ω
12 V
R 2 kΩ
TL431
C æ 12 V ö
On Delay = R × C × In çç ÷÷
Off 12 V – Vref
è ø
RCL IO
0.1% V ref
VI(BATT) Iout = + IKA
R CL
R1 V I(BATT)
TL431 R1 = I
O
h FE + IKA
VI(BATT)
IO
Vref
IO =
RS
TL431
RS
0.1%
REVISION HISTORY
• Deleted TA values under TEST CONDITIONS for VI(dev) and II(dev) PARAMTERS in the ELECTRICAL
CHRACTERISTICS table. ................................................................................................................................................... 11
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PACKAGING INFORMATION
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(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Addendum-Page 18
PACKAGE OPTION ADDENDUM
www.ti.com 20-Aug-2011
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 19
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Apr-2012
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Apr-2012
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
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Pack Materials-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Apr-2012
Pack Materials-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Apr-2012
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL431ACPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431ACPSR SO PS 8 2000 346.0 346.0 33.0
TL431ACPWR TSSOP PW 8 2000 346.0 346.0 29.0
TL431AIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431AIDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431AIDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL431AIDBZR SOT-23 DBZ 3 3000 202.0 201.0 28.0
TL431AIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL431AIDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
TL431AIDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431AIDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431AIDR SOIC D 8 2500 340.5 338.1 20.6
TL431AIPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431AQDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431AQDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431AQDBZR SOT-23 DBZ 3 3000 202.0 201.0 28.0
TL431AQDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL431AQDBZT SOT-23 DBZ 3 250 203.0 203.0 35.0
TL431AQDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431AQDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431BCDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431BCDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431BCDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL431BCDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL431BCDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
TL431BCDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431BCDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431BCDR SOIC D 8 2500 340.5 338.1 20.6
TL431BCPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431BCPSR SO PS 8 2000 346.0 346.0 33.0
TL431BCPWR TSSOP PW 8 2000 346.0 346.0 29.0
TL431BIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431BIDBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TL431BIDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431BIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL431BIDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
TL431BIDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431BIDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431BIDR SOIC D 8 2500 340.5 338.1 20.6
TL431BIPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431BQDBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TL431BQDBVT SOT-23 DBV 5 250 203.0 203.0 35.0
TL431BQDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL431BQDBZT SOT-23 DBZ 3 250 203.0 203.0 35.0
Pack Materials-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Apr-2012
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL431BQDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431BQDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431BQDR SOIC D 8 2500 340.5 338.1 20.6
TL431CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431CDBZR SOT-23 DBZ 3 3000 202.0 201.0 28.0
TL431CDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL431CDBZT SOT-23 DBZ 3 250 203.0 203.0 35.0
TL431CDR SOIC D 8 2500 340.5 338.1 20.6
TL431CPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431CPSR SO PS 8 2000 346.0 346.0 33.0
TL431CPWR TSSOP PW 8 2000 346.0 346.0 29.0
TL431IDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431IDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431IDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL431IDBZR SOT-23 DBZ 3 3000 202.0 201.0 28.0
TL431IDBZT SOT-23 DBZ 3 250 203.0 203.0 35.0
TL431IDR SOIC D 8 2500 340.5 338.1 20.6
TL431IPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL431QDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL431QDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TL431QDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL431QDBZT SOT-23 DBZ 3 250 203.0 203.0 35.0
TL431QDCKR SC70 DCK 6 3000 203.0 203.0 35.0
TL431QDCKT SC70 DCK 6 250 203.0 203.0 35.0
TL431QDR SOIC D 8 2500 340.5 338.1 20.6
TL432ACDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL432ACDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL432ACDBZT SOT-23 DBZ 3 250 203.0 203.0 35.0
TL432AIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL432AIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL432AIDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL432AIDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
TL432AIPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432AQDBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TL432AQDBVT SOT-23 DBV 5 250 203.0 203.0 35.0
TL432AQDBZR SOT-23 DBZ 3 3000 202.0 201.0 28.0
TL432AQDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL432AQDBZT SOT-23 DBZ 3 250 203.0 203.0 35.0
TL432AQPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432BCDBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TL432BCDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL432BCDBZT SOT-23 DBZ 3 250 203.0 203.0 35.0
TL432BCPK SOT-89 PK 3 1000 340.0 340.0 38.0
Pack Materials-Page 6
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Apr-2012
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL432BIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL432BIDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL432BIDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
TL432BIPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432BQDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
TL432BQPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL432CDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL432CDBZT SOT-23 DBZ 3 250 203.0 203.0 35.0
TL432CPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432IDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TL432IDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL432IDBZT SOT-23 DBZ 3 250 203.0 203.0 35.0
TL432IPK SOT-89 PK 3 1000 340.0 340.0 38.0
TL432QDBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TL432QDBZR SOT-23 DBZ 3 3000 203.0 203.0 35.0
TL432QPK SOT-89 PK 3 1000 340.0 340.0 38.0
Pack Materials-Page 7
MECHANICAL DATA
0.400 (10,16)
0.355 (9,00)
8 5
0.280 (7,11)
0.245 (6,22)
1 4
0.065 (1,65)
0.045 (1,14)
0.023 (0,58)
0°–15°
0.015 (0,38)
0.100 (2,54) 0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
0.080 (2,03)
0.243 (6,17)
0.070 (1,78)
0.233 (5,91)
0.228 (5,79) 0.050 (1,27)
0.218 (5,54) 0.040 (1,02)
Thermal Tab
0.215 (5,46) (See Note C)
0.287 (7,29)
NOM 0.247 (6,27) 0.277 (7,03)
0.237 (6,02)
0.381 (9,68)
0.371 (9,42)
0.100 (2,54)
0.090 (2,29)
0.032 (0,81) MAX
Seating Plane
0.090 (2,29) 0.004 (0,10)
0.031 (0,79) 0.005 (0,13)
0.025 (0,63) 0.001 (0,02)
0.180 (4,57)
0.010 (0,25) M
0.047 (1,19)
0.010 (0,25) NOM
0.037 (0,94)
Gage Plane
0.010 (0,25)
2°–ā6°
4073388/M 01/02
0.210 (5,34)
0.170 (4,32)
Seating
Plane
0.157 (4,00) MAX
0.050 (1,27)
C
0.105 (2,67)
0.095 (2,41)
0.055 (1,40)
0.045 (1,14)
1 2 3
0.539 (13,70)
0.460 (11,70)
1.260 (32,00)
0.905 (23,00)
0.650 (16,50)
0.020 (0,50) MIN
0.610 (15,50) 0.098 (2,50)
0.384 (9,75)
0.335 (8,50)
0.114 (2,90)
0.094 (2,40)
0.114 (2,90) 0.169 (4,30)
DIA
0.094 (2,40) 0.146 (3,70)
0.266 (6,75)
0.234 (5,95)
0.512 (13,00)
0.488 (12,40)
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