FA 12.
4: An Inherently Linear and Compact MOST-Only Current-Division Technique
Klaas Bult and Govert Geelen
Philips Research Laboratories,Eindhoven, The Netherlands
A technique for dividing currents (or voltages) accurately and
linearly is useful for analog signal processing such a s control-
lable attenuation, A to D and D to A conversion. A common
technique is to use resistors or capacitors for the linear
accurate division of current (or voltage) while using MOS-
transistors as switches or amplifying elements [ 1,2 I. In this
paper a technique is presented that uses the same MOS
transistors for both division and switching functions, elimi-
nating resistors or capacitors. Although an MOS-transistor
exhibits a non-linear relation between current and voltage
(even in the linear r e s o n ) it is shown here that the current
division is inherently linear.
The basic principle ofthis current division technique is shown
in Figure 1. Both transistors have the same gate voltage (with
respect to the substrate). Voltages V', and V,, are dc voltages
but may have any value as long as the transistors are on. A
current Ilnflowing into or out of the circuit is divided into two
parts, one part flowing into the node connected t o V,l and the
other flowing into the node connected to V,,. The fraction of
this input current flowing to one side is; constant and inde-
pendent of 1," (implying low distortion), independent of the
values ofVa and V,, independent of whether or not one or both
devices are saturated, and independent of whether one or
both devices operate in strong or weak inversion. To prove
this, use a n expression for the drain current a s a function of
the terminal voltages valid in all operating regions 131:
1, = -(W/L)vs/ Vdp(V~,V~)Q(Vg,V~)dV~, (1)
where the mobility p and the channel charge per unit area
Q are a function of the gate voltage Vi: and the local
channel voltage Vc, Both p(VgVc)and Q(VK,Vc) can be quite
complicated functions including secondary effects such as
mobility reduction and body-effect. With
F(Vg,VX) e a / ""p(Vg,V~)Q(Vg,V~)dV~( 2 )
being the primitive function, the drain-current I, may be
written as: I, = (W/L)(F(Vp,Vb) - (Vs,V,)I (3)
which emphasizes the symmetry of the MOS device.
Applying Equation 3 to transistors M1 and M2 gives:
I,, = (W,/L,)lF(Vg,Va)- F(Vg,Vm)I, (4)
I,, = (W&,)lF(Vg,V,,,) - F(Vg,V,)I. (5)
If an input current is applied (Figure 11,the voltage Vn,at the
input node will be a non-linear function of the input current
Iln:Vm=Vm(IJ. Let V,(O) be the input voltage at zero input
current. With Equations 4 and 5 the change in drain-currents
I,, and I,, when the input current changes from zero to I,ncan
be calculated:
AIdl = ( W ~ L i ) { F ( V g , V ~-~F(Vg,Vn>(0))I
(I,~)) (6)
AI,, = !W,IL,)lF(Vg,Vm(0))- F(Vg,Vnl(I,,l))I (7)
Note that although Vm(I,n) is a non-linear function of I,,,,the
ratio AIdJAIc2= -(W,L,)/(W,LIJ (8)
is independent of I,nand dependent only on the geometry of
the devices. Because: 1," = AI,, - AI,,, (9)
the same holds for and AI,JI,,,. This implies that the
current division is inherently linear and thus insensitive to
second-order effects like mobility reduction and body effect
and valid in all MOS transistor operating regions: strong
inversion, weak inversion, linear and saturation. In fact, the
current division technique is based on the symmetry of a n
MOS device expressed by Equation 3 only.
The above principle is based on the validity of Equation 1 and
on ideal matching between the integrand function of both
devices described by equation 2. Therefore, remaining sec-
ondary effects influencing the current division are channel-
length shortening, drain-induced barrier lowering and mis-
match. The first two are of interest only if the devices are
biased in the saturation regon and in that case can give rise
to some low-level distortion. Mismatch in geometry or oxide
thickness has influence only on the accuracy of the division
and not on distortion. Mismatch in threshold voltage how-
ever, gives rise to distortion. Thus, the best results are
expected when the devices are biased in the linear region,
with a large effective gate-source voltage and a large gate
area.
The volume-control circuit used to prove the viability of the
current-division technique is based on a resistive ladder
configuration comparable to R-2R ladder attenuators. There
is a coarse part with steps of 12aB per section and a fine part
with steps of 2dB per section. The coarse ladder is an R-2R
ladder with two -6dB ladder elements per section, as shown in
Figure 2, resulting in an actual attenuation of 12.04dB and a
characteristic impedance of 2R. The fine part is an W5-4R
ladder (resulting in an actual attenuation of 1.94dB1, with a
characteristic impedance of R. The total circuit architecture
is shown in Figure 3. Each section has a digital control input
which determines whether the signal current is attenuated
and is passed through to the next section or led to the output
directly. A section is turned on and off simply by connecting
the gates of all transistors to the positive or the negative
power supply. If a section is turned on, the signal is attenu-
ated and passed through t o the next section and the remain-
ing signal fraction is drained in the dump-line. If a section is
turned off, a pass-transistor is turned on feeding signal
directly to the output. The entire circuit is build up with a unit
transistor with a geometry of 40pdlOpm.
For interfacing, the circuit has a V-I converter a t the input,
and an I-V converter at the output, as shown in Figure 4. The
opamps were not included on chip. In the feedback-loop ofthe
V-I converter the current division technique is again used as
shown. In this way the linearity oftheV-I and I-V conversion
is determined by the resistors and the gain of the opamp.
Table 1shows the most important measurement results. The
dynamic range in the audio-band (0-20kHz) is 301dB with
respect to a maximum input signal of lVrmq.At lVrm.,THD is
below -80dB over the audio band and below -85dB under
3kHz. As the unity-gain frequency of the opamps is 4.5MHz,
the bandwidth of the circuit is limited to 1.5MHz. Attenua-
tion accuracy is better than 0.15dB up t o -48dB and better
than 0.4dB over the entire attenuation range. Figure 5 shows
the difference between measured and theoretical attenuation
as a function of attenuation. The difference is not entirely
random but is largely from layout imperfections and can be
improved. Figure 6is a micrograph ofthe 0.22mm'chip made
in a standard CMOS process.
References;
[ l ]McCreary, J. L., and P. R. Gray, "All-MOS charge Redistribution
Analog-to-Digital Conversion Techniques Part I", IEEE J. of Solid-
State Circuits, vol. SC-10, no. 6, pp. 371-9, Dec. 1975.
121 Lee, H., D.A.Hodges and P.R.Gray, "A self-calibrating 15 bit
CMOS AID Convertor", IEEE J. ofSolid-State Circuits, vol. SC-19, no.
6, pp 813-819, Dec. 1984.
[31Muller, R. S.,and T. I. Kanlins, "Device Electronics for Integrated
Circuits", Wiley, New York, 1977.
 linear V-l conv.

fm
current division

r ...
linear I-V Conv.

vs

Tr- c
'Ill

vinq I digital control

Figure 4. Input and output circuits.

..&"out

j dump-line

Figure 1. Basic current-divisionprinciple.

F
0.3
"R-2R "R-2R

lin
A
I
section" section"
+
to next
section
z 0.2

i
digital control dump-line

Figure 2. Coarse section with 12dB attenuation.

-0.2 '
0 IO 20 30 40 50 60 70
attenuation [dB]

Figure 5. Absolute attenuation accuracy

vs. attenuation.
a0

Figure 6: See page 281.

I I I I I'
Dynamic range 103dB
dump THD (1V . IkHz) <-85dB
THD (lVz:; 10kHz) <-80dB (limited by opamps)
Attenuation range 0 - 84dB
L Mute attenuation (0-20kHz) >120dB

-t
I Step size 2dB
igital control logic Accuracy (0 - 48dB) 0.125dB
I Accuracy (0 - 84dB) 0.4 dB
I
output Output noise (0-20kHz) 7PVme
Bandwidth 1.5 MHz (limited by opamps)
r 0
I I
Area (without opamps) 0.22mm2
Supply voltage 5.0V
dump
Table 1: Measurement results.

Figure 3. Volume control circuit.