Anti-Series Normally-On SiC JFETs Operating as

Bidirectional Switches

M. Saadeh1,2, Madhu S. Chinthavali1, Burak Ozpineci1, H. A. Mantooth2

Saadeh_mahmood@yahoo.com, Chinthavalim@ornl.gov, Burak@ornl.gov, Mantooth@uark.edu
1 2
Power Electronics and Electric Machinery Research Group Department of Electrical Engineering
Oak Ridge National Laboratory University of Arkansas
Oak Ridge, TN. Fayetteville, AR.

Abstract— Ac-ac matrix converters and cycloconverters require

bi-directional switches, which are typically formed by two anti-
parallel thyristors or a two-switch (IGBT/MOSFETs) two-diode
configuration. As silicon carbide (SiC) and gallium nitride (GaN)
devices become more available, it is possible to have higher

Currernt
voltage FETs with low conduction and switching losses and
reverse conduction capability, which allows the elimination of the
diodes in a bidirectional switch. This paper will investigate a bi-
directional switch formation that is formed by using two
normally-on SiC JFETs in anti-series with no anti-parallel
diodes.
Voltage
Keywords-component; SiC; JFET; Bidirectional; Normall-On; Forward Conduction Reverse Conduction
Anti-Series; Matrix Converter; Cycloconverter Forward Blocking Reverse Blocking
I. INTRODUCTION Figure 1: Four quadrant bidirectional operation.
Many power electronic applications such as the matrix practically they cannot because of the high reverse leakage
converter and cycloconverters require the use of bidirectional current due to the crystal deformations and high-density crystal
switches. For instance a three phase matrix converter is defects caused by the dicing process [3]. The solution is to put
composed of power semiconductor switches connecting each of multiple devices in a modular configuration to create a module
the three input lines to all three output lines. The commutation that performs four-quadrant operation. Traditional bidirectional
scheme insures that only one switch is turned on per line at any switches consist of connecting two bidirectional blocking
given time [1]. Due to the configuration and sinusoidal input- modules in anti-parallel to achieve bidirectional conduction as
output waveforms of the three phase matrix converter the in Fig. 2 [9].
switches need to be able to conduct current in both the forward
and the reverse directions and to block voltages in the forward Variations to those configurations in Fig. 2 (B) and Fig. 2
and reverse direction as well. This is commonly referred to as (C) can be made by removing the midpoint connection. Having
four-quadrant operation. the midpoint connection in the common source configuration
Four-quadrant bidirectional switches are able to conduct
current and block voltages in the forward and reverse
directions. Generic output characteristics of a bidirectional
switch are displayed in Fig. 1. While some semiconductors like
MOSFETs have the ability to conduct current in both directions
they cannot block voltage in both directions and have poor
conduction characteristics in the reverse direction [2]. In theory
IGBTs are capable of bidirectional voltage blocking, but
1
Prepared by the Oak Ridge National Laboratory, Oak Ridge, Tennessee
37831, managed by UT-Battelle for the U.S. Department of Energy.

The submitted manuscript has been authored by a contractor of the U.S.

Government. Accordingly, the U.S. Government retains a non-exclusive,
royalty-free license to publish from the contribution, or allow others to do so,
for U.S. Government purposes. (A) (B) (C)
Figure 2: Traditional Bidirectional switches.
U.S. Government work not protected by U.S. copyright

`
978-1-4799-0336-8/13/$31.00 ©2013 IEEE 2892
 Figure 4: Output characteristics of the devices used.

channel, and the body diode is not used for reverse conduction.
When in conduction mode the devices are kept on without
Figure 3: JFET anti-series bidirectional switch. applying any gate voltage to the devices as they are normally
on devices, and conduction is allowed in both directions
allows the use of one gate driver to control both transistors, and depending on the applied drain-drain voltage. Fig. 4 shows the
allow for better dynamic voltage sharing. While removing the output characteristics of the main channel, and those of the
midpoint connection allows the use of a single isolated power body diode. It can be seen from Fig. 4 that the conduction
supply to power up the control circuitry for all three transistors characteristics of the main channel is drastically better than that
from three different bidirectional switches connected to one of the body diode.
output or input line in a converter. It also allows the control of
Unlike MOSFETs, these devices have bidirectional
each current direction separately, which allows for the
conduction capability with identical forward and reverse
implementation of a wide verity of commutation schemes [4].
conduction characteristics [2]. The improved reverse
The configuration in Fig. 2 (A) is the worst configuration as it
conduction characteristics allows reduced on state losses as the
has the maxim device count and a high voltage drop in
reverse current will be carried by the main channel rather than
conduction mode as there are three devices in series in both the
the body diode. Each device is only capable of forward voltage
forward and reverse conduction paths.
blocking. The anti-series connection gives the ability for the
The investigated bidirectional switching configuration configuration to block voltages in both directions. The devices
employs two normally on SICED SiC JFETs connected in anti- are connected in common source mode allowing for one gate
series with a common source and common gate connections. signal to control both switches, therefore reducing the count of
The manufacturer provides no information about the reverse isolated power supplies needed, cost, losses, and complexity
conduction characteristics of the devices, thus the device was for the bidirectional switch.
investigated under different conditions to determine its
When the bidirectional switch is turned off and the switch
capabilities. A single device was characterized and
is in blocking mode, regardless of the applied drain-drain
investigated, and then the bidirectional configuration was
voltage polarity, one device will have reverse voltage across it,
characterized and investigated. Investigation of the device
while the other device will block the forward voltage across
characteristics proved the reverse conduction characteristics is
overall switch. Even though the body diode is not used for
as good as the forward conduction characteristics when the
reverse conduction current is being carried by the main channel
rather than the body diode. This is the first study to investigate
the characteristics of SiC JFETs in a bidirectional switch from
device prospective. Steady state characteristics, switching
measurements, capacitance measurements, and blocking
voltage polarity reversal studies has been performed on the
single devices and the bidirectional configuration. The studies
performed prove SiC JFETs in the said configuration is the best
candidate for bidirectional switching solutions in their current
and voltage range.
II. OPERATION PRINCIPLE AND ADVANTAGES
In this configuration, two commercially available normally-
on SiC JFETs were used by connecting them in anti-series as in Figure 5: Output characteristics of the anti-series JFET switch
Fig. 3. Forward and reverse currents are carried by the main configuration over temperature.

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 Figure 6: Output characteristics of bidirectional switching
configurations.
conduction, it is of great importance to the configuration as it
ensures that the reverse voltage never exceeds the on-state
voltage of the diode, therefore protecting the JFETs from
reverse voltages exceeding their capability.
SiC JFETs have lower capacitance than SiC MOSFETs [8].
The lower capacitances of JFETs mean faster switching and
less switching losses. Each JFET has its own terminal
capacitances, but having two JFETs connected as mentioned
reduces total overall equivalent drain-drain capacitance of the
configuration. The reduced capacitance of the configuration
reduces switching losses, and reduces the parasitic capacitance
as seen by other switching elements in a full application
configuration such as matrix converters and cycloconverters.
III. STEADY STATE CHARACTERISTICS
The configuration was built using 1kV, 10A Siced SiC
JFETs. The JFETs used were older generation switches and
had an on-state resistance of 270 mΩ. The configuration was
characterized using the Tektronix 371B curve tracer under
different gate conditions and at different temperatures. Unless
the devices are turned off the current is carried by the channel
rather than the body diode. The results in Fig. 5 show identical
forward and reverse conduction characteristics over a wide
range of temperatures.
Figure 6 shows a comparison between the output
characteristics of the anti-series configuration using the SICED
JFETs mentioned above, the anti-series configuration using the
Figure 7: Transfer characteristics of a single JFET.
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Figure 8: Terminal capacitances of the anti-series configuration.
new 1.2 kV 45 mΩ Semisouth SiC JFETs [5], and the
traditional configuration using the SICED JFETs and external
Cree SiC schottky diodes [9]. The SiC diodes used have 80 mΩ
of on-state resistance. From Fig. 6, it is clear that the anti-series
SICED configuration has lower conduction losses than the
traditional configuration up to the intersection point at 5A of
drain current, and the traditional configuration has less
conduction losses beyond 5A of drain current. This is due to
the high on state resistance of the older generation JFETs used.
But when using the new normally on Semisouth SiC JFETS
there is no intersection point and the anti-series configuration
has less conduction losses at all current values. Fig. 7 shows
the transfer characteristics of the single device. The transfer
characteristics of the anti-series configuration are identical as
these devices are voltage controlled devices and the
configuration has a parallel input connection. The gate-source
turn off voltage is -20V.
IV. DEVICE CAPACITANCE
A clear understanding of the device capacitance is vital to
the understanding of the switch dynamics. The device
capacitance affects the gate drive of the switch and its
switching behavior. An HP 4274A Multi-Frequency LCR
Meter was used to measure the capacitances of each switch and
overall bi-directional switch. The anti-series configuration was
treated as a four terminal device and the relevant capacitances
were measured. Capacitance boards were built to isolate the dc
voltage biasing from the LCR meter, protection and to prevent
parasitic capacitances from interfering with the measurements.
The capacitance boards built were adopted from [6]. Fig. 8
shows the input, output, and transfer capacitance of the anti-
series JFET configuration.
Fig. 9 shows the gate-source capacitance of a single JFET
and that of an anti-series JFET configuration. The gate-source
capacitance measurement was done at a zero drain-source and
drain-drain voltage. It is clear that the gate source capacitance
of the anti-series JFETs is higher than that of the single JFET.
Even though the devices are connected in anti-series, they share
a common source connection and a common gate connection,
hence the higher overall gate-source capacitance due to the
parallel input connection.
Fig. 10 shows the drain-source capacitance of a single
JFET, and the drain-drain capacitance of the anti-series JFET.
 the forward blocking JFET resulting in a very low equivalent
drain-drain capacitance [7].
Fig. 11 shows the gate-drain capacitance for the single
JFET and the gate-drain capacitance of a single JFET in the
anti-series configuration. The gate drain capacitance of the
anti-series JFET was measured while maintaining blocking
conditions on the gate and varying the drain-source and drain-
drain voltage respectively.
V. SWITCHING CHARACTERISTICS
An inductive double pulse test was completed for the anti-
series configuration. The devices turn off threshold voltage is -
20 volts. The gates of the switches were controlled by
Figure 9: Gate-source capacitance of the anti-series JFET IXDD614 gate driver. A load of 200 uH was used with a Cree
configuration.
1200V 10A Schottky diode for freewheeling. Switching was
performed at 200V using 3 us pulses. A switching speed of 70
ns was obtained using 10 ohm gate resistance at -25 gate-
source voltage. The double pulse test results are displayed in
Fig. 12. A close up of a turn off switching transition is in Fig.
13.
The switching speed of the anti-series configuration was the
same switching speed as that of the single device. The reason
for that is that when the anti-series configuration is blocking,
only one switch is actually blocking the full dc voltage, and the
other device has a diode’s on state voltage across it as the
devices are only capable of forward blocking. Therefore only

Figure 10: Drain-source capacitance of the anti-series JFET

configuration.

Figure 12: Double pulse switching waveform.

Figure 11: Gate-drain capacitance of the anti-series JFET configuration.

The measurements were taken by applying negative 25 Volts to

the Gate-source terminals to turn the devices off, and the drain-
drain voltage was varied. A typical capacitance voltage profile
is observed for the single device. While a very low drain-drain
capacitance is observed for the anti-series configuration .In the
anti-series configuration, one device (JFET 1) is under forward
blocking conditions while the other device (JFET 2) is subject
to a reverse voltage drop equal to that of its body diode forward
voltage drop. The total capacitance of the anti-series
configuration is equivalent to that of the single device in series
with the forward biased diode capacitance. The forward biased
diode capacitance is the depletion capacitance Cj which is
equivalent to twice that of the zero bias junction capacitance Figure 13: Turn-off switching waveform.
Cjo [7]. The depletion capacitance is much lower than that of

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 other. But the difference in capacitance discussed in the
capacitance section causes one switch to reach the full dc
voltage before the other is completely discharged, resulting in a
shift in the voltage waveform.
What actually happens as the D1-D2 voltage is being
reversed from positive to negative is that the voltage across the
switch initially forward blocking the voltage (JFET 1) will not
discharge all the way down to zero. Instead it will keep some of
the voltage across it and the other switch (JFET 2) will end-up
charging to a higher voltage than the full dc voltage to satisfy
KVL as the polarity is reversed, resulting in a shift in the
voltage waveform. The magnitude of this voltage shift depends
on the slew rate at which the voltage is changing at, which is
mainly dependent on the switching speed of the other switches
Figure 14: Double pulse switching waveform.
in the application. Another factor is the frequency and number
of periods at which the voltage reversal happens as the voltage
shift will change with every switching cycle until it reaches a
steady value. And most importantly it depends on the device
output capacitance characteristics. Initially JFET 1 is blocking
the full dc voltage and JFET 2 has the body diode’s on state
voltage across it. At this initial condition the value of the
capacitance of the two devices will be drastically different as
the capacitance of the JFET 1 will be the devices depletion
capacitance, and the capacitance of JFET 2 will be a forward
biased diode’s junction capacitance which is much lower than
the depletion capacitance as discussed in the device capacitance
section above. This difference in capacitance causes the device
with lower output capacitance to reach the full dc voltage
before the other switch is completely discharged causing it to
keep charging until KVL is satisfied.
Figure 15: Turn-off switching waveform.
A worst case scenario is when the slew rate is so fast that
one device is switching its output voltage per switching
transition.
As discussed in section I, only one device is blocking the
full dc voltage. Therefore even though the gates of both devices
are being switched at each switching transition and both
devices are charging or discharging their gate-source
capacitance. Only one device is charging or discharging its
output capacitance as only one device was blocking the full dc
voltage. Fig. 14 and Fig. 15 show the division of gate current at
turn on and turn off between the two JFETs. In Fig. 14 positive
200 volts were applied to the drain1-drain2 terminals, therefore
only JFET1 was charging and discharging it’s gate-drain
capacitance and was taking more current into the its gate Figure 16: Voltage polarity switching.
terminal. In Fig. 15 negative 200 volts were applied to the
drain1-drain2 terminals, therefore only JFET2 was charging
and discharging it’s gate-drain capacitance and was taking
more current into its gate terminal.
Although only one device will charge or discharge the full
voltage at the turn-on and turn-off transitions, it is not the case
when the blocking voltage polarity is being reversed. This
voltage polarity reversal occurs to a switch in three phase
applications when changing modes involving other switches in
the application [8]. In this scenario the voltage across one
switch output capacitance has to discharge from the full dc
voltage while the voltage across the other switch’s output
capacitance has to charge up to the full dc voltage. For ideal
switches, the reversal of the blocking voltage polarity would Figure 17: Worst case scenario voltage polarity switching.
result in perfect hand-off of the voltage from one switch to the

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JFET 1 won’t have time to discharge, and end up keep 100% of REFERENCES
its voltage causing a constant dc voltage on JFET 1 equal to the
full dc voltage and a voltage shift on JFET 2 equal to the full dc [1] J. W. Kolar, T. Friedli, J. Rodriguez, and P. W. Wheeler, “Review of
voltage. Three-Phase PWM AC-AC Converter Topologies,” IEEE Transactions
on Industrial Electronics, vol. 58, no. 11, pp. 4988 –5006, Nov. 2011.
To demonstrate the voltage polarity reversal operation, a
[2] T. Funaki, M. Matsushita, M. Sasagawa, T. Kimoto, and T. Hikihara, “A
200V square wave was generated using a Powertron 1500A Study on SiC Devices in Synchronous Rectification of DC-DC
amplifier and applied to the drain-drain terminals of the Converter,” in Applied Power Electronics Conference, APEC 2007 -
bidirectional switch while maintaining blocking conditions on Twenty Second Annual IEEE, 2007, pp. 339 –344.
the gate. The blocking voltage polarity switching test was [3] M. Takei, T. Naito, and K. Ueno, “Reverse blocking IGBT for matrix
conducted at different voltage levels, different frequencies, and converter with ultra-thin wafer technology,” Circuits, Devices and
different slew rates. Fig. 17 shows low voltage switching at a Systems, IEE Proceedings -, vol. 151, no. 3, pp. 243 – 247, Jun. 2004.
fast slew rate, and the worst case scenario of full dc voltage [4] P. W. Wheeler, J. Rodriguez, J. C. Clare, L. Empringham, and A.
Weinstein, “Matrix converters: a technology review,” IEEE
shift was observed. Fig. 16 shows high voltage switching at a Transactions on Industrial Electronics, vol. 49, no. 2, pp. 276 –288,
slow slew rate. Table 1 below shows the voltage shift levels at Apr. 2002.
different dc voltages and different frequencies at a low slew [5] “SiC Transistors | Semisouth Laboratories, Inc.” [Online]. Available:
rate. http://semisouth.com/power-semiconductors/sic-transistors. [Accessed:
28-Jun-2012].
TABLE I. VOLTAGE OFFSET VS. FREQUENCY AND DC VOLTAGE LEVEL [6] T. Funaki, N. Phankong, T. Kimoto, and T. Hikihara, “Measuring
Terminal Capacitance and Its Voltage Dependency for High-Voltage
Offset (V) Power Devices,” IEEE Transactions on Power Electronics, vol. 24, no.
Frequency (Hz) Vd1-d2 (V) 6, pp. 1486 –1493, Jun. 2009.
JFET 1 JFET 2
3 1 1000 20 [7] B. J. Baliga, Fundamentals of Power Semiconductor Devices. Springer,
2008.
25 15 1000 100
[8] R. Shillington, P. Gaynor, M. Harrison, and B. Heffernan, “Applications
50 30 1000 200 of silicon carbide JFETs in power converters,” in Universities Power
70 50 1000 250 Engineering Conference (AUPEC), 2010 20th Australasian, pp. 1 –6,
100 60 1000 400 2010.
[9] Benboujema, C.; Schellmanns, A.; Batut, N.; Quoirin, J.B.; Ventura, L.;
18 8 100 100
, "Low losses bidirectional switch for AC mains," Power Electronics
20 10 200 100 and Applications, 2009. EPE '09. 13th European Conference on , vol.,
20 12 400 100 no., pp.1-10, 8-10 Sept. 2009
25 14 800 100 [10] Bland, M.J.; Wheeler, P.W.; Clare, J.C.; Empringham, L.; , "Comparison
of bi-directional switch components for direct AC-AC converters,"
25 16 1000 100 Power Electronics Specialists Conference, 2004. PESC 04. 2004 IEEE
30 18 5000 100 35th Annual , vol.4, no., pp. 2905- 2909 Vol.4, 2004

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