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Neural Network based fast SVM for a Neutral

Clamped Five-Level Inverter


1
G.Durgasukumar,2T.Rama Subba Reddy and 3R.Ramanjan Prasad
123
Electrical Engineering Department, VITS, Desumukhi, Hyderabad
durgasukumar@gmail.com1,trsr72@gmail.com2,prasad243@gmail.com3

Abstract−An artificial neural network based simplified space network-based controller and its performance is compared
vector modulation for five-level inverter has been proposed in with that of conventional DSP-based modulator. Feed-
this paper. The scheme employs a three layer feed forward
forward space vector modulation method for a single-phase
neural network, which receives the command inputs as three
multilevel cascade converter is presented [4].
phase source voltages and generates duty ratios as an outputs. A
An optimized SVM sequence for various operating points
laboratory prototype model of ANN based modulator is
implemented experimental validation using DSP KIT. It under different sampling frequencies to get the reduction of
generates the switching states such that neutral point potential is dominant harmonics has been presented [5].A three-level
balanced unlike conventional SVM method. Because the duty neutral point clamped (NPC) inverter with gating pattern
ratios are generated like two-level SVM technique A THD applied from PWM and carrier-based (CBPWM) have been
comparison is made between the conventional method and presented [6].
neural network method to show its performance.
A relationship between space-vector modulation and
Index Terms: Induction motor drive, space vector modulation
carrier-based pulse-width modulation for multilevel inverter
(SVM), artificial neural network (ANN), five-level inverter.
has presented [7]. In [8], a generalized method of space
vector pulse-width modulation for multilevel inverter has
I.INTRODUCTION
presented. In this, instantaneous reference space vector
Multi-level inverter has emerged as an important
position of a multilevel inverter is not required. A space
topology in the area of high power-high voltage applications
vector modulation allows reduction in the inverter output
due to their good harmonic rejection capability. In high
voltage distortion due to turn-off, turn-on and dead times of
power applications, the switching frequency of the power
power modules, without increasing the harmonic content [9].
device has to be restricted below 1 KHz unlike in
A new 3-D SVM in natural coordinates is applied to
conventional two level due to the increased switching losses
conventional four-leg voltage source converters showing the
and also the level of dc-bus voltage [1].
advantages of using these coordinates [10-11]. A novel three-
SVM is a very popular method for voltage fed inverters
dimensional (3-D) space-vector algorithm for four-leg
due to its improved harmonic quality and better utilization of
multilevel converters is presented. This technique greatly
DC-bus voltage compared to conventional sinusoidal pulse
simplifies the selection of the 3-D region where a given
width modulation technique. The problem with SVM is that it
voltage vector is supposed to be found [12]. The
requires complex and time consuming online computation by
manipulation placement of zero vectors in a cycle and their
a Digital signal processor (DSP). This difficulty can be
share with the goal of minimization of the zero-sequence
resolved by using artificial neural network (ANN).
voltage for a two inverter system has been shown in [13].
A neural network based SVM for two-level and three-level
In this paper, a simple method is adopted for five level
inverters which is operated in under modulation and over
inverter to implement ANN based SVM. In Section II,
modulation regions have been presented [2]. In [3], a neural-
method of SVM for five level inverter is presented. Artificial space-vector diagrams of conventional two-level inverters.
neural network based SVM method is discussed in section III. The space vector diagram five-level inverter and its two level
In section IV, Results and Discussion about ANN SVM by hexagons are shown in Figure. 2. A multi-level space-vector
comparing with conventional SVM method is presented. plane is transformed to the two-level space-vector plane by
Finally in section V concluding remarks are stated. using the two steps.
II.SVM FOR FIVE LEVEL INVERTER 1) From the location of a given reference voltage, one
A. Basic principle hexagon has to be selected.
2) The original reference voltage vector has to be subtracted
S1U S1V S1W
Vdc
by the amount of the center voltage vector of the selected
S2U S2V S2W
hexagon.
Vdc
S3U S3V S3W
Determination of switching sequence and the
S4U S4V S4W
u
calculation of the voltage vector duration time is done as in
v
w
conventional two-level SVPWM method.
S5U S5V S5W
Vdc

S6V S6W
S6U

S7U S7V S7W


Vdc

S8U S8V S8W

(a)

jVq
N2P2N N1P2N2 OP2N2 P1P2N2 P2P2N2

N1P2N OP2N1 P1P 2 N 2 P2P2N1


N 2 P2 N N2P1N N 1 P1 N OP1N2 P2P1N
P1P1N1
P1P2O
OP2O P2P2O
N1P1O OP2N1 P2 P 1 N 1
N2P2O N1P1N P1P1N1 P2ON2
N2P1N N1ON2 P1ON2
N2ON2 OON2
Vref
P1P2P1 P2P2P1
OP2P1 P2P1O
N1P2P1 OP1O P1P1O P2ON1
N1P1O P1ON1
N2P2P1 N 2 P1 O
N2ON1
N1ON1 OON1
ON1N2
P1N1N
P2N 1N 2 Fig. 4 Decomposition of five-level inverter into six two-level hexagons
N2N1N2 P2P2P2 N 1 N1N2
P1P2P2 P2P1P1
N1P2P2
OP2P2 OP1P1
P1P1P1
P1OO P2OO
P2N1N Vd B. Correction of reference voltage vector
N2P2P2
N2P1P1
N1P1P1 N1OO
OOO
N 1N 1N 1  ON1N1 P1N1N
ON2N2
P1N2N
N2OO N 2 N 1N 1 N 1N 2N 2 P2 N 2 N
OP1P2 P1P1P2
N 2N 2N 2 P2P1P2 P2OP1 By the location of a reference voltage vector, one hexagon
N1P1P2 OOP1 P1OP1 P1N1O P2N1O
N1OP1 P2P2N
N2P1P2 N2OP1 N 1N 1O ON1O ON2N1 P1N2N
N 2N 1O
N 2N 2N 1
P1OP2
N 1 N 2N 1 is selected among the six small hexagons that comprise the
OOP2 P2OP2
N1OP2 ON1P1 P1N1P1 P2N1P1
ON1P1 P2N2O
N2OP2 N 2N 1P
N 2N 2O ON2O ON2O P1 N 2 O five-level space-vector diagram. The reference voltage vector
ON1P2 P1N1P2
N 2 N 1 P2
N1N1P2
N2N2P1 N1N2P2 ON2P1
P2N1P2
P1N2P1
P2N2P1 should lie in the inner of the selected hexagon. This
procedure divides the multi-level space-vector diagram into
N 2 N 2 P2 N1N2P2 ON2P2 P1N2P2 P2N2P2
six regions that are covered by each small hexagon. If the
(b) reference voltage vector stays in the regions that are
Fig. 3 Five level diode clamped Inverter circuit diagram and its space
overlapped by adjacent small hexagons, the multi-level
vector diagram
space-vector diagram can have multiple values that are
Fig 3 represents five-level inverter circuit diagram and its
possible. Hexagon is identified by the number of S.
space vector diagram. Each leg is composed of four upper
−𝜋 𝜋
1 if <𝜃<
and lower switches with anti-parallel diodes. The space- 6 6
𝜋 𝜋
vector diagram of any multi-level inverter is composed of six 2 if <𝜃<
6 2
hexagons, which can be reduced insteps further into the 𝜋 5𝜋
3 if <𝜃<
2 6
5𝜋 7𝜋
S= 4 if <𝜃<
6 6
7𝜋 3𝜋
5 if <𝜃<
6 6
3𝜋 11𝜋
6 if <𝜃<
6 6

Where θ denotes angular position of reference voltage


vector (V*) as represented in Figure 1 (b).
After selecting one hexagon the reference vector is
transferred towards the center of the hexagon. Figure 5(a)
(a)
and 5(b) represents first and second transformations of five-
level. The transformation is done by subtracting the center of
the selected hexagon from the original reference vector. Once
the value is determined, the origin of a reference voltage
vector is changed to the center voltage vector of the selected
hexagon. This is done by subtracting the center vector of the
selected hexagon from the original reference vector. The d
and q components of the reference voltage V3* for all six
(b)
hexagons after first transformation is explained below.
Fig. 5 First and second transformations of original reference voltage vector in
After first transformation of reference vector the five level
five-level
space vector diagram becomes three level and some regions
d and q components of the reference voltage V2*
are overlapped by two adjacent hexagons. Then the three-
level space vector diagram is decomposed into two-level. By S V2*d V2*q
selecting one hexagon, the reference vector transformed to
1 V3*d -2V.cos(0) V3*d -2V.sin(0)
the center and the space vector diagram is converted into two-
2 V3*d -2V.cos(π/3) V3*d -2V.sin(π/3)
level vector diagram. This is done by subtracting the center
3 V3*d -2V.cos(2π/3) V3*d -2V.sin(2π/)
vector of the selected hexagon from the original reference
4 V3*d -2V.cos(π) V3*d -2V.sin(π)
vector. The d and q components of the reference voltage V 2*
5 V3*d -2V.cos(4π/3) V3*d -2V.sin(4π/3)
for all six hexagons after second transformation is given
6 V3*d -2V.cos(5π/3) V3*d -2V.sin(5π/3)
below.
After obtaining the corrected reference voltage vector V 2* d and q components of the reference voltage V2*
and corresponding hexagons the conventional two level space
vector modulation technique is applied as usual. S V3*d V3*q

1 V5*d -2V.cos(0) V5*d -2V.sin(0)


2 V5*d -2V.cos(π/3) V5*d -2V.sin(π/3)

3 V5*d -2V.cos(2π/3) V5*d -2V.sin(2π/)


4 V5*d -2V.cos(π) V5*d -2V.sin(π)

5 V5*d -2V.cos(4π/3) V5*d2V.sin(4π/3)

6 V5*d -2V.cos(5π/3) V5*2V.sin(5π/3)


III. ANN BASED SVM error=mse(e)
The SVM algorithm explained in previous section is Threeindex=[x(1:z),three];
utilized to generate training data for ANN based SVM of a twoindex=[x(1:z),two];
five level inverter by writing a program. Fig. 4 shows the sa=[x(1:z), sa];
neural network topology to generate switching pulses for a sb=[x(1:z), sb];
five level inverter. It consists of 3-15-15-24 network with tan sc=[x(1:z), sc];
1 1

sigmoid activation function for middle and output layers. The 2 2

network receives the three voltages (Va, Vb and Vc) as an


3

Va 4 4
Sa

inputs and generates 24 outputs (Sa=8, Sb=8, Sc=8) but in


5 5

6 6
Sb

most of the papers, reference voltage and θ are considered as Vb


7

8
7

8
Sc

inputs. The trained data is used to generate switching pulses 9

10
9
output
layer
10

for a five level inverter. The training time is typically four Vc 11 11

Input 12 12

layer
hours with a 1GB Pentium based PC, it takes 650 epochs for 13 13

14 14

mean square error value of 0.004%. Table-I gives the five 15

Hidden
15

Hidden
layer-1 layer-2

level inverter switching states. Fig. 6 Neural network topology of five level inverter
The turn on times are calculated as TABLE-I
𝜋 FIVE-LEVEL SWITCHING STATES
4.𝑣 ∗ 𝑇𝑠 sin( −𝛼)
3
T1= 2 ∙ 𝜋 ,
𝑣𝑑𝑐 . sin Switchin Switching states
3 3 Terminal
g S2 S3 S4 S5 S6 S7 voltage
4.𝑣 ∗ 𝑇𝑠 sin(𝛼) Table S1u S8u
T2= 2 ∙ 𝜋 ,
u u u u u u

𝑣𝑑𝑐 . sin P2 on on on on off off off off 2Vdc


3 3

T0= Ts-T1-T2 P1 off on on on on off off off Vdc

Important functions of sample program as given below is 0 off off on on on on off off 0

used to train and testing the neural network. In this three N1 off off off on on on on off -Vdc

Sample programme: N2 off off off off on on on on -2Vdc

Number of training data samples=z;


IV.RESULTS AND DISCUSSION
x=in(1:z,4);% time column
p=in(1:z,1:3);% input(training data)-- A. Simulation Results
-3 inputs Va,Vb,Vc The simulation results of conventional five level inverter and

t=out(1:z,:);% target value for input ANN based five level inverter controlled drives are obtained

data considering the sampling frequency fs=5 kHz and using DC-
net=newff(p',t',[15 15],{'tansig', link voltage of 200v. The corresponding line-line voltages of
'tansig'},'trainbfg');%p-input,t—target, inverter and the performance parameters speed, torque (Te)
hidden layers neurons% and currents (ia, ib, ic) are shown in Fig 7 and Fig 8
net.trainParam.epochs=1500;% no of respectively. Harmonic performance comparison of ANN
iterations based SVM with conventional based SVM of five-level
net=train(net,p',t'); inverter line-line voltage is given in Table-II. From the
y=sim(net,p1'); % predicted value is simulation results, it is observed that the proposed ANN
given by y controlled SVM with five level inverter drive gives
comparable performance and not deteriorated much B. Experimental Validation
compared conventional five-level inverter. A prototype model of the DSP based three-phase NPC
1.Line-Voltages inverter circuit is developed in the laboratory for
experimentation. The three-phase five-level NPC is realized
using the IGBTs and fast recovery diodes. The converter
comprises 24 IGBTs and 18 fast recovery diodes. Three
inductances are connected in series with the three lines on the
AC-side of the converter, and four DC-bus capacitors are
connected on the DC-side of the converter. A DS is used for
the real-time simulation and implementation of control
algorithm. The control algorithm code is first done in
MATLAB/Simulink software. The master bit I/O is used to
Fig. 7 ANN based Five-level inverter line-line voltages
generate the required 24 gate pulses for the inverter circuit.
2.Performance parameters of induction motor
An opto-isolated interface board is also used to isolate the
entire DSP master bit I/O.
The data for training the network are generated by
running the conventional SVM system in real time and
capturing the data (Vas, Vbs and Vcs) using DSP KIT Control
Desk. Control Desk allows to capture data from the Simulink.
To capture the data to be used for neural network training, an
instrument layout is first opened in the Control Desk main
window. The application (real-time control model) is then

Fig. 8 Induction motor performance parameters with ANN


loaded into the working board. The network uses a tan-

3. %THD comparison of Line-Line voltage sigmoid transfer function for the hidden layers and linear

Table II transfer function for the output layer. The DC-link

Line-Line voltage harmonics of two SVM methods capacitance value of 1500uF is used and voltage across each

Order Conventional ANN based capacitance is 50 volt.

SVM SVM
1 100% 100%
5 0.07% 0.05%
7 0.07% 0.06%
11 0.07% 0.06%
13 0.05% 0.05%
17 0.08% 0.06%
19 0.04% 0.02%
23 0.15% 0.14%
25 0.14% 0.12%
29 0.04% 0.02% (a)
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