A Three-phase PWM AC-DC Converter with Low
Switching Frequency and High Power Factor Using
DSP-Based Repetitive Control Technique
Shih-Liang Jung, Hsiang-Sung Huang, and Ying-Yu TZOU,Member, IEEE
Power Electronics and Mechatronics Control Lab.,
Department of Electrical and Control Engineering, National Chiao Tung U'niv., Taiwan, R.O.C.
Abstract- This paper presents a novel digital control
scheme for PWM AC-DC converters with low switching
frequency used in high-power applications. The proposed
scheme incorporates an inner current loop with an outer
voltage loop to improve input power factor and regulate
the output dc-link voltage. The inner current loop consists
of a predictive controller and a repetitive controller. The
outer voltage loop is composed of a digital PI controller
and a load current compensator. A PWM AC-DC
converter employing DSP control has been constructed to
verify the proposed control scheme. A nearly unit input
power factor can be achieved even with a low switching
frequency. Experimental results confirm the feasibility
and features of the proposed repetitive control scheme for
unit power factor regulation.
I. INTRODUCTION
The line disturbance and injected harmonics caused
by nonlinear loads have drawn much concern recently
due to the growing demand for high-quality utility
power. The conventional diode rectifiers and phase-
controlled rectifiers, which were used for AC-DC
conversion in the past, have the drawbacks of poor
efficiency and low power factor. To solve these
problems, PWM AC-DC converter has been adopted in
many industrial applications owing to the advantages
of reduced line current harmonics and reversible power
flow. Moreover, it is possible for a PWM AC-DC
converter to sink nearly sinusoidal current at ac side
and thus raise the power factor. However, it's not an
easy task to control the switching devices of the AC-
DC converter so that both unity power factor and fast
dynamics can be achieved especially in high power
applications where three-phase operation and low
switching frequency are necessary.
Many schemes for controlling PWM AC-DC
converter have been proposed. The phase and
amplitude control provides good steady-state response
with reduced current harmonics and low voltage ripple
[1]-[3]. However, the response at the instant of load
transition is beyond what we can accept due to the dc
offset contained in ac side current. In addition, the
This work was supported by the National Science Council,
Taipei, Taiwan, R.O.C. Project no. NSC 85-2213-E-009-127.
0 1998 IEEE
0-7803-4489-8/98/$10.00
system is difficult to sta.bilize if the relative resistance
of the power circuit is low. The hysteresis current
control scheme features as fast dynamic response and
easy implementation [41, [5]. There's no dc offset in
the current at ac side. But the variable switching
frequency imposes excessive stress on power devices.
Another kind of control strategy named the predictive
current control with fixed switching frequency (PCFF)
was proposed in [6]. It combines many advantages of
the aforementioned methods such as fixed switching
frequency, good transient response, and simplicity. The
command for controlling line current is derived based
on the parameters of the power circuit and the
switching frequency. This implies that the PCFF
algorithm is parameter dependent. Unfortunately, these
parameters, such as inductor and resistance, vary with
temperature, nonlinearity, and saturation of magnetic
components. The effect of parasitic elements, which
can not be measured in advanced, will also be excited
as the switching frequency becomes high. The major
defeat of PCFF is that the control law requires
relatively high sampling as well as switching frequency
(> 3kwz) to guarantee its performance [7]. At low
sampling frequency, thle phase delay will result in
periodic error in ac current waveform and severely
degrade the control accuracy. The unity power factor
will no longer be obtained under such a condition. This
renders PCFF unsuitable for high-power applications.
Repetitive control theory [8]-[ lo], which originates
from internal model principle [ 1 13, provides a solution
to eliminate periodic errors in a dynamic system. A
number of modified repetitive control schemes have
been developed for various industrial applications.
Moreover, repetitive control theory has also been
applied to PWM inverters used for generating high-
quality sinusoidal output voltage in AC power sources
[12]. The inherent periodic nature in the operation of a
ac-to-dc converter makes it a good application of
repetitive control theory.
This paper presents a novel fully digital control
scheme, which can achieve high power factor even
under low switching and low sampling frequency, for a
three-phase AC-DC contverter. The proposed control
scheme consists of two parts: ac current loop and dc
voltage loop. Current loop employs an auxiliary
517

A l
I4
CT
Fig. 1. Three-phase PWM AC-DC converter.
Input stage Output stage
CO)
Fig 2. (a) Equivalent circuit of a single-phase PWM AC-DC
converter and (b) its block diagram representation.
repetitive controller to mount upon the well-known
PCFF so that the inherent periodic error caused by low
switching frequency can be suppressed. As to the
voltage loop, a digital PI controller with load current
compensation is designed to regulate the dc-link
voltage such that the ripple can be minimized. To
verify the proposed control scheme, a digital controller
based on DSP TMS32OC14 was constructed to realize
the algorithm. This paper is organized as follows:
section I1 derives the dynamic model of the PWM AC-
DC converter. Section I11 describes the design of
current-loop controller. Section IV shows the design
process of the voltage-loop controller. Section V
illustrates some simulation as well as experimental
results. A short conclusion is given in the last section.
11. 3-PHASE PWM AC-DC CONVERTER
Fig. 1 shows a typical PWM controlled three-phase
AC-DC converter. The input inductors are used to
suppress line current harmonics and the dc-link
capacitor is used to smooth output dc voltage. With
proper control of the PWM switches, the dc-link
capacitor can be minimized, the output dc voltage can
be regulated, the input power factor can be controlled,
and the power flow can be even reversed. The ratings
l
of inductors and switches can be reduced due to a
higher utilization factor. For high-power applications,
the configuration shown in Fig. 1 is usually employed
owing to its advantages of good current quality, high
I
efficiency, and low EMI.
Because of the coupling effect between each phase,
the dynamic model of the converter shown in Fig. 1
will be somewhat complicated if the system behavior is
expressed in terms of phase variables. The three-phase
dependent variables of a 3-phase PWM converter can
be transformed to their corresponding independent
two-axis variables in an orthogonal d-q frame by the
followings
Owing to the mutually decoupling nature, the dynamic
model of a three-phase AC-DC converter on d-q plane
can be treated as two single-phase converters with
independent control. The design can be performed on
d-q frame using single-phase dynamics. Fig. 2(a)
shows the circuit schematics of a single-phase PWM
AC-DC converter and its block diagram representation
is shown in Fig. 2(b). This paper proposes ‘a control
scheme to achieve both unity power factor control and
output voltage regulation. The proposed control
scheme consists of two parts: an inner current-loop
controller and an outer voltage-loop controller. All the
control laws described in the following are designed
based on the decoupled d-q model.
111. CURRENT-LOOP
CONTROLLER
Th current loop of a power converter plays an
important role in its system regulation. Power
converters without current mode control will encounter
more challenging control loop design problems in its
voltage regulation, especially load with large
uncertainties. To ease the outer loop design and
eliminate the effect of inductor dynamics, ri current
loop controller is employed for the control of 3-phase
PWM converters. In addition, the input power factor
control also depends on the synchronously regulation
of the input current.
A two-layer control scheme, as shown in Fig. 3, was
developed to regulate the current loop. The predictive
controller in the inner layer is used for the fast current
tracking and the repetitive controller in the outer layer,
518
 Repetitive
Controller
R Y
Inductor
Command,
Fig. 3. Two-layer architecture of current-loop controller.
adopts repetitive control technique to eliminate
periodic errors caused by low-frequency switching and
other unknown nonlinear effects.
A. Predictive Controller
Predictive control is an inverse model control
scheme [ 6 ] .The PWh4 output voltage (vJ, as shown in
Fig. 2, can be obtained by
di,
vi = v , -L--i,r,.
dt
Differentiation of the inductor current can be
approximated by
di, if. - i,
-z-,
dt T,
where if denotes the current command, i t is the
measured value of inductor current, and T, is the
sampling period of the current loop. The digital
realization of (3) can be expressed as
It is assumed that both the sampling and switching
frequencies are high enough so that the controlled
current can reach to its reference command at the next
sampling instant. Fig. 4 shows the block diagram of
the inner current loop under predictive control.
It follows from the above analysis that the
predictive control scheme is similar to the deadbeat
control scheme. This implies that the effectiveness of
the predictive controller is highly depend on the circuit
parameters, which is hard to be accurately measured in
practice. Moreover, in high-power applications, where
low-frequency switching is a must, the performance of
predictive controller will severely degraded due to
inevitable phase delay and current distortion. Since the
current error caused by the above defeats happens to be
periodic, we can detect its periodic nature and try to
suppress it. In this paper, a practical repetitive control
scheme is developed to eliminate periodic current
errors.
sampler
I Irr 1 I I
Digital cnnt~otler Physical system
Fig. 4. Block diagram of inner current loop under predictive control.
Fig. 5. Perio'dic signal generator.
B. Repetitive Controller
The basic concept of repetitive control theory
(3) originates from the internal model principle [ 111. The
principle states that the loutput of a control system can
track the reference input without steady-state error if
the model that generates the same reference is included
in the closed-loop system. For example, if a system is
required to track a step input without steady-state error,
(4)
the model of the step function, i.e. I/s, should be
included in its loop tranlsfer function. Similarly, if one
wants to eliminate exogenous disturbances, the same
requirements should also be met since the disturbances
can be viewed as external input to the system
concerned.
To implement a repetitive control system, a periodic
actuating signal used to cancel the periodic disturbance
must be generated. A periodic signal can be generated
with a given initial condition as shown in Fig. 5. The
positive number N denotes the number of samples
taken in one period. If this periodic signal generator
can be synthesized into a feedback system with
asymptotic stability, it is possible to track a periodic
command or reject a cyclic disturbance with the same
period. In practical applications, however, a
disturbance usually contaLins rich high-order harmonics.
This makes it impossible for the systems with limited
bandwidth to complelely eliminate the external
disturbance.
Fig. 6 illustrates the proposed repetitive control
scheme, where Q(z') represents a band-limit filter and
S ( z ' ) is a post-delay filter. The basic servo plant is the
current controlled AC-DIC converter. As illustrated in
Fig. 6, the repetitive controller functions as an auxiliary
controller that modifies the original actuating signal by
adding a periodic compensation signal. For a periodic
disturbance, the main delay loop will attenuate its
effect to the nominal control loop. However, faster
convergence of the periodic error will result a system
will smaller stability margins. In designing a repetitive
519
controller, one should make a compromise between the
error convergence rate and the stability margin. AC-DC converter

Compensators Q ( 8 ) and S(Z') in the repetitive control

loop is synthesized to compromise the tradeoff.
The function of band-limit filter Q(z-I) within the

-
I current-loov I
main delay loop is to relieve the stringent stability
voltage-loop 1-- yo
requirement for the repetitive controller to completely controller *
yo
reject the periodic disturbance. It has the form of
z-I+2+z 1,
Q(z-') = (6)
4 '
Fig. 7. Signal flow diagram of voltage control loop.
which is a weighted moving-average smoothing filter.
This filter has an advantage of zero phase shift and no less than one. With the postdelay filter defined above,
further delay will be introduced. The low-pass the repetitive compensation signal added to the
characteristics of Q ( z ' ) also put more attenuation in nominal control loop can be kept in phase with the
minimizing lower order harmonics. The stability cyclic reference or disturbance so that the periodic
margin can then be greatly improved with a little error can be suppressed on time.
sacrifice in system bandwidth. With narrower
bandwidth, the periodic disturbance can only be
suppressed to some extent rather than thoroughly IV. VOLTAGE-LOOP
CONTROLLER
rejected.
The post-delay filter S ( z ' ) compensates both the Fig. 7 shows the control block diagram of the outer
phase delay of the basic servo plant and the main delay voltage loop controller. As shown in this graph, this
loop such that the repetitive control signal can keep the control loop is highly nonlinear due to the
same phase with the cyclic disturbance to be eliminated. multiplication for generating current command. To
It has the form of facilitate further analysis and design, the system
concemed should first be linearized. Based on the
(7) assumption that no power consumed between input
stage and output stage, the following equation, which
where N is the number of samples fetched in one period. concems about the power flow of the converter, can be
M, as defined in the following, is the equivalent delay obtained as
samples of the basic servo plant and the main delay
loop: 3vi + 3-(d -Li 2 ) = ):v( + 2,
(9)
dt 2 ro

where v and i denote the rms value of input voltage and

where B is the phase delay of the basic servo plant and
main delay loop at the frequency of the periodic signal.
The factor g concems about the convergence rate of the
cyclic error and should be set as a positive real number
input current, respectively. r, represents the load
resistance and v, is the output dc voltage. By adding a
small-signal perturbation and disregarding high-order
terms, we can linearize (9) as

520
 m.....

I
filter

Fig. 8. Block diagram of outer voltage loop.

Fig. 9. PC-based DSP control of a power converter.
d 1 3 d 31 1-
(-+-)?, =-(LZ-+V)i +--;--io (10)
dt CR, CV, dt cv, c KO,= -.V O
3v
where the uppercase letters represent dc operating
points of the corresponding variables and the lowercase A digital PI controller G!,(z) is employed to regulate the
letters with hat represent their small-signal output dc voltage
perturbations. According to (10), the following transfer
functions can be obtained: G,(z) = K , +-.KiTv
z-1
3v The corresponding g i h are designed using a
= T,(s) optimization technique so that the voltage loop can
achieve fast dynamic response [ 131.

1
The far away zero of T,(s)has been neglected due to its
insignificant effect. Fig. 8 depicts the small-signal
linear model of the voltage loop together with the
proposed compensation scheme. It is noted that the
zero-order holder for digital realization and the sensor
filter have been included in the model. According to
this model, the output voltage can be expressed as
vo(s)= m ( ~ ) ~ , , ( s ) ~ , ( s ) v +
:(s)
A
(K,T,(s) - T*(S))li,(S)
and the output impedance is
where
and T, is the sampling period of the outer voltage loop.
To achieve zero output impedance, the gain KOis set as
V. EXPERIMENTAL
VERIFICTION
A 2 kVA PWM AC-DC converter has been used for
experimental verification. Digital signal processors
from Texas Instruments have been used to realize the
proposed repetitive control scheme for PWM AC-DC
converters. Fig. 9 shows the system architecture of a
PC-based DSP control card for the control of PWM
power converters. The DSP card consists of two DSPs:
TMS320C14 and TMS3120C52. The TMS32OC14 takes
charge of the execution of the designed control laws
and the management of d l U 0 ports. The TMS320C52
is responsible for data monitoring and on-line
parameter tuning.
(13) A window-based interactive digital control software
was used for the develolpment of the control software.
Communication between these two processors is
completed by a set of dual-port RAM. TMS32OC14
fetches feedback signals through multiplexer (ADG508)
and A/D converter (AID 1674), then computes the
required pulsewidth of switching devices according to
the control algorithm. The control parameters are
stored in dual-port R4M and can be tuned by
TMS32OC52. The host PC can access any data of the
system with the aid of' TMS32OC52 and show the
requested waveform on fhe screen,
Some relevant paraimeters for the experimental
verification are listed in the appendix. To demonstrate
the proposed control scheme, the P W M switching
frequency was set at 1.2 kHz and this is relatively low
compared with conventional power factor control

521
 hp stoppal hp Stopped

1 1.00 V / d l Y
Off9eli-50.00 V .
10.00 z I dc

4 8.00 viaiv 4 8.00

Dff6et' 0.000 v Off8St' 0
200.0 I I ac 200.0 ?

-,a,oooo .* 7.00000 -4 3 2 . 0 0 0 0 ms
5.00 mnldlv
CUrrenl .I"l.". .=XI"". average
Vp-p(4) 41.7500 V 41.7500 V 41.7500 V 41.7500 V
4 f 7.510 V

. . . hp stoppea
1 1.00 V / d l v
Off5e1i-50.00 .v
10.00 I I dc

4 8.00 V l d l V
OffSSti 0.000 v 4 8.00 Vldlv
200 0 : I ac o f f 5 e l ' 0.000 v
200.0 , + ac
- 1 7 0000 .* 8.00000 .6 33.0000 I S
5 . 0 0 B51dlY -18.0000 .* 7.00000 -8 32.0000 ms
5 . 0 0 .S/dlY

4 f 0.000 v
(b1
Fig. 10. AC-side current response (rectifying mode) (a) without
repetitive controller, and (b) with repetitive controller. Fig. 12. AC-side current response (regeneration mode) (a) without
repetitive controller, and (b) with repetitive controller.

1 3 00 V l d l v
OffSSti 0.000 v
10.00 I I dc

4 1 0 . 0 V/dlY
O f I P B t i 90.00 v
200.0 8 I dc
!
-244
L
500 me
1 i i ; 1 :
5 50000 P .
I I 1 I
255 500 mS
'
50 0 .S/dl"

hp slopped

Fig. 11. X-Y plot of current error in d-q frame.

schemes. Fig. 10 shows the input current response of

the digitally controlled PWM AC-DC converter. It
follows that the proposed repetitive controller does
improve both the tracking performance and power
factor. The input current can be controlled to be in
phase with utility voltage.
Fig. 11 shows the periodic tracking error in d-q
reference frame. It is obvious that the error caused by
low switching frequency has been greatly reduced after Fig. 13. Output dc voltage as load changes from lOORto 5 0 0 .
the repetitive controller applied. Fig. 12 illustrates (a)with load current compensation. (b) without load current
experimental result of the PWM converter when it was compensation.
operating in its regeneration mode. Same performance
can still be achieved even though the power flow is can be observed that the compensation of load current
reversed. With a well-controlled inner current loop, the is effective for output voltage regulation under load
outer voltage loop can be easily designed. Fig. 13 variation. The results illustrated above verify the
shows the dc output voltage of the AC-DC converter superiority of the proposed digital control scheme.
when the load resistance undergoes 100% change. It

522
 VI. CONCLUSION AIPPENDIX

This paper presents a novel digital control scheme TABLE I

for PWM AC-DC converters used in high-power RELEVANTPARAMETERS
applications, where low switching frequency is
Parameter
necessary. Two control loops are involved in the
proposed control scheme. The inner current loop Inductor, L,
concerns about the current tracking performance and I ESRofinductor, a0 1 0.5 I Q I
the power factor at ac side. The outer voltage loop is 940 pF
used to regulate the dc output voltage. The load current 0.1 R
also has been taken as feedback to improve the output

11 1
impedance such that the dc-lmk voltage can be kept Rated load resistance, R, 100 R
constant under a large load disturbance. Simulation and 100 V
experimental results show consistent agreement with 20 V(peak)
the analysis. The proposed digital control scheme does 1.2 kHz
help reducing switching frequency as low as 1.2 lcHz T, 416 fi s
while unity power factor and output voltage regulation
can still be maintained. Experimental results show that Voltage-loop sampling time, T, 2A03 ms
the proposed control scheme is very promising for Control parameter, A4
high-power applications where low frequency Control parameter, N
switching is inevitable. Control parameter, g
Control parameter, Kp 0.4
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