You are on page 1of 1

Abstract: Integral use of field-programmable gate array (FPGA), Delay Locked Loop (DLL) and Micro

Photodiode Array (MPA) for Artificial Vision in fully automated robots, self-driving automobiles and
humans.

Nikhil Pramod Rane (ranenikhil999@gmail.com)

Shram Sadhana Bombay Trust's COLLEGE OF ENGINEERING AND TECHNOLOGY, Bambhori,


Jalgaon (Maharashtra). SE (E & TC).

Abstract: The proposed system consists of a combination of circuitry which consists of an external (CCD
or CMOS) digital camera which will acquire an image, whereupon it will be encoded by PWM encoder
which will be transmitted via RF telemetry to a transceiver. Video processing will be implemented using
SRAM frame buffers, ADC (Analog to Digital converters) and a field programmable gate array (FPGA)
which is an integrated circuit (IC) semiconductor device containing programmable logic components and
programmable interconnects. Reconfigurable FPGA's allows flexibility for various image processing
algorithms using artificial neural networks. A data signal will be transmitted by AM/ ASK modulation
after which it will be passed through a class E power amplifier. The signal will be rectified and filtered,
and the overall circuitry will be capable of extracting power, data, and a clock signal. The subsequently
derived image will then be stimulated upon the Micro Photodiode Array. The inductive link used in our
system consists of two resonant circuits which provide data for setting the configuration of the stimulating
electrodes in the photoreceptive MPA. A DC power supply is obtained by the rectification of the
incoming RF signal which solves the problem of external power supply. The receiver on the secondary
side extracts four bits of data for each pixel from the incoming RF signal and provides filtering,
demodulation and amplification. The extracted data is interpreted by the electrode signal driver which
finally generates appropriate currents for the stimulating electrodes in terms of magnitude, phase, pulse
width, height and frequency. The special feature of this system is that it will use a Delay Locked Loop
(DLL) to decipher the PWM wave. Twenty controlled variable current sources (CVCS) will receive
clocking and data info from deciphered PWM wave each of which is connected to 5 electrodes using
DEMUX which will provide 4 bit linear scale stimulus which in turn altogether (100 electrodes) will
form desired image pattern. We use local gain control instead of primitive frames to obtain precisely
timed temporal contrast subsequently removing the limitation of uniform sampling rate. Visual sensations
or “phosphenes” can be evoked by electrical stimulation of the different levels of the visual pathway by
altering the membrane potential in retina in case of humans and by far if the same system is used in
automated robots along with the existing system will give them artificial vision and can also aid in fully
automated transportation vehicles. Thus we see this paper have multiple high impact broad domain
applications.

Keywords: Delay Locked Loop (DLL), SRAM frame buffers, Field Programmable Gate Array (FPGA),
Complementary metal–oxide semiconductor (CMOS) camera, class E power amplifier, Integrated Circuit
(IC), Micro Photodiode Array (MPA), Controlled Variable Current Sources (CVCS), local gain control,
neural network.